From nobody Mon May 13 14:46:02 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1661125567963551.1964775276241; Sun, 21 Aug 2022 16:46:07 -0700 (PDT) Received: from localhost ([::1]:54190 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oPudq-0004Ce-LU for importer@patchew.org; Sun, 21 Aug 2022 19:46:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52432) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPuao-0001Bh-I6 for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:42:58 -0400 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:20656) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPual-0003As-Fi for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:42:58 -0400 Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 22 Aug 2022 07:42:51 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 16:03:32 -0700 Received: from usg-ed-osssrv.wdc.com ([10.3.10.180]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 16:42:51 -0700 Received: from usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTP id 4M9sVf6S4tz1Rwnl for ; Sun, 21 Aug 2022 16:42:50 -0700 (PDT) Received: from usg-ed-osssrv.wdc.com ([127.0.0.1]) by usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id LLbnHC9-wY5d for ; Sun, 21 Aug 2022 16:42:50 -0700 (PDT) Received: from fedora.home (unknown [10.225.165.39]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4M9sVb5Gdxz1RtVk; Sun, 21 Aug 2022 16:42:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1661125375; x=1692661375; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YOQjuP0GwYm+xsEBe9XVUk27tsNs57ziEwBkqS6jfJw=; b=kmRy/QBJMBgWrBik7/1z6CnZPr9dLJsXpQ4msbKPJUeYYVxtA3owwDxR bvOzTE15woF5rzrkQZck6JDwxNIzbA5Hq9mK49KM2+tCfXkn8uFjjJZsh fEdrKHP1U+QvTK/lW7quQ99CHRdEktRlnJsAaVpQRoeH+A3jHCpPtwwX4 7yxDbgu6e/5WahyJ6hMD3/IQ+5BPlCIghGN1mho86hLLBXF0JL5ZsfdV2 kZZ0oHcZynrnxbs03wsqMsF7PXU4h7DItKr3Hh/3shsfUhe1g7ecQdU/6 qnuQQBIVT7K8J/wiTA0RJGy+J0e8HQ7Nlt1VZZgWljl27Ca8cNb+pCmVh g==; X-IronPort-AV: E=Sophos;i="5.93,253,1654531200"; d="scan'208";a="313551461" IronPort-SDR: FDYGbf12Qs/NQoeVh6a4eS8Vkf4cNqP2iUVch3Bv7JbxcrcOS+JiTpXHPzrohqDYLQDUNjp9Nn lpcn+jDmeMz4hkWFivz6FlZ7P0lBQ/G9ssAQxdtHdOLIQmE31ZNp6QiBe8+xpv/bt9OGAQdvsZ DV5CMS3EZVoso84jjaJ2ynUDMhMKitRCwO4Z42VR0pBFLcTVnZGF6TERusRoATEGYo5zk4OmON a6eS1Zl7e3gDdDIPh9RPCTlR0ed8NpFDG7GVODae2gl/OBxYQuVwQ9I0HcbVnC4R9FOJodau7P fcQ6pS1UUk4qBnX2LzvG0SJ2 IronPort-SDR: qYAndgsO1rjZL0aQru0WtFzphrFcmplue0Snc/rrR2tgxLWBleNT2loeXv0xI3FI/eONemMTh7 5fm/M2eKzlJH8UnEmRlLQ+BXfv042HCQMcLpCc2nLRQDjbCG+9VuEp8jHypqLpAn9vBPOYkyPH bhAIxngI2F762M47u2c5wEjRstx8WUJG6rWClEOnv1Xj42XqeWkbqljf6tOqSBc2EuuypLrJAW lkPW1jTAUQ5i1uafRORcvyNi4XQfgNcDfdgcj9RLUbTi3EPWqznC0nzGZYE4DjaK4bDpLRofrk HjI= WDCIronportException: Internal Authentication-Results: usg-ed-osssrv.wdc.com (amavisd-new); dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1661125370; x=1663717371; bh=YOQjuP0GwYm+xsEBe9 XVUk27tsNs57ziEwBkqS6jfJw=; b=IAOti9gW6EkAmp7q0O6MHxuBGnjatRRnUZ Yd51dDEmhF0btiFMblzVjiPHhW8eOts4cLrU6gK68SotZJKqjvuzarKbM5WHxVBB uq2HWzSe+ZE1KW3Un53cWUmrPwkcIE9JYKuyCz9n2mdXUpcgzPIjJ0aXLCXPo9Te MCCPpwrxFBDPRF022WAMMO8mFj1ifM/VaDAAsj8J4k6gXPVqFzsYXifCmiWGz/vb BwcLL/Z6r5GKzQrrcvnjhkLzPHAC5eYL0FpQMA1esi6ZLINePMeVxffI8BeCzoB1 79IrVqDhwdN2QJxaPJGJqWpt6P0Ek3/dSUBTWI0ECrPKu34swa5g== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Wilfred Mallawa To: Alistair.Francis@wdc.com, qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Wilfred Mallawa , Alistair Francis , Andrew Jones Subject: [PATCH v3 1/4] hw/ssi: ibex_spi: fixup typos in ibex_spi_host Date: Mon, 22 Aug 2022 09:41:58 +1000 Message-Id: <20220821234200.34052-2-wilfred.mallawa@opensource.wdc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> References: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=68.232.143.124; envelope-from=prvs=225a36311=wilfred.mallawa@opensource.wdc.com; helo=esa2.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1661125569091100001 Content-Type: text/plain; charset="utf-8" From: Wilfred Mallawa This patch fixes up minor typos in ibex_spi_host Signed-off-by: Wilfred Mallawa Reviewed-by: Alistair Francis Reviewed-by: Andrew Jones --- hw/ssi/ibex_spi_host.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c index d14580b409..601041d719 100644 --- a/hw/ssi/ibex_spi_host.c +++ b/hw/ssi/ibex_spi_host.c @@ -172,7 +172,7 @@ static void ibex_spi_host_irq(IbexSPIHostState *s) & R_INTR_STATE_SPI_EVENT_MASK; int err_irq =3D 0, event_irq =3D 0; =20 - /* Error IRQ enabled and Error IRQ Cleared*/ + /* Error IRQ enabled and Error IRQ Cleared */ if (error_en && !err_pending) { /* Event enabled, Interrupt Test Error */ if (s->regs[IBEX_SPI_HOST_INTR_TEST] & R_INTR_TEST_ERROR_MASK) { @@ -434,7 +434,7 @@ static void ibex_spi_host_write(void *opaque, hwaddr ad= dr, case IBEX_SPI_HOST_TXDATA: /* * This is a hardware `feature` where - * the first word written TXDATA after init is omitted entirely + * the first word written to TXDATA after init is omitted entirely */ if (s->init_status) { s->init_status =3D false; @@ -487,7 +487,7 @@ static void ibex_spi_host_write(void *opaque, hwaddr ad= dr, break; case IBEX_SPI_HOST_ERROR_STATUS: /* - * Indicates that any errors that have occurred. + * Indicates any errors that have occurred. * When an error occurs, the corresponding bit must be cleared * here before issuing any further commands */ --=20 2.37.2 From nobody Mon May 13 14:46:02 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1661126037132663.2333193152209; Sun, 21 Aug 2022 16:53:57 -0700 (PDT) Received: from localhost ([::1]:48670 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oPulQ-00078p-20 for importer@patchew.org; Sun, 21 Aug 2022 19:53:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52436) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPuas-0001MR-6D for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:43:02 -0400 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:43015) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPuap-0003B8-KX for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:43:01 -0400 Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 22 Aug 2022 07:42:56 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 15:58:18 -0700 Received: from usg-ed-osssrv.wdc.com ([10.3.10.180]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 16:42:56 -0700 Received: from usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTP id 4M9sVm3MLTz1Rwnm for ; Sun, 21 Aug 2022 16:42:56 -0700 (PDT) Received: from usg-ed-osssrv.wdc.com ([127.0.0.1]) by usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id jXYixKLBhnTv for ; Sun, 21 Aug 2022 16:42:55 -0700 (PDT) Received: from fedora.home (unknown [10.225.165.39]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4M9sVh4fq2z1RtVk; Sun, 21 Aug 2022 16:42:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1661125379; x=1692661379; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NRAQ8dWbkjQ1uBs/+vlxxPhxvsi9UYGs+d+j6NmgZPI=; b=qRLfPUoiWl8feYizUmJOKZQg7A+wWMaTdiKxA18h9npjcuABtFbfOmrT aBXl65FeIcWl4FYqjy1YkGtT8ACEBYRV7DlsCYRLNBHMjQ63eiwCyCgow uZvApr8q3mQIcvoWtzSdtpG979IeP6DalTbsWmkwTnsJO4p267FyDV7/p RgF00ftT5XmEDD3gcbdg8qBua/QYPvQRBw6rYaxOMHF9zufu0t34bPa04 T09oPMWl+vKjobL4SYSokJDNoXAFN/bFpTRsLOV95MKFQiO8GeLdQWHnT 09gtQeu7w18Ciu0MmzFwgPU3ACWHV0kdmYG7AIdlq8cXcIKwE9Xu4f6NU g==; X-IronPort-AV: E=Sophos;i="5.93,253,1654531200"; d="scan'208";a="209788372" IronPort-SDR: RvmXDbQue/JPCV2pmk5EM/onATuyGuu2biMWyGSzkg4p1tzkW5vDeyEahSIYM4+vulGEVWyCWS CyL6CZhKJXphot/W6cunlTNs2posBvS195haucEQwCTg1gFT1cIAagABw4JkL8Ssqb0Nm2Osa5 9AFKNXBiCQ8o6F6Ql5OnG2uQRkO9YsNkpS9u/OSm5iAMisHfHqOqVkwzrBAsQLRdq+A+eAYQzN kCJWt+y5AYrc5yByVqdMBZjZIOYiv5xKdAx4TF03SnTQ/rYv10ec/uH4vmy6vHFQ5YfQ4KRqKH l70TB5P/zv/XhDSpA6Tw/lh5 IronPort-SDR: NIT911R0gUtlfPWBh0eyHjeT+uaMFtMYy16pF8rwunFV5wruBQzvTLl0GVFFwF8h7UxWpSwhrM 9iGByG8AefmrUU4nYV86L7IZFIjxTNzVxlL3oV/nqsvjjXeRtEYTUirRYuySyBpzfOHbPYglmT YudYQE8mitCUn8aiU1ULfPKJKE/OnsSNua1pPfpaPkjJfXRxHIN7OpA5kOqRVzoKxXmXXS7dQJ /VFcAlJVuS1tpOHfu4Xi8TgT10BUzDrdNB9PRV5alDiQOmoUZF6ryHzF6MW/V5+xnpcn8Nc8RZ 3sk= WDCIronportException: Internal Authentication-Results: usg-ed-osssrv.wdc.com (amavisd-new); dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1661125375; x=1663717376; bh=NRAQ8dWbkjQ1uBs/+v lxxPhxvsi9UYGs+d+j6NmgZPI=; b=ARwEndajzlB36AluAZ7m6PDXM/Y5dHIFjG H7sconaHUs7E3BqjYdHsfwSNAGInoxi1h/zzybc3ee5x/aTV9Npz/IkJVTTTT46o L12Hds0TKBVoXmqy2WaYtVvAft6ITY9t8/+cNOKe5XAKVOB7hQM3rfhFK+ZrAkgo kRTzKx2OdTv7SFdpqlq6LnOrD8Sf1/OflZor6qRQrMMuo5NDEPUMRd0mLB+PPmCu f38ufAoX2hXo3DngSDCrSRGnT1cFlgt3AQwpeP2sYnZRRDaJezVajyc4kQMP11AW sZC8lgTm4aLzgJ1fM4xbeXzdVGWt27WIGsMoJshCH8PG7e42oSLw== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Wilfred Mallawa To: Alistair.Francis@wdc.com, qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Wilfred Mallawa , Andrew Jones Subject: [PATCH v3 2/4] hw/ssi: ibex_spi: fixup coverity issue Date: Mon, 22 Aug 2022 09:41:59 +1000 Message-Id: <20220821234200.34052-3-wilfred.mallawa@opensource.wdc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> References: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.154.45; envelope-from=prvs=225a36311=wilfred.mallawa@opensource.wdc.com; helo=esa6.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1661126038844100001 Content-Type: text/plain; charset="utf-8" From: Wilfred Mallawa This patch addresses the coverity issues specified in [1], as suggested, `FIELD_DP32()`/`FIELD_EX32()` macros have been implemented to clean up the code. [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg887713.html Fixes: Coverity CID 1488107 Signed-off-by: Wilfred Mallawa Reviewed-by: Andrew Jones --- hw/ssi/ibex_spi_host.c | 130 +++++++++++++++++++++-------------------- 1 file changed, 66 insertions(+), 64 deletions(-) diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c index 601041d719..1298664d2b 100644 --- a/hw/ssi/ibex_spi_host.c +++ b/hw/ssi/ibex_spi_host.c @@ -108,18 +108,20 @@ static inline uint8_t div4_round_up(uint8_t dividend) =20 static void ibex_spi_rxfifo_reset(IbexSPIHostState *s) { + uint32_t data =3D s->regs[IBEX_SPI_HOST_STATUS]; /* Empty the RX FIFO and assert RXEMPTY */ fifo8_reset(&s->rx_fifo); - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_RXFULL_MASK; - s->regs[IBEX_SPI_HOST_STATUS] |=3D R_STATUS_RXEMPTY_MASK; + data =3D FIELD_DP32(data, STATUS, RXEMPTY, 1); + s->regs[IBEX_SPI_HOST_STATUS] =3D data; } =20 static void ibex_spi_txfifo_reset(IbexSPIHostState *s) { + uint32_t data =3D s->regs[IBEX_SPI_HOST_STATUS]; /* Empty the TX FIFO and assert TXEMPTY */ fifo8_reset(&s->tx_fifo); - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_TXFULL_MASK; - s->regs[IBEX_SPI_HOST_STATUS] |=3D R_STATUS_TXEMPTY_MASK; + data =3D FIELD_DP32(data, STATUS, TXEMPTY, 1); + s->regs[IBEX_SPI_HOST_STATUS] =3D data; } =20 static void ibex_spi_host_reset(DeviceState *dev) @@ -162,37 +164,38 @@ static void ibex_spi_host_reset(DeviceState *dev) */ static void ibex_spi_host_irq(IbexSPIHostState *s) { - bool error_en =3D s->regs[IBEX_SPI_HOST_INTR_ENABLE] - & R_INTR_ENABLE_ERROR_MASK; - bool event_en =3D s->regs[IBEX_SPI_HOST_INTR_ENABLE] - & R_INTR_ENABLE_SPI_EVENT_MASK; - bool err_pending =3D s->regs[IBEX_SPI_HOST_INTR_STATE] - & R_INTR_STATE_ERROR_MASK; - bool status_pending =3D s->regs[IBEX_SPI_HOST_INTR_STATE] - & R_INTR_STATE_SPI_EVENT_MASK; + uint32_t intr_test_reg =3D s->regs[IBEX_SPI_HOST_INTR_TEST]; + uint32_t intr_en_reg =3D s->regs[IBEX_SPI_HOST_INTR_ENABLE]; + uint32_t intr_state_reg =3D s->regs[IBEX_SPI_HOST_INTR_STATE]; + + uint32_t err_en_reg =3D s->regs[IBEX_SPI_HOST_ERROR_ENABLE]; + uint32_t event_en_reg =3D s->regs[IBEX_SPI_HOST_EVENT_ENABLE]; + uint32_t err_status_reg =3D s->regs[IBEX_SPI_HOST_ERROR_STATUS]; + uint32_t status_reg =3D s->regs[IBEX_SPI_HOST_STATUS]; + + + bool error_en =3D FIELD_EX32(intr_en_reg, INTR_ENABLE, ERROR); + bool event_en =3D FIELD_EX32(intr_en_reg, INTR_ENABLE, SPI_EVENT); + bool err_pending =3D FIELD_EX32(intr_state_reg, INTR_STATE, ERROR); + bool status_pending =3D FIELD_EX32(intr_state_reg, INTR_STATE, SPI_EVE= NT); + int err_irq =3D 0, event_irq =3D 0; =20 /* Error IRQ enabled and Error IRQ Cleared */ if (error_en && !err_pending) { /* Event enabled, Interrupt Test Error */ - if (s->regs[IBEX_SPI_HOST_INTR_TEST] & R_INTR_TEST_ERROR_MASK) { + if (FIELD_EX32(intr_test_reg, INTR_TEST, ERROR)) { err_irq =3D 1; - } else if ((s->regs[IBEX_SPI_HOST_ERROR_ENABLE] - & R_ERROR_ENABLE_CMDBUSY_MASK) && - s->regs[IBEX_SPI_HOST_ERROR_STATUS] - & R_ERROR_STATUS_CMDBUSY_MASK) { + } else if (FIELD_EX32(err_en_reg, ERROR_ENABLE, CMDBUSY) && + FIELD_EX32(err_status_reg, ERROR_STATUS, CMDBUSY)) { /* Wrote to COMMAND when not READY */ err_irq =3D 1; - } else if ((s->regs[IBEX_SPI_HOST_ERROR_ENABLE] - & R_ERROR_ENABLE_CMDINVAL_MASK) && - s->regs[IBEX_SPI_HOST_ERROR_STATUS] - & R_ERROR_STATUS_CMDINVAL_MASK) { + } else if (FIELD_EX32(err_en_reg, ERROR_ENABLE, CMDINVAL) && + FIELD_EX32(err_status_reg, ERROR_STATUS, CMDINVAL)) { /* Invalid command segment */ err_irq =3D 1; - } else if ((s->regs[IBEX_SPI_HOST_ERROR_ENABLE] - & R_ERROR_ENABLE_CSIDINVAL_MASK) && - s->regs[IBEX_SPI_HOST_ERROR_STATUS] - & R_ERROR_STATUS_CSIDINVAL_MASK) { + } else if (FIELD_EX32(err_en_reg, ERROR_ENABLE, CSIDINVAL) && + FIELD_EX32(err_status_reg, ERROR_STATUS, CSIDINVAL)) { /* Invalid value for CSID */ err_irq =3D 1; } @@ -204,22 +207,19 @@ static void ibex_spi_host_irq(IbexSPIHostState *s) =20 /* Event IRQ Enabled and Event IRQ Cleared */ if (event_en && !status_pending) { - if (s->regs[IBEX_SPI_HOST_INTR_TEST] & R_INTR_TEST_SPI_EVENT_MASK)= { + if (FIELD_EX32(intr_test_reg, INTR_STATE, SPI_EVENT)) { /* Event enabled, Interrupt Test Event */ event_irq =3D 1; - } else if ((s->regs[IBEX_SPI_HOST_EVENT_ENABLE] - & R_EVENT_ENABLE_READY_MASK) && - (s->regs[IBEX_SPI_HOST_STATUS] & R_STATUS_READY_MASK))= { + } else if (FIELD_EX32(event_en_reg, EVENT_ENABLE, READY) && + FIELD_EX32(status_reg, STATUS, READY)) { /* SPI Host ready for next command */ event_irq =3D 1; - } else if ((s->regs[IBEX_SPI_HOST_EVENT_ENABLE] - & R_EVENT_ENABLE_TXEMPTY_MASK) && - (s->regs[IBEX_SPI_HOST_STATUS] & R_STATUS_TXEMPTY_MASK= )) { + } else if (FIELD_EX32(event_en_reg, EVENT_ENABLE, TXEMPTY) && + FIELD_EX32(status_reg, STATUS, TXEMPTY)) { /* SPI TXEMPTY, TXFIFO drained */ event_irq =3D 1; - } else if ((s->regs[IBEX_SPI_HOST_EVENT_ENABLE] - & R_EVENT_ENABLE_RXFULL_MASK) && - (s->regs[IBEX_SPI_HOST_STATUS] & R_STATUS_RXFULL_MASK)= ) { + } else if (FIELD_EX32(event_en_reg, EVENT_ENABLE, RXFULL) && + FIELD_EX32(status_reg, STATUS, RXFULL)) { /* SPI RXFULL, RXFIFO full */ event_irq =3D 1; } @@ -232,10 +232,11 @@ static void ibex_spi_host_irq(IbexSPIHostState *s) =20 static void ibex_spi_host_transfer(IbexSPIHostState *s) { - uint32_t rx, tx; + uint32_t rx, tx, data; /* Get num of one byte transfers */ - uint8_t segment_len =3D ((s->regs[IBEX_SPI_HOST_COMMAND] & R_COMMAND_L= EN_MASK) - >> R_COMMAND_LEN_SHIFT); + uint8_t segment_len =3D FIELD_EX32(s->regs[IBEX_SPI_HOST_COMMAND], + COMMAND, LEN); + while (segment_len > 0) { if (fifo8_is_empty(&s->tx_fifo)) { /* Assert Stall */ @@ -262,22 +263,21 @@ static void ibex_spi_host_transfer(IbexSPIHostState *= s) --segment_len; } =20 + data =3D s->regs[IBEX_SPI_HOST_STATUS]; /* Assert Ready */ - s->regs[IBEX_SPI_HOST_STATUS] |=3D R_STATUS_READY_MASK; + data =3D FIELD_DP32(data, STATUS, READY, 1); /* Set RXQD */ - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_RXQD_MASK; - s->regs[IBEX_SPI_HOST_STATUS] |=3D (R_STATUS_RXQD_MASK - & div4_round_up(segment_len)); + data =3D FIELD_DP32(data, STATUS, RXQD, div4_round_up(segment_len)); /* Set TXQD */ - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_TXQD_MASK; - s->regs[IBEX_SPI_HOST_STATUS] |=3D (fifo8_num_used(&s->tx_fifo) / 4) - & R_STATUS_TXQD_MASK; + data =3D FIELD_DP32(data, STATUS, TXQD, fifo8_num_used(&s->tx_fifo) / = 4); /* Clear TXFULL */ - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_TXFULL_MASK; - /* Assert TXEMPTY and drop remaining bytes that exceed segment_len */ - ibex_spi_txfifo_reset(s); + data =3D FIELD_DP32(data, STATUS, TXFULL, 0); /* Reset RXEMPTY */ - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_RXEMPTY_MASK; + data =3D FIELD_DP32(data, STATUS, RXEMPTY, 0); + /* Update register status */ + s->regs[IBEX_SPI_HOST_STATUS] =3D data; + /* Drop remaining bytes that exceed segment_len */ + ibex_spi_txfifo_reset(s); =20 ibex_spi_host_irq(s); } @@ -340,7 +340,7 @@ static void ibex_spi_host_write(void *opaque, hwaddr ad= dr, { IbexSPIHostState *s =3D opaque; uint32_t val32 =3D val64; - uint32_t shift_mask =3D 0xff; + uint32_t shift_mask =3D 0xff, data =3D 0, status =3D 0; uint8_t txqd_len; =20 trace_ibex_spi_host_write(addr, size, val64); @@ -397,22 +397,24 @@ static void ibex_spi_host_write(void *opaque, hwaddr = addr, s->regs[addr] =3D val32; =20 /* STALL, IP not enabled */ - if (!(s->regs[IBEX_SPI_HOST_CONTROL] & R_CONTROL_SPIEN_MASK)) { + if (!(FIELD_EX32(s->regs[IBEX_SPI_HOST_CONTROL], + CONTROL, SPIEN))) { return; } =20 /* SPI not ready, IRQ Error */ - if (!(s->regs[IBEX_SPI_HOST_STATUS] & R_STATUS_READY_MASK)) { + if (!(FIELD_EX32(s->regs[IBEX_SPI_HOST_STATUS], + STATUS, READY))) { s->regs[IBEX_SPI_HOST_ERROR_STATUS] |=3D R_ERROR_STATUS_CMDBUS= Y_MASK; ibex_spi_host_irq(s); return; } + /* Assert Not Ready */ s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_READY_MASK; =20 - if (((val32 & R_COMMAND_DIRECTION_MASK) >> R_COMMAND_DIRECTION_SHI= FT) - !=3D BIDIRECTIONAL_TRANSFER) { - qemu_log_mask(LOG_UNIMP, + if (FIELD_EX32(val32, COMMAND, DIRECTION) !=3D BIDIRECTIONAL_TRANS= FER) { + qemu_log_mask(LOG_UNIMP, "%s: Rx Only/Tx Only are not supported\n", __fun= c__); } =20 @@ -452,8 +454,8 @@ static void ibex_spi_host_write(void *opaque, hwaddr ad= dr, return; } /* Byte ordering is set by the IP */ - if ((s->regs[IBEX_SPI_HOST_STATUS] & - R_STATUS_BYTEORDER_MASK) =3D=3D 0) { + status =3D s->regs[IBEX_SPI_HOST_STATUS]; + if (FIELD_EX32(status, STATUS, BYTEORDER) =3D=3D 0) { /* LE: LSB transmitted first (default for ibex processor) = */ shift_mask =3D 0xff << (i * 8); } else { @@ -464,18 +466,18 @@ static void ibex_spi_host_write(void *opaque, hwaddr = addr, =20 fifo8_push(&s->tx_fifo, (val32 & shift_mask) >> (i * 8)); } - + status =3D s->regs[IBEX_SPI_HOST_STATUS]; /* Reset TXEMPTY */ - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_TXEMPTY_MASK; + status =3D FIELD_DP32(status, STATUS, TXEMPTY, 0); /* Update TXQD */ - txqd_len =3D (s->regs[IBEX_SPI_HOST_STATUS] & - R_STATUS_TXQD_MASK) >> R_STATUS_TXQD_SHIFT; + txqd_len =3D FIELD_EX32(status, STATUS, TXQD); /* Partial bytes (size < 4) are padded, in words. */ txqd_len +=3D 1; - s->regs[IBEX_SPI_HOST_STATUS] &=3D ~R_STATUS_TXQD_MASK; - s->regs[IBEX_SPI_HOST_STATUS] |=3D txqd_len; + status =3D FIELD_DP32(status, STATUS, TXQD, txqd_len); /* Assert Ready */ - s->regs[IBEX_SPI_HOST_STATUS] |=3D R_STATUS_READY_MASK; + status =3D FIELD_DP32(status, STATUS, READY, 1); + /* Update register status */ + s->regs[IBEX_SPI_HOST_STATUS] =3D status; break; case IBEX_SPI_HOST_ERROR_ENABLE: s->regs[addr] =3D val32; --=20 2.37.2 From nobody Mon May 13 14:46:02 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1661125600635856.4653127189098; Sun, 21 Aug 2022 16:46:40 -0700 (PDT) Received: from localhost ([::1]:52376 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oPueN-0005iP-HE for importer@patchew.org; Sun, 21 Aug 2022 19:46:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51266) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPuaw-0001Vj-Ji for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:43:07 -0400 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:43024) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPuau-0003Bt-U3 for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:43:06 -0400 Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 22 Aug 2022 07:43:03 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 15:58:25 -0700 Received: from usg-ed-osssrv.wdc.com ([10.3.10.180]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 16:43:02 -0700 Received: from usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTP id 4M9sVt46sVz1Rwnm for ; Sun, 21 Aug 2022 16:43:02 -0700 (PDT) Received: from usg-ed-osssrv.wdc.com ([127.0.0.1]) by usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id H4jviKen7R3V for ; Sun, 21 Aug 2022 16:43:02 -0700 (PDT) Received: from fedora.home (unknown [10.225.165.39]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4M9sVq4Dk9z1RtVk; Sun, 21 Aug 2022 16:42:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1661125384; x=1692661384; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xMaY8NlwoSvGdUIAmYJVI0+3gJBYtjFwCsHeIDt7NGs=; b=INkECxUAvqxd1jz8eRPoXifd5loDWejHKxRrMb9UMnIm9KtBBmPKzRGz hgt78pM4vK+A5UkAzC7gjcMqFUcJ6E961jcTLv7xAYlHgSgbWrmmnhdqE QBQ4TQXlhodhBDyIcpltB8OMUyCqADACi6iF/jfJYt/0oEf8KXTZwO2+Y nAwSGI4LpduLGBnRQgF2nDZBrkDoZ/czKOSlWP8zlspgxshpzUs2PsoCT 5VMtxvKfebSrRu+DGcB5s9qkDwectL8t+FvXPNdZxthRG2Xpkmh3G0UU3 0wqbDqVcDxlyyfnmN7GJn4+i2sGqgrnAGvy6n/1ayAd6PJoy0OzykIzH+ Q==; X-IronPort-AV: E=Sophos;i="5.93,253,1654531200"; d="scan'208";a="209788377" IronPort-SDR: JYoLxS7mhjHld0Q4DJsnxCGOomBS8m/G4rZX3aC9YLeURiv0sSZy1NcXy+Z3Q7r9PH0HWGffeE KNXwqXGSCAEt7pkdY3GIJPAYjzNXIkAtYwLm81nXor4l93LLv4k2RJuWmRYW8TWsZQm8eoBjsV 1K7UWbmndXQPFwHe3UMOXxqLqgIO9rXzNgASOaE9UPw62we+R+ldRWj65nl0fUI6cLTgOUUW5Z 6nls6i9mViPACUeWlg1VvYAIvbzL2alOdCVoNulzlhw3Cgu25xTcqdWDD7TWbxDzXk906JWOOF +9K4U+JG5eBMEdZLwMiP4cE5 IronPort-SDR: FD7vho3hu6FxgocxQ9rSwB+3snDvlF2Unn0SjPFih7/22rY67RIRaYJCkvtxJQff89OIb1i7FZ QsagsXOBzojK4QBezQAeFoEN1i4PahlrAiVBegV3lufjMQllWV9bTCW9lOmlH13+UDsVQfIpzL WWAY2mmM8HAoSxVAyHGX3b1JVL2HJUebgCIbpZzlO2JJJswPg3IdNOPGarw2zVMJOl1Plzsrq8 CKTQre6wu61q2Xns/GJ/lTSRZZUjuqdk+P+MW+WLbyIs84Xpu+JlkuH6TEHSD6TWpORJtOJWkb azQ= WDCIronportException: Internal Authentication-Results: usg-ed-osssrv.wdc.com (amavisd-new); dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1661125382; x=1663717383; bh=xMaY8NlwoSvGdUIAmY JVI0+3gJBYtjFwCsHeIDt7NGs=; b=rpgHw5fgfIQJg1AxmkN1WZ+T2dQDg+t2iu FSFOjDewSJ5iS4FD+Mut41qBkX0QWUdWf6x9ClCt383ygZyNKWxN91CDJAMVOz33 6JVQaWdgZNrN2szl0DB1L9ngQCAUwrpk9OAqDc0xkGZcecVMtwvGKdXKcipzdJMA AG9EuUtXcRELL/NaED/6ymQXg5+/LBtXl47Ob8fiPDAhKY3qoxalWmQBWPkzC9Pc rIyYiTTW+iHk6nwgmL78YpfWYggFbm1VMoMnBZI1BbyHZJwzCx7Yxpzfb0jE5TEi N2b33ZeYSxRzWEwtrO0emhjY0Z6t3R9zVOsibftkgDrUR1A59Rcw== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Wilfred Mallawa To: Alistair.Francis@wdc.com, qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Wilfred Mallawa , Alistair Francis Subject: [PATCH v3 3/4] hw/ssi: ibex_spi: fixup/add rw1c functionality Date: Mon, 22 Aug 2022 09:42:00 +1000 Message-Id: <20220821234200.34052-4-wilfred.mallawa@opensource.wdc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> References: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.154.45; envelope-from=prvs=225a36311=wilfred.mallawa@opensource.wdc.com; helo=esa6.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1661125601099100001 Content-Type: text/plain; charset="utf-8" From: Wilfred Mallawa This patch adds the `rw1c` functionality to the respective registers. The status fields are cleared when the respective field is set. Signed-off-by: Wilfred Mallawa Reviewed-by: Alistair Francis --- hw/ssi/ibex_spi_host.c | 34 ++++++++++++++++++++++++++++++++-- include/hw/ssi/ibex_spi_host.h | 4 ++-- 2 files changed, 34 insertions(+), 4 deletions(-) diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c index 1298664d2b..3809febb0c 100644 --- a/hw/ssi/ibex_spi_host.c +++ b/hw/ssi/ibex_spi_host.c @@ -350,7 +350,17 @@ static void ibex_spi_host_write(void *opaque, hwaddr a= ddr, =20 switch (addr) { /* Skipping any R/O registers */ - case IBEX_SPI_HOST_INTR_STATE...IBEX_SPI_HOST_INTR_ENABLE: + case IBEX_SPI_HOST_INTR_STATE: + /* rw1c status register */ + if (FIELD_EX32(val32, INTR_STATE, ERROR)) { + data =3D FIELD_DP32(data, INTR_STATE, ERROR, 0); + } + if (FIELD_EX32(val32, INTR_STATE, SPI_EVENT)) { + data =3D FIELD_DP32(data, INTR_STATE, SPI_EVENT, 0); + } + s->regs[addr] =3D data; + break; + case IBEX_SPI_HOST_INTR_ENABLE: s->regs[addr] =3D val32; break; case IBEX_SPI_HOST_INTR_TEST: @@ -493,7 +503,27 @@ static void ibex_spi_host_write(void *opaque, hwaddr a= ddr, * When an error occurs, the corresponding bit must be cleared * here before issuing any further commands */ - s->regs[addr] =3D val32; + status =3D s->regs[addr]; + /* rw1c status register */ + if (FIELD_EX32(val32, ERROR_STATUS, CMDBUSY)) { + status =3D FIELD_DP32(status, ERROR_STATUS, CMDBUSY, 0); + } + if (FIELD_EX32(val32, ERROR_STATUS, OVERFLOW)) { + status =3D FIELD_DP32(status, ERROR_STATUS, OVERFLOW, 0); + } + if (FIELD_EX32(val32, ERROR_STATUS, UNDERFLOW)) { + status =3D FIELD_DP32(status, ERROR_STATUS, UNDERFLOW, 0); + } + if (FIELD_EX32(val32, ERROR_STATUS, CMDINVAL)) { + status =3D FIELD_DP32(status, ERROR_STATUS, CMDINVAL, 0); + } + if (FIELD_EX32(val32, ERROR_STATUS, CSIDINVAL)) { + status =3D FIELD_DP32(status, ERROR_STATUS, CSIDINVAL, 0); + } + if (FIELD_EX32(val32, ERROR_STATUS, ACCESSINVAL)) { + status =3D FIELD_DP32(status, ERROR_STATUS, ACCESSINVAL, 0); + } + s->regs[addr] =3D status; break; case IBEX_SPI_HOST_EVENT_ENABLE: /* Controls which classes of SPI events raise an interrupt. */ diff --git a/include/hw/ssi/ibex_spi_host.h b/include/hw/ssi/ibex_spi_host.h index 3fedcb6805..1f6d077766 100644 --- a/include/hw/ssi/ibex_spi_host.h +++ b/include/hw/ssi/ibex_spi_host.h @@ -40,7 +40,7 @@ OBJECT_CHECK(IbexSPIHostState, (obj), TYPE_IBEX_SPI_HOST) =20 /* SPI Registers */ -#define IBEX_SPI_HOST_INTR_STATE (0x00 / 4) /* rw */ +#define IBEX_SPI_HOST_INTR_STATE (0x00 / 4) /* rw1c */ #define IBEX_SPI_HOST_INTR_ENABLE (0x04 / 4) /* rw */ #define IBEX_SPI_HOST_INTR_TEST (0x08 / 4) /* wo */ #define IBEX_SPI_HOST_ALERT_TEST (0x0c / 4) /* wo */ @@ -54,7 +54,7 @@ #define IBEX_SPI_HOST_TXDATA (0x28 / 4) =20 #define IBEX_SPI_HOST_ERROR_ENABLE (0x2c / 4) /* rw */ -#define IBEX_SPI_HOST_ERROR_STATUS (0x30 / 4) /* rw */ +#define IBEX_SPI_HOST_ERROR_STATUS (0x30 / 4) /* rw1c */ #define IBEX_SPI_HOST_EVENT_ENABLE (0x34 / 4) /* rw */ =20 /* FIFO Len in Bytes */ --=20 2.37.2 From nobody Mon May 13 14:46:02 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1661125931381390.41629260828813; Sun, 21 Aug 2022 16:52:11 -0700 (PDT) Received: from localhost ([::1]:57360 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oPujf-0002i5-Tt for importer@patchew.org; Sun, 21 Aug 2022 19:52:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43900) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPub6-0001eM-T4 for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:43:16 -0400 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:43028) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oPub5-0003CL-2d for qemu-devel@nongnu.org; Sun, 21 Aug 2022 19:43:16 -0400 Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 22 Aug 2022 07:43:08 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 15:58:30 -0700 Received: from usg-ed-osssrv.wdc.com ([10.3.10.180]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Aug 2022 16:43:08 -0700 Received: from usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTP id 4M9sVz6q9qz1Rwnm for ; Sun, 21 Aug 2022 16:43:07 -0700 (PDT) Received: from usg-ed-osssrv.wdc.com ([127.0.0.1]) by usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id CRUE9yEF9-me for ; Sun, 21 Aug 2022 16:43:07 -0700 (PDT) Received: from fedora.home (unknown [10.225.165.39]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4M9sVw1qqwz1RtVk; Sun, 21 Aug 2022 16:43:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1661125395; x=1692661395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NkXq9BEmisYvxPBBnnF+3nWPoQ4uRWizUP6v4tzOoqo=; b=F8arwkJyiPS3Dq4K97wWCzH1FzH0fZnuimIhT9EhX149aseBGwcf593P PsYS3sJvwTJCSj1FTRpMF0fSSO7uxiAOBDhOhBfq21kNtOdK5hc5W5qog bJ7I0Njjmr5Rd8qQkXK6KxP66HDOsm/smgB3ptlqGw/GDXF0fw00ZPwss qHzy2U+FUqKPEthpdwRVsSPk7TeLKE/lZ6Mws66zri/lkbvqQzbXjVEDD jQEiNCh636DVT/5RxRXVGeuiV512cK+xyyZcpnhldzagLxbyLof866u2z XIfGXopcwlxyrr8E8Ae0yuM+uLGK220Uwfj8U2vrKO0pLZq6Mok9iuTah Q==; X-IronPort-AV: E=Sophos;i="5.93,253,1654531200"; d="scan'208";a="209788379" IronPort-SDR: SOpHG2nqlYkzgrzAdVNaOM3s5IV5Q6cUFGm9x/18aNMwzWksdqjhQqr8O06NLA7XZxO6iQuyUS 23oCMH7CU4MHs2+sYoyIPZz62GJgHlLrfOrrHRjNAXmBcQJxPOyEzZ55QIofgyoK/eK/btExhM u56pMJfOCfyxbxQFjz4lumTnBXr1coEMs2kPZW66ouLAb03D9RLFTAlrBvg+JWasOgKlcC0L0k GZu3hOWX9M7PMAeR/jOoXU1frpdbKy+469p/ws5ZTAr7wMmYV5io0XO20NJPRnDEvHI9aqhGxW i2Bn5NA1pYECgftjVF4UvHvS IronPort-SDR: L3qNgtUWIORMGdfczgmUhLDPAOUf+ZKFE/XfqhU394TFeOgY4vzYVj+6vplp3htVoxyBHDP/Go B+RQmEsLALzqmBf3q6vCCn+qfwlWb84N8Oohx9FDkRvuX2M0U7bGa/tDazqdXSkSn9OTd9/4/5 Fl/Tmilv2BO+No1Yd8UQfHYSbIiZtb4ViX7czbnjeOwb8ASKcYEwCnTMUV8DUlihPYQKsZ9BUx pkcwhdDJeKbaPSihOsVKCBXAafg+tKFprQiw2i9j71dL8WM+jMSJ6DmpkRt62ropUXgPf28yEy J8I= WDCIronportException: Internal Authentication-Results: usg-ed-osssrv.wdc.com (amavisd-new); dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1661125387; x=1663717388; bh=NkXq9BEmisYvxPBBnn F+3nWPoQ4uRWizUP6v4tzOoqo=; b=FfF95BDFbFITx1aVl5x8mJUYtNy/j7oyJm 5EpKFFrTUWCeAZSHkem5PpKV/Jewa8QfSjidB18e2N21/SYdlKRNFLIXFCI4/Wna TIyVSUN3cHG1hj8gNRWpDCE3H27SV9DeDTWOl9LGLi2y3ucuoUCvmI5RBT2XSnw6 ypKfs8zS+hiNDVoEuUtCJmKOcsBNBo/6AKkzezdIU9VczVSE8/f2zYr/aBZfGiux udRSdfefimCX7Y9N0QPHLBU1lsAaCrt+hiFKQHDg0Hgo77nDRS8k24Q9fIvnLCjK tM7jBuqb/FrkektE95cTVPDAH0HC9uJxg9fQ/vprEWSCh8gs1OUA== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Wilfred Mallawa To: Alistair.Francis@wdc.com, qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Wilfred Mallawa , Alistair Francis Subject: [PATCH v3 4/4] hw/ssi: ibex_spi: update reg addr Date: Mon, 22 Aug 2022 09:42:01 +1000 Message-Id: <20220821234200.34052-5-wilfred.mallawa@opensource.wdc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> References: <20220821234200.34052-1-wilfred.mallawa@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.154.45; envelope-from=prvs=225a36311=wilfred.mallawa@opensource.wdc.com; helo=esa6.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1661125932384100001 Content-Type: text/plain; charset="utf-8" From: Wilfred Mallawa Updates the `EVENT_ENABLE` register to offset `0x34` as per OpenTitan spec [1]. [1] https://docs.opentitan.org/hw/ip/spi_host/doc/#Reg_event_enable Signed-off-by: Wilfred Mallawa Reviewed-by: Alistair Francis --- hw/ssi/ibex_spi_host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c index 3809febb0c..bafff8ca1f 100644 --- a/hw/ssi/ibex_spi_host.c +++ b/hw/ssi/ibex_spi_host.c @@ -93,7 +93,7 @@ REG32(ERROR_STATUS, 0x30) FIELD(ERROR_STATUS, CMDINVAL, 3, 1) FIELD(ERROR_STATUS, CSIDINVAL, 4, 1) FIELD(ERROR_STATUS, ACCESSINVAL, 5, 1) -REG32(EVENT_ENABLE, 0x30) +REG32(EVENT_ENABLE, 0x34) FIELD(EVENT_ENABLE, RXFULL, 0, 1) FIELD(EVENT_ENABLE, TXEMPTY, 1, 1) FIELD(EVENT_ENABLE, RXWM, 2, 1) --=20 2.37.2