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([2605:ef80:80f6:61fa:9bc2:5095:d612:5e22]) by smtp.gmail.com with ESMTPSA id y23-20020a056870b01700b0010ef8ccde67sm2285220oae.13.2022.08.16.13.34.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 13:34:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=yvFaYil5KCmrJ18ST8mO/xgAXl5EVxbXc1ztEfjbOPQ=; b=Nxqz1pmVh/GpNWvT4Tloo4OxtjLId9CRdVZcUMNS4fibSV/v/3YYyBSoAevlSjTuVt pYjghwLEb0ZUaZ7jwOCdo3jadDZCpyKifIE8G8dbIN27eHeVboFZgYLLgFWihKOg9aAK /XM6UBNatULz6zeiN8UVeJWOII9O0BFtNBOV7zmyB7OpDSMPRHz8pUtjt4PJM47euxAn ZGXWbUkdJLlbSyC5DyQgAuDHkx0ZIpn7JxnAVm2x1Jo3aqIDdDKYCm8B9KK0TTT1HB96 IfJWPJVOvF8FpL3TRAqRqUfcOZcT67rxZToSPfeobeg4hRWBeA79g4Hts2XdwS07mBjn r4IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=yvFaYil5KCmrJ18ST8mO/xgAXl5EVxbXc1ztEfjbOPQ=; b=XQ8FQ1NDLpuGBfppLywtwBeVlFbWNkPRO0ubrl0Cfgf+JxoHEf68dc618QUXYtm1lC hYudKhO7PE+jP9Q83ubYcLdQEHiPzq9+DjHvw1ZXyRgQPRqJfg5bk/5PGYB4Ymj51isd lQteidIHd6UDAXom0rCOd4aXgPjBSNEDRD1L7BEE7Let9oqjx3n+gC/uRpUMa1mvT6Oo eyX86LHoYsVd46xILE1zOme8UfOQD4WtHYqClQrK9Gje7gikZ6fHfqH+otBXD/3TUCpu TwknTOO0JLuLr+SpbXqQFJYzwARU74gV/Es72lEE5+nTlnWte6A3Ph5dddn8dzZCafcA lsTw== X-Gm-Message-State: ACgBeo1R+h6T31nDpxWleYu30qAjxYXOaB3jwhJjDwyZN5tRT8n1QWU4 midPtd8IXixIfK/v5fJsUMB2VvxIjkMQ5w== X-Google-Smtp-Source: AA6agR6HqyeAUO+VriiEATpxONLVQA6JaR0DjkHSSbfEtmil/PIwNzraOiffR9KeUnVxCaQjC9LFng== X-Received: by 2002:aca:ad0c:0:b0:342:f3e2:32a9 with SMTP id w12-20020acaad0c000000b00342f3e232a9mr128410oie.261.1660682065222; Tue, 16 Aug 2022 13:34:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, alex.bennee@linaro.org, iii@linux.ibm.com Subject: [PATCH v2 08/33] accel/tcg: Make tb_htable_lookup static Date: Tue, 16 Aug 2022 15:33:35 -0500 Message-Id: <20220816203400.161187-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220816203400.161187-1-richard.henderson@linaro.org> References: <20220816203400.161187-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::229; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1660682777438100001 Content-Type: text/plain; charset="utf-8" The function is not used outside of cpu-exec.c. Move it and its subroutines up in the file, before the first use. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 3 - accel/tcg/cpu-exec.c | 122 ++++++++++++++++++++-------------------- 2 files changed, 61 insertions(+), 64 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 311e5fb422..e7e30d55b8 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -552,9 +552,6 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr a= ddr, MemTxAttrs attrs); #endif void tb_flush(CPUState *cpu); void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); -TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, - target_ulong cs_base, uint32_t flags, - uint32_t cflags); void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr); =20 /* GETPC is the true target of the return instruction that we'll execute. = */ diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index a565a3f8ec..711859d4d4 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -170,6 +170,67 @@ uint32_t curr_cflags(CPUState *cpu) return cflags; } =20 +struct tb_desc { + target_ulong pc; + target_ulong cs_base; + CPUArchState *env; + tb_page_addr_t phys_page1; + uint32_t flags; + uint32_t cflags; + uint32_t trace_vcpu_dstate; +}; + +static bool tb_lookup_cmp(const void *p, const void *d) +{ + const TranslationBlock *tb =3D p; + const struct tb_desc *desc =3D d; + + if (tb->pc =3D=3D desc->pc && + tb->page_addr[0] =3D=3D desc->phys_page1 && + tb->cs_base =3D=3D desc->cs_base && + tb->flags =3D=3D desc->flags && + tb->trace_vcpu_dstate =3D=3D desc->trace_vcpu_dstate && + tb_cflags(tb) =3D=3D desc->cflags) { + /* check next page if needed */ + if (tb->page_addr[1] =3D=3D -1) { + return true; + } else { + tb_page_addr_t phys_page2; + target_ulong virt_page2; + + virt_page2 =3D (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZ= E; + phys_page2 =3D get_page_addr_code(desc->env, virt_page2); + if (tb->page_addr[1] =3D=3D phys_page2) { + return true; + } + } + } + return false; +} + +static TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, + target_ulong cs_base, uint32_t f= lags, + uint32_t cflags) +{ + tb_page_addr_t phys_pc; + struct tb_desc desc; + uint32_t h; + + desc.env =3D cpu->env_ptr; + desc.cs_base =3D cs_base; + desc.flags =3D flags; + desc.cflags =3D cflags; + desc.trace_vcpu_dstate =3D *cpu->trace_dstate; + desc.pc =3D pc; + phys_pc =3D get_page_addr_code(desc.env, pc); + if (phys_pc =3D=3D -1) { + return NULL; + } + desc.phys_page1 =3D phys_pc & TARGET_PAGE_MASK; + h =3D tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate); + return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); +} + /* Might cause an exception, so have a longjmp destination ready */ static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc, target_ulong cs_base, @@ -487,67 +548,6 @@ void cpu_exec_step_atomic(CPUState *cpu) end_exclusive(); } =20 -struct tb_desc { - target_ulong pc; - target_ulong cs_base; - CPUArchState *env; - tb_page_addr_t phys_page1; - uint32_t flags; - uint32_t cflags; - uint32_t trace_vcpu_dstate; -}; - -static bool tb_lookup_cmp(const void *p, const void *d) -{ - const TranslationBlock *tb =3D p; - const struct tb_desc *desc =3D d; - - if (tb->pc =3D=3D desc->pc && - tb->page_addr[0] =3D=3D desc->phys_page1 && - tb->cs_base =3D=3D desc->cs_base && - tb->flags =3D=3D desc->flags && - tb->trace_vcpu_dstate =3D=3D desc->trace_vcpu_dstate && - tb_cflags(tb) =3D=3D desc->cflags) { - /* check next page if needed */ - if (tb->page_addr[1] =3D=3D -1) { - return true; - } else { - tb_page_addr_t phys_page2; - target_ulong virt_page2; - - virt_page2 =3D (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZ= E; - phys_page2 =3D get_page_addr_code(desc->env, virt_page2); - if (tb->page_addr[1] =3D=3D phys_page2) { - return true; - } - } - } - return false; -} - -TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, - target_ulong cs_base, uint32_t flags, - uint32_t cflags) -{ - tb_page_addr_t phys_pc; - struct tb_desc desc; - uint32_t h; - - desc.env =3D cpu->env_ptr; - desc.cs_base =3D cs_base; - desc.flags =3D flags; - desc.cflags =3D cflags; - desc.trace_vcpu_dstate =3D *cpu->trace_dstate; - desc.pc =3D pc; - phys_pc =3D get_page_addr_code(desc.env, pc); - if (phys_pc =3D=3D -1) { - return NULL; - } - desc.phys_page1 =3D phys_pc & TARGET_PAGE_MASK; - h =3D tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate); - return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); -} - void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) { if (TCG_TARGET_HAS_direct_jump) { --=20 2.34.1