From nobody Tue May 7 09:39:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=collabora.com ARC-Seal: i=1; a=rsa-sha256; t=1660643906; cv=none; d=zohomail.com; s=zohoarc; b=GY5VJrNmR/hHEBxLLwwuO5t7iNw09SFSyzaj531vhadIK+DML8JYEnZt6hJGFwSmWjLaH3TL+jOQp0kFDtbv3BrTYOP+mSGk7Y8M9pEC3i0EnKeIA5Ej3YC2WwAPRBBk1r4SAFolne1J6R5yd6KQNSPBhNviPvYRG78y1OZ+7Qc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660643906; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=AyurqNGUNr1VdkIXy/c47WgtGwe7Y7wmrGKqw4cRfEA=; b=fQsApBS5xqupYeso7DbzWvfiOUYkIx4rNyT+fBJS6pdPYsczWXrFVetNdEpTOBTUrdGrisVZUBduHcD0+6SHFA9im07i5lqp4vGIDrrb/Bzw8zAlSgfbItADkM4hYM48AnX0F+AO04KwYpnjgTsI2sUUBPTfITbyiDZo13ExQHU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16606439066434.792637383763918; Tue, 16 Aug 2022 02:58:26 -0700 (PDT) Received: from localhost ([::1]:38334 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oNtL7-0003vw-99 for importer@patchew.org; Tue, 16 Aug 2022 05:58:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36188) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oNt6P-0006cg-Ea for qemu-devel@nongnu.org; Tue, 16 Aug 2022 05:43:13 -0400 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]:43302) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oNt6J-0006TS-Tg for qemu-devel@nongnu.org; Tue, 16 Aug 2022 05:43:09 -0400 Received: from dellino.fritz.box (host-82-49-100-203.retail.telecomitalia.it [82.49.100.203]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1B89E6600378; Tue, 16 Aug 2022 10:43:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1660642985; bh=3UMkRMI4ytgRqD/eIDW2R5dGqE7htACAx7RK9FhXRxI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eVvp23Leapx8Hpu7DuK4K1/1Zg+V7MiDWNs9QnLZGcPZYwhmQB/bO283HDD3Hh0b3 8r0hybmXuvieQty7ZKAEyz+OY6d1vC82/bF+vSFu4R3PL2wThuT62yp2jax4Bbsduu +NJwdtiRtf0nUdr6eEUeuW9t84/nP1Lizxdt2fNLmglAj/QaTHCEp8Xr4pOLgspwan ejmoOy7LLhsr0gDHXQfCLAidhLeTAMRDt9/VYf4YuRTiTBIpcHOAZq9dBX7FXkse1h vayhpxpfhY0EHiiLpLCrNvWYA5d7ahnecvdwDrImuq/m6Cjj0yXM7OoUYXzEI+Z9ce EkLex6ADuKJqg== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: "Dr. David Alan Gilbert" , "Michael S. Tsirkin" Subject: [PATCH v3 1/2] virtio: Add shared memory capability Date: Tue, 16 Aug 2022 11:42:44 +0200 Message-Id: <20220816094245.64153-2-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220816094245.64153-1-antonio.caggiano@collabora.com> References: <20220816094245.64153-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @collabora.com) X-ZM-MESSAGEID: 1660643908064100001 Content-Type: text/plain; charset="utf-8" From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' and the data structure 'virtio_pci_shm_cap' to go with it. They allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead. v3: No need for mask32 as cpu_to_le32 truncates the value. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano --- hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 45327f0b31..50bd230122 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1164,6 +1164,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *pr= oxy, return offset; } =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap =3D { + .cap.cap_len =3D sizeof cap, + .cap.cfg_type =3D VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar =3D bar; + cap.cap.length =3D cpu_to_le32(length); + cap.length_hi =3D cpu_to_le32(length >> 32); + cap.cap.offset =3D cpu_to_le32(offset); + cap.offset_hi =3D cpu_to_le32(offset >> 32); + cap.cap.id =3D id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 2446dcd9ae..5e5c4a4c6d 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTyp= eInfo *t); */ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id); + #endif --=20 2.34.1 From nobody Tue May 7 09:39:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=collabora.com ARC-Seal: i=1; a=rsa-sha256; t=1660643368; cv=none; d=zohomail.com; s=zohoarc; b=nv9/7b/WBMKM20HjZKOmhr1OrqzSwCsxx0CaLdGWgpsLrzqDliYCxqmlhlptTcCYwSeIyK8JhB5tP4uyFnwjkwb9AcB09P7Lyhumq53gYlog5wehSF5oeEEmmhHQpGxoRBwIdXUrHtQP6hWsc/5RVayG+ZpH3jgREOyOL3Sg8jY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660643368; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=QNfKMcocISfKHBBlonHz4tL5l0EAo7gFl191jlbUdCA=; b=UB1Fq01Lx67CjxlBASQsTWaSo6Yz9QYYUHdO3oR9VJjF1MvRi2Ih1Rnfcw1IGJrbOOCD/eBgtP9fuzpl61zg9Ta/YB6o9JMyeTJyakRjmwZFE3U3b2JC2GycuLKQFCT0oqMd7SEthnQe1RfMWq2WwbsH6tqFXwm/+dFKBZCqVe8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1660643368855861.6540721862362; Tue, 16 Aug 2022 02:49:28 -0700 (PDT) Received: from localhost ([::1]:60082 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oNtCQ-0002oU-Hs for importer@patchew.org; Tue, 16 Aug 2022 05:49:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36190) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oNt6P-0006ch-Ea for qemu-devel@nongnu.org; Tue, 16 Aug 2022 05:43:13 -0400 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]:43308) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oNt6J-0006Ta-Vt for qemu-devel@nongnu.org; Tue, 16 Aug 2022 05:43:09 -0400 Received: from dellino.fritz.box (host-82-49-100-203.retail.telecomitalia.it [82.49.100.203]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id A567F6600379; Tue, 16 Aug 2022 10:43:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1660642985; bh=zgAkwkHHaTxMrqMCkE07evkOHPeHMLjjiTu5oGKA7Lc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CVbhZ2yzocxm00koIr9yvQkf3GAN9IarQv7FF70Kj9unbrMuP2tMukN5RDniLwoOO NPywbplA8xST91Ay0hX/nor/beur54dEYoDH2pJpbXIeZEhENKnlDVlsbAA3lg5vPy YtJiWW+sqYJI9L3TneqJPLkV/eUyyMNJpeQY26GxTSr4VTTKbVvhLU3vSWTV82u0+R CbP4tQFMPHYpQPOLxXvfDxu1SaON1s25nNr0AH4WWESM94b9Vc+Opqw+2GRn88fC1g cTj4+g62AnYhoItOljTIjdo+8pUe39aNqEp5+z4zQvQ1887FPMLMLPKtagabxODXFQ l9I3Vqgv8v+NA== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , "Michael S . Tsirkin" Subject: [PATCH v3 2/2] virtio-gpu: hostmem Date: Tue, 16 Aug 2022 11:42:45 +0200 Message-Id: <20220816094245.64153-3-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220816094245.64153-1-antonio.caggiano@collabora.com> References: <20220816094245.64153-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @collabora.com) X-ZM-MESSAGEID: 1660643370812100001 Content-Type: text/plain; charset="utf-8" From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. v2: Formatting fixes Signed-off-by: Antonio Caggiano Acked-by: Michael S. Tsirkin --- hw/display/virtio-gpu-pci.c | 15 +++++++++++++++ hw/display/virtio-gpu.c | 1 + hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- include/hw/virtio/virtio-gpu.h | 5 +++++ 4 files changed, 45 insertions(+), 9 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..2cbbacd7fe 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,21 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *= vpci_dev, Error **errp) DeviceState *vdev =3D DEVICE(g); int i; =20 + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 20cc703dcc..506b3b8eef 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1424,6 +1424,7 @@ static Property virtio_gpu_properties[] =3D { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 4dcb34c4a7..aa8d1ab993 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *v= pci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); =20 - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx =3D 2; - vpci_dev->msix_bar_idx =3D 4; vpci_dev->modern_io_bar_idx =3D 5; =20 + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvg= a. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx =3D 2; + vpci_dev->msix_bar_idx =3D 4; + } else { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=3Doff there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 2e28507efe..eafce75b04 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) =20 struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; =20 struct virtio_gpu_ctrl_command { @@ -131,6 +134,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; =20 + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; =20 int enabled_output_bitmask; --=20 2.34.1