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d="scan'208";a="291319240" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,221,1654585200"; d="scan'208";a="931970567" From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [PATCH v2 3/8] target/i386/intel-pt: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD Date: Mon, 8 Aug 2022 16:58:29 +0800 Message-Id: <20220808085834.3227541-4-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220808085834.3227541-1-xiaoyao.li@intel.com> References: <20220808085834.3227541-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.24; envelope-from=xiaoyao.li@intel.com; helo=mga09.intel.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1659950325331100001 Content-Type: text/plain; charset="utf-8" CPUID leaf 0x14 subleaf 0x0 and 0x1 enumerate the resource and capability of Intel PT. Introduce FeatureWord FEAT_14_0_EBX, FEAT_14_1_EAX and FEAT_14_1_EBX, and complete FEAT_14_0_ECX. Thus all the features of Intel PT can be expanded when "-cpu host/max" and can be configured in named CPU model. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 136 +++++++++++++++++++++++++++++++++++++++++++--- target/i386/cpu.h | 3 + 2 files changed, 130 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fa02910ce811..8b74d18c127f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1208,17 +1208,32 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = =3D { } }, =20 + [FEAT_14_0_EBX] =3D { + .type =3D CPUID_FEATURE_WORD, + .feat_names =3D { + [0] =3D "intel-pt-cr3-filter", + [1] =3D "intel-pt-psb", + [2] =3D "intel-pt-ip-filter", + [3] =3D "intel-pt-mtc", + [4] =3D "intel-pt-ptwrite", + [5] =3D "intel-pt-power-event", + [6] =3D "intel-pt-psb-pmi-preservation", + }, + .cpuid =3D { + .eax =3D 0x14, + .needs_ecx =3D true, .ecx =3D 0, + .reg =3D R_EBX, + }, + }, + [FEAT_14_0_ECX] =3D { .type =3D CPUID_FEATURE_WORD, .feat_names =3D { - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, "intel-pt-lip", + [0] =3D "intel-pt-topa", + [1] =3D "intel-pt-multi-topa-entries", + [2] =3D "intel-pt-single-range", + [3] =3D "intel-pt-trace-transport-subsystem", + [31] =3D "intel-pt-lip", }, .cpuid =3D { .eax =3D 0x14, @@ -1228,6 +1243,79 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D= { .tcg_features =3D TCG_14_0_ECX_FEATURES, }, =20 + [FEAT_14_1_EAX] =3D { + .type =3D CPUID_FEATURE_WORD, + .feat_names =3D { + [0] =3D "intel-pt-addr-range-num-bit0", + [1] =3D "intel-pt-addr-range-num-bit1", + [2] =3D "intel-pt-addr-range-num-bit2", + [16] =3D "intel-pt-mtc-period-encoding-0", + [17] =3D "intel-pt-mtc-period-encoding-1", + [18] =3D "intel-pt-mtc-period-encoding-2", + [19] =3D "intel-pt-mtc-period-encoding-3", + [20] =3D "intel-pt-mtc-period-encoding-4", + [21] =3D "intel-pt-mtc-period-encoding-5", + [22] =3D "intel-pt-mtc-period-encoding-6", + [23] =3D "intel-pt-mtc-period-encoding-7", + [24] =3D "intel-pt-mtc-period-encoding-8", + [25] =3D "intel-pt-mtc-period-encoding-9", + [26] =3D "intel-pt-mtc-period-encoding-10", + [27] =3D "intel-pt-mtc-period-encoding-11", + [28] =3D "intel-pt-mtc-period-encoding-12", + [29] =3D "intel-pt-mtc-period-encoding-13", + [30] =3D "intel-pt-mtc-period-encoding-14", + [31] =3D "intel-pt-mtc-period-encoding-15", + }, + .cpuid =3D { + .eax =3D 0x14, + .needs_ecx =3D true, .ecx =3D 1, + .reg =3D R_EAX, + }, + }, + + [FEAT_14_1_EBX] =3D { + .type =3D CPUID_FEATURE_WORD, + .feat_names =3D { + [0] =3D "intel-pt-cyc-thresh-0", + [1] =3D "intel-pt-cyc-thresh-1", + [2] =3D "intel-pt-cyc-thresh-2", + [3] =3D "intel-pt-cyc-thresh-4", + [4] =3D "intel-pt-cyc-thresh-8", + [5] =3D "intel-pt-cyc-thresh-16", + [6] =3D "intel-pt-cyc-thresh-32", + [7] =3D "intel-pt-cyc-thresh-64", + [8] =3D "intel-pt-cyc-thresh-128", + [9] =3D "intel-pt-cyc-thresh-256", + [10] =3D "intel-pt-cyc-thresh-512", + [11] =3D "intel-pt-cyc-thresh-1024", + [12] =3D "intel-pt-cyc-thresh-2048", + [13] =3D "intel-pt-cyc-thresh-4096", + [14] =3D "intel-pt-cyc-thresh-8192", + [15] =3D "intel-pt-cyc-thresh-16384", + [16] =3D "intel-pt-psb-freq-2k", + [17] =3D "intel-pt-psb-freq-4k", + [18] =3D "intel-pt-psb-freq-8k", + [19] =3D "intel-pt-psb-freq-16k", + [20] =3D "intel-pt-psb-freq-32k", + [21] =3D "intel-pt-psb-freq-64k", + [22] =3D "intel-pt-psb-freq-128k", + [23] =3D "intel-pt-psb-freq-256k", + [24] =3D "intel-pt-psb-freq-512k", + [25] =3D "intel-pt-psb-freq-1m", + [26] =3D "intel-pt-psb-freq-2m", + [27] =3D "intel-pt-psb-freq-4m", + [28] =3D "intel-pt-psb-freq-8m", + [29] =3D "intel-pt-psb-freq-16m", + [30] =3D "intel-pt-psb-freq-32m", + [31] =3D "intel-pt-psb-freq-64m", + }, + .cpuid =3D { + .eax =3D 0x14, + .needs_ecx =3D true, .ecx =3D 1, + .reg =3D R_EBX, + }, + }, + [FEAT_SGX_12_0_EAX] =3D { .type =3D CPUID_FEATURE_WORD, .feat_names =3D { @@ -1367,10 +1455,22 @@ static FeatureDep feature_dependencies[] =3D { .from =3D { FEAT_7_0_EBX, CPUID_7_0_EBX_RDSEED }, .to =3D { FEAT_VMX_SECONDARY_CTLS, VMX_SECONDARY_EXEC_RDSEED_EX= ITING }, }, + { + .from =3D { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT }, + .to =3D { FEAT_14_0_EBX, ~0ull }, + }, { .from =3D { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT }, .to =3D { FEAT_14_0_ECX, ~0ull }, }, + { + .from =3D { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT }, + .to =3D { FEAT_14_1_EAX, ~0ull }, + }, + { + .from =3D { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT }, + .to =3D { FEAT_14_1_EBX, ~0ull }, + }, { .from =3D { FEAT_8000_0001_EDX, CPUID_EXT2_RDTSCP }, .to =3D { FEAT_VMX_SECONDARY_CTLS, VMX_SECONDARY_EXEC_RDTSCP }, @@ -6318,7 +6418,25 @@ static void x86_cpu_filter_features(X86CPU *cpu, boo= l verbose) uint64_t host_feat =3D x86_cpu_get_supported_feature_word(w, false); uint64_t requested_features =3D env->features[w]; - uint64_t unavailable_features =3D requested_features & ~host_feat; + uint64_t unavailable_features; + + switch (w) { + case FEAT_14_1_EAX: + /* Handling the bits except INTEL_PT_ADDR_RANGES_NUM_MASK */ + unavailable_features =3D (requested_features & ~host_feat) & + ~INTEL_PT_ADDR_RANGES_NUM_MASK; + /* Bits 2:0 are as a whole to represent INTEL_PT_ADDR_RANGES */ + if ((requested_features & INTEL_PT_ADDR_RANGES_NUM_MASK) > + (host_feat & INTEL_PT_ADDR_RANGES_NUM_MASK)) { + unavailable_features |=3D requested_features & + INTEL_PT_ADDR_RANGES_NUM_MASK; + } + break; + default: + unavailable_features =3D requested_features & ~host_feat; + break; + } + mark_unavailable_features(cpu, w, unavailable_features, prefix); } =20 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 82004b65b944..28584c78adbb 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -615,7 +615,10 @@ typedef enum FeatureWord { FEAT_VMX_EPT_VPID_CAPS, FEAT_VMX_BASIC, FEAT_VMX_VMFUNC, + FEAT_14_0_EBX, FEAT_14_0_ECX, + FEAT_14_1_EAX, + FEAT_14_1_EBX, FEAT_SGX_12_0_EAX, /* CPUID[EAX=3D0x12,ECX=3D0].EAX (SGX) */ FEAT_SGX_12_0_EBX, /* CPUID[EAX=3D0x12,ECX=3D0].EBX (SGX MISCSELECT[3= 1:0]) */ FEAT_SGX_12_1_EAX, /* CPUID[EAX=3D0x12,ECX=3D1].EAX (SGX ATTRIBUTES[3= 1:0]) */ --=20 2.27.0