From nobody Fri Apr 26 12:55:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1659620664630421.88721779251136; Thu, 4 Aug 2022 06:44:24 -0700 (PDT) Received: from localhost ([::1]:46342 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oJb9C-0004xl-Ma for importer@patchew.org; Thu, 04 Aug 2022 09:44:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51090) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oJaqX-0005BP-LV for qemu-devel@nongnu.org; Thu, 04 Aug 2022 09:25:06 -0400 Received: from mail.loongson.cn ([114.242.206.163]:59194 helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oJaqT-0003rC-Ci for qemu-devel@nongnu.org; Thu, 04 Aug 2022 09:25:03 -0400 Received: from lingfengzhe-ms7c94.loongson.cn (unknown [10.90.50.23]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dx8M6iyOti5u8FAA--.22631S2; Thu, 04 Aug 2022 21:24:50 +0800 (CST) From: Qi Hu To: Song Gao , Xiaojuan Yang Cc: qemu-devel@nongnu.org Subject: [PATCH] target/loongarch: Fix macros SET_FPU_* in cpu.h Date: Thu, 4 Aug 2022 21:24:50 +0800 Message-Id: <20220804132450.314329-1-huqi@loongson.cn> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf9Dx8M6iyOti5u8FAA--.22631S2 X-Coremail-Antispam: 1UD129KBjvJXoW7WFWrWr13ArWDuryUJryDGFg_yoW8GF1rpr 4xCFyrtw4YyF42k3WfAFWYywnxZrW2kws7XFn7C3y7G3ZxW3WkAFyF9w10vryDW34fJF1F qr15A34FgFsxuFUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUyEb7Iv0xC_Kw4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4 A2jsIEc7CjxVAFwI0_GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IE w4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMc vjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCY02Avz4vE-syl42xK82IYc2Ij 64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x 8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE 2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42 xK8VAvwI8IcIk0rVWrZr1j6s0DMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIE c7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU5PpnJUUUUU== X-CM-SenderInfo: pkxtxqxorr0wxvrqhubq/1tbiAQAICV3QvP+hCAAxsW Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=huqi@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1659620665329100001 Content-Type: text/plain; charset="utf-8" The macros SET_FPU_* are used to set corresponding bits of fcsr. Unfortunately it forgets to set the result and it causes fcsr's "CAUSE" never being updated. This patch is to fix this bug. Signed-off-by: Qi Hu Reviewed-by:=C2=A0 Song Gao --- target/loongarch/cpu.h | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index a36349df83..dce999aaac 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -47,11 +47,23 @@ FIELD(FCSR0, FLAGS, 16, 5) FIELD(FCSR0, CAUSE, 24, 5) =20 #define GET_FP_CAUSE(REG) FIELD_EX32(REG, FCSR0, CAUSE) -#define SET_FP_CAUSE(REG, V) FIELD_DP32(REG, FCSR0, CAUSE, V) +#define SET_FP_CAUSE(REG, V) \ + do { \ + (REG) =3D FIELD_DP32(REG, FCSR0, CAUSE, V); \ + } while (0) + #define GET_FP_ENABLES(REG) FIELD_EX32(REG, FCSR0, ENABLES) -#define SET_FP_ENABLES(REG, V) FIELD_DP32(REG, FCSR0, ENABLES, V) +#define SET_FP_ENABLES(REG, V) \ + do { \ + (REG) =3D FIELD_DP32(REG, FCSR0, ENABLES, V); \ + } while (0) + #define GET_FP_FLAGS(REG) FIELD_EX32(REG, FCSR0, FLAGS) -#define SET_FP_FLAGS(REG, V) FIELD_DP32(REG, FCSR0, FLAGS, V) +#define SET_FP_FLAGS(REG, V) \ + do { \ + (REG) =3D FIELD_DP32(REG, FCSR0, FLAGS, V); \ + } while (0) + #define UPDATE_FP_FLAGS(REG, V) \ do { \ (REG) |=3D FIELD_DP32(0, FCSR0, FLAGS, V); \ --=20 2.37.1