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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 3/3] target/arm: Move sve probe inside kvm >= 4.15 branch
Date: Mon, 1 Aug 2022 16:36:05 +0100
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From: Richard Henderson <richard.henderson@linaro.org>
The test for the IF block indicates no ID registers are exposed, much
less host support for SVE. Move the SVE probe into the ELSE block.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220726045828.53697-4-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/kvm64.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 43cd7eb8904..9b9dd46d782 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -679,18 +679,18 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures=
*ahcf)
err |=3D read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
ARM64_SYS_REG(3, 3, 9, 12, 0));
}
- }
=20
- if (sve_supported) {
- /*
- * There is a range of kernels between kernel commit 73433762fcae
- * and f81cb2c3ad41 which have a bug where the kernel doesn't expo=
se
- * SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has enabl=
ed
- * SVE support, which resulted in an error rather than RAZ.
- * So only read the register if we set KVM_ARM_VCPU_SVE above.
- */
- err |=3D read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0,
- ARM64_SYS_REG(3, 0, 0, 4, 4));
+ if (sve_supported) {
+ /*
+ * There is a range of kernels between kernel commit 73433762f=
cae
+ * and f81cb2c3ad41 which have a bug where the kernel doesn't
+ * expose SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the V=
M has
+ * enabled SVE support, which resulted in an error rather than=
RAZ.
+ * So only read the register if we set KVM_ARM_VCPU_SVE above.
+ */
+ err |=3D read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0,
+ ARM64_SYS_REG(3, 0, 0, 4, 4));
+ }
}
=20
kvm_arm_destroy_scratch_host_vcpu(fdarray);
--=20
2.25.1