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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=67.231.153.30; envelope-from=prvs=9208ef30ce=irischenlj@fb.com; helo=mx0b-00082601.pphosted.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @fb.com) X-ZM-MESSAGEID: 1659050752342100001 Content-Type: text/plain; charset="utf-8" With SPI-GPIO we don't have the input bits until all 8 bits of the output have been shifted out, so we have to prime the MISO with bogus values (0xFF). Signed-off-by: Iris Chen --- hw/block/m25p80.c | 29 ++++++++++++++++++++++++++++- hw/ssi/ssi.c | 4 ---- include/hw/ssi/ssi.h | 5 +++++ 3 files changed, 33 insertions(+), 5 deletions(-) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index a8d2519141..9b26bb96e5 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -1462,7 +1462,7 @@ static int m25p80_cs(SSIPeripheral *ss, bool select) return 0; } =20 -static uint32_t m25p80_transfer8(SSIPeripheral *ss, uint32_t tx) +static uint32_t m25p80_transfer8_ex(SSIPeripheral *ss, uint32_t tx) { Flash *s =3D M25P80(ss); uint32_t r =3D 0; @@ -1548,6 +1548,33 @@ static uint32_t m25p80_transfer8(SSIPeripheral *ss, = uint32_t tx) return r; } =20 +/* + * Pre-reading logic for m25p80_transfer8: + * The existing SPI model assumes the output byte is fully formed, + * can be passed to the SPI device, and the input byte can be returned, + * all in one operation. With SPI-GPIO, we don't have the input byte + * until all 8 bits of the output have been shifted out, so we have + * to prime the MISO with bogus values (0xFF). + */ +static uint32_t m25p80_transfer8(SSIPeripheral *ss, uint32_t tx) +{ + Flash *s =3D M25P80(ss); + SSIBus *ssibus =3D (SSIBus *)qdev_get_parent_bus(DEVICE(s)); + + uint8_t prev_state =3D s->state; + uint32_t r =3D m25p80_transfer8_ex(ss, tx); + uint8_t curr_state =3D s->state; + + if (ssibus->preread && + /* cmd state has changed into DATA reading state */ + (!(prev_state =3D=3D STATE_READ || prev_state =3D=3D STATE_READING_= DATA) && + (curr_state =3D=3D STATE_READ || curr_state =3D=3D STATE_READING_DA= TA))) { + r =3D m25p80_transfer8_ex(ss, 0xFF); + } + + return r; +} + static void m25p80_write_protect_pin_irq_handler(void *opaque, int n, int = level) { Flash *s =3D M25P80(opaque); diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 003931fb50..21570fe25f 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -19,10 +19,6 @@ #include "qapi/error.h" #include "qom/object.h" =20 -struct SSIBus { - BusState parent_obj; -}; - #define TYPE_SSI_BUS "SSI" OBJECT_DECLARE_SIMPLE_TYPE(SSIBus, SSI_BUS) =20 diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index f411858ab0..e54073d822 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -30,6 +30,11 @@ enum SSICSMode { SSI_CS_HIGH, }; =20 +struct SSIBus { + BusState parent_obj; + bool preread; +}; + /* Peripherals. */ struct SSIPeripheralClass { DeviceClass parent_class; --=20 2.30.2