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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f5-20020adff445000000b0021e5f32ade7sm11725343wrp.68.2022.07.26.11.23.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jul 2022 11:23:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QQROlt4QVdWy3PgKcMHnT+BgFWVY7Xfnt+DtI1eK/+U=; b=hI4I+aG+qseGvHhj+PS81gWaL9nnKgSOXj4UeBCyzZLT6zjGF4Iz/CDeN2a2SApiP1 MvsJ7Hcx2isugEbhZcG1auFe6TdX+rU/vCinwlQtKtOVJFZ8idc4pkMsqT5LXEXZwdqc cAjXMoI+0qbF8wEOET0hQcMMD3El9zdjABG0FN4RRJDD/l8wZdPkn8lzzYdDVIat/Erj tsnuH/5E1lF4ox/f8nxxDqnW6DMi8r8mW7eqYdc7XUt5kZKUDytr51WdBCHyHBuAqUv3 oLRgoRT4X6d57HG90Ra9Bu+5DVJ1+pC8DebkX4eGo019ZbZ/RLagGKthEc92OtDsgMsT 81Gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QQROlt4QVdWy3PgKcMHnT+BgFWVY7Xfnt+DtI1eK/+U=; b=HfkDuK0A0Kk1rpNOPRatOOscnvARtruuWfaOOW3PfeIeEvPmgF8bD5nmf7bS2Wxp57 NN5ttXFxNuqxA4iKnmvj6huxPErBkwNUDTMk9QJcNWGBWU25zOK3scgrg6iey99TZEgF kJCy8spn+VM0JEg79XnVTU/mdxI3h9QUEMs5UIwvmYTbl5o+6eLrvjQ4Lp+qWsEx/Gxh Gde7KDwNMVBm2eGNh63RcsyfTZ44LDDWiuHqpbw1/ubBzTb0TSAdNR/UxXUQlxBWrRJV 35z/IZOcM5uhmRVsSBAHZaijrc746nH++ak+jfRwvom8i4be+k/50XoPZbCgc1pE/OgL Y+Lg== X-Gm-Message-State: AJIora9b883WmdIix9//IeYuBmfzahfYl3v3fZqhDHOPqpvGiFVz4eFg F2aloxDx5wYXlXTz3Tuc9qFM3NezxeJaCg== X-Google-Smtp-Source: AGRyM1vw1/utAIIu2VyLJHJS0e7URGOWRjBeWBqs6y/drfWHCFn7wOsJ8N4WObmjiOhcsj6b4D/Cow== X-Received: by 2002:a05:600c:410c:b0:3a3:2d78:f07f with SMTP id j12-20020a05600c410c00b003a32d78f07fmr330621wmi.130.1658859826677; Tue, 26 Jul 2022 11:23:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, BALATON Zoltan , Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [RFC 2/2] hw/ppc/ppc440_uc: Handle mapping failure in DMA engine Date: Tue, 26 Jul 2022 19:23:41 +0100 Message-Id: <20220726182341.1888115-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220726182341.1888115-1-peter.maydell@linaro.org> References: <20220726182341.1888115-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1658860074069100001 Content-Type: text/plain; charset="utf-8" Currently the code for doing DMA in dcr_write_dma() has no fallback code for if its calls to cpu_physical_memory_map() fail. Add handling for this situation, by using address_space_read() and address_space_write() to do the data transfers. Signed-off-by: Peter Maydell --- I believe this to be equivalent to the fastpath code. However, as the comments note, I don't know what the intended behaviour on a DMA memory access error is, because I couldn't find a datasheet for this hardware. I am also a bit suspicious that the current code does not seem to update any of the count, source or destination addresses after the memory transfer: is that really how the hardware behaves? --- hw/ppc/ppc440_uc.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 11fdb88c220..0879f180a14 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -905,6 +905,7 @@ static void dcr_write_dma(void *opaque, int dcrn, uint3= 2_t val) uint8_t *rptr, *wptr; hwaddr rlen, wlen; hwaddr xferlen; + bool fastpathed =3D false; =20 sidx =3D didx =3D 0; width =3D 1 << ((val & DMA0_CR_PW) >> 25); @@ -915,6 +916,7 @@ static void dcr_write_dma(void *opaque, int dcrn, uint3= 2_t val) wptr =3D cpu_physical_memory_map(dma->ch[chnl].da, &wl= en, true); if (rptr && rlen =3D=3D xferlen && wptr && wlen =3D=3D= xferlen) { + fastpathed =3D true; if (!(val & DMA0_CR_DEC) && val & DMA0_CR_SAI && val & DMA0_CR_DAI) { /* optimise common case */ @@ -940,6 +942,33 @@ static void dcr_write_dma(void *opaque, int dcrn, uint= 32_t val) if (rptr) { cpu_physical_memory_unmap(rptr, rlen, 0, sidx); } + if (!fastpathed) { + /* Fast-path failed, do each access one at a time = */ + for (sidx =3D didx =3D i =3D 0; i < count; i++) { + uint8_t buf[8]; + assert(width <=3D sizeof(buf)); + if (address_space_read(&address_space_memory, + dma->ch[chnl].sa + sidx, + MEMTXATTRS_UNSPECIFIED, + buf, width) !=3D MEMTX_= OK) { + /* FIXME: model correct behaviour on error= s */ + break; + } + if (address_space_write(&address_space_memory, + dma->ch[chnl].da + did= x, + MEMTXATTRS_UNSPECIFIED, + buf, width) !=3D MEMTX= _OK) { + /* FIXME: model correct behaviour on error= s */ + break; + } + if (val & DMA0_CR_SAI) { + sidx +=3D width; + } + if (val & DMA0_CR_DAI) { + didx +=3D width; + } + } + } } } break; --=20 2.25.1