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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 08/45] target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming
Date: Mon, 11 Jul 2022 14:57:13 +0100
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From: Richard Henderson <richard.henderson@linaro.org>
Mark these as a non-streaming instructions, which should trap
if full a64 support is not enabled in streaming mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220708151540.18136-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/sme-fa64.decode | 3 ---
target/arm/translate-sve.c | 15 +++++++++++----
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode
index 4ff2df82e5b..b5eaa2d0faa 100644
--- a/target/arm/sme-fa64.decode
+++ b/target/arm/sme-fa64.decode
@@ -59,9 +59,6 @@ FAIL 0001 1110 0111 1110 0000 00-- ---- ---- # FJCVT=
ZS
# --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register=
(register offset)
# --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register=
(scaled imm)
=20
-FAIL 0110 0101 --0- ---- 0000 11-- ---- ---- # FTSMUL
-FAIL 0110 0101 --01 0--- 100- ---- ---- ---- # FTMAD
-FAIL 0110 0101 --01 1--- 001- ---- ---- ---- # FADDA
FAIL 0100 0101 --0- ---- 1001 10-- ---- ---- # SMMLA, UMMLA, USMMLA
FAIL 0100 0101 --1- ---- 1--- ---- ---- ---- # SVE2 string/histo/cryp=
to instructions
FAIL 1000 010- -00- ---- 10-- ---- ---- ---- # SVE2 32-bit gather NT =
load (vector+scalar)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 4ff2102fc86..d5aad539235 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -3861,9 +3861,9 @@ static gen_helper_gvec_3_ptr * const ftmad_fns[4] =3D=
{
NULL, gen_helper_sve_ftmad_h,
gen_helper_sve_ftmad_s, gen_helper_sve_ftmad_d,
};
-TRANS_FEAT(FTMAD, aa64_sve, gen_gvec_fpst_zzz,
- ftmad_fns[a->esz], a->rd, a->rn, a->rm, a->imm,
- a->esz =3D=3D MO_16 ? FPST_FPCR_F16 : FPST_FPCR)
+TRANS_FEAT_NONSTREAMING(FTMAD, aa64_sve, gen_gvec_fpst_zzz,
+ ftmad_fns[a->esz], a->rd, a->rn, a->rm, a->imm,
+ a->esz =3D=3D MO_16 ? FPST_FPCR_F16 : FPST_FPCR)
=20
/*
*** SVE Floating Point Accumulating Reduction Group
@@ -3886,6 +3886,7 @@ static bool trans_FADDA(DisasContext *s, arg_rprr_esz=
*a)
if (a->esz =3D=3D 0 || !dc_isar_feature(aa64_sve, s)) {
return false;
}
+ s->is_nonstreaming =3D true;
if (!sve_access_check(s)) {
return true;
}
@@ -3923,12 +3924,18 @@ static bool trans_FADDA(DisasContext *s, arg_rprr_e=
sz *a)
DO_FP3(FADD_zzz, fadd)
DO_FP3(FSUB_zzz, fsub)
DO_FP3(FMUL_zzz, fmul)
-DO_FP3(FTSMUL, ftsmul)
DO_FP3(FRECPS, recps)
DO_FP3(FRSQRTS, rsqrts)
=20
#undef DO_FP3
=20
+static gen_helper_gvec_3_ptr * const ftsmul_fns[4] =3D {
+ NULL, gen_helper_gvec_ftsmul_h,
+ gen_helper_gvec_ftsmul_s, gen_helper_gvec_ftsmul_d
+};
+TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve, gen_gvec_fpst_arg_zzz,
+ ftsmul_fns[a->esz], a, 0)
+
/*
*** SVE Floating Point Arithmetic - Predicated Group
*/
--=20
2.25.1