From nobody Tue Feb 10 02:54:57 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1657033414552846.7756425134601; Tue, 5 Jul 2022 08:03:34 -0700 (PDT) Received: from localhost ([::1]:34024 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o8k5L-0007uJ-QF for importer@patchew.org; Tue, 05 Jul 2022 11:03:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40416) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o8k0f-0001Qn-Uy; Tue, 05 Jul 2022 10:58:42 -0400 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3]:36193 helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o8k0e-00011a-7I; Tue, 05 Jul 2022 10:58:41 -0400 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4Lcm5S5St0z4xj4; Wed, 6 Jul 2022 00:58:36 +1000 (AEST) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4Lcm5P6wXHz4xj3; Wed, 6 Jul 2022 00:58:33 +1000 (AEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , David Gibson , Greg Kurz , Mark Cave-Ayland , BALATON Zoltan , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PATCH 4/5] ppc/e500: Allocate IRQ lines with qdev_init_gpio_in() Date: Tue, 5 Jul 2022 16:58:13 +0200 Message-Id: <20220705145814.461723-5-clg@kaod.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705145814.461723-1-clg@kaod.org> References: <20220705145814.461723-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=52tn=XK=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1657033416729100001 Signed-off-by: C=C3=A9dric Le Goater --- hw/ppc/e500.c | 8 ++++---- hw/ppc/ppc.c | 5 +---- 2 files changed, 5 insertions(+), 8 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 7f7f5b345260..757cfaa62f8a 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -861,7 +861,6 @@ void ppce500_init(MachineState *machine) for (i =3D 0; i < smp_cpus; i++) { PowerPCCPU *cpu; CPUState *cs; - qemu_irq *input; =20 cpu =3D POWERPC_CPU(object_new(machine->cpu_type)); env =3D &cpu->env; @@ -885,9 +884,10 @@ void ppce500_init(MachineState *machine) firstenv =3D env; } =20 - input =3D (qemu_irq *)env->irq_inputs; - irqs[i].irq[OPENPIC_OUTPUT_INT] =3D input[PPCE500_INPUT_INT]; - irqs[i].irq[OPENPIC_OUTPUT_CINT] =3D input[PPCE500_INPUT_CINT]; + irqs[i].irq[OPENPIC_OUTPUT_INT] =3D + qdev_get_gpio_in(DEVICE(cpu), PPCE500_INPUT_INT); + irqs[i].irq[OPENPIC_OUTPUT_CINT] =3D + qdev_get_gpio_in(DEVICE(cpu), PPCE500_INPUT_CINT); env->spr_cb[SPR_BOOKE_PIR].default_value =3D cs->cpu_index =3D i; env->mpic_iack =3D pmc->ccsrbar_base + MPC8544_MPIC_REGS_OFFSET + = 0xa0; =20 diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 161e5f9087b7..690f448cb941 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -474,10 +474,7 @@ static void ppce500_set_irq(void *opaque, int pin, int= level) =20 void ppce500_irq_init(PowerPCCPU *cpu) { - CPUPPCState *env =3D &cpu->env; - - env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppce500_set_irq, - cpu, PPCE500_INPUT_NB); + qdev_init_gpio_in(DEVICE(cpu), ppce500_set_irq, PPCE500_INPUT_NB); } =20 /* Enable or Disable the E500 EPR capability */ --=20 2.35.3