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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id d11-20020a5d6dcb000000b0020e6ce4dabdsm9754335wrz.103.2022.06.27.03.22.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jun 2022 03:22:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=YXCaAkUvHPYJs8/UPRqGbeUcr38m+MRpEiyfDOsqhAg=; b=hPQEZcFau4t9PdThcg3XH4HzA/rLQUsUCY4XWR2tUeyhydtPskFjUy3tGav9RvFnEK jLBa7xBN/3ngwon1n7R3ITtFuZdxGVGKketWEqudLnW7VxGribQHf0lAjVjo8GYyh6nj 8aBvvA1A9di97Yg+goPnE8A/uCSIZR6e7xW8oo1gUIy97xebmeHfOYBYGQ4VLQnoFnI4 Y+g4pGf+Hc4i/IcfRnnRsT8o54hk8lKE92cdqcY4sdQBMjrZYBCip+2oDCtiX0kCyJ0V +wpbVgBFabqg+nkXj/FXrL2kiVtpPPl95WYptG8hB2R0EoWuJxRuYJa3uSv0YTN3gZZz bpSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YXCaAkUvHPYJs8/UPRqGbeUcr38m+MRpEiyfDOsqhAg=; b=YFzkovVfaH1s8GYVqyHL+OW7jB2n0vFqAlpUK7Ug3Qk3Eb4WQaqgiRpgzmUvkCHq50 /Vgv45bdF6BvQya6xBV0PRY8mBh36GZCkr0/qUV0wXyFPNj1g9HmR5PbUzAiUMqfLilS nEkkjtFrR6pFKjeJCyVQhWq0I9RpuecToMWexjM1GkI1Rnt6MXSCKnjpd7xo+BpPdS+m 2VHfEcncwAbfBcy/BDd5H63XXRMxHneSXFrGzCMz7uJfXUbgWYiSFvYMTn20ErZEdoGz PONVqSxpecDOAczrfPnQxZgkkOa9hUKsjL4GgtKkH8mu9OLm2dyajTCaBVV15MUPz0Wb +bkg== X-Gm-Message-State: AJIora8rkX7qz+o1I8LYCoXeGgduECmrXhAp+h9/BUw/wMJjfNNAtWW0 G0mt67zwJmFmaIvLuRdzWeHTkgZl0ZiP/g== X-Google-Smtp-Source: AGRyM1s+mNuX/da7xFK28CkFPBt5Snk1J5mCqbkXwQyseT+RxCnkZmY1Shy9ZhGYziHqC9xobWATYg== X-Received: by 2002:a05:600c:3d9a:b0:3a0:3aad:b1f2 with SMTP id bi26-20020a05600c3d9a00b003a03aadb1f2mr19420913wmb.138.1656325370360; Mon, 27 Jun 2022 03:22:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/25] target/arm: Generalize cpu_arm_{get,set}_vq Date: Mon, 27 Jun 2022 11:22:27 +0100 Message-Id: <20220627102236.3097629-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220627102236.3097629-1-peter.maydell@linaro.org> References: <20220627102236.3097629-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1656327190718100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Rename from cpu_arm_{get,set}_sve_vq, and take the ARMVQMap as the opaque parameter. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20220620175235.60881-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu64.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index cadc401c7e0..1a3cb953bf0 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -579,15 +579,15 @@ static void cpu_max_set_sve_max_vq(Object *obj, Visit= or *v, const char *name, } =20 /* - * Note that cpu_arm_get/set_sve_vq cannot use the simpler - * object_property_add_bool interface because they make use - * of the contents of "name" to determine which bit on which - * to operate. + * Note that cpu_arm_{get,set}_vq cannot use the simpler + * object_property_add_bool interface because they make use of the + * contents of "name" to determine which bit on which to operate. */ -static void cpu_arm_get_sve_vq(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void cpu_arm_get_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { ARMCPU *cpu =3D ARM_CPU(obj); + ARMVQMap *vq_map =3D opaque; uint32_t vq =3D atoi(&name[3]) / 128; bool value; =20 @@ -595,15 +595,15 @@ static void cpu_arm_get_sve_vq(Object *obj, Visitor *= v, const char *name, if (!cpu_isar_feature(aa64_sve, cpu)) { value =3D false; } else { - value =3D extract32(cpu->sve_vq.map, vq - 1, 1); + value =3D extract32(vq_map->map, vq - 1, 1); } visit_type_bool(v, name, &value, errp); } =20 -static void cpu_arm_set_sve_vq(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void cpu_arm_set_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { - ARMCPU *cpu =3D ARM_CPU(obj); + ARMVQMap *vq_map =3D opaque; uint32_t vq =3D atoi(&name[3]) / 128; bool value; =20 @@ -611,8 +611,8 @@ static void cpu_arm_set_sve_vq(Object *obj, Visitor *v,= const char *name, return; } =20 - cpu->sve_vq.map =3D deposit32(cpu->sve_vq.map, vq - 1, 1, value); - cpu->sve_vq.init |=3D 1 << (vq - 1); + vq_map->map =3D deposit32(vq_map->map, vq - 1, 1, value); + vq_map->init |=3D 1 << (vq - 1); } =20 static bool cpu_arm_get_sve(Object *obj, Error **errp) @@ -691,6 +691,7 @@ static void cpu_arm_get_sve_default_vec_len(Object *obj= , Visitor *v, =20 void aarch64_add_sve_properties(Object *obj) { + ARMCPU *cpu =3D ARM_CPU(obj); uint32_t vq; =20 object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve); @@ -698,8 +699,8 @@ void aarch64_add_sve_properties(Object *obj) for (vq =3D 1; vq <=3D ARM_MAX_VQ; ++vq) { char name[8]; sprintf(name, "sve%d", vq * 128); - object_property_add(obj, name, "bool", cpu_arm_get_sve_vq, - cpu_arm_set_sve_vq, NULL, NULL); + object_property_add(obj, name, "bool", cpu_arm_get_vq, + cpu_arm_set_vq, NULL, &cpu->sve_vq); } =20 #ifdef CONFIG_USER_ONLY --=20 2.25.1