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bh=YVgi+j17OPgDA05RSiCenMQxIrRRbRSuG3qXJajHnAI=; b=VDlBr7thGyJ+rb4GfmPbl+wMb7PmKeqYOONwGiKNQ3CK6m3b4Ykqa0Ho aEZhUPR8BShCtNA23Z+QjAHSU9fiMvS8L2b8MgkVoB1mW+zjXC0YFoEek bsQ2tUCLe5yjF6hvw0lNMhPNNLa7uthvaoz+WoeLCrcThaMMzQ66jqpgb 8=; X-QCInternal: smtphost From: Jae Hyun Yoo To: Peter Maydell , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Titus Rwantare , Andrew Jeffery , Joel Stanley CC: Graeme Gregory , Maheswara Kurapati , , , Jae Hyun Yoo Subject: [PATCH 2/9] hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 board Date: Wed, 22 Jun 2022 10:28:23 -0700 Message-ID: <20220622172830.101210-3-quic_jaehyoo@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220622172830.101210-1-quic_jaehyoo@quicinc.com> References: <20220622172830.101210-1-quic_jaehyoo@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=199.106.114.38; envelope-from=quic_jaehyoo@quicinc.com; helo=alexa-out-sd-01.qualcomm.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1655919188627100001 Content-Type: text/plain; charset="utf-8" Add qcom-dc-scm-v1 board support. Signed-off-by: Jae Hyun Yoo --- hw/arm/aspeed.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 4f54721e5f1f..785cc543d046 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -174,6 +174,10 @@ struct AspeedMachineState { #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 #define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2 =20 +/* Muvia DC-SCM hardware value */ +#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000 +#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041 + /* * The max ram region is for firmwares that scan the address space * with load/store to guess how much RAM the SoC has. @@ -988,6 +992,19 @@ static void fby35_i2c_init(AspeedMachineState *bmc) */ } =20 +static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc =3D &bmc->soc; + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0= x4d); + + uint8_t *eeprom_buf =3D g_malloc0(128 * 1024); + if (eeprom_buf) { + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 15), 0x53, + eeprom_buf); + } +} + static bool aspeed_get_mmio_exec(Object *obj, Error **errp) { return ASPEED_MACHINE(obj)->mmio_exec; @@ -1440,6 +1457,26 @@ static void aspeed_machine_qcom_evb_proto_class_init= (ObjectClass *oc, aspeed_soc_num_cpus(amc->soc_name); }; =20 +static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, + void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(oc); + + mc->desc =3D "Qualcomm DC-SCM V1 BMC (Cortex A7)"; + amc->soc_name =3D "ast2600-a3"; + amc->hw_strap1 =3D QCOM_DC_SCM_V1_BMC_HW_STRAP1; + amc->hw_strap2 =3D QCOM_DC_SCM_V1_BMC_HW_STRAP2; + amc->fmc_model =3D "n25q512a"; + amc->spi_model =3D "n25q512a"; + amc->num_cs =3D 2; + amc->macs_mask =3D ASPEED_MAC2_ON | ASPEED_MAC3_ON; + amc->i2c_init =3D qcom_dc_scm_bmc_i2c_init; + mc->default_ram_size =3D 1 * GiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); +}; + static const TypeInfo aspeed_machine_types[] =3D { { .name =3D MACHINE_TYPE_NAME("palmetto-bmc"), @@ -1481,6 +1518,10 @@ static const TypeInfo aspeed_machine_types[] =3D { .name =3D MACHINE_TYPE_NAME("qcom-evb-proto-bmc"), .parent =3D TYPE_ASPEED_MACHINE, .class_init =3D aspeed_machine_qcom_evb_proto_class_init, + }, { + .name =3D MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), + .parent =3D TYPE_ASPEED_MACHINE, + .class_init =3D aspeed_machine_qcom_dc_scm_v1_class_init, }, { .name =3D MACHINE_TYPE_NAME("fp5280g2-bmc"), .parent =3D TYPE_ASPEED_MACHINE, --=20 2.25.1