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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=shorne@gmail.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1655039086017100001 Content-Type: text/plain; charset="utf-8" Add an endianness property to allow configuring the RTC as either native, little or big endian. Cc: Laurent Vivier Cc: Arnd Bergmann Signed-off-by: Stafford Horne --- In a recent mail thread[0] it was discussed that future users of goldfish d= evices should use little-endian rather than native endian. This is to avoid havin= g to define special ioread/write routines in the Linux kernel as the default of = the Linux kernel is to use little-endian. I have defined a property to allow us to make this change the endianness of= the device at initialization time. For OpenRISC we can now set the qemu device endianness property to little-endian and the device works. For now I kept the default as DEVICE_NATIVE_ENDIAN for illustration purpose= s I could also do: - Add the "endianness" property to all goldfish devices. - Switch the default to LITTLE_ENDIAN and just set BIG_ENDIAN for m68k onl= y. - Just the bare minimum, using this patch and also set little-endian in OpenRISC. - Just drop this patch and use BIG_ENDIAN access for goldfish in the kerne= l for OpenRISC like m68k does. I have tested this with the OpenRISC virt platform[1] available here (now w= ith pci support). [0] https://lore.kernel.org/all/CAK8P3a13PTsMExyXZm5sZM3WBK-8hoNFjYoi19pHmK= KCJQmHeA@mail.gmail.com/ [1] https://github.com/stffrdhrn/qemu/commits/or1k-virt-2 hw/rtc/goldfish_rtc.c | 45 ++++++++++++++++++++++++++++------- include/hw/rtc/goldfish_rtc.h | 2 ++ 2 files changed, 38 insertions(+), 9 deletions(-) diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c index 35e493be31..ab1e15a3e2 100644 --- a/hw/rtc/goldfish_rtc.c +++ b/hw/rtc/goldfish_rtc.c @@ -216,14 +216,34 @@ static int goldfish_rtc_post_load(void *opaque, int v= ersion_id) return 0; } =20 -static const MemoryRegionOps goldfish_rtc_ops =3D { - .read =3D goldfish_rtc_read, - .write =3D goldfish_rtc_write, - .endianness =3D DEVICE_NATIVE_ENDIAN, - .valid =3D { - .min_access_size =3D 4, - .max_access_size =3D 4 - } +static const MemoryRegionOps goldfish_rtc_ops[3] =3D { + [DEVICE_NATIVE_ENDIAN] =3D { + .read =3D goldfish_rtc_read, + .write =3D goldfish_rtc_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4 + } + }, + [DEVICE_LITTLE_ENDIAN] =3D { + .read =3D goldfish_rtc_read, + .write =3D goldfish_rtc_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4 + } + }, + [DEVICE_BIG_ENDIAN] =3D { + .read =3D goldfish_rtc_read, + .write =3D goldfish_rtc_write, + .endianness =3D DEVICE_BIG_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4 + } + }, }; =20 static const VMStateDescription goldfish_rtc_vmstate =3D { @@ -265,7 +285,8 @@ static void goldfish_rtc_realize(DeviceState *d, Error = **errp) SysBusDevice *dev =3D SYS_BUS_DEVICE(d); GoldfishRTCState *s =3D GOLDFISH_RTC(d); =20 - memory_region_init_io(&s->iomem, OBJECT(s), &goldfish_rtc_ops, s, + memory_region_init_io(&s->iomem, OBJECT(s), + &goldfish_rtc_ops[s->endianness], s, "goldfish_rtc", 0x24); sysbus_init_mmio(dev, &s->iomem); =20 @@ -274,10 +295,16 @@ static void goldfish_rtc_realize(DeviceState *d, Erro= r **errp) s->timer =3D timer_new_ns(rtc_clock, goldfish_rtc_interrupt, s); } =20 +static Property goldfish_rtc_properties[] =3D { + DEFINE_PROP_UINT8("endianness", GoldfishRTCState, endianness, DEVICE_N= ATIVE_ENDIAN), + DEFINE_PROP_END_OF_LIST(), +}; + static void goldfish_rtc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 + device_class_set_props(dc, goldfish_rtc_properties); dc->realize =3D goldfish_rtc_realize; dc->reset =3D goldfish_rtc_reset; dc->vmsd =3D &goldfish_rtc_vmstate; diff --git a/include/hw/rtc/goldfish_rtc.h b/include/hw/rtc/goldfish_rtc.h index 79ca7daf5d..8e1aeb85e3 100644 --- a/include/hw/rtc/goldfish_rtc.h +++ b/include/hw/rtc/goldfish_rtc.h @@ -42,6 +42,8 @@ struct GoldfishRTCState { uint32_t irq_pending; uint32_t irq_enabled; uint32_t time_high; + + uint8_t endianness; }; =20 #endif --=20 2.36.1