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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Jonathan Cameron , Ben Widawsky , Eduardo Habkost , Marcel Apfelbaum , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Yanan Wang , Igor Mammedov , Ani Sinha , Paolo Bonzini , Richard Henderson Subject: [PULL 42/54] hw/cxl: Move the CXLState from MachineState to machine type specific state. Message-ID: <20220610075631.367501-43-mst@redhat.com> References: <20220610075631.367501-1-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220610075631.367501-1-mst@redhat.com> X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1654851046544100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonathan Cameron This removes the last of the CXL code from the MachineState where it is visible to all Machines to only those that support CXL (currently i386/p= c) As i386/pc always support CXL now, stop allocating the state independently. Note the pxb register hookup code runs even if cxl=3Doff in order to detect pxb_cxl host bridges and fail to start if any are present as they won't have the control registers available. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-8-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/boards.h | 1 - include/hw/i386/pc.h | 2 ++ hw/core/machine.c | 6 ------ hw/i386/acpi-build.c | 6 +++--- hw/i386/pc.c | 33 ++++++++++++++++----------------- 5 files changed, 21 insertions(+), 27 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index dd9fc56df2..031f5f884d 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -360,7 +360,6 @@ struct MachineState { CPUArchIdList *possible_cpus; CpuTopology smp; struct NVDIMMState *nvdimms_state; - struct CXLState *cxl_devices_state; struct NumaState *numa_state; CXLFixedMemoryWindowOptionsList *cfmws_list; }; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index dee38cfac4..003a86b721 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -14,6 +14,7 @@ #include "qom/object.h" #include "hw/i386/sgx-epc.h" #include "hw/firmware/smbios.h" +#include "hw/cxl/cxl.h" =20 #define HPET_INTCAP "hpet-intcap" =20 @@ -55,6 +56,7 @@ typedef struct PCMachineState { hwaddr memhp_io_base; =20 SGXEPCState sgx_epc; + CXLState cxl_devices_state; } PCMachineState; =20 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" diff --git a/hw/core/machine.c b/hw/core/machine.c index 2e589d99e9..a673302cce 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -33,7 +33,6 @@ #include "sysemu/qtest.h" #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" -#include "hw/cxl/cxl.h" #include "migration/global_state.h" #include "migration/vmstate.h" #include "exec/confidential-guest-support.h" @@ -1075,10 +1074,6 @@ static void machine_initfn(Object *obj) "Valid values are cpu, mem-ctrl"); } =20 - if (mc->cxl_supported) { - ms->cxl_devices_state =3D g_new0(CXLState, 1); - } - if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { ms->numa_state =3D g_new0(NumaState, 1); object_property_add_bool(obj, "hmat", @@ -1116,7 +1111,6 @@ static void machine_finalize(Object *obj) g_free(ms->device_memory); g_free(ms->nvdimms_state); g_free(ms->numa_state); - g_free(ms->cxl_devices_state); } =20 bool machine_usb(MachineState *machine) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 663c34b9d1..73d0bf5937 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1631,7 +1631,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 /* Handle the ranges for the PXB expanders */ if (pci_bus_is_cxl(bus)) { - MemoryRegion *mr =3D &machine->cxl_devices_state->host_mr; + MemoryRegion *mr =3D &pcms->cxl_devices_state.host_mr; uint64_t base =3D mr->addr; =20 cxl_present =3D true; @@ -2614,9 +2614,9 @@ void acpi_build(AcpiBuildTables *tables, MachineState= *machine) machine->nvdimms_state, machine->ram_slots, x86ms->oem_id, x86ms->oem_table_id); } - if (machine->cxl_devices_state->is_enabled) { + if (pcms->cxl_devices_state.is_enabled) { cxl_build_cedt(table_offsets, tables_blob, tables->linker, - x86ms->oem_id, x86ms->oem_table_id, machine->cxl_de= vices_state); + x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devi= ces_state); } =20 acpi_add_table(table_offsets, tables_blob); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 9f48d02739..a0c0d69698 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -733,12 +733,12 @@ void pc_machine_done(Notifier *notifier, void *data) PCMachineState *pcms =3D container_of(notifier, PCMachineState, machine_done); X86MachineState *x86ms =3D X86_MACHINE(pcms); - MachineState *ms =3D MACHINE(pcms); =20 - if (ms->cxl_devices_state) { - cxl_hook_up_pxb_registers(pcms->bus, ms->cxl_devices_state, - &error_fatal); - cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal); + cxl_hook_up_pxb_registers(pcms->bus, &pcms->cxl_devices_state, + &error_fatal); + + if (pcms->cxl_devices_state.is_enabled) { + cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal); } =20 /* set the number of CPUs */ @@ -908,8 +908,8 @@ void pc_memory_init(PCMachineState *pcms, &machine->device_memory->mr); } =20 - if (machine->cxl_devices_state->is_enabled) { - MemoryRegion *mr =3D &machine->cxl_devices_state->host_mr; + if (pcms->cxl_devices_state.is_enabled) { + MemoryRegion *mr =3D &pcms->cxl_devices_state.host_mr; hwaddr cxl_size =3D MiB; =20 if (pcmc->has_reserved_memory && machine->device_memory->base) { @@ -927,12 +927,12 @@ void pc_memory_init(PCMachineState *pcms, memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size); memory_region_add_subregion(system_memory, cxl_base, mr); cxl_resv_end =3D cxl_base + cxl_size; - if (machine->cxl_devices_state->fixed_windows) { + if (pcms->cxl_devices_state.fixed_windows) { hwaddr cxl_fmw_base; GList *it; =20 cxl_fmw_base =3D ROUND_UP(cxl_base + cxl_size, 256 * MiB); - for (it =3D machine->cxl_devices_state->fixed_windows; it; it = =3D it->next) { + for (it =3D pcms->cxl_devices_state.fixed_windows; it; it =3D = it->next) { CXLFixedWindow *fw =3D it->data; =20 fw->base =3D cxl_fmw_base; @@ -974,7 +974,7 @@ void pc_memory_init(PCMachineState *pcms, res_mem_end +=3D memory_region_size(&machine->device_memory->m= r); } =20 - if (machine->cxl_devices_state->is_enabled) { + if (pcms->cxl_devices_state.is_enabled) { res_mem_end =3D cxl_resv_end; } *val =3D cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); @@ -1010,12 +1010,12 @@ uint64_t pc_pci_hole64_start(void) X86MachineState *x86ms =3D X86_MACHINE(pcms); uint64_t hole64_start =3D 0; =20 - if (ms->cxl_devices_state->host_mr.addr) { - hole64_start =3D ms->cxl_devices_state->host_mr.addr + - memory_region_size(&ms->cxl_devices_state->host_mr); - if (ms->cxl_devices_state->fixed_windows) { + if (pcms->cxl_devices_state.host_mr.addr) { + hole64_start =3D pcms->cxl_devices_state.host_mr.addr + + memory_region_size(&pcms->cxl_devices_state.host_mr); + if (pcms->cxl_devices_state.fixed_windows) { GList *it; - for (it =3D ms->cxl_devices_state->fixed_windows; it; it =3D i= t->next) { + for (it =3D pcms->cxl_devices_state.fixed_windows; it; it =3D = it->next) { CXLFixedWindow *fw =3D it->data; hole64_start =3D fw->mr.addr + memory_region_size(&fw->mr); } @@ -1691,7 +1691,6 @@ static void pc_machine_set_max_fw_size(Object *obj, V= isitor *v, static void pc_machine_initfn(Object *obj) { PCMachineState *pcms =3D PC_MACHINE(obj); - MachineState *ms =3D MACHINE(obj); =20 #ifdef CONFIG_VMPORT pcms->vmport =3D ON_OFF_AUTO_AUTO; @@ -1716,7 +1715,7 @@ static void pc_machine_initfn(Object *obj) pcms->pcspk =3D isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); - cxl_machine_init(obj, ms->cxl_devices_state); + cxl_machine_init(obj, &pcms->cxl_devices_state); } =20 static void pc_machine_reset(MachineState *machine) --=20 MST