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dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1654835340; x=1657427341; bh=tIFbLVMkpa3z0ae0dz YBO6i/wyoIkc7BsmLEf6uNPa8=; b=orFH+YK/1WGNAAFWM3D+9GIyw4Kt4u73qd GZV+wZlFmQtca8AEfY+CexKq0Sg22Yb2oI3JerYwGzTIV/bk0SzyEY03EV3Gadvf 7I5LDh21+id1WtWyptyA/o73+r/0zLMMRQnQhEVTl8SWWQwAdpm+KB7rTlmM9Tea ToJ4282rh71370tVD1CyuRNcys5PnEu3Ezs0Hv0a4c0Ct+a9eJODrmjPpFH26Bie rRZX5T817j6Hq6lZuUGvUVtJwj1C9c/aMPadKxq+dIRqfODmaiUdWvZn0VBFWnbF vXY4jD3ncQqAVkvuBcfnG9nLUNaDfvqh/8oj6bQ4IoPVNdIUsKmw== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Alistair Francis , Robert Bu , Richard Henderson Subject: [PULL 25/25] target/riscv: trans_rvv: Avoid assert for RV32 and e64 Date: Fri, 10 Jun 2022 14:26:55 +1000 Message-Id: <20220610042655.2021686-26-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220610042655.2021686-1-alistair.francis@opensource.wdc.com> References: <20220610042655.2021686-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.154.45; envelope-from=prvs=1538de18e=alistair.francis@opensource.wdc.com; helo=esa6.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1654837504763100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis When running a 32-bit guest, with a e64 vmv.v.x and vl_eq_vlmax set to true the `tcg_debug_assert(vece <=3D MO_32)` will be triggered inside tcg_gen_gvec_dup_i32(). This patch checks that condition and instead uses tcg_gen_gvec_dup_i64() is required. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1028 Suggested-by: Robert Bu Signed-off-by: Alistair Francis Reviewed-by: Richard Henderson Message-Id: <20220608234701.369536-1-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 4f84d4878a..6c091824b6 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2128,8 +2128,16 @@ static bool trans_vmv_v_x(DisasContext *s, arg_vmv_v= _x *a) s1 =3D get_gpr(s, a->rs1, EXT_SIGN); =20 if (s->vl_eq_vlmax && !(s->vta && s->lmul < 0)) { - tcg_gen_gvec_dup_tl(s->sew, vreg_ofs(s, a->rd), - MAXSZ(s), MAXSZ(s), s1); + if (get_xl(s) =3D=3D MXL_RV32 && s->sew =3D=3D MO_64) { + TCGv_i64 s1_i64 =3D tcg_temp_new_i64(); + tcg_gen_ext_tl_i64(s1_i64, s1); + tcg_gen_gvec_dup_i64(s->sew, vreg_ofs(s, a->rd), + MAXSZ(s), MAXSZ(s), s1_i64); + tcg_temp_free_i64(s1_i64); + } else { + tcg_gen_gvec_dup_tl(s->sew, vreg_ofs(s, a->rd), + MAXSZ(s), MAXSZ(s), s1); + } } else { TCGv_i32 desc; TCGv_i64 s1_i64 =3D tcg_temp_new_i64(); --=20 2.36.1