From nobody Tue Feb 10 10:20:13 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1654572021; cv=none; d=zohomail.com; s=zohoarc; b=mYy+O0gQf7f5/S567z4DYvja7OOS/JizBjjk11JSAnah7yvBcYixsQ2eVd2Zwyjq11QdSxjLDC3OxSWkP5P22UTT+2qSEZnMFhSsuT2hUYGiLkzTFdk698VAI7GsYr+/sfbOljVQun3TS/Jk6Y63jV7cjq8R1ARho3nXA3bU0uQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1654572021; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6fpGwv3kCXG8ZtfQZNZua0/iQeuwiDUTLYdlJx9okG4=; b=G38wtOENjZZ3mXOhKXL0xTIv1DdKzS/zoXXlb/BtOKb+Hglz3Q7nKwSkSvrKqCjVNQhF6SQMjrUl2uN1gmOk7IsgSoGwHiA5FNpjMMffBachX1eL70EAmgHDRVYBb/x3jYgSiCz3jP0GXx/KLwrfpWaWWnJtgjHJMt1zjcrGi9A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1654572021522738.7749301649725; Mon, 6 Jun 2022 20:20:21 -0700 (PDT) Received: from localhost ([::1]:35218 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nyPlU-000382-1m for importer@patchew.org; Mon, 06 Jun 2022 23:20:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33408) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nyPG9-0007Kt-An for qemu-devel@nongnu.org; Mon, 06 Jun 2022 22:47:57 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]:40945) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nyPG7-0000OZ-Dq for qemu-devel@nongnu.org; Mon, 06 Jun 2022 22:47:56 -0400 Received: by mail-pf1-x430.google.com with SMTP id z17so14274064pff.7 for ; Mon, 06 Jun 2022 19:47:54 -0700 (PDT) Received: from stoup.. ([2602:ae:1547:e101:d3db:cca:e5c9:6531]) by smtp.gmail.com with ESMTPSA id y26-20020aa7805a000000b0051876d83714sm7476904pfm.196.2022.06.06.19.47.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jun 2022 19:47:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6fpGwv3kCXG8ZtfQZNZua0/iQeuwiDUTLYdlJx9okG4=; b=Gtj4lgnlDJP0UcCIfJj0C4utjUIMBCR3LwbDYJBzEo2BGgQvzWu+R5Vo7F6bZK26VE J6Gs341t8bpbgmDfl60Vpqvn6NuBAXZyGEeMyeUQcMEXueyKZleRi5jkl+r/bWWeQOLe KNLjp0bktfXUnfbrvu/A+nvjeuiAjTEOGwnmRYY30yVKuTg1TsA9XZTWLUASX5DdN/rz u5U+dU4VDRbgv4yGbL2SXU22MypoSgCfnoM+PrvFisZFq+CV8sdvuyki7wkXyMmbyVqp RMFXn33tao0M0GcfX6Q6iyW8nL32ZeB51v5zAlnWU+wyRzKbl5FZ4793QiAFfLQCqQJd ODgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6fpGwv3kCXG8ZtfQZNZua0/iQeuwiDUTLYdlJx9okG4=; b=ydf1KNjZVIqYTbO+zAzkmqi6UczUiO1VeLrMCgITtfIrvlqnJIkdtJto3Yn5apJLJ6 UKkIfW3D552cUkZKxGh4Y/swC6OJ9hEWe7ISgVfiM78uqu/sqkskpd3LXha7mtROmOQm y4LhlF7wvZKgaTOeYcc/Br2cU1hjCtEZJZv+zfw1ACFjsIg50kmDOZcMPwj1XlNZzfKg 9BawBO2R0AGUPBTUUxvzyM74mmpTb/H3JrTqvnV+BUA4h1SclYEbOQeGpyBaTP/4K4PS u1mjJUrcM/xwVTpVM7QfJW/xNd0R97UnFbyzICw4krf087p2g1ttWAvb/g8L04SN1CrN /BTg== X-Gm-Message-State: AOAM533r+DdImOZ1novT0vNQDf6gvGV8EvPbkBew/40dVMIW0BncTLjE 1MPSJppuoacdb3dHJtw4InK7mo0otW/31Q== X-Google-Smtp-Source: ABdhPJzIBQWpvrd1kUjm63CdH3NVAxfXJaQkaLjnoHL08HMTkKVGWBY5SvMFULBP2cHoDJ9v0wiHPQ== X-Received: by 2002:a63:fa56:0:b0:3fc:d3d2:ceac with SMTP id g22-20020a63fa56000000b003fcd3d2ceacmr23481606pgk.99.1654570073961; Mon, 06 Jun 2022 19:47:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v2 21/25] target/arm: Remove default_exception_el Date: Mon, 6 Jun 2022 19:47:30 -0700 Message-Id: <20220607024734.541321-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220607024734.541321-1-richard.henderson@linaro.org> References: <20220607024734.541321-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1654572023187100001 Content-Type: text/plain; charset="utf-8" This function is no longer used. At the same time, remove DisasContext.secure_routed_to_el3, as it in turn becomes unused. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate.h | 16 ---------------- target/arm/translate-a64.c | 5 ----- target/arm/translate.c | 5 ----- 3 files changed, 26 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index d7a9acf5a9..b01a58653e 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -43,8 +43,6 @@ typedef struct DisasContext { int fp_excp_el; /* FP exception EL or 0 if enabled */ int sve_excp_el; /* SVE exception EL or 0 if enabled */ int sve_len; /* SVE vector length in bytes */ - /* Flag indicating that exceptions from secure mode are routed to EL3.= */ - bool secure_routed_to_el3; bool vfp_enabled; /* FP enabled via FPSCR.EN */ int vec_len; int vec_stride; @@ -199,20 +197,6 @@ static inline int get_mem_index(DisasContext *s) return arm_to_core_mmu_idx(s->mmu_idx); } =20 -/* Function used to determine the target exception EL when otherwise not k= nown - * or default. - */ -static inline int default_exception_el(DisasContext *s) -{ - /* If we are coming from secure EL0 in a system with a 32-bit EL3, then - * there is no secure EL1, so we route exceptions to EL3. Otherwise, - * exceptions can only be routed to ELs above 1, so we target the high= er of - * 1 or the current EL. - */ - return (s->mmu_idx =3D=3D ARMMMUIdx_SE10_0 && s->secure_routed_to_el3) - ? 3 : MAX(1, s->current_el); -} - static inline void disas_set_insn_syndrome(DisasContext *s, uint32_t syn) { /* We don't need to save all of the syndrome so we mask and shift diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b45039a124..8da2ca8324 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14584,11 +14584,6 @@ static void aarch64_tr_init_disas_context(DisasCon= textBase *dcbase, dc->condjmp =3D 0; =20 dc->aarch64 =3D true; - /* If we are coming from secure EL0 in a system with a 32-bit EL3, then - * there is no secure EL1, so we route exceptions to EL3. - */ - dc->secure_routed_to_el3 =3D arm_feature(env, ARM_FEATURE_EL3) && - !arm_el_is_aa64(env, 3); dc->thumb =3D false; dc->sctlr_b =3D 0; dc->be_data =3D EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE; diff --git a/target/arm/translate.c b/target/arm/translate.c index 81c27e7c70..6617de775f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9319,11 +9319,6 @@ static void arm_tr_init_disas_context(DisasContextBa= se *dcbase, CPUState *cs) dc->condjmp =3D 0; =20 dc->aarch64 =3D false; - /* If we are coming from secure EL0 in a system with a 32-bit EL3, then - * there is no secure EL1, so we route exceptions to EL3. - */ - dc->secure_routed_to_el3 =3D arm_feature(env, ARM_FEATURE_EL3) && - !arm_el_is_aa64(env, 3); dc->thumb =3D EX_TBFLAG_AM32(tb_flags, THUMB); dc->be_data =3D EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE; condexec =3D EX_TBFLAG_AM32(tb_flags, CONDEXEC); --=20 2.34.1