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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::231; envelope-from=danielhb413@gmail.com; helo=mail-oi1-x231.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1654034376796100001 Content-Type: text/plain; charset="utf-8" The unified pnv-phb-root-port can be used in its place. There is no ABI breakage in doing so because no official QEMU release introduced user creatable pnv-phb3-root-port devices. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 10 ++++-- hw/pci-host/pnv_phb3.c | 57 ---------------------------------- hw/ppc/pnv.c | 1 + include/hw/pci-host/pnv_phb3.h | 6 ---- 4 files changed, 8 insertions(+), 66 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 5047e90d3a..d1e8d28e97 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -35,7 +35,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **err= p) switch (phb->version) { case 3: phb_typename =3D g_strdup(TYPE_PNV_PHB3); - phb_rootport_typename =3D g_strdup(TYPE_PNV_PHB3_ROOT_PORT); + phb_rootport_typename =3D g_strdup(TYPE_PNV_PHB_ROOT_PORT); break; case 4: phb_typename =3D g_strdup(TYPE_PNV_PHB4); @@ -170,6 +170,11 @@ static void pnv_phb_root_port_realize(DeviceState *dev= , Error **errp) pci_config_set_interrupt_pin(pci->config, 0); } =20 +static Property pnv_phb_root_port_properties[] =3D { + DEFINE_PROP_UINT32("version", PnvPHB, version, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static void pnv_phb_root_port_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -180,11 +185,10 @@ static void pnv_phb_root_port_class_init(ObjectClass = *klass, void *data) =20 device_class_set_parent_realize(dc, pnv_phb_root_port_realize, &rpc->parent_realize); - device_class_set_parent_reset(dc, pnv_phb_root_port_reset, &rpc->parent_reset); dc->reset =3D &pnv_phb_root_port_reset; - + device_class_set_props(dc, pnv_phb_root_port_properties); dc->user_creatable =3D true; =20 k->vendor_id =3D PCI_VENDOR_ID_IBM; diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 839c2dad00..dc1068443a 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1152,66 +1152,9 @@ static const TypeInfo pnv_phb3_root_bus_info =3D { }, }; =20 -static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp) -{ - PCIERootPortClass *rpc =3D PCIE_ROOT_PORT_GET_CLASS(dev); - PCIDevice *pci =3D PCI_DEVICE(dev); - PCIBus *bus =3D pci_get_bus(pci); - PnvPHB *phb =3D NULL; - Error *local_err =3D NULL; - - phb =3D (PnvPHB *) object_dynamic_cast(OBJECT(bus->qbus.parent), - TYPE_PNV_PHB); - - if (!phb) { - error_setg(errp, -"pnv_phb3_root_port devices must be connected to pnv-phb3 buses"); - return; - } - - /* Set unique chassis/slot values for the root port */ - qdev_prop_set_uint8(&pci->qdev, "chassis", phb->chip_id); - qdev_prop_set_uint16(&pci->qdev, "slot", phb->phb_id); - - rpc->parent_realize(dev, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - pci_config_set_interrupt_pin(pci->config, 0); -} - -static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - PCIERootPortClass *rpc =3D PCIE_ROOT_PORT_CLASS(klass); - - dc->desc =3D "IBM PHB3 PCIE Root Port"; - - device_class_set_parent_realize(dc, pnv_phb3_root_port_realize, - &rpc->parent_realize); - dc->user_creatable =3D true; - - k->vendor_id =3D PCI_VENDOR_ID_IBM; - k->device_id =3D 0x03dc; - k->revision =3D 0; - - rpc->exp_offset =3D 0x48; - rpc->aer_offset =3D 0x100; -} - -static const TypeInfo pnv_phb3_root_port_info =3D { - .name =3D TYPE_PNV_PHB3_ROOT_PORT, - .parent =3D TYPE_PCIE_ROOT_PORT, - .instance_size =3D sizeof(PnvPHB3RootPort), - .class_init =3D pnv_phb3_root_port_class_init, -}; - static void pnv_phb3_register_types(void) { type_register_static(&pnv_phb3_root_bus_info); - type_register_static(&pnv_phb3_root_port_info); type_register_static(&pnv_phb3_type_info); type_register_static(&pnv_phb3_iommu_memory_region_info); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 4d2ea405db..5da5067b67 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2148,6 +2148,7 @@ static void pnv_machine_power8_class_init(ObjectClass= *oc, void *data) =20 static GlobalProperty phb_compat[] =3D { { TYPE_PNV_PHB, "version", "3" }, + { TYPE_PNV_PHB_ROOT_PORT, "version", "3" }, }; =20 mc->desc =3D "IBM PowerNV (Non-Virtualized) POWER8"; diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 3b9ff1096a..bff69201d9 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -108,12 +108,6 @@ struct PnvPBCQState { */ #define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root" =20 -#define TYPE_PNV_PHB3_ROOT_PORT "pnv-phb3-root-port" - -typedef struct PnvPHB3RootPort { - PCIESlot parent_obj; -} PnvPHB3RootPort; - /* * PHB3 PCIe Host Bridge for PowerNV machines (POWER8) */ --=20 2.36.1