From nobody Mon Feb 9 12:25:44 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1653919113; cv=none; d=zohomail.com; s=zohoarc; b=QRr1OmhS09OY9saTVvUrJv+zTuJVNZWuzPpZuiqrUqqBQdoo8znbjlOnx61FhnX2D7IpJwpunFkCYf9Fu2yKrHmrBW1nFxOD8ppAA9gMLinfazfqeUrdSQl5N0DU0iXqlBwLU7MYMfEudZe4huq4zVeHt3S6GcLXPE7nBYLdoMc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653919113; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=0LvtnMQZ1SPn1YXZkNPjauJvgGDYswP1TWEx5Kskyus=; b=LqFjFmqFobjHfi83KXYotlDe5UF8+WDwYrZdGagX4Emxb+TS4eVjLQq0WnlzB5wKZOskfRKXY3ER2OYtpcLNEztoZUjvYocBfJKhub28Csd/xGffC24uuPLIRfgloh4HwpehUXYqsOXyyy8ZH+CoCoG7fYQjtdIReV/a6c+hIi0= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653919113069792.8959587468133; Mon, 30 May 2022 06:58:33 -0700 (PDT) Received: from localhost ([::1]:53880 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nvfuh-0008S2-F3 for importer@patchew.org; Mon, 30 May 2022 09:58:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35470) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nvflN-0001h8-28 for qemu-devel@nongnu.org; Mon, 30 May 2022 09:48:55 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]:2586) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nvflJ-0000u1-Qi for qemu-devel@nongnu.org; Mon, 30 May 2022 09:48:52 -0400 Received: from fraeml736-chm.china.huawei.com (unknown [172.18.147.200]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4LBc8T55MTz6GD83; Mon, 30 May 2022 21:44:25 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml736-chm.china.huawei.com (10.206.15.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 30 May 2022 15:48:45 +0200 Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 30 May 2022 14:48:44 +0100 To: Paolo Bonzini , , "Michael S . Tsirkin" CC: , , , Marcel Apfelbaum , Igor Mammedov , Markus Armbruster , "Mark Cave-Ayland" , Adam Manzanares , Tong Zhang , Ben Widawsky , Shameerali Kolothum Thodi Subject: [PATCH 7/8] hw/cxl: Move the CXLState from MachineState to machine type specific state. Date: Mon, 30 May 2022 14:45:13 +0100 Message-ID: <20220530134514.31664-8-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220530134514.31664-1-Jonathan.Cameron@huawei.com> References: <20220530134514.31664-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhreml713-chm.china.huawei.com (10.201.108.64) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: Jonathan Cameron From: Jonathan Cameron via X-ZM-MESSAGEID: 1653919114045100001 Content-Type: text/plain; charset="utf-8" This removes the last of the CXL code from the MachineState where it is visible to all Machines to only those that support CXL (currently i386/p= c) As i386/pc always support CXL now, stop allocating the state independently. Signed-off-by: Jonathan Cameron --- hw/core/machine.c | 6 ------ hw/i386/acpi-build.c | 6 +++--- hw/i386/pc.c | 32 +++++++++++++++----------------- include/hw/boards.h | 1 - include/hw/i386/pc.h | 2 ++ 5 files changed, 20 insertions(+), 27 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 87787b5604..eb3f1b5302 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -33,7 +33,6 @@ #include "sysemu/qtest.h" #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" -#include "hw/cxl/cxl.h" #include "migration/global_state.h" #include "migration/vmstate.h" #include "exec/confidential-guest-support.h" @@ -1074,10 +1073,6 @@ static void machine_initfn(Object *obj) "Valid values are cpu, mem-ctrl"); } =20 - if (mc->cxl_supported) { - ms->cxl_devices_state =3D g_new0(CXLState, 1); - } - if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { ms->numa_state =3D g_new0(NumaState, 1); object_property_add_bool(obj, "hmat", @@ -1115,7 +1110,6 @@ static void machine_finalize(Object *obj) g_free(ms->device_memory); g_free(ms->nvdimms_state); g_free(ms->numa_state); - g_free(ms->cxl_devices_state); } =20 bool machine_usb(MachineState *machine) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 2e3b1dd9a2..e8b7844841 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1633,7 +1633,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 /* Handle the ranges for the PXB expanders */ if (pci_bus_is_cxl(bus)) { - MemoryRegion *mr =3D &machine->cxl_devices_state->host_mr; + MemoryRegion *mr =3D &pcms->cxl_devices_state.host_mr; uint64_t base =3D mr->addr; =20 cxl_present =3D true; @@ -2711,9 +2711,9 @@ void acpi_build(AcpiBuildTables *tables, MachineState= *machine) machine->nvdimms_state, machine->ram_slots, x86ms->oem_id, x86ms->oem_table_id); } - if (machine->cxl_devices_state->is_enabled) { + if (pcms->cxl_devices_state.is_enabled) { cxl_build_cedt(table_offsets, tables_blob, tables->linker, - x86ms->oem_id, x86ms->oem_table_id, machine->cxl_de= vices_state); + x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devi= ces_state); } =20 acpi_add_table(table_offsets, tables_blob); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 88b5454aaf..19420b043b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -733,7 +733,6 @@ void pc_machine_done(Notifier *notifier, void *data) PCMachineState *pcms =3D container_of(notifier, PCMachineState, machine_done); X86MachineState *x86ms =3D X86_MACHINE(pcms); - MachineState *ms =3D MACHINE(pcms); PCIBus *bus =3D pcms->bus; =20 /* Walk the pci busses looking for pxb busses to hook up */ @@ -743,16 +742,16 @@ void pc_machine_done(Notifier *notifier, void *data) continue; } if (pci_bus_is_cxl(bus)) { - if (!ms->cxl_devices_state->is_enabled) { + if (!pcms->cxl_devices_state.is_enabled) { error_report("CXL host bridges present, but cxl=3Doff"= ); exit(EXIT_FAILURE); } - pxb_cxl_hook_up_registers(ms->cxl_devices_state, bus, &err= or_fatal); + pxb_cxl_hook_up_registers(&pcms->cxl_devices_state, bus, &= error_fatal); } } } - if (ms->cxl_devices_state) { - cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal); + if (pcms->cxl_devices_state.is_enabled) { + cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal); } =20 /* set the number of CPUs */ @@ -922,8 +921,8 @@ void pc_memory_init(PCMachineState *pcms, &machine->device_memory->mr); } =20 - if (machine->cxl_devices_state->is_enabled) { - MemoryRegion *mr =3D &machine->cxl_devices_state->host_mr; + if (pcms->cxl_devices_state.is_enabled) { + MemoryRegion *mr =3D &pcms->cxl_devices_state.host_mr; hwaddr cxl_size =3D MiB; =20 if (pcmc->has_reserved_memory && machine->device_memory->base) { @@ -941,12 +940,12 @@ void pc_memory_init(PCMachineState *pcms, memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size); memory_region_add_subregion(system_memory, cxl_base, mr); cxl_resv_end =3D cxl_base + cxl_size; - if (machine->cxl_devices_state->fixed_windows) { + if (pcms->cxl_devices_state.fixed_windows) { hwaddr cxl_fmw_base; GList *it; =20 cxl_fmw_base =3D ROUND_UP(cxl_base + cxl_size, 256 * MiB); - for (it =3D machine->cxl_devices_state->fixed_windows; it; it = =3D it->next) { + for (it =3D pcms->cxl_devices_state.fixed_windows; it; it =3D = it->next) { CXLFixedWindow *fw =3D it->data; =20 fw->base =3D cxl_fmw_base; @@ -988,7 +987,7 @@ void pc_memory_init(PCMachineState *pcms, res_mem_end +=3D memory_region_size(&machine->device_memory->m= r); } =20 - if (machine->cxl_devices_state->is_enabled) { + if (pcms->cxl_devices_state.is_enabled) { res_mem_end =3D cxl_resv_end; } *val =3D cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); @@ -1024,12 +1023,12 @@ uint64_t pc_pci_hole64_start(void) X86MachineState *x86ms =3D X86_MACHINE(pcms); uint64_t hole64_start =3D 0; =20 - if (ms->cxl_devices_state->host_mr.addr) { - hole64_start =3D ms->cxl_devices_state->host_mr.addr + - memory_region_size(&ms->cxl_devices_state->host_mr); - if (ms->cxl_devices_state->fixed_windows) { + if (pcms->cxl_devices_state.host_mr.addr) { + hole64_start =3D pcms->cxl_devices_state.host_mr.addr + + memory_region_size(&pcms->cxl_devices_state.host_mr); + if (pcms->cxl_devices_state.fixed_windows) { GList *it; - for (it =3D ms->cxl_devices_state->fixed_windows; it; it =3D i= t->next) { + for (it =3D pcms->cxl_devices_state.fixed_windows; it; it =3D = it->next) { CXLFixedWindow *fw =3D it->data; hole64_start =3D fw->mr.addr + memory_region_size(&fw->mr); } @@ -1705,7 +1704,6 @@ static void pc_machine_set_max_fw_size(Object *obj, V= isitor *v, static void pc_machine_initfn(Object *obj) { PCMachineState *pcms =3D PC_MACHINE(obj); - MachineState *ms =3D MACHINE(obj); =20 #ifdef CONFIG_VMPORT pcms->vmport =3D ON_OFF_AUTO_AUTO; @@ -1730,7 +1728,7 @@ static void pc_machine_initfn(Object *obj) pcms->pcspk =3D isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); - cxl_machine_init(obj, ms->cxl_devices_state); + cxl_machine_init(obj, &pcms->cxl_devices_state); } =20 static void pc_machine_reset(MachineState *machine) diff --git a/include/hw/boards.h b/include/hw/boards.h index dd9fc56df2..031f5f884d 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -360,7 +360,6 @@ struct MachineState { CPUArchIdList *possible_cpus; CpuTopology smp; struct NVDIMMState *nvdimms_state; - struct CXLState *cxl_devices_state; struct NumaState *numa_state; CXLFixedMemoryWindowOptionsList *cfmws_list; }; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ffcac5121e..21be7aff26 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -14,6 +14,7 @@ #include "qom/object.h" #include "hw/i386/sgx-epc.h" #include "hw/firmware/smbios.h" +#include "hw/cxl/cxl.h" =20 #define HPET_INTCAP "hpet-intcap" =20 @@ -55,6 +56,7 @@ typedef struct PCMachineState { hwaddr memhp_io_base; =20 SGXEPCState sgx_epc; + CXLState cxl_devices_state; } PCMachineState; =20 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" --=20 2.32.0