From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653674923; cv=none; d=zohomail.com; s=zohoarc; b=AjtDfA5yLnvjne/W4YdZBwoBH9WTHKuNn9iwu/QS1kl1KbcdxtEdInlChSPzb2O9Y99mFHntC/lD4px+PgZ++t7xUe0+FHfl+WekJz4WJ8XrW7iafULNoyBrV6IIhUoAs4z3YbzqTMqQ7pyCdT95X00QcJIKS5LDsohzRLXHFuw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653674923; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=oUTUBggiPUlwZ7WOApcqxGvEWawXcbJb2Pfw/Rgn2LA=; b=k+eKmi8kgf5zzX1lKJfyAIUl5IZJteC8Po719ZIbyG8if65RTTSNLVklYTjybGJK0Ptk+u5yuB+KTxos5+wXaHZF9DukXAQlhO/kEfIyf86qO9WltptFpE+9iPmlFtBnA8iZFVNeHmwV/I/jF7cEDQQ00CKW0zJYMWDyR35kfFc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653674923937186.81485231698423; Fri, 27 May 2022 11:08:43 -0700 (PDT) Received: from localhost ([::1]:51640 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueOA-0006om-US for importer@patchew.org; Fri, 27 May 2022 14:08:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38552) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueM2-00030Z-5k for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:30 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]:42725) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueLy-0001cb-Nr for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:28 -0400 Received: by mail-pl1-x62a.google.com with SMTP id d22so4764405plr.9 for ; Fri, 27 May 2022 11:06:26 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oUTUBggiPUlwZ7WOApcqxGvEWawXcbJb2Pfw/Rgn2LA=; b=FD2Qmuk2Sb6HYzJEtJ4rF0eoLkN0CL/ThgGkXVh84pfpfmWJ/Nnr1S6G5plr3kfu5d 9ia8V5qOuaPuSzA/mSmG7AdYG3V/64qWt09FqmT8aSArd0Ho6A0oHGSPOKxoD4Rw1Ip3 cx5RRtaBeRKo2skHP4OOd1a7WOvHVuC6Mypy25sCVLPr/KrxEt+ReO4L9r0C/ASXYYR1 CDfFDT35zpQjAH1yOzzE3JWdmqxQZg7YVwiQ/m4cYIEATp8DHhAxn9dvEKnneBb6yhGH c7CUpzK8cGluXLhpvsbrMbm8hN+qRPkDrBSi/voKIQMamVBkoE+hhoe15q4vAMeNQ6Vy kjaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oUTUBggiPUlwZ7WOApcqxGvEWawXcbJb2Pfw/Rgn2LA=; b=VgmkYnUBKb/mIAK25bM44a9vVw+PBXfKvMbw9M2LypqIFl0o9eJcl93BKlVypuStUL nlfJCEBCVIjMtJn1BIcWoOEcX+02YRlUYnhGoU7kb6vORpPWWVH239p8/VFA7yUbLVz3 wIxc9h+4N04QB/y2yY67KxuWL2M2++dwS5JzaajXDCniEY2FUErxevpsnEMFBOvsdwwq E8G5fbAWezlx2m1pJScaKdUVR8JBjcTJxdO+7A82IBlNfbUV24skBeTjwkXotTNr+zHa Hr8kf4MjyFflvA9ZLPjvVlm90WegK3Ws3Z7Wn+4C0nqz0JgIHWf7cOD1Ei/QsudcbkUF m8vQ== X-Gm-Message-State: AOAM532shNscC15xtEqXgjTXvpAkakZQYBE9twJ3CBuP2/X2i1ZdoZBF 9yBpgb5TnzV9qisj3ERGWkOEU+4CPIZUHg== X-Google-Smtp-Source: ABdhPJz1Cd0EPG5gtKRzdJZnGgcRRd8Jdn52iF15mRIzYcIiumHfONaf2uHvvQBLjK73tcHw3N2WGA== X-Received: by 2002:a17:902:ecc6:b0:163:8bc7:16c5 with SMTP id a6-20020a170902ecc600b001638bc716c5mr6380657plh.75.1653674785313; Fri, 27 May 2022 11:06:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 01/15] target/arm: Rename TBFLAG_A64 ZCR_LEN to SVE_LEN Date: Fri, 27 May 2022 11:06:09 -0700 Message-Id: <20220527180623.185261-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653674925627100001 Content-Type: text/plain; charset="utf-8" With SME, the vector length does not only come from ZCR_ELx. Comment that this is either the SVE VL, or the Streaming SVE VL. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/cpu.h | 3 ++- target/arm/helper.c | 2 +- target/arm/translate-a64.c | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5bc6382fce..69e71fdcec 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3117,7 +3117,8 @@ FIELD(TBFLAG_M32, MVE_NO_PRED, 5, 1) /* No= t cached. */ */ FIELD(TBFLAG_A64, TBII, 0, 2) FIELD(TBFLAG_A64, SVEEXC_EL, 2, 2) -FIELD(TBFLAG_A64, ZCR_LEN, 4, 4) +/* The current vector length, either SVE VL or Streaming SVE VL. */ +FIELD(TBFLAG_A64, SVE_LEN, 4, 4) FIELD(TBFLAG_A64, PAUTH_ACTIVE, 8, 1) FIELD(TBFLAG_A64, BT, 9, 1) FIELD(TBFLAG_A64, BTYPE, 10, 2) /* Not cached. */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 5c875927cf..2a0399100e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -13683,7 +13683,7 @@ static CPUARMTBFlags rebuild_hflags_a64(CPUARMState= *env, int el, int fp_el, zcr_len =3D sve_zcr_len_for_el(env, el); } DP_TBFLAG_A64(flags, SVEEXC_EL, sve_el); - DP_TBFLAG_A64(flags, ZCR_LEN, zcr_len); + DP_TBFLAG_A64(flags, SVE_LEN, zcr_len); } =20 sctlr =3D regime_sctlr(env, stage1); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index cc9344b015..09ac344d35 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14608,7 +14608,7 @@ static void aarch64_tr_init_disas_context(DisasCont= extBase *dcbase, dc->align_mem =3D EX_TBFLAG_ANY(tb_flags, ALIGN_MEM); dc->pstate_il =3D EX_TBFLAG_ANY(tb_flags, PSTATE__IL); dc->sve_excp_el =3D EX_TBFLAG_A64(tb_flags, SVEEXC_EL); - dc->sve_len =3D (EX_TBFLAG_A64(tb_flags, ZCR_LEN) + 1) * 16; + dc->sve_len =3D (EX_TBFLAG_A64(tb_flags, SVE_LEN) + 1) * 16; dc->pauth_active =3D EX_TBFLAG_A64(tb_flags, PAUTH_ACTIVE); dc->bt =3D EX_TBFLAG_A64(tb_flags, BT); dc->btype =3D EX_TBFLAG_A64(tb_flags, BTYPE); --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675149; cv=none; d=zohomail.com; s=zohoarc; b=CGhqogYzC+Zr3mRHfPUrbF6nMhYfYRmEOs8jHdCE/qSyeQUdT035B0dsGFmxLyjbZDeYxpTeFMgDRVUn4QyCQ1qS9HFWaASu1qLVfiUnneMVRU8U+DaE/e7Or0wy3CRbhYJiCivqSnM8nIZPC9N7D3QuunAZwtJNysu6Ryh/MCI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675149; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vc6A4fJ2bpA25nPv/BuEPYKtg306M4XfmsuW8OQnyWk=; b=H4rw9LUHLGS1RkZ1kY2XKoDc0cYZKc/olL1Ezf7HcDPrZvHOWMQ21ji7nsV4Uq7nB7mhDcl9r7xqKC3fz5ICgqc3nMwKHpcf+itVNwxqqtNL9Ff1Uh1F16rBkHlrnBmapm11y/wV7lU7gkgB/ee/ETFYuBD4REP1TGtAcRi+dkI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675149936506.3575412314326; Fri, 27 May 2022 11:12:29 -0700 (PDT) Received: from localhost ([::1]:58704 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueRo-0003Cr-O4 for importer@patchew.org; Fri, 27 May 2022 14:12:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38582) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueM3-00031i-Kj for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:31 -0400 Received: from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433]:47019) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM2-0001dA-1g for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:31 -0400 Received: by mail-pf1-x433.google.com with SMTP id j6so4926660pfe.13 for ; Fri, 27 May 2022 11:06:28 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vc6A4fJ2bpA25nPv/BuEPYKtg306M4XfmsuW8OQnyWk=; b=i6n32vXeQlZRyGRIWYESF8+QaYwy/aQKXl92/ZypR/DjgOcSn6oqW4BqLT+W5gcc0j r44/92d+9WHPA1Q6DXXQ32XrCRyMesnzdjVpm98Wysxi08YpFDWtHmsllAHgaPM1DZ22 bxPr1QGnHiEgrhNCQZithunDDP8m9X1yC4cPLc59g24imbTjCbLDhZy6bpirYHc5IA3g DDNRKVVS2VA4jWjA5JZMOdwNFoOHanwI+umhXYPygLEnFz9mnCubPJfQNegc9b4f4HQr 1BGlyxRNHYnSIWi8+LdTk0jJcC+WfZadpzPYdDw+ntBoumiRqr2dikQuFWaI5zKmq9I7 bmqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vc6A4fJ2bpA25nPv/BuEPYKtg306M4XfmsuW8OQnyWk=; b=joEI/0KedYc0mA9nghO60t+Frf6UdWGTF7NMiLE2NTC1+q8xZXM4BnNdtMOHhKOHcu ndww/PCd6+SKF2bioElIJDkdWF2QaRhHBB+HKENh1cL1OJ5FQ/SVEVVtUOSIJCQOYDJf 5dlIEQmIsnLQFhtJsr10H7a8O/gOqXxm1B0Ax0+lzhE/KDSghpc/V9ko/HLAC6yphrJ2 L9cfj0KXLcBkM3kajzXqOkm1ij226fdPCZnhC+H2Sup50cTsBlQX1mSFuheRsxNIaVzs XFEZRfRflAkOvOWEh+Ef9QvcfhWp8oFVp9/HlNno7jd9dvbouaK72sqJSfK6NXipDAei p4kw== X-Gm-Message-State: AOAM531opSNzh4yeD9aSG3FB5BOOPotPZ8YWZ6bB7599OLAb6Ca9034Y wKLoyvrXiZzT0egIAO/l5vVjJCq3CSq6LA== X-Google-Smtp-Source: ABdhPJxO6vOvdVZmySDD9+4NMxV3ttfiSTqqfVmAX3S11UdX5SMGZwZD+HzuVpDCueM5cO4/NqkBtQ== X-Received: by 2002:a63:1a17:0:b0:3fa:e901:1c68 with SMTP id a23-20020a631a17000000b003fae9011c68mr11153205pga.243.1653674786362; Fri, 27 May 2022 11:06:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 02/15] linux-user/aarch64: Use SVE_LEN from hflags Date: Fri, 27 May 2022 11:06:10 -0700 Message-Id: <20220527180623.185261-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675151971100001 Content-Type: text/plain; charset="utf-8" Use the digested vector length rather than the raw zcr_el[1] value. This fixes an incorrect return from do_prctl_set_vl where we didn't take into account the set of vector lengths supported by the cpu. It also prepares us for Streaming SVE mode, where the vector length comes from a different cpreg. Signed-off-by: Richard Henderson --- linux-user/aarch64/target_prctl.h | 19 +++++++++++++------ linux-user/aarch64/signal.c | 4 ++-- 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/linux-user/aarch64/target_prctl.h b/linux-user/aarch64/target_= prctl.h index 3f5a5d3933..fcbb90e881 100644 --- a/linux-user/aarch64/target_prctl.h +++ b/linux-user/aarch64/target_prctl.h @@ -10,7 +10,7 @@ static abi_long do_prctl_get_vl(CPUArchState *env) { ARMCPU *cpu =3D env_archcpu(env); if (cpu_isar_feature(aa64_sve, cpu)) { - return ((cpu->env.vfp.zcr_el[1] & 0xf) + 1) * 16; + return (EX_TBFLAG_A64(env->hflags, SVE_LEN) + 1) * 16; } return -TARGET_EINVAL; } @@ -25,18 +25,25 @@ static abi_long do_prctl_set_vl(CPUArchState *env, abi_= long arg2) */ if (cpu_isar_feature(aa64_sve, env_archcpu(env)) && arg2 >=3D 0 && arg2 <=3D 512 * 16 && !(arg2 & 15)) { - ARMCPU *cpu =3D env_archcpu(env); uint32_t vq, old_vq; =20 - old_vq =3D (env->vfp.zcr_el[1] & 0xf) + 1; + old_vq =3D EX_TBFLAG_A64(env->hflags, SVE_LEN) + 1; + + /* + * Bound the value of vq, so that we know that it fits into + * the 4-bit field in ZCR_EL1. Rely on the hflags rebuild + * to sort out the length supported by the cpu. + */ vq =3D MAX(arg2 / 16, 1); - vq =3D MIN(vq, cpu->sve_max_vq); + vq =3D MIN(vq, 16); + env->vfp.zcr_el[1] =3D vq - 1; + arm_rebuild_hflags(env); + + vq =3D EX_TBFLAG_A64(env->hflags, SVE_LEN) + 1; =20 if (vq < old_vq) { aarch64_sve_narrow_vq(env, vq); } - env->vfp.zcr_el[1] =3D vq - 1; - arm_rebuild_hflags(env); return vq * 16; } return -TARGET_EINVAL; diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index 7de4c96eb9..57e9360743 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -315,7 +315,7 @@ static int target_restore_sigframe(CPUARMState *env, =20 case TARGET_SVE_MAGIC: if (cpu_isar_feature(aa64_sve, env_archcpu(env))) { - vq =3D (env->vfp.zcr_el[1] & 0xf) + 1; + vq =3D EX_TBFLAG_A64(env->hflags, SVE_LEN) + 1; sve_size =3D QEMU_ALIGN_UP(TARGET_SVE_SIG_CONTEXT_SIZE(vq)= , 16); if (!sve && size =3D=3D sve_size) { sve =3D (struct target_sve_context *)ctx; @@ -434,7 +434,7 @@ static void target_setup_frame(int usig, struct target_= sigaction *ka, =20 /* SVE state needs saving only if it exists. */ if (cpu_isar_feature(aa64_sve, env_archcpu(env))) { - vq =3D (env->vfp.zcr_el[1] & 0xf) + 1; + vq =3D EX_TBFLAG_A64(env->hflags, SVE_LEN) + 1; sve_size =3D QEMU_ALIGN_UP(TARGET_SVE_SIG_CONTEXT_SIZE(vq), 16); sve_ofs =3D alloc_sigframe_space(sve_size, &layout); } --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675208; cv=none; d=zohomail.com; s=zohoarc; b=Bx82fj2uveoABVCqR9xjSuG39qdhjNglW0sB7vFg5R/9TngkjpwgGqObRcXCZTvJ3A/3ZjIeOnsaz2VC6n8ol0DrIKpCtaEvDMZo/gnFRyT1Kyrr69Q838/Rdt3ZEdsM3jXyyVg6QoQAob7BNOXRiZ8ESSU3omDP8WzWT9Zv1zs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675208; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9CQLR9+ZabdVBvj8yT9hoESiXzPxfvDoRGYhKlSAaF0=; b=aZkcJzZ9NPs7VQ3BYF2W0B5nyvKVEU2sTcMwc/yE9VAr0vJOPGcmcfIHJz1yZwBstELn5cnciseKK0hyXqXIqp0MX4Mt59zv2v+FDectiwbQzqoZl19zxDMjZxYMws/HVCQUdp/7Quhx8pgyY73bsCUu4Pdemgab4RX/QCWOLXM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675208087671.0673834276733; Fri, 27 May 2022 11:13:28 -0700 (PDT) Received: from localhost ([::1]:60340 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueSl-0004IB-0W for importer@patchew.org; Fri, 27 May 2022 14:13:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38580) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueM3-00031h-Gx for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:31 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]:41716) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM0-0001d6-TK for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:31 -0400 Received: by mail-pf1-x42a.google.com with SMTP id p8so4944831pfh.8 for ; Fri, 27 May 2022 11:06:28 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9CQLR9+ZabdVBvj8yT9hoESiXzPxfvDoRGYhKlSAaF0=; b=mt03msywCe/dPxaEu9GJ/sl3afRG3iu3cN3mqRMbZBcOiTQfRlzRD+xqavz2uQwa2c VngJAKod20t3pBPIHLQfus41+Kij+T0ZyAskqGkkX560L400DY/VgFIAEVOhNWmJmbVI 7buJGsyaH8Ityah1GHjFQGDVCQzPASiN4FPMFh2H8kTAFwgdJfRs/gjVjQ36rxa1eEJw GYKqpLa98vMbRCBCvBsk1lz1gK4pHbjl1/EYuO94xMwaEzFVxVPZ++4wMzvGHbdOCL8S unY9donK+oUigcxumKbNnsyYxg+9WXI3F+FVuQejSdbb3iEXtJM+AFJKlpEaiROaknNg zIAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9CQLR9+ZabdVBvj8yT9hoESiXzPxfvDoRGYhKlSAaF0=; b=ZYpO4XVHgVo3xt/vejONB+9/a0lysWUsao1eCtoKLOkUwTpTxwW9vOpPrurx5PUV6M RzHvc2k1XsrgFUXA1AsmtG/MrgRu2qDADltYifS/7Q7UyBRj7/0sx5iQ3mD0rsxLvY9S 21ZoxlM/H/bPzOtf9nvmrUvLe2nsI9YHPnQIS4Z0i5rDL7O7sc5olRgTmFq6FscrHdOL JzRVjr569KyNw0UzQCEUqHqMmnUw80Jrk3z7BnvHThqZwfHPlrJ6xZc0DhuSLtCEBY8B W9qLV3M3YI35wlkwDeFFObMGC5Vf2SiKEcvjk0MERFPAy6Aw3K3NjxXROsbGoqY2quXM JPrw== X-Gm-Message-State: AOAM533flmPSoZnIh9VNfXKy73R6rU7+UY7e0UfQKZssGqfGDS/+zGv4 Z4RIMftGPz9xdqB9emiFPW27kxv7Pq45nQ== X-Google-Smtp-Source: ABdhPJzEC/53RT/8SnMX6ZQS9E92SMYGPz4sCxJYloye1CpiXsLFfMfUzm5g7YUKveRjF+7N7aM+FA== X-Received: by 2002:a05:6a00:238f:b0:4f6:b09a:4c63 with SMTP id f15-20020a056a00238f00b004f6b09a4c63mr45411028pfc.35.1653674787327; Fri, 27 May 2022 11:06:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 03/15] target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset Date: Fri, 27 May 2022 11:06:11 -0700 Message-Id: <20220527180623.185261-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675210203100001 Content-Type: text/plain; charset="utf-8" We don't need to constrain the value set in zcr_el[1], because it will be done by sve_zcr_len_for_el. Signed-off-by: Richard Henderson --- target/arm/cpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index d2bd74c2ed..0621944167 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -208,8 +208,7 @@ static void arm_cpu_reset(DeviceState *dev) CPACR_EL1, ZEN, 3); /* with reasonable vector length */ if (cpu_isar_feature(aa64_sve, cpu)) { - env->vfp.zcr_el[1] =3D - aarch64_sve_zcr_get_valid_len(cpu, cpu->sve_default_vq - 1= ); + env->vfp.zcr_el[1] =3D cpu->sve_default_vq - 1; } /* * Enable 48-bit address space (TODO: take reserved_va into accoun= t). --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675966; cv=none; d=zohomail.com; s=zohoarc; b=FYWp1uEr4gp/UVgF3X3REmcS/jGekJIE581vKxR29/VblQIFLUKp2324OyUIJt63BGjW7nnteEuIqSAPGZxFkq77ME1JzbpeQ6YGRCC5uyLlc/SGKrt1MR1OpCcMSBWLSlcmMG3CjQce08DUojg3ZafdrmAVLcRcjNQr/U0x1qs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675966; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dxabHe71bVF6gWrVCnhG6cG25f2zMO3rtHLOUVp6u4E=; b=cfsiXe1qKKPRAxnvDm/0IKr8v4QrofEsEw3GNhbLDpbEGfc+Oa8LZwf+JUpJjxx2p5XdagzFHYuv0VpLm6ZI1J7lvUchfmRY4Pl+9vQ9jgu6N/SDwLiTA3j9eIzDwaWtUtn9gwqqBhkw3rtbml4rlB0x6BRLS+jwwwi1ZwcKirQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675966475161.74783808594907; Fri, 27 May 2022 11:26:06 -0700 (PDT) Received: from localhost ([::1]:33810 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueez-0008CV-0w for importer@patchew.org; Fri, 27 May 2022 14:26:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39044) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueMO-0003eN-Lf for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:52 -0400 Received: from mail-vk1-xa2d.google.com ([2607:f8b0:4864:20::a2d]:37521) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueMC-0001ga-2b for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:52 -0400 Received: by mail-vk1-xa2d.google.com with SMTP id bs5so2348223vkb.4 for ; Fri, 27 May 2022 11:06:39 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dxabHe71bVF6gWrVCnhG6cG25f2zMO3rtHLOUVp6u4E=; b=njkkpmZT0rvIz2hvQ69ln9hhreHySUIbW1gj7hABFe+uxaELzlu5t0nDL0OxYdY8r/ LaM48hfqf79hDbgSjXqzGfsQx05b8zzMLInsfrkOrAhzAGKpg1wwepQIW9aUoefA6mAV fERCUxWYPyjcs9cYvJbPZ7dfiyBU5eaOdRzxh7KK+uqVGxZ5BXY+TY/c6W2lhoouSmln tji/17AGCGWWEInUHpdzRIcSL+hVACUrRi+8BWHTlF79UmjIZln70K6pye7Y8DCQtG6N KOY2+NTP819256vuT68Ngj5XAsYM1M9BIADbgIRCGFCJZX42oyBxehiYUME4G5BxTuGn zM/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dxabHe71bVF6gWrVCnhG6cG25f2zMO3rtHLOUVp6u4E=; b=gVfbl/yzUouHUUTu00Cso4Zr/HGa7/pcToOYgli2gKMnMkU8Tq7LR2wHX/k2jrNVVp ZhoUWQTEhcx6wpI9qCtsHI8TLy3gB0NlhR+RhViWNGY6auSkjEUzyIYvcIh6EEDj8Jd4 QqDBRVUgusChSgGZ4D9W0Dw58jkqnPAUvelM7EyHU3GOON8XQGqj7nf+Q8dhpI2+iNAa bCXcUG3/id4C0NepeqnQAlWVRjcrCMUfbW9TCrlrdri944K20sOi8IBPpxjSjrW8RXvF 5KHuovA1Bu0MfOJczzXEoBLPAUbpiJRM68AzOQGq3eYa59LHAai85niEqjwL+ssUqGi0 k0ug== X-Gm-Message-State: AOAM533J/442+5r0zc+wWvoaulX54QMSX1o3r7oR/DvAugO+m/h8sA1u r7pA4Xyyz+p/tK7Fk5+w+Jiaa8bM7STBSw== X-Google-Smtp-Source: ABdhPJx69h/EJPz6NIAlYDaCagEyowsbi2eP5S6mrQ1kwWpPCAauBKnBR3DnDrLPCqghdDhTzi4/JA== X-Received: by 2002:a17:902:ebca:b0:15f:4cc5:f40f with SMTP id p10-20020a170902ebca00b0015f4cc5f40fmr43710895plg.96.1653674788226; Fri, 27 May 2022 11:06:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 04/15] target/arm: Merge aarch64_sve_zcr_get_valid_len into caller Date: Fri, 27 May 2022 11:06:12 -0700 Message-Id: <20220527180623.185261-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::a2d; envelope-from=richard.henderson@linaro.org; helo=mail-vk1-xa2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675967836100001 Content-Type: text/plain; charset="utf-8" This function is used only once, and will need modification for Streaming SVE mode. Signed-off-by: Richard Henderson --- target/arm/internals.h | 11 ----------- target/arm/helper.c | 30 +++++++++++------------------- 2 files changed, 11 insertions(+), 30 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 09d25612af..199d1bf630 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -198,17 +198,6 @@ void arm_translate_init(void); void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb); #endif /* CONFIG_TCG */ =20 -/** - * aarch64_sve_zcr_get_valid_len: - * @cpu: cpu context - * @start_len: maximum len to consider - * - * Return the maximum supported sve vector length <=3D @start_len. - * Note that both @start_len and the return value are in units - * of ZCR_ELx.LEN, so the vector bit length is (x + 1) * 128. - */ -uint32_t aarch64_sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len); - enum arm_fprounding { FPROUNDING_TIEEVEN, FPROUNDING_POSINF, diff --git a/target/arm/helper.c b/target/arm/helper.c index 2a0399100e..66036c85d7 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6216,40 +6216,32 @@ int sve_exception_el(CPUARMState *env, int el) return 0; } =20 -uint32_t aarch64_sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len) -{ - uint32_t end_len; - - start_len =3D MIN(start_len, ARM_MAX_VQ - 1); - end_len =3D start_len; - - if (!test_bit(start_len, cpu->sve_vq_map)) { - end_len =3D find_last_bit(cpu->sve_vq_map, start_len); - assert(end_len < start_len); - } - return end_len; -} - /* * Given that SVE is enabled, return the vector length for EL. */ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) { ARMCPU *cpu =3D env_archcpu(env); - uint32_t zcr_len =3D cpu->sve_max_vq - 1; + uint32_t len =3D cpu->sve_max_vq - 1; + uint32_t end_len; =20 if (el <=3D 1 && (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) !=3D (HCR_E2H | HCR_T= GE)) { - zcr_len =3D MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[1]); + len =3D MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[1]); } if (el <=3D 2 && arm_feature(env, ARM_FEATURE_EL2)) { - zcr_len =3D MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[2]); + len =3D MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[2]); } if (arm_feature(env, ARM_FEATURE_EL3)) { - zcr_len =3D MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[3]); + len =3D MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[3]); } =20 - return aarch64_sve_zcr_get_valid_len(cpu, zcr_len); + end_len =3D len; + if (!test_bit(len, cpu->sve_vq_map)) { + end_len =3D find_last_bit(cpu->sve_vq_map, len); + assert(end_len < len); + } + return end_len; } =20 static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675506; cv=none; d=zohomail.com; s=zohoarc; b=b6xnzAzIjeMfKmNDuj5sXzFBFcGaFoIRcxOEUonwVT9ZPG4Nv2twfe363rlYjZLOsOLjp7HhLzOCqI6HAUBET9LDJI7hEuydwdAj+PiyblHmV/omC3Q63mtE7upEOFuI26f3+3pfeOqqN25XaXo9huc48RgYAj6zkxwx2Kv0Kvg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gvNRQC8KhINJ3YSuAmDpp0PT7w00RoWpHA0CJJcyrMM=; b=kKgYIXTDt8ctekqLOIrD+/dyaNvgL+9EKD0JMTaAWWpN2aMLN7Fyh0oz0rO2pYrMel r3PDt6kIBdhozzrGieDAZOuVmUuwGWQMUwGmTqVUawfsSxHx2hO3ck28Rnk3wwT0seZr gKTfJanW4s5nX1j7WeGS4uoYB3TNOTkjuHzZetytH4r/hovcsv7dXMX97ye7cZ4O1xIk 9w/hUljZ2acnqz1s+jmyFqUUa9rZTJrY3ORn+/VTktqf2gFI4pZpKN6kwuvTAsoYhix8 GM3QI+RUf5Jim+FioIz6QB5ey6d1LUmXo+e8DKOscE628/epSgKUo+EYLep3dhS0PxjF +QwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gvNRQC8KhINJ3YSuAmDpp0PT7w00RoWpHA0CJJcyrMM=; b=tbUQW5b9rF2RTw/PbOE01jL4+JIo0RoWXlj1BNwroQZdzu+tcxDgLKlzEsusMt6WiV Akh+hOBMip6vcxZMkgsYgg8BTOChAVcfcSY9vObJm3RTrAJWaBxLrmxHR7Gz5r84J2qt 4gdr1HbFpOvXAUjA0OGUhTG2jfhGw5cgPJz8HfmYqHKqU/xuVVpUIHsv8taijG3UAylS RvNIGQvnyb2ptfmJgTRvQwcHdLtUL7IA/+OBu9UAWTxzLwLqWYw6+GiPQLVPevxcipfs tNfxrBc+PRIQ9DchAekM7tO7w6IjGiBwqJ3xWvEo22SBzOsDxXJIz7uYbWWvqH5AaiLI xRSg== X-Gm-Message-State: AOAM530ZQ+iYsgDcAvLggIEYya2F+gvdKeX5lYpgNIRQMAbNiqjYwScI GY2iJz5pcV6R2Ym8DkxKPR8rHE1/3hULqw== X-Google-Smtp-Source: ABdhPJxYbPMBHDNeqEzCipPfCyrlE8D3KEzypN5hGWh6sLiuGupX5Eg+U0GdtQhkO6Pb3O+69cHsSw== X-Received: by 2002:a17:90a:6b41:b0:1e0:e082:14c7 with SMTP id x1-20020a17090a6b4100b001e0e08214c7mr9422100pjl.92.1653674789119; Fri, 27 May 2022 11:06:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell Subject: [PATCH v3 05/15] target/arm: Use uint32_t instead of bitmap for sve vq's Date: Fri, 27 May 2022 11:06:13 -0700 Message-Id: <20220527180623.185261-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675508541100001 Content-Type: text/plain; charset="utf-8" The bitmap need only hold 15 bits; bitmap is over-complicated. We can simplify operations quite a bit with plain logical ops. The introduction of SVE_VQ_POW2_MAP eliminates the need for looping in order to search for powers of two. Simply perform the logical ops and use count leading or trailing zeros as required to find the result. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 +-- target/arm/internals.h | 5 ++ target/arm/kvm_arm.h | 7 ++- target/arm/cpu64.c | 117 ++++++++++++++++++++--------------------- target/arm/helper.c | 9 +--- target/arm/kvm64.c | 36 +++---------- 6 files changed, 75 insertions(+), 105 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 69e71fdcec..a86e8d6548 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1041,9 +1041,9 @@ struct ArchCPU { * Bits set in sve_vq_supported represent valid vector lengths for * the CPU type. */ - DECLARE_BITMAP(sve_vq_map, ARM_MAX_VQ); - DECLARE_BITMAP(sve_vq_init, ARM_MAX_VQ); - DECLARE_BITMAP(sve_vq_supported, ARM_MAX_VQ); + uint32_t sve_vq_map; + uint32_t sve_vq_init; + uint32_t sve_vq_supported; =20 /* Generic timer counter frequency, in Hz */ uint64_t gt_cntfrq_hz; diff --git a/target/arm/internals.h b/target/arm/internals.h index 199d1bf630..b587901be1 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1299,4 +1299,9 @@ void aa32_max_features(ARMCPU *cpu); bool arm_singlestep_active(CPUARMState *env); bool arm_generate_debug_exceptions(CPUARMState *env, int cur_el); =20 +/* Powers of 2 for sve_vq_map et al. */ +#define SVE_VQ_POW2_MAP \ + ((1 << (1 - 1)) | (1 << (2 - 1)) | \ + (1 << (4 - 1)) | (1 << (8 - 1)) | (1 << (16 - 1))) + #endif diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index b7f78b5215..99017b635c 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -239,13 +239,12 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures= *ahcf); /** * kvm_arm_sve_get_vls: * @cs: CPUState - * @map: bitmap to fill in * * Get all the SVE vector lengths supported by the KVM host, setting * the bits corresponding to their length in quadwords minus one - * (vq - 1) in @map up to ARM_MAX_VQ. + * (vq - 1) up to ARM_MAX_VQ. Return the resulting map. */ -void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map); +uint32_t kvm_arm_sve_get_vls(CPUState *cs); =20 /** * kvm_arm_set_cpu_features_from_host: @@ -439,7 +438,7 @@ static inline void kvm_arm_steal_time_finalize(ARMCPU *= cpu, Error **errp) g_assert_not_reached(); } =20 -static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) +static inline uint32_t kvm_arm_sve_get_vls(CPUState *cs) { g_assert_not_reached(); } diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 3ff9219ca3..51c5d8d4bc 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -355,8 +355,11 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * any of the above. Finally, if SVE is not disabled, then at least o= ne * vector length must be enabled. */ - DECLARE_BITMAP(tmp, ARM_MAX_VQ); - uint32_t vq, max_vq =3D 0; + uint32_t vq_map =3D cpu->sve_vq_map; + uint32_t vq_init =3D cpu->sve_vq_init; + uint32_t vq_supported; + uint32_t vq_mask =3D 0; + uint32_t tmp, vq, max_vq =3D 0; =20 /* * CPU models specify a set of supported vector lengths which are @@ -364,10 +367,16 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * in the supported bitmap results in an error. When KVM is enabled we * fetch the supported bitmap from the host. */ - if (kvm_enabled() && kvm_arm_sve_supported()) { - kvm_arm_sve_get_vls(CPU(cpu), cpu->sve_vq_supported); - } else if (kvm_enabled()) { - assert(!cpu_isar_feature(aa64_sve, cpu)); + if (kvm_enabled()) { + if (kvm_arm_sve_supported()) { + cpu->sve_vq_supported =3D kvm_arm_sve_get_vls(CPU(cpu)); + vq_supported =3D cpu->sve_vq_supported; + } else { + assert(!cpu_isar_feature(aa64_sve, cpu)); + vq_supported =3D 0; + } + } else { + vq_supported =3D cpu->sve_vq_supported; } =20 /* @@ -375,8 +384,9 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * From the properties, sve_vq_map implies sve_vq_init. * Check first for any sve enabled. */ - if (!bitmap_empty(cpu->sve_vq_map, ARM_MAX_VQ)) { - max_vq =3D find_last_bit(cpu->sve_vq_map, ARM_MAX_VQ) + 1; + if (vq_map !=3D 0) { + max_vq =3D 32 - clz32(vq_map); + vq_mask =3D MAKE_64BIT_MASK(0, max_vq); =20 if (cpu->sve_max_vq && max_vq > cpu->sve_max_vq) { error_setg(errp, "cannot enable sve%d", max_vq * 128); @@ -392,15 +402,10 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * For KVM we have to automatically enable all supported uniti= alized * lengths, even when the smaller lengths are not all powers-o= f-two. */ - bitmap_andnot(tmp, cpu->sve_vq_supported, cpu->sve_vq_init, ma= x_vq); - bitmap_or(cpu->sve_vq_map, cpu->sve_vq_map, tmp, max_vq); + vq_map |=3D vq_supported & ~vq_init & vq_mask; } else { /* Propagate enabled bits down through required powers-of-two.= */ - for (vq =3D pow2floor(max_vq); vq >=3D 1; vq >>=3D 1) { - if (!test_bit(vq - 1, cpu->sve_vq_init)) { - set_bit(vq - 1, cpu->sve_vq_map); - } - } + vq_map |=3D SVE_VQ_POW2_MAP & ~vq_init & vq_mask; } } else if (cpu->sve_max_vq =3D=3D 0) { /* @@ -413,25 +418,18 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) =20 if (kvm_enabled()) { /* Disabling a supported length disables all larger lengths. */ - for (vq =3D 1; vq <=3D ARM_MAX_VQ; ++vq) { - if (test_bit(vq - 1, cpu->sve_vq_init) && - test_bit(vq - 1, cpu->sve_vq_supported)) { - break; - } - } + tmp =3D vq_init & vq_supported; } else { /* Disabling a power-of-two disables all larger lengths. */ - for (vq =3D 1; vq <=3D ARM_MAX_VQ; vq <<=3D 1) { - if (test_bit(vq - 1, cpu->sve_vq_init)) { - break; - } - } + tmp =3D vq_init & SVE_VQ_POW2_MAP; } + vq =3D ctz32(tmp) + 1; =20 max_vq =3D vq <=3D ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ; - bitmap_andnot(cpu->sve_vq_map, cpu->sve_vq_supported, - cpu->sve_vq_init, max_vq); - if (max_vq =3D=3D 0 || bitmap_empty(cpu->sve_vq_map, max_vq)) { + vq_mask =3D MAKE_64BIT_MASK(0, max_vq); + vq_map =3D vq_supported & ~vq_init & vq_mask; + + if (max_vq =3D=3D 0 || vq_map =3D=3D 0) { error_setg(errp, "cannot disable sve%d", vq * 128); error_append_hint(errp, "Disabling sve%d results in all " "vector lengths being disabled.\n", @@ -441,7 +439,8 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) return; } =20 - max_vq =3D find_last_bit(cpu->sve_vq_map, max_vq) + 1; + max_vq =3D 32 - clz32(vq_map); + vq_mask =3D MAKE_64BIT_MASK(0, max_vq); } =20 /* @@ -451,9 +450,9 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) */ if (cpu->sve_max_vq !=3D 0) { max_vq =3D cpu->sve_max_vq; + vq_mask =3D MAKE_64BIT_MASK(0, max_vq); =20 - if (!test_bit(max_vq - 1, cpu->sve_vq_map) && - test_bit(max_vq - 1, cpu->sve_vq_init)) { + if (vq_init & ~vq_map & (1 << (max_vq - 1))) { error_setg(errp, "cannot disable sve%d", max_vq * 128); error_append_hint(errp, "The maximum vector length must be " "enabled, sve-max-vq=3D%d (%d bits)\n", @@ -462,8 +461,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) } =20 /* Set all bits not explicitly set within sve-max-vq. */ - bitmap_complement(tmp, cpu->sve_vq_init, max_vq); - bitmap_or(cpu->sve_vq_map, cpu->sve_vq_map, tmp, max_vq); + vq_map |=3D ~vq_init & vq_mask; } =20 /* @@ -472,13 +470,14 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * are clear, just in case anybody looks. */ assert(max_vq !=3D 0); - bitmap_clear(cpu->sve_vq_map, max_vq, ARM_MAX_VQ - max_vq); + assert(vq_mask !=3D 0); + vq_map &=3D vq_mask; =20 /* Ensure the set of lengths matches what is supported. */ - bitmap_xor(tmp, cpu->sve_vq_map, cpu->sve_vq_supported, max_vq); - if (!bitmap_empty(tmp, max_vq)) { - vq =3D find_last_bit(tmp, max_vq) + 1; - if (test_bit(vq - 1, cpu->sve_vq_map)) { + tmp =3D vq_map ^ (vq_supported & vq_mask); + if (tmp) { + vq =3D 32 - clz32(tmp); + if (vq_map & (1 << (vq - 1))) { if (cpu->sve_max_vq) { error_setg(errp, "cannot set sve-max-vq=3D%d", cpu->sve_ma= x_vq); error_append_hint(errp, "This CPU does not support " @@ -502,15 +501,15 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) return; } else { /* Ensure all required powers-of-two are enabled. */ - for (vq =3D pow2floor(max_vq); vq >=3D 1; vq >>=3D 1) { - if (!test_bit(vq - 1, cpu->sve_vq_map)) { - error_setg(errp, "cannot disable sve%d", vq * 128); - error_append_hint(errp, "sve%d is required as it " - "is a power-of-two length smalle= r " - "than the maximum, sve%d\n", - vq * 128, max_vq * 128); - return; - } + tmp =3D SVE_VQ_POW2_MAP & vq_mask & ~vq_map; + if (tmp) { + vq =3D 32 - clz32(tmp); + error_setg(errp, "cannot disable sve%d", vq * 128); + error_append_hint(errp, "sve%d is required as it " + "is a power-of-two length smaller " + "than the maximum, sve%d\n", + vq * 128, max_vq * 128); + return; } } } @@ -530,6 +529,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) =20 /* From now on sve_max_vq is the actual maximum supported length. */ cpu->sve_max_vq =3D max_vq; + cpu->sve_vq_map =3D vq_map; } =20 static void cpu_max_get_sve_max_vq(Object *obj, Visitor *v, const char *na= me, @@ -590,7 +590,7 @@ static void cpu_arm_get_sve_vq(Object *obj, Visitor *v,= const char *name, if (!cpu_isar_feature(aa64_sve, cpu)) { value =3D false; } else { - value =3D test_bit(vq - 1, cpu->sve_vq_map); + value =3D extract32(cpu->sve_vq_map, vq - 1, 1); } visit_type_bool(v, name, &value, errp); } @@ -612,12 +612,8 @@ static void cpu_arm_set_sve_vq(Object *obj, Visitor *v= , const char *name, return; } =20 - if (value) { - set_bit(vq - 1, cpu->sve_vq_map); - } else { - clear_bit(vq - 1, cpu->sve_vq_map); - } - set_bit(vq - 1, cpu->sve_vq_init); + cpu->sve_vq_map =3D deposit32(cpu->sve_vq_map, vq - 1, 1, value); + cpu->sve_vq_init |=3D 1 << (vq - 1); } =20 static bool cpu_arm_get_sve(Object *obj, Error **errp) @@ -978,7 +974,7 @@ static void aarch64_max_initfn(Object *obj) cpu->dcz_blocksize =3D 7; /* 512 bytes */ #endif =20 - bitmap_fill(cpu->sve_vq_supported, ARM_MAX_VQ); + cpu->sve_vq_supported =3D MAKE_64BIT_MASK(0, ARM_MAX_VQ); =20 aarch64_add_pauth_properties(obj); aarch64_add_sve_properties(obj); @@ -1025,12 +1021,11 @@ static void aarch64_a64fx_initfn(Object *obj) cpu->gic_vprebits =3D 5; cpu->gic_pribits =3D 5; =20 - /* Suppport of A64FX's vector length are 128,256 and 512bit only */ + /* The A64FX supports only 128, 256 and 512 bit vector lengths */ aarch64_add_sve_properties(obj); - bitmap_zero(cpu->sve_vq_supported, ARM_MAX_VQ); - set_bit(0, cpu->sve_vq_supported); /* 128bit */ - set_bit(1, cpu->sve_vq_supported); /* 256bit */ - set_bit(3, cpu->sve_vq_supported); /* 512bit */ + cpu->sve_vq_supported =3D (1 << 0) /* 128bit */ + | (1 << 1) /* 256bit */ + | (1 << 3); /* 512bit */ =20 cpu->isar.reset_pmcr_el0 =3D 0x46014040; =20 diff --git a/target/arm/helper.c b/target/arm/helper.c index 66036c85d7..93784cb073 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6223,7 +6223,6 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) { ARMCPU *cpu =3D env_archcpu(env); uint32_t len =3D cpu->sve_max_vq - 1; - uint32_t end_len; =20 if (el <=3D 1 && (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) !=3D (HCR_E2H | HCR_T= GE)) { @@ -6236,12 +6235,8 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) len =3D MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[3]); } =20 - end_len =3D len; - if (!test_bit(len, cpu->sve_vq_map)) { - end_len =3D find_last_bit(cpu->sve_vq_map, len); - assert(end_len < len); - } - return end_len; + len =3D 31 - clz32(cpu->sve_vq_map & MAKE_64BIT_MASK(0, len + 1)); + return len; } =20 static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 363032da90..b3f635fc95 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -760,15 +760,13 @@ bool kvm_arm_steal_time_supported(void) =20 QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN !=3D 1); =20 -void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) +uint32_t kvm_arm_sve_get_vls(CPUState *cs) { /* Only call this function if kvm_arm_sve_supported() returns true. */ static uint64_t vls[KVM_ARM64_SVE_VLS_WORDS]; static bool probed; uint32_t vq =3D 0; - int i, j; - - bitmap_zero(map, ARM_MAX_VQ); + int i; =20 /* * KVM ensures all host CPUs support the same set of vector lengths. @@ -809,46 +807,24 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long = *map) if (vq > ARM_MAX_VQ) { warn_report("KVM supports vector lengths larger than " "QEMU can enable"); + vls[0] &=3D MAKE_64BIT_MASK(0, ARM_MAX_VQ); } } =20 - for (i =3D 0; i < KVM_ARM64_SVE_VLS_WORDS; ++i) { - if (!vls[i]) { - continue; - } - for (j =3D 1; j <=3D 64; ++j) { - vq =3D j + i * 64; - if (vq > ARM_MAX_VQ) { - return; - } - if (vls[i] & (1UL << (j - 1))) { - set_bit(vq - 1, map); - } - } - } + return vls[0]; } =20 static int kvm_arm_sve_set_vls(CPUState *cs) { - uint64_t vls[KVM_ARM64_SVE_VLS_WORDS] =3D {0}; + ARMCPU *cpu =3D ARM_CPU(cs); + uint64_t vls[KVM_ARM64_SVE_VLS_WORDS] =3D { cpu->sve_vq_map }; struct kvm_one_reg reg =3D { .id =3D KVM_REG_ARM64_SVE_VLS, .addr =3D (uint64_t)&vls[0], }; - ARMCPU *cpu =3D ARM_CPU(cs); - uint32_t vq; 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8EukyEJ2NdcL1Bzv4PQEoX65kAE8P9PJZ28WXJxUaxs=; b=u5gWiSrunGsxtb1bTYGfG/7uKr4N/CarospbINO8GR6bfkIgksqwIcZ7r6xY9miG0I UYqSCIeRzO1UZx93Qu/Qs4KZiUsmrNy2f+nqRBVFiTEra9IDregVetZTHkUES6yp/kGj +I+gUrUVghOFPOyWrAl/mXKbYq6uzuUYA7sZOSJd98oeClzdbx1QjRvCvtodjOxcNJJn 4QvIKg8lEQFL7HXqvO+7lo2V26HCWXlOAZJFiySMIRO3RBu5dn6dBT3luBS6jPmbpdNJ ze8O69VjY5MojkkIfzY4IivHmrqc4pSoNXjlkHqzfu+He/Fg3CxgIxTFwr4yB+jl7SBa Nf4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8EukyEJ2NdcL1Bzv4PQEoX65kAE8P9PJZ28WXJxUaxs=; b=sH0TQYAfKUcxak7U+27rjZjOT/yaRL6iuDz1OHEKTguTROyaUqHPghz4bshPUIZIon 7t1dd46bhTTCuhUF4k6jMWCcqjnPrgrkQva+BmmLtyf2dEOjSDNe3Vyl/FpwZTkXr8xI iJykBbuGLDneRk7GyPiISIDYrGzyZKRCkyPCiQOq+0kZmSyyRPfYH7/avctsyguseSev ZQnBh2c5+tEb9URzkRir0iKwV5IHkFVvXA3XuWHKVluka86g18lg13UGbAdMezuRUemS JURiyVLeHcwyCi5yTqJdAa52XPJjuNrqeG7OB0P4QOPg+st/D82PUeXEs0qSxESPmr1J 0GFQ== X-Gm-Message-State: AOAM531Zxpydp5c/PEIKX1PMnWP0b6QVUwC5dSBsnNoqZg5Ebj7nrvYe PRDjxmEKdZmHlIl3ZWqxQE9GavG20ZjgeQ== X-Google-Smtp-Source: ABdhPJzdyAfkV9HwUNDsTGurZ1Iex5+bre/JZ9upk6pB8lO2sLC8TGtRl+hAjSEIAEMeDU+TbNxYsg== X-Received: by 2002:a63:f0b:0:b0:3fb:b7a:757d with SMTP id e11-20020a630f0b000000b003fb0b7a757dmr8526755pgl.26.1653674789968; Fri, 27 May 2022 11:06:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 06/15] target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el Date: Fri, 27 May 2022 11:06:14 -0700 Message-Id: <20220527180623.185261-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653674980270100001 Content-Type: text/plain; charset="utf-8" This will be used for both Normal and Streaming SVE, and the value does not necessarily come from ZCR_ELx. While we're at it, emphasize the units in which the value is returned. Patch produced by git grep -l sve_zcr_len_for_el | \ xargs -n1 sed -i 's/sve_zcr_len_for_el/sve_vqm1_for_el/g' Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/cpu.h | 2 +- target/arm/arch_dump.c | 2 +- target/arm/cpu.c | 2 +- target/arm/gdbstub64.c | 2 +- target/arm/helper.c | 12 ++++++------ 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a86e8d6548..24cb48eea1 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1132,7 +1132,7 @@ void aarch64_sync_64_to_32(CPUARMState *env); =20 int fp_exception_el(CPUARMState *env, int cur_el); int sve_exception_el(CPUARMState *env, int cur_el); -uint32_t sve_zcr_len_for_el(CPUARMState *env, int el); +uint32_t sve_vqm1_for_el(CPUARMState *env, int el); =20 static inline bool is_a64(CPUARMState *env) { diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c index 0184845310..b1f040e69f 100644 --- a/target/arm/arch_dump.c +++ b/target/arm/arch_dump.c @@ -166,7 +166,7 @@ static off_t sve_fpcr_offset(uint32_t vq) =20 static uint32_t sve_current_vq(CPUARMState *env) { - return sve_zcr_len_for_el(env, arm_current_el(env)) + 1; + return sve_vqm1_for_el(env, arm_current_el(env)) + 1; } =20 static size_t sve_size_vq(uint32_t vq) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 0621944167..1b5d535788 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -925,7 +925,7 @@ static void aarch64_cpu_dump_state(CPUState *cs, FILE *= f, int flags) vfp_get_fpcr(env), vfp_get_fpsr(env)); =20 if (cpu_isar_feature(aa64_sve, cpu) && sve_exception_el(env, el) =3D= =3D 0) { - int j, zcr_len =3D sve_zcr_len_for_el(env, el); + int j, zcr_len =3D sve_vqm1_for_el(env, el); =20 for (i =3D 0; i <=3D FFR_PRED_NUM; i++) { bool eol; diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 596878666d..07a6746944 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -152,7 +152,7 @@ int arm_gdb_get_svereg(CPUARMState *env, GByteArray *bu= f, int reg) * We report in Vector Granules (VG) which is 64bit in a Z reg * while the ZCR works in Vector Quads (VQ) which is 128bit chunks. */ - int vq =3D sve_zcr_len_for_el(env, arm_current_el(env)) + 1; + int vq =3D sve_vqm1_for_el(env, arm_current_el(env)) + 1; return gdb_get_reg64(buf, vq * 2); } default: diff --git a/target/arm/helper.c b/target/arm/helper.c index 93784cb073..84cb78d151 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6219,7 +6219,7 @@ int sve_exception_el(CPUARMState *env, int el) /* * Given that SVE is enabled, return the vector length for EL. */ -uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) +uint32_t sve_vqm1_for_el(CPUARMState *env, int el) { ARMCPU *cpu =3D env_archcpu(env); uint32_t len =3D cpu->sve_max_vq - 1; @@ -6243,7 +6243,7 @@ static void zcr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, uint64_t value) { int cur_el =3D arm_current_el(env); - int old_len =3D sve_zcr_len_for_el(env, cur_el); + int old_len =3D sve_vqm1_for_el(env, cur_el); int new_len; =20 /* Bits other than [3:0] are RAZ/WI. */ @@ -6254,7 +6254,7 @@ static void zcr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, * Because we arrived here, we know both FP and SVE are enabled; * otherwise we would have trapped access to the ZCR_ELn register. */ - new_len =3D sve_zcr_len_for_el(env, cur_el); + new_len =3D sve_vqm1_for_el(env, cur_el); if (new_len < old_len) { aarch64_sve_narrow_vq(env, new_len + 1); } @@ -13667,7 +13667,7 @@ static CPUARMTBFlags rebuild_hflags_a64(CPUARMState= *env, int el, int fp_el, if (sve_el !=3D 0 && fp_el =3D=3D 0) { zcr_len =3D 0; } else { - zcr_len =3D sve_zcr_len_for_el(env, el); + zcr_len =3D sve_vqm1_for_el(env, el); } DP_TBFLAG_A64(flags, SVEEXC_EL, sve_el); DP_TBFLAG_A64(flags, SVE_LEN, zcr_len); @@ -14034,10 +14034,10 @@ void aarch64_sve_change_el(CPUARMState *env, int = old_el, */ old_a64 =3D old_el ? arm_el_is_aa64(env, old_el) : el0_a64; old_len =3D (old_a64 && !sve_exception_el(env, old_el) - ? sve_zcr_len_for_el(env, old_el) : 0); + ? sve_vqm1_for_el(env, old_el) : 0); new_a64 =3D new_el ? arm_el_is_aa64(env, new_el) : el0_a64; new_len =3D (new_a64 && !sve_exception_el(env, new_el) - ? sve_zcr_len_for_el(env, new_el) : 0); + ? sve_vqm1_for_el(env, new_el) : 0); =20 /* When changing vector length, clear inaccessible state. */ if (new_len < old_len) { --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675289; cv=none; d=zohomail.com; s=zohoarc; b=b16PJGRO2vWIs4+ye+67K58EgTFlqx6T/QIYz+ZVgl4rgTe1ZXw6lgzPsdzVLO4Ka73mTb+HCHR8Am55NB4gCrc9n6qIgZXBJ3Us3RJ2H2JUlaQGNSPFuNyzJ2GZ+k/wRQEbNptubLweHhTeehXpKdF5Bg9yee2Mtpb+SgYYa1A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675289; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=r2MwpG9aEqByOhoM/DW2jX/VmmpLz9U3BEngb4MfIQY=; b=PTkPFwVMmhMATgkCF5GUI12vXlkE59wpddAYwoDz2uX2OuplIkGGX7i9ukbwMa8T9e8tTOM6ttpPbK8vE+zwLlbQm6p15f3MhHo74S1YpESZqC/ZLosZZRLAaEIlTCCqx0imf6VIonO65puuFxXKsPbgY9TUGwgNDHqLejN/4XE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675289517216.72134436033275; Fri, 27 May 2022 11:14:49 -0700 (PDT) Received: from localhost ([::1]:37048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueU4-0007YF-4B for importer@patchew.org; Fri, 27 May 2022 14:14:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38934) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueMI-0003N8-Lj for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:46 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]:40759) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM4-0001eH-6P for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:46 -0400 Received: by mail-pl1-x62d.google.com with SMTP id i1so4775184plg.7 for ; Fri, 27 May 2022 11:06:31 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r2MwpG9aEqByOhoM/DW2jX/VmmpLz9U3BEngb4MfIQY=; b=gUFrj7mMt9wtUXwe3ZB6ktLQSW2i0Y9/0ZsDgR3Xd9+hU6oOEFk04zlu14qlussniO gTA4eyMtBwpKge9v6DIPqwwwlXZbTaBti6JafH28nLQ/2q9eC6drNlAfjUZSnjy1YL3v lGJI6GdHy89tBSGiyKiWNHJkdpHPqLvNu1lO6xnLfLKhvgDWfb1qvg7CEPcCaBG+rYc5 fo3sOgB4wn/2O6tAcdDFEO/uLZpwyx6Ia2bCyq88dXRCE2ORKQrZa+OTKSrUJ0NTd+a8 O3q5gok3BMjGAjqq5+Nu8t05oHp4WxZt5O/YnEA7Z4bhWJgbY/FoZMNW7u3429eu4MIf /e7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r2MwpG9aEqByOhoM/DW2jX/VmmpLz9U3BEngb4MfIQY=; b=c6l6fuTN8p5ELH2J/JdMZpaiije37iSxiLHSh2HZZYdSB8YGOoJ7Gh6fvXf8t5IbiZ SHKzYKy7BXG8cpKNy1jHkJ0MwhNi9IzrgqSpqygk/yyaRq8k5bjVAIOE+Q2dVySEyzw3 0tl0MTWU9BE12D6qxVjOMDGW4QOJfj0E1RTeOlG26OWRBTQuK3mB/zACh+jugK0bewUZ omDe4XDPJEmFAR7576vPD7C6swclB/AxdELK+65z5A3I/cIuTTOCrSlAKEz7NcMy74S+ 7p9Lp5F1hwlLLp2o5hAigHtuTKH3s4zSFpMD2Xrq3UkmN9AEsMz41swEdHpCrX2pmJ2q qwuw== X-Gm-Message-State: AOAM533/AxwQQhvkWAX0eiwBUlm17l0NtsIa8ZY6HyRuBAQWgBBeAs+v 7SBbwdhllNH3BN9KERjFiUKXaORvcBYaNw== X-Google-Smtp-Source: ABdhPJxoBhV/gLLmUkPXNNVGRiNM7nzT2YT1CD2fGwVws5cu54HUt9NIFvx8T/4W/DmMR1W6XWb0ig== X-Received: by 2002:a17:90b:4d8d:b0:1e0:4cb0:fae5 with SMTP id oj13-20020a17090b4d8d00b001e04cb0fae5mr9483387pjb.116.1653674790908; Fri, 27 May 2022 11:06:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 07/15] target/arm: Remove fp checks from sve_exception_el Date: Fri, 27 May 2022 11:06:15 -0700 Message-Id: <20220527180623.185261-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675290810100001 Content-Type: text/plain; charset="utf-8" Instead of checking these bits in fp_exception_el and also in sve_exception_el, document that we must compare the results. The only place where we have not already checked that FP EL is zero is in rebuild_hflags_a64. Signed-off-by: Richard Henderson --- target/arm/helper.c | 56 +++++++++++++++------------------------------ 1 file changed, 19 insertions(+), 37 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 84cb78d151..cd0a8992ba 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6135,11 +6135,15 @@ static const ARMCPRegInfo minimal_ras_reginfo[] =3D= { .access =3D PL2_RW, .fieldoffset =3D offsetof(CPUARMState, cp15.vses= r_el2) }, }; =20 -/* Return the exception level to which exceptions should be taken - * via SVEAccessTrap. If an exception should be routed through - * AArch64.AdvSIMDFPAccessTrap, return 0; fp_exception_el should - * take care of raising that exception. - * C.f. the ARM pseudocode function CheckSVEEnabled. +/* + * Return the exception level to which exceptions should be taken + * via SVEAccessTrap. This excludes the check for whether the exception + * should be routed through AArch64.AdvSIMDFPAccessTrap. That can easily + * be found by testing 0 < fp_exception_el < sve_exception_el. + * + * C.f. the ARM pseudocode function CheckSVEEnabled. Note that the + * pseudocode does *not* separate out the FP trap checks, but has them + * all in one function. */ int sve_exception_el(CPUARMState *env, int el) { @@ -6157,18 +6161,6 @@ int sve_exception_el(CPUARMState *env, int el) case 2: return 1; } - - /* Check CPACR.FPEN. */ - switch (FIELD_EX64(env->cp15.cpacr_el1, CPACR_EL1, FPEN)) { - case 1: - if (el !=3D 0) { - break; - } - /* fall through */ - case 0: - case 2: - return 0; - } } =20 /* @@ -6186,24 +6178,10 @@ int sve_exception_el(CPUARMState *env, int el) case 2: return 2; } - - switch (FIELD_EX32(env->cp15.cptr_el[2], CPTR_EL2, FPEN)) { - case 1: - if (el =3D=3D 2 || !(hcr_el2 & HCR_TGE)) { - break; - } - /* fall through */ - case 0: - case 2: - return 0; - } } else if (arm_is_el2_enabled(env)) { if (FIELD_EX64(env->cp15.cptr_el[2], CPTR_EL2, TZ)) { return 2; } - if (FIELD_EX64(env->cp15.cptr_el[2], CPTR_EL2, TFP)) { - return 0; - } } } =20 @@ -13658,15 +13636,19 @@ static CPUARMTBFlags rebuild_hflags_a64(CPUARMSta= te *env, int el, int fp_el, =20 if (cpu_isar_feature(aa64_sve, env_archcpu(env))) { int sve_el =3D sve_exception_el(env, el); - uint32_t zcr_len; + uint32_t zcr_len =3D 0; =20 /* - * If SVE is disabled, but FP is enabled, - * then the effective len is 0. + * If either FP or SVE are disabled, translator does not need len. + * If SVE EL > FP EL, FP exception has precedence, and translator + * does not need SVE EL. Save potential re-translations by forcing + * the unneeded data to zero. */ - if (sve_el !=3D 0 && fp_el =3D=3D 0) { - zcr_len =3D 0; - } else { + if (fp_el !=3D 0) { + if (sve_el > fp_el) { + sve_el =3D 0; + } + } else if (sve_el =3D=3D 0) { zcr_len =3D sve_vqm1_for_el(env, el); } DP_TBFLAG_A64(flags, SVEEXC_EL, sve_el); --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675470; cv=none; d=zohomail.com; s=zohoarc; b=Y5ngDSLvgNj8Tm5HVFYJSEqnWGnQ4OPEPQQ8XRKdP8ArVqDyoItmhYAJVDL8tM8L3LEhr1QuSsCtStzPtik82P94b9PMn3Qg6x4A9ps4xBiQhQMSSeX0rMyaX30BycHDyGZgn8EVIRmQmwZjuqUmqqcC2yPdBntuz1DBmI2PLXY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675470; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EGVyFlmh7wKKoz1QA49Gt/aTS6Se3D9So9Ttd9M1QZI=; b=IweoilEKMClz0RbK3cpyIjsfZrbvWdDE+Kh6R5wpngxeWsVug6QemuC5P0eLWBuggHwDPFcvkN5aZnru9mS1y7jl8ceIDV+0kuzOeLJm4iQGKHFDCen9QkV1FYzr/FPILWYHmLpMbXJFu4TQP+7Gs7eKNQcT2+fk+TVEw5FI4X8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675470635230.26429560097665; Fri, 27 May 2022 11:17:50 -0700 (PDT) Received: from localhost ([::1]:41950 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueWz-0002Um-Fn for importer@patchew.org; Fri, 27 May 2022 14:17:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38736) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueM8-00037v-NS for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:36 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:38406) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM6-0001eY-6Z for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:36 -0400 Received: by mail-pf1-x42f.google.com with SMTP id h13so4947861pfq.5 for ; Fri, 27 May 2022 11:06:32 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EGVyFlmh7wKKoz1QA49Gt/aTS6Se3D9So9Ttd9M1QZI=; b=byyfevIWfUFwc1PLTvkvdl47wLAFGDeElmVBsBRp0pUGInSLsz0Mm7IPAG4mrTAQnK Dj2I6TmZFSx/eT8+l50wQngJ2uyuYMzfiqubwtNnIpZ062wvyjveOAogFQQznDDKMTvc 4L1ZCkZ7OgOBWNYDxUYGZGdV2OmsRVVGKUGAyqOOEom97xsm3aUc37JlfuZK41vHwtHo shhkzlyyVcPa4vwWZZnAvsUF/1SPu/+BPWT7hLCRcBg+iHP7guEFPaKGpaMnV+bB34Ak J6JpmJ7K3icDWne3A+zELUboqdFzRRczC42dXz6LrD2aohiOsKLAjN4NLqZNzrf67S2+ XGWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EGVyFlmh7wKKoz1QA49Gt/aTS6Se3D9So9Ttd9M1QZI=; b=RBSxS5AGFiiqXd9Ic+is4oOwSj1TDfvqzmAcJ1kdsE1EIas8QQL5DAV8rIBGztmPz9 X/M6Wsut2qSGR5C3K4MjMv9ZpfnIUa0j2SBsZMfiac6bK40UEVoEevRpkeDzzDYTrWIK oPwDwHq5AUT8HzvWoHtGum2z99h8WysN04D6BIS8cPgyILGgQYOl1CVQ9E8jj6Ma1thz njwDGjJt/ud+bz1480haNNOL2/rWHBBteAxHUiyobBqJwOcVjxsiLxLL52InvX7xhfZp Q1+VKdSqQAHnllTJKdIbrE7VWgx6viVyxjkMFQtckYEL60oAI2BteFGgJkIlRihZlJZ5 6qKA== X-Gm-Message-State: AOAM5335d8GwvoncJvFtqJHe6Prwm3ywjRSwzkwt8+dwsk+N/q5kBLQ9 DomXoFezqh/U1u/DvqlAfuUtxxEzX1BqiA== X-Google-Smtp-Source: ABdhPJzAEJmDJbY3fMTNbbdzxjVXDxCR/1rLIQXmrXJ45OEr6WdgRuUFb6YODPeX8QVGILQnsYHkpA== X-Received: by 2002:a65:4685:0:b0:3da:eb4e:61ed with SMTP id h5-20020a654685000000b003daeb4e61edmr37443709pgr.591.1653674791806; Fri, 27 May 2022 11:06:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 08/15] target/arm: Add el_is_in_host Date: Fri, 27 May 2022 11:06:16 -0700 Message-Id: <20220527180623.185261-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675472300100001 Content-Type: text/plain; charset="utf-8" This (newish) ARM pseudocode function is easier to work with than open-coded tests for HCR_E2H etc. Use of the function will be staged into the code base in parts. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/internals.h | 2 ++ target/arm/helper.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/target/arm/internals.h b/target/arm/internals.h index b587901be1..008e377887 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1295,6 +1295,8 @@ static inline void define_cortex_a72_a57_a53_cp_regin= fo(ARMCPU *cpu) { } void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu); #endif =20 +bool el_is_in_host(CPUARMState *env, int el); + void aa32_max_features(ARMCPU *cpu); bool arm_singlestep_active(CPUARMState *env); bool arm_generate_debug_exceptions(CPUARMState *env, int cur_el); diff --git a/target/arm/helper.c b/target/arm/helper.c index cd0a8992ba..d1b6c2459b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5288,6 +5288,34 @@ uint64_t arm_hcr_el2_eff(CPUARMState *env) return ret; } =20 +/* + * Corresponds to ARM pseudocode function ELIsInHost(). + */ +bool el_is_in_host(CPUARMState *env, int el) +{ + uint64_t mask; + + /* + * Since we only care about E2H and TGE, we can skip arm_hcr_el2_eff(). + * Perform the simplest bit tests first, and validate EL2 afterward. + */ + if (el & 1) { + return false; /* EL1 or EL3 */ + } + + /* + * Note that hcr_write() checks isar_feature_aa64_vh(), + * aka HaveVirtHostExt(), in allowing HCR_E2H to be set. + */ + mask =3D el ? HCR_E2H : HCR_E2H | HCR_TGE; + if ((env->cp15.hcr_el2 & mask) !=3D mask) { + return false; + } + + /* TGE and/or E2H set: double check those bits are currently legal. */ + return arm_is_el2_enabled(env) && arm_el_is_aa64(env, 2); +} + static void hcrx_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675430; cv=none; d=zohomail.com; s=zohoarc; b=jlN7PgFQbiFxPPs0AS8/kjWdFJPOrGrzDJwaDlCQHLgqk01OnYdOG9I/emXPwp4knxfVIQC56nTJRE4IBS6cHHwDMYb429pD8jkj40IpRDCBgh8GdHsxwT/sfwYt6cvj4CPfvJgx6+RO+E9B3WJiO6Mu/82HetyptXkh6zbhB/Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675430; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CjwMy/u7BmGHWp6cphS1Ihq36Xg3IYexqKmZ8A6LwiQ=; b=LvDmpxv0VgLl7RAE2plnGkU9BwQV3VlPFjmKLLED59UWf68GIRvwWbUb2+MrPKdKioP2736WEIJWMIu0Jh7GPSnAVfxtGUAEXj6/hjQRh2wtHHzrdqg4FPht82Qbm6KtwderAxfZRmS+tryMThZo+itHFRzvhm4S840/6gy7M2Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675430564805.1799749662889; Fri, 27 May 2022 11:17:10 -0700 (PDT) Received: from localhost ([::1]:40604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueWK-0001b0-41 for importer@patchew.org; Fri, 27 May 2022 14:17:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38778) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueMA-00039V-JC for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:40 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]:35576) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM5-0001el-Ua for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:38 -0400 Received: by mail-pg1-x532.google.com with SMTP id 129so263155pgc.2 for ; Fri, 27 May 2022 11:06:33 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CjwMy/u7BmGHWp6cphS1Ihq36Xg3IYexqKmZ8A6LwiQ=; b=K4EEWCfEZ/hXlpQPrsweVT7CTqYfwcQUYNfzz2D49gcp5KDv/brzDWhOgZrYJLAs7H /RLC1hrVE63byBLnC3R4u/QiQRMa5H45LRQPghqPAvqhuFBjp4JLwkVpGVWZEjo+p8sg WeVhMDdBMejryAJjiV2Yl6qWebSFcby2Cr5MTtYskm1MUPa84Ws/miNXN400I8Wh9Qk0 5UXxNcHgGp2M4qr8V64CK3qBFellVVNCDcTKUGMSGiXUrGotRq6AoqYzfcqjVvr7+20V xolxBr3I9WvGdoPq3ybZYmmX7nZTxZgRh2b0vV39JJMvNciL9aa7BATpZCD2zIUKAtrS yj0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CjwMy/u7BmGHWp6cphS1Ihq36Xg3IYexqKmZ8A6LwiQ=; b=qOr+HtyC3W6qeTTL5TwnZIhOaKAVUMPa34ZgiTagrhykggXmCluNDQjeGKgQUwvsBJ sXzRmcCTHFKFB/e+VsFW7bfcL4ycR3E+wQhTAtAHVcFYEGtGN9zohKAKJZYgrI5fWa3H atgcYFWYfb1LOT/gnKlq+Lp++pWOCEumClzsu8jRroBfR4hRPYvRZwjuob62zV/pfT9y 9r24U165rDfeG67oZKCsokX2n+KkNEd2JJYU7d4e4mz9jLObdDfLAqoiKIN+AUicgiVs iLyKEV0bHosZUL7BOFSNyNnji+KW3D3e33TXmXoZBJIiKMCBwkunQnnnINmEjsbLYOFX CCkg== X-Gm-Message-State: AOAM533Tfs7ymb6LYimwPcO/M+spUpVaGLKJGJMhwHWeGHEV+HYzG6i1 oGBwox84VZHETFdsT7RmWNWjE5cEC8FF4w== X-Google-Smtp-Source: ABdhPJy51ps61B1cQZx0xPaW+B9ChAAFnkiy0U23b+jJIrET8qGmeqzpRDCmx4C6mluJWqJZe6Z6uw== X-Received: by 2002:a63:c116:0:b0:3fb:2109:f714 with SMTP id w22-20020a63c116000000b003fb2109f714mr7378527pgf.237.1653674792617; Fri, 27 May 2022 11:06:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 09/15] target/arm: Use el_is_in_host for sve_vqm1_for_el Date: Fri, 27 May 2022 11:06:17 -0700 Message-Id: <20220527180623.185261-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675432099100001 Content-Type: text/plain; charset="utf-8" The ARM pseudocode function NVL uses this predicate now, and I think it's a bit clearer. Simplify the pseudocode condition by noting that IsInHost is always false for EL1. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index d1b6c2459b..69b10be480 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6230,8 +6230,7 @@ uint32_t sve_vqm1_for_el(CPUARMState *env, int el) ARMCPU *cpu =3D env_archcpu(env); uint32_t len =3D cpu->sve_max_vq - 1; =20 - if (el <=3D 1 && - (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) !=3D (HCR_E2H | HCR_T= GE)) { + if (el <=3D 1 && !el_is_in_host(env, el)) { len =3D MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[1]); } if (el <=3D 2 && arm_feature(env, ARM_FEATURE_EL2)) { --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675632; cv=none; d=zohomail.com; s=zohoarc; b=UYuE6uaUCNxf8cXDLlj+meRIGg4d7ez0LCRAAjuebus+yK1ciyFMIzNcdFxPY2qJWk8kXbFX9GA0pbVFnNh9AXSsw/0926qlYehl7mdayOGdeB7TPMVGnn4ZyqAX5jxwz1trGhQqrjUdfSKNKsH5AQ8Wt5vZ5zGxbX9Mt9ejcAU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675632; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=YQBC+HGfZ3unALHl+XHeGZSFGW//i/p32TgROg9703s=; b=G8jkSy9Oha0Bz4tMIMdZ1ghQW5yI+4yTs5PrD4VnCytlmU+IqZCEEE293dQaK0rpwgIAZnf+E+Zzl8BX2hJV/dw1K1miG9SDg8ep0NaNWX6WAetIRWqAAE84E/lba73pdSPnJ2w0kjwTBZvEgVzc1Xs5PF4KKnY5P2+Mfe7JWhI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675632302415.85288301792104; Fri, 27 May 2022 11:20:32 -0700 (PDT) Received: from localhost ([::1]:49356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueZa-0007Ow-Qv for importer@patchew.org; Fri, 27 May 2022 14:20:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38830) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueMC-0003Ag-FA for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:40 -0400 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:33359) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM6-0001fD-Pf for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:40 -0400 Received: by mail-pf1-x429.google.com with SMTP id 202so4995148pfu.0 for ; Fri, 27 May 2022 11:06:34 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YQBC+HGfZ3unALHl+XHeGZSFGW//i/p32TgROg9703s=; b=uUJzKXCQcD2u8U0Q9JWZvJpQr2QS7gaJy2YKFndmq0NaS0n3vmgwSDk81hLmte6PXL l7ezbkkdQ0oZ58p0p5DVGKQJ3Eb4Fiys1niaU6kADVUc5C4l3Qkvvcol3ARy109RqQI6 ugFS+PK+UHa2MbGFGEK2vn/L+CUsK5tzE7jVk/xGx+bA2l5odWmkU0usGXntAvOqtiVu jJR/5Eu6bENWDtRSyDXE2Ol85ctUhpzDfxfgnKmXu454yQNMon3yG/bAJA+TNK+znKCY JU2tOeCS+KVgjbb4m7jXA2RTG37ZDB/r/bi7f1macWb+CCKp/ma8WbabGNnXp/cJLkME n7JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YQBC+HGfZ3unALHl+XHeGZSFGW//i/p32TgROg9703s=; b=oetMbM7QUkDn33J1zXQK0F2acWc9TV/gsrxAMy9Aw40zyG4xBhuche+2h1uF93c7cx hDP2rCIbkJFr03sYm7D71nvcX1jS9n8mJ1Z2UPOV1qB2vVg7OT289YDDiy3UnYSqGnl/ RC4dA5SkHy6Wh/FCwuoN/1wivEybHUUTPEf75RnkIJJqAwb8ZbsOku2QV2T3S8pAgW1/ 0F5j2FfFjRSkPO7evIlHNY8vRe7vAyUAlXoYa1GhY+H7RpftIqncfzyEeenmkjCu6HOe r5gW6URXQVXBYTdjoqwNjSCxf0rwhqbKerZXRC2LsFYLwy0fXk7V0ObZQI/zyOiRZf8b NLjA== X-Gm-Message-State: AOAM533q5YjPmEs/OY5zzBfb3NXTRYV2TEpZi6sA5/H+P3VkU0Wt78XD c5ikwbVzlY/Ur6W5xOlgRVTQXd/vLH4dGA== X-Google-Smtp-Source: ABdhPJxdcbIe3tk7nMoY5yqkG6lM4h7i7rYJ5u8qwFYou2YRrghRvt8tmexeTDDwIxFZxCkLYSBY0g== X-Received: by 2002:a63:d054:0:b0:3f2:50df:e008 with SMTP id s20-20020a63d054000000b003f250dfe008mr38073831pgi.317.1653674793370; Fri, 27 May 2022 11:06:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 10/15] target/arm: Split out load/store primitives to sve_ldst_internal.h Date: Fri, 27 May 2022 11:06:18 -0700 Message-Id: <20220527180623.185261-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675633163100001 Content-Type: text/plain; charset="utf-8" Begin creation of sve_ldst_internal.h by moving the primitives that access host and tlb memory. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/sve_ldst_internal.h | 127 +++++++++++++++++++++++++++++++++ target/arm/sve_helper.c | 107 +-------------------------- 2 files changed, 128 insertions(+), 106 deletions(-) create mode 100644 target/arm/sve_ldst_internal.h diff --git a/target/arm/sve_ldst_internal.h b/target/arm/sve_ldst_internal.h new file mode 100644 index 0000000000..ef9117e84c --- /dev/null +++ b/target/arm/sve_ldst_internal.h @@ -0,0 +1,127 @@ +/* + * ARM SVE Load/Store Helpers + * + * Copyright (c) 2018-2022 Linaro + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef TARGET_ARM_SVE_LDST_INTERNAL_H +#define TARGET_ARM_SVE_LDST_INTERNAL_H + +#include "exec/cpu_ldst.h" + +/* + * Load one element into @vd + @reg_off from @host. + * The controlling predicate is known to be true. + */ +typedef void sve_ldst1_host_fn(void *vd, intptr_t reg_off, void *host); + +/* + * Load one element into @vd + @reg_off from (@env, @vaddr, @ra). + * The controlling predicate is known to be true. + */ +typedef void sve_ldst1_tlb_fn(CPUARMState *env, void *vd, intptr_t reg_off, + target_ulong vaddr, uintptr_t retaddr); + +/* + * Generate the above primitives. + */ + +#define DO_LD_HOST(NAME, H, TYPEE, TYPEM, HOST) = \ +static inline void sve_##NAME##_host(void *vd, intptr_t reg_off, void *hos= t) \ +{ TYPEM val =3D HOST(host); *(TYPEE *)(vd + H(reg_off)) =3D val; } + +#define DO_ST_HOST(NAME, H, TYPEE, TYPEM, HOST) = \ +static inline void sve_##NAME##_host(void *vd, intptr_t reg_off, void *hos= t) \ +{ TYPEM val =3D *(TYPEE *)(vd + H(reg_off)); HOST(host, val); } + +#define DO_LD_TLB(NAME, H, TYPEE, TYPEM, TLB) = \ +static inline void sve_##NAME##_tlb(CPUARMState *env, void *vd, = \ + intptr_t reg_off, target_ulong addr, uintptr_t ra)= \ +{ = \ + TYPEM val =3D TLB(env, useronly_clean_ptr(addr), ra); = \ + *(TYPEE *)(vd + H(reg_off)) =3D val; = \ +} + +#define DO_ST_TLB(NAME, H, TYPEE, TYPEM, TLB) = \ +static inline void sve_##NAME##_tlb(CPUARMState *env, void *vd, = \ + intptr_t reg_off, target_ulong addr, uintptr_t ra)= \ +{ = \ + TYPEM val =3D *(TYPEE *)(vd + H(reg_off)); = \ + TLB(env, useronly_clean_ptr(addr), val, ra); = \ +} + +#define DO_LD_PRIM_1(NAME, H, TE, TM) \ + DO_LD_HOST(NAME, H, TE, TM, ldub_p) \ + DO_LD_TLB(NAME, H, TE, TM, cpu_ldub_data_ra) + +DO_LD_PRIM_1(ld1bb, H1, uint8_t, uint8_t) +DO_LD_PRIM_1(ld1bhu, H1_2, uint16_t, uint8_t) +DO_LD_PRIM_1(ld1bhs, H1_2, uint16_t, int8_t) +DO_LD_PRIM_1(ld1bsu, H1_4, uint32_t, uint8_t) +DO_LD_PRIM_1(ld1bss, H1_4, uint32_t, int8_t) +DO_LD_PRIM_1(ld1bdu, H1_8, uint64_t, uint8_t) +DO_LD_PRIM_1(ld1bds, H1_8, uint64_t, int8_t) + +#define DO_ST_PRIM_1(NAME, H, TE, TM) \ + DO_ST_HOST(st1##NAME, H, TE, TM, stb_p) \ + DO_ST_TLB(st1##NAME, H, TE, TM, cpu_stb_data_ra) + +DO_ST_PRIM_1(bb, H1, uint8_t, uint8_t) +DO_ST_PRIM_1(bh, H1_2, uint16_t, uint8_t) +DO_ST_PRIM_1(bs, H1_4, uint32_t, uint8_t) +DO_ST_PRIM_1(bd, H1_8, uint64_t, uint8_t) + +#define DO_LD_PRIM_2(NAME, H, TE, TM, LD) \ + DO_LD_HOST(ld1##NAME##_be, H, TE, TM, LD##_be_p) \ + DO_LD_HOST(ld1##NAME##_le, H, TE, TM, LD##_le_p) \ + DO_LD_TLB(ld1##NAME##_be, H, TE, TM, cpu_##LD##_be_data_ra) \ + DO_LD_TLB(ld1##NAME##_le, H, TE, TM, cpu_##LD##_le_data_ra) + +#define DO_ST_PRIM_2(NAME, H, TE, TM, ST) \ + DO_ST_HOST(st1##NAME##_be, H, TE, TM, ST##_be_p) \ + DO_ST_HOST(st1##NAME##_le, H, TE, TM, ST##_le_p) \ + DO_ST_TLB(st1##NAME##_be, H, TE, TM, cpu_##ST##_be_data_ra) \ + DO_ST_TLB(st1##NAME##_le, H, TE, TM, cpu_##ST##_le_data_ra) + +DO_LD_PRIM_2(hh, H1_2, uint16_t, uint16_t, lduw) +DO_LD_PRIM_2(hsu, H1_4, uint32_t, uint16_t, lduw) +DO_LD_PRIM_2(hss, H1_4, uint32_t, int16_t, lduw) +DO_LD_PRIM_2(hdu, H1_8, uint64_t, uint16_t, lduw) +DO_LD_PRIM_2(hds, H1_8, uint64_t, int16_t, lduw) + +DO_ST_PRIM_2(hh, H1_2, uint16_t, uint16_t, stw) +DO_ST_PRIM_2(hs, H1_4, uint32_t, uint16_t, stw) +DO_ST_PRIM_2(hd, H1_8, uint64_t, uint16_t, stw) + +DO_LD_PRIM_2(ss, H1_4, uint32_t, uint32_t, ldl) +DO_LD_PRIM_2(sdu, H1_8, uint64_t, uint32_t, ldl) +DO_LD_PRIM_2(sds, H1_8, uint64_t, int32_t, ldl) + +DO_ST_PRIM_2(ss, H1_4, uint32_t, uint32_t, stl) +DO_ST_PRIM_2(sd, H1_8, uint64_t, uint32_t, stl) + +DO_LD_PRIM_2(dd, H1_8, uint64_t, uint64_t, ldq) +DO_ST_PRIM_2(dd, H1_8, uint64_t, uint64_t, stq) + +#undef DO_LD_TLB +#undef DO_ST_TLB +#undef DO_LD_HOST +#undef DO_LD_PRIM_1 +#undef DO_ST_PRIM_1 +#undef DO_LD_PRIM_2 +#undef DO_ST_PRIM_2 + +#endif /* TARGET_ARM_SVE_LDST_INTERNAL_H */ diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index e0f9aa9983..ea4c835689 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -21,12 +21,12 @@ #include "cpu.h" #include "internals.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "tcg/tcg-gvec-desc.h" #include "fpu/softfloat.h" #include "tcg/tcg.h" #include "vec_internal.h" +#include "sve_ldst_internal.h" =20 =20 /* Return a value for NZCV as per the ARM PredTest pseudofunction. @@ -5299,111 +5299,6 @@ void HELPER(sve_fcmla_zpzzz_d)(void *vd, void *vn, = void *vm, void *va, * Load contiguous data, protected by a governing predicate. */ =20 -/* - * Load one element into @vd + @reg_off from @host. - * The controlling predicate is known to be true. - */ -typedef void sve_ldst1_host_fn(void *vd, intptr_t reg_off, void *host); - -/* - * Load one element into @vd + @reg_off from (@env, @vaddr, @ra). - * The controlling predicate is known to be true. - */ -typedef void sve_ldst1_tlb_fn(CPUARMState *env, void *vd, intptr_t reg_off, - target_ulong vaddr, uintptr_t retaddr); - -/* - * Generate the above primitives. - */ - -#define DO_LD_HOST(NAME, H, TYPEE, TYPEM, HOST) \ -static void sve_##NAME##_host(void *vd, intptr_t reg_off, void *host) \ -{ \ - TYPEM val =3D HOST(host); \ - *(TYPEE *)(vd + H(reg_off)) =3D val; \ -} - -#define DO_ST_HOST(NAME, H, TYPEE, TYPEM, HOST) \ -static void sve_##NAME##_host(void *vd, intptr_t reg_off, void *host) \ -{ HOST(host, (TYPEM)*(TYPEE *)(vd + H(reg_off))); } - -#define DO_LD_TLB(NAME, H, TYPEE, TYPEM, TLB) \ -static void sve_##NAME##_tlb(CPUARMState *env, void *vd, intptr_t reg_off,= \ - target_ulong addr, uintptr_t ra) = \ -{ = \ - *(TYPEE *)(vd + H(reg_off)) =3D = \ - (TYPEM)TLB(env, useronly_clean_ptr(addr), ra); = \ -} - -#define DO_ST_TLB(NAME, H, TYPEE, TYPEM, TLB) \ -static void sve_##NAME##_tlb(CPUARMState *env, void *vd, intptr_t reg_off,= \ - target_ulong addr, uintptr_t ra) = \ -{ = \ - TLB(env, useronly_clean_ptr(addr), = \ - (TYPEM)*(TYPEE *)(vd + H(reg_off)), ra); = \ -} - -#define DO_LD_PRIM_1(NAME, H, TE, TM) \ - DO_LD_HOST(NAME, H, TE, TM, ldub_p) \ - DO_LD_TLB(NAME, H, TE, TM, cpu_ldub_data_ra) - -DO_LD_PRIM_1(ld1bb, H1, uint8_t, uint8_t) -DO_LD_PRIM_1(ld1bhu, H1_2, uint16_t, uint8_t) -DO_LD_PRIM_1(ld1bhs, H1_2, uint16_t, int8_t) -DO_LD_PRIM_1(ld1bsu, H1_4, uint32_t, uint8_t) -DO_LD_PRIM_1(ld1bss, H1_4, uint32_t, int8_t) -DO_LD_PRIM_1(ld1bdu, H1_8, uint64_t, uint8_t) -DO_LD_PRIM_1(ld1bds, H1_8, uint64_t, int8_t) - -#define DO_ST_PRIM_1(NAME, H, TE, TM) \ - DO_ST_HOST(st1##NAME, H, TE, TM, stb_p) \ - DO_ST_TLB(st1##NAME, H, TE, TM, cpu_stb_data_ra) - -DO_ST_PRIM_1(bb, H1, uint8_t, uint8_t) -DO_ST_PRIM_1(bh, H1_2, uint16_t, uint8_t) -DO_ST_PRIM_1(bs, H1_4, uint32_t, uint8_t) -DO_ST_PRIM_1(bd, H1_8, uint64_t, uint8_t) - -#define DO_LD_PRIM_2(NAME, H, TE, TM, LD) \ - DO_LD_HOST(ld1##NAME##_be, H, TE, TM, LD##_be_p) \ - DO_LD_HOST(ld1##NAME##_le, H, TE, TM, LD##_le_p) \ - DO_LD_TLB(ld1##NAME##_be, H, TE, TM, cpu_##LD##_be_data_ra) \ - DO_LD_TLB(ld1##NAME##_le, H, TE, TM, cpu_##LD##_le_data_ra) - -#define DO_ST_PRIM_2(NAME, H, TE, TM, ST) \ - DO_ST_HOST(st1##NAME##_be, H, TE, TM, ST##_be_p) \ - DO_ST_HOST(st1##NAME##_le, H, TE, TM, ST##_le_p) \ - DO_ST_TLB(st1##NAME##_be, H, TE, TM, cpu_##ST##_be_data_ra) \ - DO_ST_TLB(st1##NAME##_le, H, TE, TM, cpu_##ST##_le_data_ra) - -DO_LD_PRIM_2(hh, H1_2, uint16_t, uint16_t, lduw) -DO_LD_PRIM_2(hsu, H1_4, uint32_t, uint16_t, lduw) -DO_LD_PRIM_2(hss, H1_4, uint32_t, int16_t, lduw) -DO_LD_PRIM_2(hdu, H1_8, uint64_t, uint16_t, lduw) -DO_LD_PRIM_2(hds, H1_8, uint64_t, int16_t, lduw) - -DO_ST_PRIM_2(hh, H1_2, uint16_t, uint16_t, stw) -DO_ST_PRIM_2(hs, H1_4, uint32_t, uint16_t, stw) -DO_ST_PRIM_2(hd, H1_8, uint64_t, uint16_t, stw) - -DO_LD_PRIM_2(ss, H1_4, uint32_t, uint32_t, ldl) -DO_LD_PRIM_2(sdu, H1_8, uint64_t, uint32_t, ldl) -DO_LD_PRIM_2(sds, H1_8, uint64_t, int32_t, ldl) - -DO_ST_PRIM_2(ss, H1_4, uint32_t, uint32_t, stl) -DO_ST_PRIM_2(sd, H1_8, uint64_t, uint32_t, stl) - -DO_LD_PRIM_2(dd, H1_8, uint64_t, uint64_t, ldq) -DO_ST_PRIM_2(dd, H1_8, uint64_t, uint64_t, stq) - -#undef DO_LD_TLB -#undef DO_ST_TLB -#undef DO_LD_HOST -#undef DO_LD_PRIM_1 -#undef DO_ST_PRIM_1 -#undef DO_LD_PRIM_2 -#undef DO_ST_PRIM_2 - /* * Skip through a sequence of inactive elements in the guarding predicate = @vg, * beginning at @reg_off bounded by @reg_max. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JMhstRQpYvMahAZZORKOvBycCaQ38heGB1yApy4zCv0=; b=OzydvdwmZRyLNXgbYML2NhaSMF2hRh6YB6He3e+dJ+5pq7mrLwdSpor7/CCwSmfHrf EmC8aZYQMUD/O22lQ33ZxNzKR2KGfvcPbHwsMUK9OqrFJTLmQ1ooA/o8N0IzSHsztSTG oq2i1vgVGuOfSG5s7oXip2MQ40/DruSEOLifT8Ee1k1BAuljXQ+SYKfa2I7tsXAWuVDH SgnyjuBxUTcsRQ35KtQWvzB0UN8c5KycPnJ938FneqJJ2aN5ZQWmTd8cZ22FDji3D5+h cKGIyz+rTu8tNLFxwJJDCzo6E7xB+ecrQHc6gCKuKIdPXpRtMGwlEAfTm/YkVN3rpSKZ u5rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JMhstRQpYvMahAZZORKOvBycCaQ38heGB1yApy4zCv0=; b=meywoVW5nY/znZuTmKkBNwTc3xPDqTlL0kC1u2QQ9ncWixFQENeqnQ9DFbPff+TIL1 B/HfOfWPP/rjKZ66xY7HnOod9dyP2de0nQDqsOL/xX5mFz6D7t2gXm3y2p+xOG29CWUg 3VwRIuCzTpi6hZ9XlrmXMlakDHFbp9bUeO6+wlCtX/uW/ssGpJtYwbsYy8T+5DdltMfm mEyao7GCEOnPRuuhSz3VZ+PP4tpD0iq4BNn14v3J5O+TqYj0sma0EGeHKWbGJvHfJMel pQFruutUpViYYJAJ/CWX/3+OjLo00vS+U6hItz/KbEGpHl2+G62TC2P4BtOvPka4To6I yykQ== X-Gm-Message-State: AOAM5336FwqX8FmyhoCsIbzy88Jk5HZYvbDfrt9JUi/bOULCNsF8YN7H h5yJjXp2x7iqgZaWlC0Ao0evHvciVQOxcQ== X-Google-Smtp-Source: ABdhPJzYhjLt5AMoSUKaJ+h3JAHRWf03rtRGIW8/jfjQoM+LFhw1BZGDN4nwBcQ7hDRleVp8WSm+mg== X-Received: by 2002:a17:902:e749:b0:163:59da:56f0 with SMTP id p9-20020a170902e74900b0016359da56f0mr14891123plf.116.1653674794303; Fri, 27 May 2022 11:06:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 11/15] target/arm: Export sve contiguous ldst support functions Date: Fri, 27 May 2022 11:06:19 -0700 Message-Id: <20220527180623.185261-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653676131338100001 Content-Type: text/plain; charset="utf-8" Export all of the support functions for performing bulk fault analysis on a set of elements at contiguous addresses controlled by a predicate. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/sve_ldst_internal.h | 94 ++++++++++++++++++++++++++++++++++ target/arm/sve_helper.c | 87 ++++++------------------------- 2 files changed, 111 insertions(+), 70 deletions(-) diff --git a/target/arm/sve_ldst_internal.h b/target/arm/sve_ldst_internal.h index ef9117e84c..b5c473fc48 100644 --- a/target/arm/sve_ldst_internal.h +++ b/target/arm/sve_ldst_internal.h @@ -124,4 +124,98 @@ DO_ST_PRIM_2(dd, H1_8, uint64_t, uint64_t, stq) #undef DO_LD_PRIM_2 #undef DO_ST_PRIM_2 =20 +/* + * Resolve the guest virtual address to info->host and info->flags. + * If @nofault, return false if the page is invalid, otherwise + * exit via page fault exception. + */ + +typedef struct { + void *host; + int flags; + MemTxAttrs attrs; +} SVEHostPage; + +bool sve_probe_page(SVEHostPage *info, bool nofault, CPUARMState *env, + target_ulong addr, int mem_off, MMUAccessType access_t= ype, + int mmu_idx, uintptr_t retaddr); + +/* + * Analyse contiguous data, protected by a governing predicate. + */ + +typedef enum { + FAULT_NO, + FAULT_FIRST, + FAULT_ALL, +} SVEContFault; + +typedef struct { + /* + * First and last element wholly contained within the two pages. + * mem_off_first[0] and reg_off_first[0] are always set >=3D 0. + * reg_off_last[0] may be < 0 if the first element crosses pages. + * All of mem_off_first[1], reg_off_first[1] and reg_off_last[1] + * are set >=3D 0 only if there are complete elements on a second page. + * + * The reg_off_* offsets are relative to the internal vector register. + * The mem_off_first offset is relative to the memory address; the + * two offsets are different when a load operation extends, a store + * operation truncates, or for multi-register operations. + */ + int16_t mem_off_first[2]; + int16_t reg_off_first[2]; + int16_t reg_off_last[2]; + + /* + * One element that is misaligned and spans both pages, + * or -1 if there is no such active element. + */ + int16_t mem_off_split; + int16_t reg_off_split; + + /* + * The byte offset at which the entire operation crosses a page bounda= ry. + * Set >=3D 0 if and only if the entire operation spans two pages. + */ + int16_t page_split; + + /* TLB data for the two pages. */ + SVEHostPage page[2]; +} SVEContLdSt; + +/* + * Find first active element on each page, and a loose bound for the + * final element on each page. Identify any single element that spans + * the page boundary. Return true if there are any active elements. + */ +bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr, uint64_t= *vg, + intptr_t reg_max, int esz, int msize); + +/* + * Resolve the guest virtual addresses to info->page[]. + * Control the generation of page faults with @fault. Return false if + * there is no work to do, which can only happen with @fault =3D=3D FAULT_= NO. + */ +bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault, + CPUARMState *env, target_ulong addr, + MMUAccessType access_type, uintptr_t retaddr); + +#ifdef CONFIG_USER_ONLY +static inline void +sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, uint64_t *v= g, + target_ulong addr, int esize, int msize, + int wp_access, uintptr_t retaddr) +{ } +#else +void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, + uint64_t *vg, target_ulong addr, + int esize, int msize, int wp_access, + uintptr_t retaddr); +#endif + +void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env, uint64_t= *vg, + target_ulong addr, int esize, int msize, + uint32_t mtedesc, uintptr_t ra); + #endif /* TARGET_ARM_SVE_LDST_INTERNAL_H */ diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index ea4c835689..446d7ac5cb 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -5339,16 +5339,9 @@ static intptr_t find_next_active(uint64_t *vg, intpt= r_t reg_off, * exit via page fault exception. */ =20 -typedef struct { - void *host; - int flags; - MemTxAttrs attrs; -} SVEHostPage; - -static bool sve_probe_page(SVEHostPage *info, bool nofault, - CPUARMState *env, target_ulong addr, - int mem_off, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +bool sve_probe_page(SVEHostPage *info, bool nofault, CPUARMState *env, + target_ulong addr, int mem_off, MMUAccessType access_t= ype, + int mmu_idx, uintptr_t retaddr) { int flags; =20 @@ -5404,59 +5397,13 @@ static bool sve_probe_page(SVEHostPage *info, bool = nofault, return true; } =20 - -/* - * Analyse contiguous data, protected by a governing predicate. - */ - -typedef enum { - FAULT_NO, - FAULT_FIRST, - FAULT_ALL, -} SVEContFault; - -typedef struct { - /* - * First and last element wholly contained within the two pages. - * mem_off_first[0] and reg_off_first[0] are always set >=3D 0. - * reg_off_last[0] may be < 0 if the first element crosses pages. - * All of mem_off_first[1], reg_off_first[1] and reg_off_last[1] - * are set >=3D 0 only if there are complete elements on a second page. - * - * The reg_off_* offsets are relative to the internal vector register. - * The mem_off_first offset is relative to the memory address; the - * two offsets are different when a load operation extends, a store - * operation truncates, or for multi-register operations. - */ - int16_t mem_off_first[2]; - int16_t reg_off_first[2]; - int16_t reg_off_last[2]; - - /* - * One element that is misaligned and spans both pages, - * or -1 if there is no such active element. - */ - int16_t mem_off_split; - int16_t reg_off_split; - - /* - * The byte offset at which the entire operation crosses a page bounda= ry. - * Set >=3D 0 if and only if the entire operation spans two pages. - */ - int16_t page_split; - - /* TLB data for the two pages. */ - SVEHostPage page[2]; -} SVEContLdSt; - /* * Find first active element on each page, and a loose bound for the * final element on each page. Identify any single element that spans * the page boundary. Return true if there are any active elements. */ -static bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr, - uint64_t *vg, intptr_t reg_max, - int esz, int msize) +bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr, uint64_t= *vg, + intptr_t reg_max, int esz, int msize) { const int esize =3D 1 << esz; const uint64_t pg_mask =3D pred_esz_masks[esz]; @@ -5546,9 +5493,9 @@ static bool sve_cont_ldst_elements(SVEContLdSt *info,= target_ulong addr, * Control the generation of page faults with @fault. Return false if * there is no work to do, which can only happen with @fault =3D=3D FAULT_= NO. */ -static bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault, - CPUARMState *env, target_ulong addr, - MMUAccessType access_type, uintptr_t retad= dr) +bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault, + CPUARMState *env, target_ulong addr, + MMUAccessType access_type, uintptr_t retaddr) { int mmu_idx =3D cpu_mmu_index(env, false); int mem_off =3D info->mem_off_first[0]; @@ -5604,12 +5551,12 @@ static bool sve_cont_ldst_pages(SVEContLdSt *info, = SVEContFault fault, return have_work; } =20 -static void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, - uint64_t *vg, target_ulong addr, - int esize, int msize, int wp_access, - uintptr_t retaddr) -{ #ifndef CONFIG_USER_ONLY +void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, + uint64_t *vg, target_ulong addr, + int esize, int msize, int wp_access, + uintptr_t retaddr) +{ intptr_t mem_off, reg_off, reg_last; int flags0 =3D info->page[0].flags; int flags1 =3D info->page[1].flags; @@ -5665,12 +5612,12 @@ static void sve_cont_ldst_watchpoints(SVEContLdSt *= info, CPUARMState *env, } while (reg_off & 63); } while (reg_off <=3D reg_last); } -#endif } +#endif =20 -static void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env, - uint64_t *vg, target_ulong addr, int e= size, - int msize, uint32_t mtedesc, uintptr_t= ra) +void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env, + uint64_t *vg, target_ulong addr, int esize, + int msize, uint32_t mtedesc, uintptr_t ra) { intptr_t mem_off, reg_off, reg_last; =20 --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653674983; cv=none; d=zohomail.com; s=zohoarc; b=L8iAkwzcJPk5yK+/5BW/YLeRGSTMlz1+gdtcBHQ26bDBJUmcFxIjz5qgAfSMbH+zf0P9BPoaKzXNwDUKVHtl66Irim2Wzopy5SR1r7D6iT0JwcWXI4VgjOtwFNLjCg1ioq1A/TCVrSc5fyY3HrtX5/0BZCFTgyKWy1Kp4QV7qlg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653674983; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=So/GKw6vo4Jrg11seHP+nP50PgmQsoRe22dqeIRJUSw=; b=cU05ArgMaxrMwWaIcYaCr0lsQ55LPBsJvp4pqDjDT33SbKztIKBliM7TdcmvmiOQNVgFoZYbFTcphaV3iNyUX9GDvidrjL41wBANHNh31pc5ZUUgsHCycKX2SKWuZIooEvOMBpi8j1c+WtjTmD/mlnVqpzAaUJNOAj4BtjxAdyU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653674983355307.6118592402838; Fri, 27 May 2022 11:09:43 -0700 (PDT) Received: from localhost ([::1]:54330 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueP7-0000B7-RH for importer@patchew.org; Fri, 27 May 2022 14:09:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38896) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueMF-0003Hy-K5 for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:43 -0400 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]:46686) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM8-0001ff-KJ for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:43 -0400 Received: by mail-pl1-x633.google.com with SMTP id w3so4756514plp.13 for ; Fri, 27 May 2022 11:06:36 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=So/GKw6vo4Jrg11seHP+nP50PgmQsoRe22dqeIRJUSw=; b=BxjpbEQTCewu95zjxGgX28vFqLd2AJOvgK5aSiYgE5I9tn9JzBiQPfIBu0Rj7VA0fE AFHYYOCTGfynoLzUaLvucILcu7zsuT17/Hgq6rS9M1Uku/ULFUuIKXwM5x+6k1C+afKp La8D9KkiHypUV9zavqApQTCYAZW72pNt5lm8LUUbuujdpBIfJU27HotTq4UR9hCEbchr OyXYp6cCqf3AHF4ymoCorOUgdgebFzOB7ApTFhsGlqK3Ddl9fPCjZG+g79JGkWh1vaFl ApSVRtWL7ip4Mdp2+V7rb7vA6RkngY94LGgqFWokhwYU7xu6bGKepqvNqoxJfFm8XDwc WxyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=So/GKw6vo4Jrg11seHP+nP50PgmQsoRe22dqeIRJUSw=; b=KC+ZJpmRkU+1ihUIB1uSD09sf3dZqvolgOuVJ7gFX4vrIFCaUUhv27Oi5g/d8Yp+c6 sRxik+gkea1zW6LU1gX1/+k1RuITyUAsDg1WiA1Lp2zOxNx2WOl1WcOwcdPaA220apH7 uoB4YWcpww/Eq6PNf7Tde2ZbDf9vAKXDFknoZvh4aTjYxX3mKQAihJaTngZp6HCpWavz XHZcQYLd4RyYZvEOsWc+lPUKnJSrSMsPg6TToYd1UkG+GiUo0UFEPyUIt5CJ+bKNdc5L i+W9skojl4txPGbnZpRJbPdwpw4ZhCOnu4EGqG8DgJDZ85avjsFL21+dGYdkf+Lpv47r h3Kg== X-Gm-Message-State: AOAM531dGSubvk1OahTUZ0pPlL1V4TSn0GyPEEQP4Ujr7DxbObtE35Ci joMdX5Xtp1iwERt0wTT4vx+xcOg2ZD8VOQ== X-Google-Smtp-Source: ABdhPJyy2duVIkmnxcB6EWMjo1qAD9hP2v3RlUvyMxGXD40JV82jl2a9c3w3qXZFp+wA9t/mZRpixQ== X-Received: by 2002:a17:90b:4f4b:b0:1e0:6356:8a07 with SMTP id pj11-20020a17090b4f4b00b001e063568a07mr9644771pjb.9.1653674795197; Fri, 27 May 2022 11:06:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 12/15] target/arm: Move expand_pred_b to vec_internal.h Date: Fri, 27 May 2022 11:06:20 -0700 Message-Id: <20220527180623.185261-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653674984240100001 Content-Type: text/plain; charset="utf-8" Put the inline function near the array declaration. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/vec_internal.h | 8 +++++++- target/arm/sve_helper.c | 9 --------- 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/target/arm/vec_internal.h b/target/arm/vec_internal.h index 1d63402042..d1a1ea4a66 100644 --- a/target/arm/vec_internal.h +++ b/target/arm/vec_internal.h @@ -50,8 +50,14 @@ #define H8(x) (x) #define H1_8(x) (x) =20 -/* Data for expanding active predicate bits to bytes, for byte elements. */ +/* + * Expand active predicate bits to bytes, for byte elements. + */ extern const uint64_t expand_pred_b_data[256]; +static inline uint64_t expand_pred_b(uint8_t byte) +{ + return expand_pred_b_data[byte]; +} =20 static inline void clear_tail(void *vd, uintptr_t opr_sz, uintptr_t max_sz) { diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 446d7ac5cb..b8a37dd1eb 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -103,15 +103,6 @@ uint32_t HELPER(sve_predtest)(void *vd, void *vg, uint= 32_t words) return flags; } =20 -/* - * Expand active predicate bits to bytes, for byte elements. - * (The data table itself is in vec_helper.c as MVE also needs it.) - */ -static inline uint64_t expand_pred_b(uint8_t byte) -{ - return expand_pred_b_data[byte]; -} - /* Similarly for half-word elements. * for (i =3D 0; i < 256; ++i) { * unsigned long m =3D 0; --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675248; cv=none; d=zohomail.com; s=zohoarc; b=hf8IIb5J6xmNmOk2h9rxwqjuoB3Cr6ZcNVqXn5pR7ma3T3PHeQbYGPkeJmEahxNLQNfrv5Nyw1KvmLdttATcr4V6JeSOHb5NPr2ahtJyAjdIHZko8TDtSN7ebSdOdjahyMc5pLLDq6Q/JH+9w8CKmHM4TGkq6N3t0ZvwRdJ3jyc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675248; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=SGJcDxYDfQFpknZCT6eIqa5PjlEqkkDf5ogejS4BA6E=; b=PiZWsLb9oewwvocy/Z91wdnH0oqZulNfo83K2i+xV7ZLe1WBeoLfVhkynzb+gLsv7Dt7aEm1G4BHQ3HDwq0nTEl03Ua+WOdJxJ56B3T+ulfSJCs/v/WoMJJtzUkTxCaKIBxlL5HQtuxaK2un3iYKemf1OaEqYZiaiW4+A9q8+Jo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675248016224.51423843991893; Fri, 27 May 2022 11:14:08 -0700 (PDT) Received: from localhost ([::1]:34860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nueTO-000678-Sy for importer@patchew.org; Fri, 27 May 2022 14:14:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38914) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueMH-0003Ki-F2 for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:45 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]:34429) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueM9-0001fm-4k for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:45 -0400 Received: by mail-pf1-x430.google.com with SMTP id c65so4387871pfb.1 for ; Fri, 27 May 2022 11:06:36 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SGJcDxYDfQFpknZCT6eIqa5PjlEqkkDf5ogejS4BA6E=; b=eghCjvq/Z+0XSJGKJb2OFHQfReHyoUBz6ORz2J8XyZWyHk63pyfsLwjNq9Vh74ylQr 9ERYN37oNmuP1hRtbAqK5P3DfQrZyLMGcoNtHFFPRzy0VMqMc6VEVE77mV+cz4xfxzpx cXLOP0+PIzoXUGUaxHFl1rIw7fj0aMql0xpiOdGHylOcM/0ISTo4sW9KipwKlYxVVtrA 4K8CkT6FBrMnE8v5a9QEJLHLkR9+5WC8hvAPoEdP0GmaxUtNndMK+phHRaXt5WpE8bwz w1+vzs+jMRlGz6FiZeJyYqPWpJb18KXO4GgCHoOI0mwTKQTwK+eplHfzwTYdL3HaM6Or 4MRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SGJcDxYDfQFpknZCT6eIqa5PjlEqkkDf5ogejS4BA6E=; b=H6Qhg+yKiwOjYnGEveueEnlZzsQoRJAq7/CyAQGiVfaM4G12RVz6J9GFKgJZf7Cauu dkmVOabOpk35mCYaCtzYG+CwLGJvhP+QEyk+Wv9Mxv2U+AgGHFXHyubWpJUsqnJ/Tk63 jQlN7BaZhBvRrzxZt30wbxf4uom9H8xDWyboBcHwBCnXvFuBW091jISdeOLGFyVGpTh2 HO9mOlcFBuXwEJS/gd2xx4VXsssdjkHG02GoHNxac5EFDQzI1BokGkoyW3varZOEC1vO d8bqNhTv1KMMHQuxe1PyR0FUuUHO81tmg8un2R92FNGuVJBjR89p1JuaI0RtIK7vB2q3 //Cg== X-Gm-Message-State: AOAM531sT+jK3Yx+1c9dfJM1V7mfYBqsCvWH7CqRzb54wWlIjUa8fd4T H+SpmXK28IK31HjRYhp8IilwK/DV0DXL9w== X-Google-Smtp-Source: ABdhPJzkJIZh/Nj1YKtx8btujosccKjrcV7kdVEnOrT0W7o9A/HjkuuQW9lBgvJly9eHQo26cpXRbA== X-Received: by 2002:a05:6a00:803:b0:518:8afd:25 with SMTP id m3-20020a056a00080300b005188afd0025mr30785275pfk.41.1653674795910; Fri, 27 May 2022 11:06:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 13/15] target/arm: Use expand_pred_b in mve_helper.c Date: Fri, 27 May 2022 11:06:21 -0700 Message-Id: <20220527180623.185261-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675248325100001 Content-Type: text/plain; charset="utf-8" Use the function instead of the array directly. Because the function performs its own masking, via the uint8_t parameter, we need to nothing extra within the users: the bits above the first 2 (_uh) or 4 (_uw) will be discarded by assignment to the local bmask variables, and of course _uq uses the entire uint64_t result. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/mve_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c index 846962bf4c..403b345ea3 100644 --- a/target/arm/mve_helper.c +++ b/target/arm/mve_helper.c @@ -726,7 +726,7 @@ static void mergemask_sb(int8_t *d, int8_t r, uint16_t = mask) =20 static void mergemask_uh(uint16_t *d, uint16_t r, uint16_t mask) { - uint16_t bmask =3D expand_pred_b_data[mask & 3]; + uint16_t bmask =3D expand_pred_b(mask); *d =3D (*d & ~bmask) | (r & bmask); } =20 @@ -737,7 +737,7 @@ static void mergemask_sh(int16_t *d, int16_t r, uint16_= t mask) =20 static void mergemask_uw(uint32_t *d, uint32_t r, uint16_t mask) { - uint32_t bmask =3D expand_pred_b_data[mask & 0xf]; + uint32_t bmask =3D expand_pred_b(mask); *d =3D (*d & ~bmask) | (r & bmask); } =20 @@ -748,7 +748,7 @@ static void mergemask_sw(int32_t *d, int32_t r, uint16_= t mask) =20 static void mergemask_uq(uint64_t *d, uint64_t r, uint16_t mask) { - uint64_t bmask =3D expand_pred_b_data[mask & 0xff]; + uint64_t bmask =3D expand_pred_b(mask); *d =3D (*d & ~bmask) | (r & bmask); } =20 --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1653675757; cv=none; d=zohomail.com; s=zohoarc; b=RkuMR3I/VqmEz4ZkLfOff4EEJ7ZkSAz7iGjU1rOwy0qCQ4seNxFwnQgNNIb8j2etjZJvCv0bGTDMmj4LsKf89LsyXWLFrgoIQYRq2P1joKXpbhxggkYgfM/wxaDVOoOcZDdin5nODGVtgzlcJXmqlw63YII2xQI3Nwsjsrkpog4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653675757; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Y5YSH0HOeiRGn4/ykhm8gudRAWnEQH/lDAlEuGwcaYQ=; b=SgmNkXMk2uCAynDMacsuKLa2QwWAM4gJMvaFxh6JdPwHXXqDzomn6bTKjUnrdoeEQOJflnRCNG55c8BE2IbhORDvWyjdwDprwyEqiUKP4laLhj7eolD6nG5kMDWDBycyKzRbPxkjn+IWo/qgMGzWi6PBH+mJ4bfQfEDVbxztHrs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653675757846640.3540362674729; Fri, 27 May 2022 11:22:37 -0700 (PDT) Received: from localhost ([::1]:53110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nuebc-0001e8-Mv for importer@patchew.org; Fri, 27 May 2022 14:22:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38992) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nueML-0003Tv-2r for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:49 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]:51162) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nueMA-0001g8-MB for qemu-devel@nongnu.org; Fri, 27 May 2022 14:06:47 -0400 Received: by mail-pj1-x102c.google.com with SMTP id d20so1132774pjr.0 for ; Fri, 27 May 2022 11:06:38 -0700 (PDT) Received: from stoup.. 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y5YSH0HOeiRGn4/ykhm8gudRAWnEQH/lDAlEuGwcaYQ=; b=U8C0c8SInV4/UTyQLdHWB+GU0bEeiLpA4RDzLvHFdxk0MnqNXU5dhHeCpPh1jRrCYZ zo+5iV4Nk2ia58A0bMLq/Bc+c0V/OtMfKbxTuWWOCji8nzKL6CxFz3VBwED9f0cZdMV+ T8ufwQPRuZiaKCK3HHskwqhTC4i6vc7sucp4N/+ynKy/fVkNNcjDv2sNeFcSYTaTb9iz KKmSRGEssM77pLq4ghQHJXX8OO6dpmzdbSKU2oy+hEZosG8AYSsTThuVJYOsNJl+s/Nr FqWxSJbS3qWcPBXn6ds/JhfYN9ebZ3wPvMeEpMQkZ8V2/GM+EyxEIBldYhLLKLHNpVbd +cAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y5YSH0HOeiRGn4/ykhm8gudRAWnEQH/lDAlEuGwcaYQ=; b=B/NdIU2iGgCGfL6ZhjFvgiHhYORF3nd8HVNUuOdXtv01Jk2gFaNNcA9Tv7d9P5MJwO j6Gr6mFyt4HKRMVelCsUjLCDkbziWssn2HqcbgxfIIdLcwcWGsK/KxLPo6bys4LDbTqU 2GSBkURNixp9fdYcaWmyxNI74n1LTkBhCrhzeL4SN8LZGCC8uNMdoRpxSv8xQd0AvOT2 gCvHaUUGvpqYzV8Zlj1u+DRHiDZEvfRzDjuxcqwc6RUiVR8w/620Fe3qyDwkKjDXK9g+ nWQC6HTxUrtgVFh0NnhKk6DY8pqFb9kb1YFuVOZKPwFPVB7UVl0DTcIal7C63siHkOjh dZ3g== X-Gm-Message-State: AOAM533UYDCCgYDXN7XjVHZMwUPllFI+O0e5Vq8ayh89/d/Hmof8vb0E yyNQfXKZiBdYrER8DrvltUzx0OXU4kQMDw== X-Google-Smtp-Source: ABdhPJyPQ66bGHmK+Zrx7qP0ABrUJxZSWvWR0b6rOfBH6C4newcauN+CV5fs+s5+aeU4kh2YzpBUWw== X-Received: by 2002:a17:90a:6f41:b0:1e2:89af:5bfc with SMTP id d59-20020a17090a6f4100b001e289af5bfcmr2640788pjk.217.1653674797300; Fri, 27 May 2022 11:06:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 14/15] target/arm: Move expand_pred_h to vec_internal.h Date: Fri, 27 May 2022 11:06:22 -0700 Message-Id: <20220527180623.185261-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675759796100001 Content-Type: text/plain; charset="utf-8" Move the data to vec_helper.c and the inline to vec_internal.h. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/vec_internal.h | 7 +++++++ target/arm/sve_helper.c | 29 ----------------------------- target/arm/vec_helper.c | 26 ++++++++++++++++++++++++++ 3 files changed, 33 insertions(+), 29 deletions(-) diff --git a/target/arm/vec_internal.h b/target/arm/vec_internal.h index d1a1ea4a66..43cff5ec7c 100644 --- a/target/arm/vec_internal.h +++ b/target/arm/vec_internal.h @@ -59,6 +59,13 @@ static inline uint64_t expand_pred_b(uint8_t byte) return expand_pred_b_data[byte]; } =20 +/* Similarly for half-word elements. */ +extern const uint64_t expand_pred_h_data[0x55+1]; +static inline uint64_t expand_pred_h(uint8_t byte) +{ + return expand_pred_h_data[byte & 0x55]; +} + static inline void clear_tail(void *vd, uintptr_t opr_sz, uintptr_t max_sz) { uint64_t *d =3D vd + opr_sz; diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index b8a37dd1eb..9a2741b20f 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -103,35 +103,6 @@ uint32_t HELPER(sve_predtest)(void *vd, void *vg, uint= 32_t words) return flags; } =20 -/* Similarly for half-word elements. - * for (i =3D 0; i < 256; ++i) { - * unsigned long m =3D 0; - * if (i & 0xaa) { - * continue; - * } - * for (j =3D 0; j < 8; j +=3D 2) { - * if ((i >> j) & 1) { - * m |=3D 0xfffful << (j << 3); - * } - * } - * printf("[0x%x] =3D 0x%016lx,\n", i, m); - * } - */ -static inline uint64_t expand_pred_h(uint8_t byte) -{ - static const uint64_t word[] =3D { - [0x01] =3D 0x000000000000ffff, [0x04] =3D 0x00000000ffff0000, - [0x05] =3D 0x00000000ffffffff, [0x10] =3D 0x0000ffff00000000, - [0x11] =3D 0x0000ffff0000ffff, [0x14] =3D 0x0000ffffffff0000, - [0x15] =3D 0x0000ffffffffffff, [0x40] =3D 0xffff000000000000, - [0x41] =3D 0xffff00000000ffff, [0x44] =3D 0xffff0000ffff0000, - [0x45] =3D 0xffff0000ffffffff, [0x50] =3D 0xffffffff00000000, - [0x51] =3D 0xffffffff0000ffff, [0x54] =3D 0xffffffffffff0000, - [0x55] =3D 0xffffffffffffffff, - }; - return word[byte & 0x55]; -} - /* Similarly for single word elements. */ static inline uint64_t expand_pred_s(uint8_t byte) { diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c index 17fb158362..4db68fbbb3 100644 --- a/target/arm/vec_helper.c +++ b/target/arm/vec_helper.c @@ -127,6 +127,32 @@ const uint64_t expand_pred_b_data[256] =3D { 0xffffffffffffffff, }; =20 +/* + * Similarly for half-word elements. + * for (i =3D 0; i < 256; ++i) { + * unsigned long m =3D 0; + * if (i & 0xaa) { + * continue; + * } + * for (j =3D 0; j < 8; j +=3D 2) { + * if ((i >> j) & 1) { + * m |=3D 0xfffful << (j << 3); + * } + * } + * printf("[0x%x] =3D 0x%016lx,\n", i, m); + * } + */ +const uint64_t expand_pred_h_data[0x55+1] =3D { + [0x01] =3D 0x000000000000ffff, [0x04] =3D 0x00000000ffff0000, + [0x05] =3D 0x00000000ffffffff, [0x10] =3D 0x0000ffff00000000, + [0x11] =3D 0x0000ffff0000ffff, [0x14] =3D 0x0000ffffffff0000, + [0x15] =3D 0x0000ffffffffffff, [0x40] =3D 0xffff000000000000, + [0x41] =3D 0xffff00000000ffff, [0x44] =3D 0xffff0000ffff0000, + [0x45] =3D 0xffff0000ffffffff, [0x50] =3D 0xffffffff00000000, + [0x51] =3D 0xffffffff0000ffff, [0x54] =3D 0xffffffffffff0000, + [0x55] =3D 0xffffffffffffffff, +}; + /* Signed saturating rounding doubling multiply-accumulate high half, 8-bi= t */ int8_t do_sqrdmlah_b(int8_t src1, int8_t src2, int8_t src3, bool neg, bool round) --=20 2.34.1 From nobody Wed May 15 23:40:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id e10-20020a170902cf4a00b001618fee3900sm3934492plg.196.2022.05.27.11.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 11:06:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Pgu2zydUpYMeYK9b3ALqFT5I3UrenI3q9C92LiEKRKg=; b=n9QwUk6Us6ZTcZLlifoxpiojn/TjiabJcZM1PH9rD7yvVCnlVVPS0c6u1wGEwo2Vpz PyQNgtRObR6WIIoYyE4DxfLnyUY711XON1WtV7IOlqEAMck5jiK555EiYtd0IN+MUZP5 /WaoJUkIOHCaJGtvuDYcp+vUW6litNMQgQRLkZL1Du0THZqttRV4mda+vmm0lbBLH7Cl SS6MczEAoGCEUUXs7rvEtgwzMTXToqdHHJCtfCKPeY4405OCl9om7VN6j2ZqZNqErSqj YWIu12NSvw3fc09gXusnD+ex8akNaK62m+iycDiFIUcZ0CoQ1QkFMXLE5cKcz84E4pQe hgqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Pgu2zydUpYMeYK9b3ALqFT5I3UrenI3q9C92LiEKRKg=; b=MxpLwmwnVvtAkNnl0XfYVC9hqch52RpIyDh6kUMKcZnTVaMXV8rCOys/7bLmzflFpP 7GmNNWZZGAFbBAH+vv/eU0nTOIuW9DqEFEuG5Z9VxDzyHoobav2iBLIVQ61BmfKytg2C PRv859Q5ir5aHjRdNs19akulIRiyu2wXc+TrGHoIjMka40ndklTniwUpRzmXesKjUGCY bS8AHv3ETgH0QLZ3s1qE9Wgh7a0ccwA52CpZMVGnsm+L4/pWeSkQks4SaQ3jgUjma4BU 9bCh7xw74uTAxJqpV98TYhM7kAX9bPjFqDW/1bCb9E2AmWb9Xz9YIoE1WaaZZx5jvVY2 RKpQ== X-Gm-Message-State: AOAM53036mTirSI9dTzQzaH6fXZGc8vlX47Nk6D0IhHypEV9uxE9iywx Y2/l0IRBuK/m0FP0JOg/nzIXfTajpIEejA== X-Google-Smtp-Source: ABdhPJwexAytGUyHGJbXAklecFdun1MdmrypcLpTWys/oPKteQi34a6YJNIHG4FhX1DP3ivs2FLN9Q== X-Received: by 2002:a05:6a00:c85:b0:518:b4a7:cce1 with SMTP id a5-20020a056a000c8500b00518b4a7cce1mr23252296pfv.66.1653674798192; Fri, 27 May 2022 11:06:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 15/15] target/arm: Export bfdotadd from vec_helper.c Date: Fri, 27 May 2022 11:06:23 -0700 Message-Id: <20220527180623.185261-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220527180623.185261-1-richard.henderson@linaro.org> References: <20220527180623.185261-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1653675935673100001 Content-Type: text/plain; charset="utf-8" We will need this over in sme_helper.c. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/vec_internal.h | 2 ++ target/arm/vec_helper.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/arm/vec_internal.h b/target/arm/vec_internal.h index 43cff5ec7c..5e50c503aa 100644 --- a/target/arm/vec_internal.h +++ b/target/arm/vec_internal.h @@ -230,4 +230,6 @@ uint64_t pmull_h(uint64_t op1, uint64_t op2); */ uint64_t pmull_w(uint64_t op1, uint64_t op2); =20 +float32 bfdotadd(float32 sum, uint32_t e1, uint32_t e2); + #endif /* TARGET_ARM_VEC_INTERNAL_H */ diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c index 4db68fbbb3..b3e8039cdb 100644 --- a/target/arm/vec_helper.c +++ b/target/arm/vec_helper.c @@ -2557,7 +2557,7 @@ DO_MMLA_B(gvec_usmmla_b, do_usmmla_b) * BFloat16 Dot Product */ =20 -static float32 bfdotadd(float32 sum, uint32_t e1, uint32_t e2) +float32 bfdotadd(float32 sum, uint32_t e1, uint32_t e2) { /* FPCR is ignored for BFDOT and BFMMLA. */ float_status bf_status =3D { --=20 2.34.1