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Thu, 12 May 2022 10:25:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwZ1ZGiJXuMwbqV1fzqkE4zoP/IFwcLyuR2XaGAo1YwVTRMLYcich8II0y4MUHdtRI5rKchmQ== X-Received: by 2002:a05:6402:3226:b0:427:cef3:9fb3 with SMTP id g38-20020a056402322600b00427cef39fb3mr35945865eda.20.1652376310831; Thu, 12 May 2022 10:25:10 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 01/27] pc-bios/optionrom: detect -fno-pie Date: Thu, 12 May 2022 19:24:39 +0200 Message-Id: <20220512172505.1065394-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376584726100001 Content-Type: text/plain; charset="utf-8" Do not rely on the detection that was done in the configure script, since in the future we may want to cross-compile this file. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- configure | 1 - pc-bios/optionrom/Makefile | 3 ++- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configure b/configure index e77b29b093..c8b5b99532 100755 --- a/configure +++ b/configure @@ -2038,7 +2038,6 @@ echo "CCAS=3D$ccas" >> $config_host_mak echo "CPP=3D$cpp" >> $config_host_mak echo "OBJCOPY=3D$objcopy" >> $config_host_mak echo "LD=3D$ld" >> $config_host_mak -echo "CFLAGS_NOPIE=3D$CFLAGS_NOPIE" >> $config_host_mak echo "QEMU_CFLAGS=3D$QEMU_CFLAGS" >> $config_host_mak echo "QEMU_CXXFLAGS=3D$QEMU_CXXFLAGS" >> $config_host_mak echo "QEMU_OBJCFLAGS=3D$QEMU_OBJCFLAGS" >> $config_host_mak diff --git a/pc-bios/optionrom/Makefile b/pc-bios/optionrom/Makefile index f1ef898073..8de5a9461c 100644 --- a/pc-bios/optionrom/Makefile +++ b/pc-bios/optionrom/Makefile @@ -22,7 +22,8 @@ override CFLAGS +=3D $(call cc-option, -fcf-protection=3D= none) override CPPFLAGS +=3D -MMD -MP -MT $@ -MF $(@D)/$(*F).d =20 override CFLAGS +=3D $(filter -W%, $(QEMU_CFLAGS)) -override CFLAGS +=3D $(CFLAGS_NOPIE) -ffreestanding -I$(TOPSRC_DIR)/include +override CFLAGS +=3D $(call cc-option, -fno-pie) +override CFLAGS +=3D -ffreestanding -I$(TOPSRC_DIR)/include override CFLAGS +=3D $(call cc-option, -fno-stack-protector) override CFLAGS +=3D $(call cc-option, -m16) =20 --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 12 May 2022 10:25:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwrRAOuPvIV1o0aPp5aSIodbbOdqbVogdcdmB/iHyHWpIIVTp7Ns9tZS/gs3IqUkNyi6icnGg== X-Received: by 2002:a17:907:3f8c:b0:6fa:8b15:66fe with SMTP id hr12-20020a1709073f8c00b006fa8b1566femr908785ejc.142.1652376313274; Thu, 12 May 2022 10:25:13 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson Subject: [PULL 02/27] pc-bios/optionrom: compile with -Wno-array-bounds Date: Thu, 12 May 2022 19:24:40 +0200 Message-Id: <20220512172505.1065394-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376643014100001 Avoids the following bogus warning: pvh_main.c: In function =E2=80=98pvh_load_kernel=E2=80=99: pvh_main.c:101:42: warning: array subscript 0 is outside array bounds of = =E2=80=98uint16_t[0]=E2=80=99 {aka =E2=80=98short unsigned int[]=E2=80=99} = [-Warray-bounds] 101 | uint32_t ebda_paddr =3D ((uint32_t)*((uint16_t *)EBDA_BASE_= ADDR)) << 4; | ^~~~~~~~~~~~~~~~~~~~~~~~~~= ~~~ Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- pc-bios/optionrom/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/pc-bios/optionrom/Makefile b/pc-bios/optionrom/Makefile index 8de5a9461c..2494ad9c25 100644 --- a/pc-bios/optionrom/Makefile +++ b/pc-bios/optionrom/Makefile @@ -26,6 +26,7 @@ override CFLAGS +=3D $(call cc-option, -fno-pie) override CFLAGS +=3D -ffreestanding -I$(TOPSRC_DIR)/include override CFLAGS +=3D $(call cc-option, -fno-stack-protector) override CFLAGS +=3D $(call cc-option, -m16) +override CFLAGS +=3D $(call cc-option, -Wno-array-bounds) =20 ifeq ($(filter -m16, $(CFLAGS)),) # Attempt to work around compilers that lack -m16 (GCC <=3D 4.8, clang <= =3D ??) --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 12 May 2022 10:25:15 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Maxim Levitsky , qemu-stable@nongnu.org Subject: [PULL 03/27] target/i386: do not consult nonexistent host leaves Date: Thu, 12 May 2022 19:24:41 +0200 Message-Id: <20220512172505.1065394-4-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376927307100001 Content-Type: text/plain; charset="utf-8" When cache_info_passthrough is requested, QEMU passes the host values of the cache information CPUID leaves down to the guest. However, it blindly assumes that the CPUID leaf exists on the host, and this cannot be guaranteed: for example, KVM has recently started to synthesize AMD leaves up to 0x80000021 in order to provide accurate CPU bug information to guests. Querying a nonexistent host leaf fills the output arguments of host_cpuid with data that (albeit deterministic) is nonsensical as cache information, namely the data in the highest Intel CPUID leaf. If said highest leaf is not ECX-dependent, this can even cause an infinite loop when kvm_arch_init_vcpu prepares the input to KVM_SET_CPUID2. The infinite loop is only terminated by an abort() when the array gets full. Reported-by: Maxim Levitsky Reviewed-by: Maxim Levitsky Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 41 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 62c240fa91..c4a17c93f6 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5022,6 +5022,37 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureW= ord w, return r; } =20 +static void x86_cpu_get_cache_cpuid(uint32_t func, uint32_t index, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) +{ + uint32_t level, unused; + + /* Only return valid host leaves. */ + switch (func) { + case 2: + case 4: + host_cpuid(0, 0, &level, &unused, &unused, &unused); + break; + case 0x80000005: + case 0x80000006: + case 0x8000001d: + host_cpuid(0x80000000, 0, &level, &unused, &unused, &unused); + break; + default: + return; + } + + if (func > level) { + *eax =3D 0; + *ebx =3D 0; + *ecx =3D 0; + *edx =3D 0; + } else { + host_cpuid(func, index, eax, ebx, ecx, edx); + } +} + /* * Only for builtin_x86_defs models initialized with x86_register_cpudef_t= ypes. */ @@ -5280,7 +5311,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 2: /* cache info: needed for Pentium Pro compatibility */ if (cpu->cache_info_passthrough) { - host_cpuid(index, 0, eax, ebx, ecx, edx); + x86_cpu_get_cache_cpuid(index, 0, eax, ebx, ecx, edx); break; } else if (cpu->vendor_cpuid_only && IS_AMD_CPU(env)) { *eax =3D *ebx =3D *ecx =3D *edx =3D 0; @@ -5300,7 +5331,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 4: /* cache info: needed for Core compatibility */ if (cpu->cache_info_passthrough) { - host_cpuid(index, count, eax, ebx, ecx, edx); + x86_cpu_get_cache_cpuid(index, count, eax, ebx, ecx, edx); /* QEMU gives out its own APIC IDs, never pass down bits 31..2= 6. */ *eax &=3D ~0xFC000000; if ((*eax & 31) && cs->nr_cores > 1) { @@ -5702,7 +5733,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 0x80000005: /* cache info (L1 cache) */ if (cpu->cache_info_passthrough) { - host_cpuid(index, 0, eax, ebx, ecx, edx); + x86_cpu_get_cache_cpuid(index, 0, eax, ebx, ecx, edx); break; } *eax =3D (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | @@ -5715,7 +5746,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 0x80000006: /* cache info (L2 cache) */ if (cpu->cache_info_passthrough) { - host_cpuid(index, 0, eax, ebx, ecx, edx); + x86_cpu_get_cache_cpuid(index, 0, eax, ebx, ecx, edx); break; } *eax =3D (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | @@ -5775,7 +5806,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 0x8000001D: *eax =3D 0; if (cpu->cache_info_passthrough) { - host_cpuid(index, count, eax, ebx, ecx, edx); + x86_cpu_get_cache_cpuid(index, count, eax, ebx, ecx, edx); break; } switch (count) { --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 12 May 2022 10:25:17 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 04/27] checkpatch: fix g_malloc check Date: Thu, 12 May 2022 19:24:42 +0200 Message-Id: <20220512172505.1065394-5-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376842796100001 Content-Type: text/plain; charset="utf-8" Use the string equality operator "eq", and ensure that $1 is defined by using "(try|)" instead of "(try)?". The alternative "((?:try)?)" is longer and less readable. Signed-off-by: Paolo Bonzini --- scripts/checkpatch.pl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 4763d02ae7..d900d18048 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2831,8 +2831,8 @@ sub process { } =20 # check for pointless casting of g_malloc return - if ($line =3D~ /\*\s*\)\s*g_(try)?(m|re)alloc(0?)(_n)?\b/) { - if ($2 =3D=3D 'm') { + if ($line =3D~ /\*\s*\)\s*g_(try|)(m|re)alloc(0?)(_n)?\b/) { + if ($2 eq 'm') { ERROR("unnecessary cast may hide bugs, use g_$1new$3 instead\n" . $her= ecurr); } else { ERROR("unnecessary cast may hide bugs, use g_$1renew$3 instead\n" . $h= erecurr); --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Thu, 12 May 2022 10:25:20 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Juan Quintela Subject: [PULL 05/27] meson: Make mremap() detecting works correctly Date: Thu, 12 May 2022 19:24:43 +0200 Message-Id: <20220512172505.1065394-6-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376532445100001 Content-Type: text/plain; charset="utf-8" From: Juan Quintela Without this (at least in Fedora 35) it don't detect mremap() correctly. Signed-off-by: Juan Quintela Message-Id: <20220502131119.2345-1-quintela@redhat.com> [Also switch the LEGACY_RDMA_REG_MR test to cc.links, otherwise Debian fails to build. - Paolo] Signed-off-by: Paolo Bonzini --- meson.build | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/meson.build b/meson.build index 864e97945f..03f63e95e2 100644 --- a/meson.build +++ b/meson.build @@ -2179,7 +2179,8 @@ config_host_data.set('CONFIG_AVX512F_OPT', get_option= ('avx512f') \ =20 have_pvrdma =3D get_option('pvrdma') \ .require(rdma.found(), error_message: 'PVRDMA requires OpenFabrics libra= ries') \ - .require(cc.compiles(''' + .require(cc.compiles(gnu_source_prefix + ''' + #include int main(void) { char buf =3D 0; @@ -2190,7 +2191,7 @@ have_pvrdma =3D get_option('pvrdma') \ }'''), error_message: 'PVRDMA requires mremap').allowed() =20 if have_pvrdma - config_host_data.set('LEGACY_RDMA_REG_MR', not cc.compiles(''' + config_host_data.set('LEGACY_RDMA_REG_MR', not cc.links(''' #include int main(void) { --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 12 May 2022 10:25:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzRiMidKDUI5/KD4gmqVdwiDtEWC/6J8er+v6lLYyTF5VGVB7TptIqJBGysZju8QEQM45/ivw== X-Received: by 2002:a17:907:7da6:b0:6f4:dc6f:1e32 with SMTP id oz38-20020a1709077da600b006f4dc6f1e32mr840890ejc.614.1652376321968; Thu, 12 May 2022 10:25:21 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Bernhard Beschow , Anthony PERARD Subject: [PULL 06/27] hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN Date: Thu, 12 May 2022 19:24:44 +0200 Message-Id: <20220512172505.1065394-7-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652377163436100001 Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow igd-passthrough-isa-bridge is only requested in xen_pt but was implemented in pc_piix.c. This caused xen_pt to dependend on i386/pc which is hereby resolved. Signed-off-by: Bernhard Beschow Acked-by: Anthony PERARD Message-Id: <20220326165825.30794-2-shentey@gmail.com> Signed-off-by: Paolo Bonzini --- hw/i386/pc_piix.c | 118 -------------------------------------- hw/xen/xen_pt.c | 1 - hw/xen/xen_pt.h | 1 + hw/xen/xen_pt_graphics.c | 119 +++++++++++++++++++++++++++++++++++++++ include/hw/i386/pc.h | 1 - 5 files changed, 120 insertions(+), 120 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4c185c72d0..f843dd906f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -813,124 +813,6 @@ static void pc_i440fx_1_4_machine_options(MachineClas= s *m) DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, pc_i440fx_1_4_machine_options); =20 -typedef struct { - uint16_t gpu_device_id; - uint16_t pch_device_id; - uint8_t pch_revision_id; -} IGDDeviceIDInfo; - -/* In real world different GPU should have different PCH. But actually - * the different PCH DIDs likely map to different PCH SKUs. We do the - * same thing for the GPU. For PCH, the different SKUs are going to be - * all the same silicon design and implementation, just different - * features turn on and off with fuses. The SW interfaces should be - * consistent across all SKUs in a given family (eg LPT). But just same - * features may not be supported. - * - * Most of these different PCH features probably don't matter to the - * Gfx driver, but obviously any difference in display port connections - * will so it should be fine with any PCH in case of passthrough. - * - * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) - * scenarios, 0x9cc3 for BDW(Broadwell). - */ -static const IGDDeviceIDInfo igd_combo_id_infos[] =3D { - /* HSW Classic */ - {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ - {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ - {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ - {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ - {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ - /* HSW ULT */ - {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ - {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ - {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ - {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ - {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ - {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ - /* HSW CRW */ - {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ - {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ - /* HSW Server */ - {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ - /* HSW SRVR */ - {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ - /* BSW */ - {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ - {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ - {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ - {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ - {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ - {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ - {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ - {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ - {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ - {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ - {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ -}; - -static void isa_bridge_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - - dc->desc =3D "ISA bridge faked to support IGD PT"; - set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); - k->vendor_id =3D PCI_VENDOR_ID_INTEL; - k->class_id =3D PCI_CLASS_BRIDGE_ISA; -}; - -static const TypeInfo isa_bridge_info =3D { - .name =3D "igd-passthrough-isa-bridge", - .parent =3D TYPE_PCI_DEVICE, - .instance_size =3D sizeof(PCIDevice), - .class_init =3D isa_bridge_class_init, - .interfaces =3D (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - -static void pt_graphics_register_types(void) -{ - type_register_static(&isa_bridge_info); -} -type_init(pt_graphics_register_types) - -void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) -{ - struct PCIDevice *bridge_dev; - int i, num; - uint16_t pch_dev_id =3D 0xffff; - uint8_t pch_rev_id =3D 0; - - num =3D ARRAY_SIZE(igd_combo_id_infos); - for (i =3D 0; i < num; i++) { - if (gpu_dev_id =3D=3D igd_combo_id_infos[i].gpu_device_id) { - pch_dev_id =3D igd_combo_id_infos[i].pch_device_id; - pch_rev_id =3D igd_combo_id_infos[i].pch_revision_id; - } - } - - if (pch_dev_id =3D=3D 0xffff) { - return; - } - - /* Currently IGD drivers always need to access PCH by 1f.0. */ - bridge_dev =3D pci_create_simple(bus, PCI_DEVFN(0x1f, 0), - "igd-passthrough-isa-bridge"); - - /* - * Note that vendor id is always PCI_VENDOR_ID_INTEL. - */ - if (!bridge_dev) { - fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); - return; - } - pci_config_set_device_id(bridge_dev->config, pch_dev_id); - pci_config_set_revision(bridge_dev->config, pch_rev_id); -} - #ifdef CONFIG_ISAPC static void isapc_machine_options(MachineClass *m) { diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 027190fa44..829ea9985f 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -60,7 +60,6 @@ #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" #include "hw/xen/xen.h" -#include "hw/i386/pc.h" #include "hw/xen/xen-legacy-backend.h" #include "xen_pt.h" #include "qemu/range.h" diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 6b8e13cdee..806d832c94 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -43,6 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT= _DEVICE) =20 uint32_t igd_read_opregion(XenPCIPassthroughState *s); void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val); +void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); =20 /* function type for config reg */ typedef int (*xen_pt_conf_reg_init) diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index a3bc7e3921..f1fbb98912 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -289,3 +289,122 @@ void igd_write_opregion(XenPCIPassthroughState *s, ui= nt32_t val) (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT), (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT)); } + +typedef struct { + uint16_t gpu_device_id; + uint16_t pch_device_id; + uint8_t pch_revision_id; +} IGDDeviceIDInfo; + +/* + * In real world different GPU should have different PCH. But actually + * the different PCH DIDs likely map to different PCH SKUs. We do the + * same thing for the GPU. For PCH, the different SKUs are going to be + * all the same silicon design and implementation, just different + * features turn on and off with fuses. The SW interfaces should be + * consistent across all SKUs in a given family (eg LPT). But just same + * features may not be supported. + * + * Most of these different PCH features probably don't matter to the + * Gfx driver, but obviously any difference in display port connections + * will so it should be fine with any PCH in case of passthrough. + * + * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) + * scenarios, 0x9cc3 for BDW(Broadwell). + */ +static const IGDDeviceIDInfo igd_combo_id_infos[] =3D { + /* HSW Classic */ + {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ + {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ + {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ + {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ + {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ + /* HSW ULT */ + {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ + {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ + {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ + {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ + {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ + {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ + /* HSW CRW */ + {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ + {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ + /* HSW Server */ + {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ + /* HSW SRVR */ + {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ + /* BSW */ + {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ + {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ + {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ + {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ + {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ + {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ + {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ + {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ + {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ + {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ + {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ +}; + +static void isa_bridge_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + dc->desc =3D "ISA bridge faked to support IGD PT"; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + k->vendor_id =3D PCI_VENDOR_ID_INTEL; + k->class_id =3D PCI_CLASS_BRIDGE_ISA; +}; + +static const TypeInfo isa_bridge_info =3D { + .name =3D "igd-passthrough-isa-bridge", + .parent =3D TYPE_PCI_DEVICE, + .instance_size =3D sizeof(PCIDevice), + .class_init =3D isa_bridge_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void pt_graphics_register_types(void) +{ + type_register_static(&isa_bridge_info); +} +type_init(pt_graphics_register_types) + +void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) +{ + struct PCIDevice *bridge_dev; + int i, num; + uint16_t pch_dev_id =3D 0xffff; + uint8_t pch_rev_id =3D 0; + + num =3D ARRAY_SIZE(igd_combo_id_infos); + for (i =3D 0; i < num; i++) { + if (gpu_dev_id =3D=3D igd_combo_id_infos[i].gpu_device_id) { + pch_dev_id =3D igd_combo_id_infos[i].pch_device_id; + pch_rev_id =3D igd_combo_id_infos[i].pch_revision_id; + } + } + + if (pch_dev_id =3D=3D 0xffff) { + return; + } + + /* Currently IGD drivers always need to access PCH by 1f.0. */ + bridge_dev =3D pci_create_simple(bus, PCI_DEVFN(0x1f, 0), + "igd-passthrough-isa-bridge"); + + /* + * Note that vendor id is always PCI_VENDOR_ID_INTEL. + */ + if (!bridge_dev) { + fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); + return; + } + pci_config_set_device_id(bridge_dev->config, pch_dev_id); + pci_config_set_revision(bridge_dev->config, pch_rev_id); +} diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 637367dc5f..aff8add155 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -315,5 +315,4 @@ extern const size_t pc_compat_1_4_len; } \ type_init(pc_machine_init_##suffix) =20 -extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_de= v_id); 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Thu, 12 May 2022 10:25:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwvk7bA6pGqSCVht/84tt/bvBx0VSS28vnfGT0OAYsBbFxzAUvxDHxY2jRT013qyX9CNAblQA== X-Received: by 2002:a50:ce14:0:b0:425:cb75:5322 with SMTP id y20-20020a50ce14000000b00425cb755322mr36850543edi.386.1652376324246; Thu, 12 May 2022 10:25:24 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Bernhard Beschow , Anthony PERARD Subject: [PULL 07/27] hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection Date: Thu, 12 May 2022 19:24:45 +0200 Message-Id: <20220512172505.1065394-8-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652377860543100001 Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow Now that igd_passthrough_isa_bridge_create() is implemented within the xen context it may use Xen* data types directly and become xen_igd_passthrough_isa_bridge_create(). This resolves an indirection. Signed-off-by: Bernhard Beschow Acked-by: Anthony PERARD Message-Id: <20220326165825.30794-3-shentey@gmail.com> Signed-off-by: Paolo Bonzini --- hw/xen/xen_pt.c | 11 ----------- hw/xen/xen_pt.h | 3 ++- hw/xen/xen_pt_graphics.c | 5 ++++- 3 files changed, 6 insertions(+), 13 deletions(-) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 829ea9985f..0ec7e52183 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -701,17 +701,6 @@ static const MemoryListener xen_pt_io_listener =3D { .priority =3D 10, }; =20 -static void -xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s, - XenHostPCIDevice *dev) -{ - uint16_t gpu_dev_id; - PCIDevice *d =3D &s->dev; - - gpu_dev_id =3D dev->device_id; - igd_passthrough_isa_bridge_create(pci_get_bus(d), gpu_dev_id); -} - /* destroy. */ static void xen_pt_destroy(PCIDevice *d) { =20 diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 806d832c94..e7c4316a7d 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -43,7 +43,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT= _DEVICE) =20 uint32_t igd_read_opregion(XenPCIPassthroughState *s); void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val); -void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); +void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s, + XenHostPCIDevice *dev); =20 /* function type for config reg */ typedef int (*xen_pt_conf_reg_init) diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index f1fbb98912..f303f67c9c 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -375,10 +375,13 @@ static void pt_graphics_register_types(void) } type_init(pt_graphics_register_types) =20 -void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) +void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s, + XenHostPCIDevice *dev) { + PCIBus *bus =3D pci_get_bus(&s->dev); struct PCIDevice *bridge_dev; int i, num; + const uint16_t gpu_dev_id =3D dev->device_id; uint16_t pch_dev_id =3D 0xffff; uint8_t pch_rev_id =3D 0; =20 --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 12 May 2022 10:25:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxkO2bWJfbp++FcCFlg5bevVajI3fRX7t1CigVB6BHCpt5cTlgp3xFW4i+CxtGCZfy4dNh8zw== X-Received: by 2002:a17:906:a219:b0:6e4:86a3:44ea with SMTP id r25-20020a170906a21900b006e486a344eamr844557ejy.385.1652376326495; Thu, 12 May 2022 10:25:26 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Eric Auger , Thomas Huth , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 08/27] tests/qtest/libqos/pci: Introduce pio_limit Date: Thu, 12 May 2022 19:24:46 +0200 Message-Id: <20220512172505.1065394-9-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376850904100001 From: Eric Auger At the moment the IO space limit is hardcoded to QPCI_PIO_LIMIT =3D 0x10000. When accesses are performed to a bar, the base address of this latter is compared against the limit to decide whether we perform an IO or a memory access. On ARM, we cannot keep this PIO limit as the arm-virt machine uses [0x3eff0000, 0x3f000000 ] for the IO space map and we are mandated to allocate at 0x0. Add a new flag in QPCIBar indicating whether it is an IO bar or a memory bar. This flag is set on QPCIBar allocation and provisionned based on the BAR configuration. Then the new flag is used in access functions and in iomap() function. Signed-off-by: Eric Auger Reviewed-by: Thomas Huth Reviewed-by: Alex Benn=C3=A9e Message-Id: <20220504152025.1785704-2-eric.auger@redhat.com> Signed-off-by: Paolo Bonzini --- tests/qtest/libqos/pci-pc.c | 1 + tests/qtest/libqos/pci-spapr.c | 1 + tests/qtest/libqos/pci.c | 78 ++++++++++++++++++++++------------ tests/qtest/libqos/pci.h | 5 +-- 4 files changed, 54 insertions(+), 31 deletions(-) diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c index e9dd5a57ec..81c2c055ca 100644 --- a/tests/qtest/libqos/pci-pc.c +++ b/tests/qtest/libqos/pci-pc.c @@ -150,6 +150,7 @@ void qpci_init_pc(QPCIBusPC *qpci, QTestState *qts, QGu= estAllocator *alloc) =20 qpci->bus.qts =3D qts; qpci->bus.pio_alloc_ptr =3D 0xc000; + qpci->bus.pio_limit =3D 0x10000; qpci->bus.mmio_alloc_ptr =3D 0xE0000000; qpci->bus.mmio_limit =3D 0x100000000ULL; =20 diff --git a/tests/qtest/libqos/pci-spapr.c b/tests/qtest/libqos/pci-spapr.c index 76bf9a855d..0f1023e4a7 100644 --- a/tests/qtest/libqos/pci-spapr.c +++ b/tests/qtest/libqos/pci-spapr.c @@ -197,6 +197,7 @@ void qpci_init_spapr(QPCIBusSPAPR *qpci, QTestState *qt= s, =20 qpci->bus.qts =3D qts; qpci->bus.pio_alloc_ptr =3D 0xc000; + qpci->bus.pio_limit =3D 0x10000; qpci->bus.mmio_alloc_ptr =3D qpci->mmio32.pci_base; qpci->bus.mmio_limit =3D qpci->mmio32.pci_base + qpci->mmio32.size; =20 diff --git a/tests/qtest/libqos/pci.c b/tests/qtest/libqos/pci.c index 3a9076ae58..b23d72346b 100644 --- a/tests/qtest/libqos/pci.c +++ b/tests/qtest/libqos/pci.c @@ -398,44 +398,56 @@ void qpci_config_writel(QPCIDevice *dev, uint8_t offs= et, uint32_t value) =20 uint8_t qpci_io_readb(QPCIDevice *dev, QPCIBar token, uint64_t off) { - if (token.addr < QPCI_PIO_LIMIT) { - return dev->bus->pio_readb(dev->bus, token.addr + off); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + return bus->pio_readb(bus, token.addr + off); } else { uint8_t val; - dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val)); + + bus->memread(dev->bus, token.addr + off, &val, sizeof(val)); return val; } } =20 uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off) { - if (token.addr < QPCI_PIO_LIMIT) { - return dev->bus->pio_readw(dev->bus, token.addr + off); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + return bus->pio_readw(bus, token.addr + off); } else { uint16_t val; - dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val)); + + bus->memread(bus, token.addr + off, &val, sizeof(val)); return le16_to_cpu(val); } } =20 uint32_t qpci_io_readl(QPCIDevice *dev, QPCIBar token, uint64_t off) { - if (token.addr < QPCI_PIO_LIMIT) { - return dev->bus->pio_readl(dev->bus, token.addr + off); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + return bus->pio_readl(bus, token.addr + off); } else { uint32_t val; - dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val)); + + bus->memread(dev->bus, token.addr + off, &val, sizeof(val)); return le32_to_cpu(val); } } =20 uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token, uint64_t off) { - if (token.addr < QPCI_PIO_LIMIT) { - return dev->bus->pio_readq(dev->bus, token.addr + off); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + return bus->pio_readq(bus, token.addr + off); } else { uint64_t val; - dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val)); + + bus->memread(bus, token.addr + off, &val, sizeof(val)); return le64_to_cpu(val); } } @@ -443,57 +455,65 @@ uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token= , uint64_t off) void qpci_io_writeb(QPCIDevice *dev, QPCIBar token, uint64_t off, uint8_t value) { - if (token.addr < QPCI_PIO_LIMIT) { - dev->bus->pio_writeb(dev->bus, token.addr + off, value); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + bus->pio_writeb(bus, token.addr + off, value); } else { - dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(valu= e)); + bus->memwrite(bus, token.addr + off, &value, sizeof(value)); } } =20 void qpci_io_writew(QPCIDevice *dev, QPCIBar token, uint64_t off, uint16_t value) { - if (token.addr < QPCI_PIO_LIMIT) { - dev->bus->pio_writew(dev->bus, token.addr + off, value); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + bus->pio_writew(bus, token.addr + off, value); } else { value =3D cpu_to_le16(value); - dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(valu= e)); + bus->memwrite(bus, token.addr + off, &value, sizeof(value)); } } =20 void qpci_io_writel(QPCIDevice *dev, QPCIBar token, uint64_t off, uint32_t value) { - if (token.addr < QPCI_PIO_LIMIT) { - dev->bus->pio_writel(dev->bus, token.addr + off, value); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + bus->pio_writel(bus, token.addr + off, value); } else { value =3D cpu_to_le32(value); - dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(valu= e)); + bus->memwrite(bus, token.addr + off, &value, sizeof(value)); } } =20 void qpci_io_writeq(QPCIDevice *dev, QPCIBar token, uint64_t off, uint64_t value) { - if (token.addr < QPCI_PIO_LIMIT) { - dev->bus->pio_writeq(dev->bus, token.addr + off, value); + QPCIBus *bus =3D dev->bus; + + if (token.is_io) { + bus->pio_writeq(bus, token.addr + off, value); } else { value =3D cpu_to_le64(value); - dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(valu= e)); + bus->memwrite(bus, token.addr + off, &value, sizeof(value)); } } =20 void qpci_memread(QPCIDevice *dev, QPCIBar token, uint64_t off, void *buf, size_t len) { - g_assert(token.addr >=3D QPCI_PIO_LIMIT); + g_assert(!token.is_io); dev->bus->memread(dev->bus, token.addr + off, buf, len); } =20 void qpci_memwrite(QPCIDevice *dev, QPCIBar token, uint64_t off, const void *buf, size_t len) { - g_assert(token.addr >=3D QPCI_PIO_LIMIT); + g_assert(!token.is_io); dev->bus->memwrite(dev->bus, token.addr + off, buf, len); } =20 @@ -534,9 +554,10 @@ QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_= t *sizeptr) loc =3D QEMU_ALIGN_UP(bus->pio_alloc_ptr, size); =20 g_assert(loc >=3D bus->pio_alloc_ptr); - g_assert(loc + size <=3D QPCI_PIO_LIMIT); /* Keep PIO below 64kiB = */ + g_assert(loc + size <=3D bus->pio_limit); =20 bus->pio_alloc_ptr =3D loc + size; + bar.is_io =3D true; =20 qpci_config_writel(dev, bar_reg, loc | PCI_BASE_ADDRESS_SPACE_IO); } else { @@ -547,6 +568,7 @@ QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t= *sizeptr) g_assert(loc + size <=3D bus->mmio_limit); =20 bus->mmio_alloc_ptr =3D loc + size; + bar.is_io =3D false; =20 qpci_config_writel(dev, bar_reg, loc); } @@ -562,7 +584,7 @@ void qpci_iounmap(QPCIDevice *dev, QPCIBar bar) =20 QPCIBar qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr) { - QPCIBar bar =3D { .addr =3D addr }; + QPCIBar bar =3D { .addr =3D addr, .is_io =3D true }; return bar; } =20 diff --git a/tests/qtest/libqos/pci.h b/tests/qtest/libqos/pci.h index e705e06598..a3c657d962 100644 --- a/tests/qtest/libqos/pci.h +++ b/tests/qtest/libqos/pci.h @@ -16,8 +16,6 @@ #include "../libqtest.h" #include "qgraph.h" =20 -#define QPCI_PIO_LIMIT 0x10000 - #define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn)) =20 typedef struct QPCIDevice QPCIDevice; @@ -51,7 +49,7 @@ struct QPCIBus { uint8_t offset, uint32_t value); =20 QTestState *qts; - uint16_t pio_alloc_ptr; + uint64_t pio_alloc_ptr, pio_limit; uint64_t mmio_alloc_ptr, mmio_limit; bool has_buggy_msi; /* TRUE for spapr, FALSE for pci */ =20 @@ -59,6 +57,7 @@ struct QPCIBus { =20 struct QPCIBar { uint64_t addr; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652376888993100001 From: Eric Auger ARM does not not support hotplug on pcie.0. Add a flag on the bus which tells if devices can be hotplugged and skip hotplug tests if the bus cannot be hotplugged. This is a temporary solution to enable the other pci tests on aarch64. Signed-off-by: Eric Auger Acked-by: Thomas Huth Reviewed-by: Alex Benn=C3=A9e Message-Id: <20220504152025.1785704-3-eric.auger@redhat.com> Signed-off-by: Paolo Bonzini --- tests/qtest/e1000e-test.c | 6 ++++++ tests/qtest/libqos/pci.h | 1 + tests/qtest/vhost-user-blk-test.c | 10 ++++++++++ tests/qtest/virtio-blk-test.c | 5 +++++ tests/qtest/virtio-net-test.c | 5 +++++ tests/qtest/virtio-rng-test.c | 5 +++++ 6 files changed, 32 insertions(+) diff --git a/tests/qtest/e1000e-test.c b/tests/qtest/e1000e-test.c index ddd6983ede..c98779c7c0 100644 --- a/tests/qtest/e1000e-test.c +++ b/tests/qtest/e1000e-test.c @@ -233,6 +233,12 @@ static void test_e1000e_multiple_transfers(void *obj, = void *data, static void test_e1000e_hotplug(void *obj, void *data, QGuestAllocator * a= lloc) { QTestState *qts =3D global_qtest; /* TODO: get rid of global_qtest he= re */ + QE1000E_PCI *dev =3D obj; + + if (dev->pci_dev.bus->not_hotpluggable) { + g_test_skip("pci bus does not support hotplug"); + return; + } =20 qtest_qmp_device_add(qts, "e1000e", "e1000e_net", "{'addr': '0x06'}"); qpci_unplug_acpi_device_test(qts, "e1000e_net", 0x06); diff --git a/tests/qtest/libqos/pci.h b/tests/qtest/libqos/pci.h index a3c657d962..8389614523 100644 --- a/tests/qtest/libqos/pci.h +++ b/tests/qtest/libqos/pci.h @@ -52,6 +52,7 @@ struct QPCIBus { uint64_t pio_alloc_ptr, pio_limit; uint64_t mmio_alloc_ptr, mmio_limit; bool has_buggy_msi; /* TRUE for spapr, FALSE for pci */ + bool not_hotpluggable; /* TRUE if devices cannot be hotplugged */ =20 }; =20 diff --git a/tests/qtest/vhost-user-blk-test.c b/tests/qtest/vhost-user-blk= -test.c index 659b5050d8..a81c2a2715 100644 --- a/tests/qtest/vhost-user-blk-test.c +++ b/tests/qtest/vhost-user-blk-test.c @@ -676,6 +676,11 @@ static void pci_hotplug(void *obj, void *data, QGuestA= llocator *t_alloc) QVirtioPCIDevice *dev; QTestState *qts =3D dev1->pdev->bus->qts; =20 + if (dev1->pdev->bus->not_hotpluggable) { + g_test_skip("pci bus does not support hotplug"); + return; + } + /* plug secondary disk */ qtest_qmp_device_add(qts, "vhost-user-blk-pci", "drv1", "{'addr': %s, 'chardev': 'char2'}", @@ -703,6 +708,11 @@ static void multiqueue(void *obj, void *data, QGuestAl= locator *t_alloc) uint64_t features; uint16_t num_queues; =20 + if (pdev1->pdev->bus->not_hotpluggable) { + g_test_skip("bus pci.0 does not support hotplug"); + return; + } + /* * The primary device has 1 queue and VIRTIO_BLK_F_MQ is not enabled. = The * VIRTIO specification allows VIRTIO_BLK_F_MQ to be enabled when ther= e is diff --git a/tests/qtest/virtio-blk-test.c b/tests/qtest/virtio-blk-test.c index f22594a1a8..dc5eed31c8 100644 --- a/tests/qtest/virtio-blk-test.c +++ b/tests/qtest/virtio-blk-test.c @@ -701,6 +701,11 @@ static void pci_hotplug(void *obj, void *data, QGuestA= llocator *t_alloc) QVirtioPCIDevice *dev; QTestState *qts =3D dev1->pdev->bus->qts; =20 + if (dev1->pdev->bus->not_hotpluggable) { + g_test_skip("pci bus does not support hotplug"); + return; + } + /* plug secondary disk */ qtest_qmp_device_add(qts, "virtio-blk-pci", "drv1", "{'addr': %s, 'drive': 'drive1'}", diff --git a/tests/qtest/virtio-net-test.c b/tests/qtest/virtio-net-test.c index fc9f2b9498..6ded252901 100644 --- a/tests/qtest/virtio-net-test.c +++ b/tests/qtest/virtio-net-test.c @@ -173,6 +173,11 @@ static void hotplug(void *obj, void *data, QGuestAlloc= ator *t_alloc) QTestState *qts =3D dev->pdev->bus->qts; const char *arch =3D qtest_get_arch(); =20 + if (dev->pdev->bus->not_hotpluggable) { + g_test_skip("pci bus does not support hotplug"); + return; + } + qtest_qmp_device_add(qts, "virtio-net-pci", "net1", "{'addr': %s}", stringify(PCI_SLOT_HP)); =20 diff --git a/tests/qtest/virtio-rng-test.c b/tests/qtest/virtio-rng-test.c index 092ba13068..64e131cd8c 100644 --- a/tests/qtest/virtio-rng-test.c +++ b/tests/qtest/virtio-rng-test.c @@ -20,6 +20,11 @@ static void rng_hotplug(void *obj, void *data, QGuestAll= ocator *alloc) QVirtioPCIDevice *dev =3D obj; QTestState *qts =3D dev->pdev->bus->qts; =20 + if (dev->pdev->bus->not_hotpluggable) { + g_test_skip("pci bus does not support hotplug"); + return; + } + const char *arch =3D qtest_get_arch(); =20 qtest_qmp_device_add(qts, "virtio-rng-pci", "rng1", --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 12 May 2022 10:25:30 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Eric Auger Subject: [PULL 10/27] tests/qtest/libqos: Add generic pci host bridge in arm-virt machine Date: Thu, 12 May 2022 19:24:48 +0200 Message-Id: <20220512172505.1065394-11-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652377274664100003 Content-Type: text/plain; charset="utf-8" From: Eric Auger Up to now the virt-machine node contains a virtio-mmio node. However no driver produces any PCI interface node. Hence, PCI tests cannot be run with aarch64 binary. Add a GPEX driver node that produces a pci interface node. This latter then can be consumed by all the pci tests. One of the first motivation was to be able to run the virtio-iommu-pci tests. We still face an issue with pci hotplug tests as hotplug cannot happen on the pcie root bus and require a generic root port. This will be addressed later on. We force cpu=3Dmax along with aarch64/virt machine as some PCI tests require high MMIO regions to be available. Signed-off-by: Eric Auger Message-Id: <20220504152025.1785704-4-eric.auger@redhat.com> Signed-off-by: Paolo Bonzini --- tests/qtest/libqos/arm-virt-machine.c | 19 ++- tests/qtest/libqos/generic-pcihost.c | 231 ++++++++++++++++++++++++++ tests/qtest/libqos/generic-pcihost.h | 54 ++++++ tests/qtest/libqos/meson.build | 1 + 4 files changed, 301 insertions(+), 4 deletions(-) create mode 100644 tests/qtest/libqos/generic-pcihost.c create mode 100644 tests/qtest/libqos/generic-pcihost.h diff --git a/tests/qtest/libqos/arm-virt-machine.c b/tests/qtest/libqos/arm= -virt-machine.c index 2e0beaefb8..139eaba142 100644 --- a/tests/qtest/libqos/arm-virt-machine.c +++ b/tests/qtest/libqos/arm-virt-machine.c @@ -22,6 +22,8 @@ #include "malloc.h" #include "qgraph.h" #include "virtio-mmio.h" +#include "generic-pcihost.h" +#include "hw/pci/pci_regs.h" =20 #define ARM_PAGE_SIZE 4096 #define VIRTIO_MMIO_BASE_ADDR 0x0A003E00 @@ -35,6 +37,7 @@ struct QVirtMachine { QOSGraphObject obj; QGuestAllocator alloc; QVirtioMMIODevice virtio_mmio; + QGenericPCIHost bridge; }; =20 static void virt_destructor(QOSGraphObject *obj) @@ -57,11 +60,13 @@ static void *virt_get_driver(void *object, const char *= interface) static QOSGraphObject *virt_get_device(void *obj, const char *device) { QVirtMachine *machine =3D obj; - if (!g_strcmp0(device, "virtio-mmio")) { + if (!g_strcmp0(device, "generic-pcihost")) { + return &machine->bridge.obj; + } else if (!g_strcmp0(device, "virtio-mmio")) { return &machine->virtio_mmio.obj; } =20 - fprintf(stderr, "%s not present in arm/virtio\n", device); + fprintf(stderr, "%s not present in arm/virt\n", device); g_assert_not_reached(); } =20 @@ -76,16 +81,22 @@ static void *qos_create_machine_arm_virt(QTestState *qt= s) qvirtio_mmio_init_device(&machine->virtio_mmio, qts, VIRTIO_MMIO_BASE_= ADDR, VIRTIO_MMIO_SIZE); =20 + qos_create_generic_pcihost(&machine->bridge, qts, &machine->alloc); + machine->obj.get_device =3D virt_get_device; machine->obj.get_driver =3D virt_get_driver; machine->obj.destructor =3D virt_destructor; return machine; } =20 -static void virtio_mmio_register_nodes(void) +static void virt_machine_register_nodes(void) { qos_node_create_machine("arm/virt", qos_create_machine_arm_virt); qos_node_contains("arm/virt", "virtio-mmio", NULL); + + qos_node_create_machine_args("aarch64/virt", qos_create_machine_arm_vi= rt, + " -cpu max"); + qos_node_contains("aarch64/virt", "generic-pcihost", NULL); } =20 -libqos_init(virtio_mmio_register_nodes); +libqos_init(virt_machine_register_nodes); diff --git a/tests/qtest/libqos/generic-pcihost.c b/tests/qtest/libqos/gene= ric-pcihost.c new file mode 100644 index 0000000000..3124b0e46b --- /dev/null +++ b/tests/qtest/libqos/generic-pcihost.c @@ -0,0 +1,231 @@ +/* + * libqos PCI bindings for generic PCI + * + * Copyright Red Hat Inc., 2022 + * + * Authors: + * Eric Auger + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "../libqtest.h" +#include "generic-pcihost.h" +#include "qapi/qmp/qdict.h" +#include "hw/pci/pci_regs.h" +#include "qemu/host-utils.h" + +#include "qemu/module.h" + +/* QGenericPCIHost */ + +QOSGraphObject *generic_pcihost_get_device(void *obj, const char *device) +{ + QGenericPCIHost *host =3D obj; + if (!g_strcmp0(device, "pci-bus-generic")) { + return &host->pci.obj; + } + fprintf(stderr, "%s not present in generic-pcihost\n", device); + g_assert_not_reached(); +} + +void qos_create_generic_pcihost(QGenericPCIHost *host, + QTestState *qts, + QGuestAllocator *alloc) +{ + host->obj.get_device =3D generic_pcihost_get_device; + qpci_init_generic(&host->pci, qts, alloc, false); +} + +static uint8_t qpci_generic_pio_readb(QPCIBus *bus, uint32_t addr) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + return qtest_readb(bus->qts, s->gpex_pio_base + addr); +} + +static void qpci_generic_pio_writeb(QPCIBus *bus, uint32_t addr, uint8_t v= al) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + qtest_writeb(bus->qts, s->gpex_pio_base + addr, val); +} + +static uint16_t qpci_generic_pio_readw(QPCIBus *bus, uint32_t addr) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + return qtest_readw(bus->qts, s->gpex_pio_base + addr); +} + +static void qpci_generic_pio_writew(QPCIBus *bus, uint32_t addr, uint16_t = val) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + qtest_writew(bus->qts, s->gpex_pio_base + addr, val); +} + +static uint32_t qpci_generic_pio_readl(QPCIBus *bus, uint32_t addr) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + return qtest_readl(bus->qts, s->gpex_pio_base + addr); +} + +static void qpci_generic_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t = val) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + qtest_writel(bus->qts, s->gpex_pio_base + addr, val); +} + +static uint64_t qpci_generic_pio_readq(QPCIBus *bus, uint32_t addr) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + return qtest_readq(bus->qts, s->gpex_pio_base + addr); +} + +static void qpci_generic_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t = val) +{ + QGenericPCIBus *s =3D container_of(bus, QGenericPCIBus, bus); + + qtest_writeq(bus->qts, s->gpex_pio_base + addr, val); +} + +static void qpci_generic_memread(QPCIBus *bus, uint32_t addr, void *buf, s= ize_t len) +{ + qtest_memread(bus->qts, addr, buf, len); +} + +static void qpci_generic_memwrite(QPCIBus *bus, uint32_t addr, + const void *buf, size_t len) +{ + qtest_memwrite(bus->qts, addr, buf, len); +} + +static uint8_t qpci_generic_config_readb(QPCIBus *bus, int devfn, uint8_t = offset) +{ + QGenericPCIBus *gbus =3D container_of(bus, QGenericPCIBus, bus); + uint64_t addr =3D gbus->ecam_alloc_ptr + ((0 << 20) | (devfn << 12) | = offset); + uint8_t val; + + qtest_memread(bus->qts, addr, &val, 1); + return val; +} + +static uint16_t qpci_generic_config_readw(QPCIBus *bus, int devfn, uint8_t= offset) +{ + QGenericPCIBus *gbus =3D container_of(bus, QGenericPCIBus, bus); + uint64_t addr =3D gbus->ecam_alloc_ptr + ((0 << 20) | (devfn << 12) | = offset); + uint16_t val; + + qtest_memread(bus->qts, addr, &val, 2); + return le16_to_cpu(val); +} + +static uint32_t qpci_generic_config_readl(QPCIBus *bus, int devfn, uint8_t= offset) +{ + QGenericPCIBus *gbus =3D container_of(bus, QGenericPCIBus, bus); + uint64_t addr =3D gbus->ecam_alloc_ptr + ((0 << 20) | (devfn << 12) | = offset); + uint32_t val; + + qtest_memread(bus->qts, addr, &val, 4); + return le32_to_cpu(val); +} + +static void +qpci_generic_config_writeb(QPCIBus *bus, int devfn, uint8_t offset, uint8_= t value) +{ + QGenericPCIBus *gbus =3D container_of(bus, QGenericPCIBus, bus); + uint64_t addr =3D gbus->ecam_alloc_ptr + ((0 << 20) | (devfn << 12) | = offset); + + qtest_memwrite(bus->qts, addr, &value, 1); +} + +static void +qpci_generic_config_writew(QPCIBus *bus, int devfn, uint8_t offset, uint16= _t value) +{ + QGenericPCIBus *gbus =3D container_of(bus, QGenericPCIBus, bus); + uint64_t addr =3D gbus->ecam_alloc_ptr + ((0 << 20) | (devfn << 12) | = offset); + uint16_t val =3D cpu_to_le16(value); + + qtest_memwrite(bus->qts, addr, &val, 2); +} + +static void +qpci_generic_config_writel(QPCIBus *bus, int devfn, uint8_t offset, uint32= _t value) +{ + QGenericPCIBus *gbus =3D container_of(bus, QGenericPCIBus, bus); + uint64_t addr =3D gbus->ecam_alloc_ptr + ((0 << 20) | (devfn << 12) | = offset); + uint32_t val =3D cpu_to_le32(value); + + qtest_memwrite(bus->qts, addr, &val, 4); +} + +static void *qpci_generic_get_driver(void *obj, const char *interface) +{ + QGenericPCIBus *qpci =3D obj; + if (!g_strcmp0(interface, "pci-bus")) { + return &qpci->bus; + } + fprintf(stderr, "%s not present in pci-bus-generic\n", interface); + g_assert_not_reached(); +} + +void qpci_init_generic(QGenericPCIBus *qpci, QTestState *qts, + QGuestAllocator *alloc, bool hotpluggable) +{ + assert(qts); + + qpci->gpex_pio_base =3D 0x3eff0000; + qpci->bus.not_hotpluggable =3D !hotpluggable; + qpci->bus.has_buggy_msi =3D false; + + qpci->bus.pio_readb =3D qpci_generic_pio_readb; + qpci->bus.pio_readw =3D qpci_generic_pio_readw; + qpci->bus.pio_readl =3D qpci_generic_pio_readl; + qpci->bus.pio_readq =3D qpci_generic_pio_readq; + + qpci->bus.pio_writeb =3D qpci_generic_pio_writeb; + qpci->bus.pio_writew =3D qpci_generic_pio_writew; + qpci->bus.pio_writel =3D qpci_generic_pio_writel; + qpci->bus.pio_writeq =3D qpci_generic_pio_writeq; + + qpci->bus.memread =3D qpci_generic_memread; + qpci->bus.memwrite =3D qpci_generic_memwrite; + + qpci->bus.config_readb =3D qpci_generic_config_readb; + qpci->bus.config_readw =3D qpci_generic_config_readw; + qpci->bus.config_readl =3D qpci_generic_config_readl; + + qpci->bus.config_writeb =3D qpci_generic_config_writeb; + qpci->bus.config_writew =3D qpci_generic_config_writew; + qpci->bus.config_writel =3D qpci_generic_config_writel; + + qpci->bus.qts =3D qts; + qpci->bus.pio_alloc_ptr =3D 0x0000; + qpci->bus.pio_limit =3D 0x10000; + qpci->bus.mmio_alloc_ptr =3D 0x10000000; + qpci->bus.mmio_limit =3D 0x2eff0000; + qpci->ecam_alloc_ptr =3D 0x4010000000; + + qpci->obj.get_driver =3D qpci_generic_get_driver; +} + +static void qpci_generic_register_nodes(void) +{ + qos_node_create_driver("pci-bus-generic", NULL); + qos_node_produces("pci-bus-generic", "pci-bus"); +} + +static void qpci_generic_pci_register_nodes(void) +{ + qos_node_create_driver("generic-pcihost", NULL); + qos_node_contains("generic-pcihost", "pci-bus-generic", NULL); +} + +libqos_init(qpci_generic_register_nodes); +libqos_init(qpci_generic_pci_register_nodes); diff --git a/tests/qtest/libqos/generic-pcihost.h b/tests/qtest/libqos/gene= ric-pcihost.h new file mode 100644 index 0000000000..c693c769df --- /dev/null +++ b/tests/qtest/libqos/generic-pcihost.h @@ -0,0 +1,54 @@ +/* + * libqos Generic PCI bindings and generic pci host bridge + * + * Copyright Red Hat Inc., 2022 + * + * Authors: + * Eric Auger + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#ifndef LIBQOS_GENERIC_PCIHOST_H +#define LIBQOS_GENERIC_PCIHOST_H + +#include "pci.h" +#include "malloc.h" +#include "qgraph.h" + +typedef struct QGenericPCIBus { + QOSGraphObject obj; + QPCIBus bus; + uint64_t gpex_pio_base; + uint64_t ecam_alloc_ptr; +} QGenericPCIBus; + +/* + * qpci_init_generic(): + * @ret: A valid QGenericPCIBus * pointer + * @qts: The %QTestState + * @alloc: A previously initialized @alloc providing memory for @qts + * @bool: devices can be hotplugged on this bus + * + * This function initializes an already allocated + * QGenericPCIBus object. + */ +void qpci_init_generic(QGenericPCIBus *ret, QTestState *qts, + QGuestAllocator *alloc, bool hotpluggable); + +/* QGenericPCIHost */ + +typedef struct QGenericPCIHost QGenericPCIHost; + +struct QGenericPCIHost { + QOSGraphObject obj; + QGenericPCIBus pci; +}; + +QOSGraphObject *generic_pcihost_get_device(void *obj, const char *device); +void qos_create_generic_pcihost(QGenericPCIHost *host, + QTestState *qts, + QGuestAllocator *alloc); + +#endif diff --git a/tests/qtest/libqos/meson.build b/tests/qtest/libqos/meson.build index 9f292339f9..fd5d6e5ae1 100644 --- a/tests/qtest/libqos/meson.build +++ b/tests/qtest/libqos/meson.build @@ -45,6 +45,7 @@ libqos_srcs =3D files( 'virtio-scsi.c', 'virtio-serial.c', 'virtio-iommu.c', + 'generic-pcihost.c', =20 # qgraph machines: 'aarch64-xlnx-zcu102-machine.c', --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Thu, 12 May 2022 10:25:32 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 11/27] machine: use QAPI struct for boot configuration Date: Thu, 12 May 2022 19:24:49 +0200 Message-Id: <20220512172505.1065394-12-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378118609100001 Content-Type: text/plain; charset="utf-8" As part of converting -boot to a property with a QAPI type, define the struct and use it throughout QEMU to access boot configuration. machine_boot_parse takes care of doing the QemuOpts->QAPI conversion by hand, for now. Signed-off-by: Paolo Bonzini Message-Id: <20220414165300.555321-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- hw/arm/nseries.c | 2 +- hw/core/machine.c | 68 +++++++++++++++++++++++++++++++++++++++-- hw/hppa/machine.c | 6 ++-- hw/i386/pc.c | 2 +- hw/nvram/fw_cfg.c | 27 +++++----------- hw/ppc/mac_newworld.c | 2 +- hw/ppc/mac_oldworld.c | 2 +- hw/ppc/prep.c | 2 +- hw/ppc/spapr.c | 4 +-- hw/s390x/ipl.c | 20 ++++-------- hw/sparc/sun4m.c | 4 +-- hw/sparc64/sun4u.c | 4 +-- include/hw/boards.h | 4 +-- include/sysemu/sysemu.h | 2 -- qapi/machine.json | 30 ++++++++++++++++++ softmmu/bootdevice.c | 3 +- softmmu/globals.c | 2 -- softmmu/vl.c | 25 +-------------- 18 files changed, 127 insertions(+), 82 deletions(-) diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index 9c1cafae86..692c94ceb4 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -1365,7 +1365,7 @@ static void n8x0_init(MachineState *machine, } =20 if (option_rom[0].name && - (machine->boot_order[0] =3D=3D 'n' || !machine->kernel_filename)) { + (machine->boot_config.order[0] =3D=3D 'n' || !machine->kernel_file= name)) { uint8_t *nolo_tags =3D g_new(uint8_t, 0x10000); /* No, wait, better start at the ROM. */ s->mpu->cpu->env.regs[15] =3D OMAP2_Q2_BASE + 0x400000; diff --git a/hw/core/machine.c b/hw/core/machine.c index 700c1e76b8..b3deb8146f 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -784,6 +784,68 @@ static void machine_set_smp(Object *obj, Visitor *v, c= onst char *name, machine_parse_smp_config(ms, config, errp); } =20 +void machine_boot_parse(MachineState *ms, QemuOpts *opts, Error **errp) +{ + MachineClass *machine_class =3D MACHINE_GET_CLASS(ms); + const char *s; + ERRP_GUARD(); + + ms->boot_config =3D (BootConfiguration) { + .has_order =3D true, + .order =3D (char *)machine_class->default_boot_order, + .has_strict =3D true, + .strict =3D false, + }; + if (!opts) { + return; + } + + s =3D qemu_opt_get(opts, "order"); + if (s) { + validate_bootdevices(s, errp); + if (*errp) { + return; + } + ms->boot_config.order =3D (char *)s; + } + + s =3D qemu_opt_get(opts, "once"); + if (s) { + validate_bootdevices(s, errp); + if (*errp) { + return; + } + ms->boot_config.has_once =3D true; + ms->boot_config.once =3D (char *)s; + } + + s =3D qemu_opt_get(opts, "splash"); + if (s) { + ms->boot_config.has_splash =3D true; + ms->boot_config.splash =3D (char *)s; + } + + s =3D qemu_opt_get(opts, "splash-time"); + if (s) { + ms->boot_config.has_splash_time =3D true; + ms->boot_config.splash_time =3D qemu_opt_get_number(opts, "splash-= time", -1); + } + + s =3D qemu_opt_get(opts, "reboot-timeout"); + if (s) { + ms->boot_config.has_reboot_timeout =3D true; + ms->boot_config.reboot_timeout =3D qemu_opt_get_number(opts, "rebo= ot-timeout", -1); + } + + s =3D qemu_opt_get(opts, "menu"); + if (s) { + ms->boot_config.has_menu =3D true; + ms->boot_config.menu =3D qemu_opt_get_bool(opts, "menu", false); + } + + ms->boot_config.strict =3D qemu_opt_get_bool(opts, "strict", false); +} + static void machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1229,9 +1291,9 @@ void qdev_machine_creation_done(void) { cpu_synchronize_all_post_init(); =20 - if (current_machine->boot_once) { - qemu_boot_set(current_machine->boot_once, &error_fatal); - qemu_register_reset(restore_boot_order, g_strdup(current_machine->= boot_order)); + if (current_machine->boot_config.has_once) { + qemu_boot_set(current_machine->boot_config.once, &error_fatal); + qemu_register_reset(restore_boot_order, g_strdup(current_machine->= boot_config.order)); } =20 /* diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 4d054ca869..d1e174b1f4 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -147,7 +147,7 @@ static FWCfgState *create_fw_cfg(MachineState *ms) fw_cfg_add_file(fw_cfg, "/etc/power-button-addr", g_memdup(&val, sizeof(val)), sizeof(val)); =20 - fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]); + fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); =20 return fw_cfg; @@ -391,8 +391,8 @@ static void machine_hppa_init(MachineState *machine) * mode (kernel_entry=3D1), and to boot from CD (gr[24]=3D'd') * or hard disc * (gr[24]=3D'c'). */ - kernel_entry =3D boot_menu ? 1 : 0; - cpu[0]->env.gr[24] =3D machine->boot_order[0]; + kernel_entry =3D machine->boot_config.has_menu ? machine->boot_con= fig.menu : 0; + cpu[0]->env.gr[24] =3D machine->boot_config.order[0]; } =20 /* We jump to the firmware entry routine and pass the diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 23bba9d82c..305d2c0820 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -675,7 +675,7 @@ void pc_cmos_init(PCMachineState *pcms, object_property_set_link(OBJECT(pcms), "rtc_state", OBJECT(s), &error_abort); =20 - set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal); + set_boot_dev(s, MACHINE(pcms)->boot_config.order, &error_fatal); =20 val =3D 0; val |=3D 0x02; /* FPU is there */ diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 4125cbebcd..d605f3f45a 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -178,21 +178,13 @@ error: =20 static void fw_cfg_bootsplash(FWCfgState *s) { - const char *boot_splash_filename =3D NULL; - const char *boot_splash_time =3D NULL; char *filename, *file_data; gsize file_size; int file_type; =20 - /* get user configuration */ - QemuOptsList *plist =3D qemu_find_opts("boot-opts"); - QemuOpts *opts =3D QTAILQ_FIRST(&plist->head); - boot_splash_filename =3D qemu_opt_get(opts, "splash"); - boot_splash_time =3D qemu_opt_get(opts, "splash-time"); - /* insert splash time if user configurated */ - if (boot_splash_time) { - int64_t bst_val =3D qemu_opt_get_number(opts, "splash-time", -1); + if (current_machine->boot_config.has_splash_time) { + int64_t bst_val =3D current_machine->boot_config.splash_time; uint16_t bst_le16; =20 /* validate the input */ @@ -208,7 +200,8 @@ static void fw_cfg_bootsplash(FWCfgState *s) } =20 /* insert splash file if user configurated */ - if (boot_splash_filename) { + if (current_machine->boot_config.has_splash) { + const char *boot_splash_filename =3D current_machine->boot_config.= splash; filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, boot_splash_filen= ame); if (filename =3D=3D NULL) { error_report("failed to find file '%s'", boot_splash_filename); @@ -238,17 +231,11 @@ static void fw_cfg_bootsplash(FWCfgState *s) =20 static void fw_cfg_reboot(FWCfgState *s) { - const char *reboot_timeout =3D NULL; uint64_t rt_val =3D -1; uint32_t rt_le32; =20 - /* get user configuration */ - QemuOptsList *plist =3D qemu_find_opts("boot-opts"); - QemuOpts *opts =3D QTAILQ_FIRST(&plist->head); - reboot_timeout =3D qemu_opt_get(opts, "reboot-timeout"); - - if (reboot_timeout) { - rt_val =3D qemu_opt_get_number(opts, "reboot-timeout", -1); + if (current_machine->boot_config.has_reboot_timeout) { + rt_val =3D current_machine->boot_config.reboot_timeout; =20 /* validate the input */ if (rt_val > 0xffff && rt_val !=3D (uint64_t)-1) { @@ -1133,7 +1120,7 @@ static void fw_cfg_common_realize(DeviceState *dev, E= rror **errp) fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (char *)"QEMU", 4); fw_cfg_add_bytes(s, FW_CFG_UUID, &qemu_uuid, 16); fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)!machine->enable_graphic= s); - fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu); + fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)(machine->boot_config.ha= s_menu && machine->boot_config.menu)); fw_cfg_bootsplash(s); fw_cfg_reboot(s); =20 diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index e8ef1a9e5d..c865921bdc 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -111,7 +111,7 @@ static void ppc_core99_init(MachineState *machine) const char *kernel_filename =3D machine->kernel_filename; const char *kernel_cmdline =3D machine->kernel_cmdline; const char *initrd_filename =3D machine->initrd_filename; - const char *boot_device =3D machine->boot_order; + const char *boot_device =3D machine->boot_config.order; Core99MachineState *core99_machine =3D CORE99_MACHINE(machine); PowerPCCPU *cpu =3D NULL; CPUPPCState *env =3D NULL; diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index fe2adb057b..d62fdf0db3 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -82,7 +82,7 @@ static void ppc_heathrow_init(MachineState *machine) { ram_addr_t ram_size =3D machine->ram_size; const char *bios_name =3D machine->firmware ?: PROM_FILENAME; - const char *boot_device =3D machine->boot_order; + const char *boot_device =3D machine->boot_config.order; PowerPCCPU *cpu =3D NULL; CPUPPCState *env =3D NULL; char *filename; diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index bf622aa38f..a1cd4505cc 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -381,7 +381,7 @@ static void ibm_40p_init(MachineState *machine) } boot_device =3D 'm'; } else { - boot_device =3D machine->boot_order[0]; + boot_device =3D machine->boot_config.order[0]; } =20 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpu= s); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 8bbae68e1b..6de800524a 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1044,8 +1044,8 @@ static void spapr_dt_chosen(SpaprMachineState *spapr,= void *fdt, bool reset) _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel-le", NULL,= 0)); } } - if (boot_menu) { - _FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", boot_men= u))); + if (machine->boot_config.has_menu && machine->boot_config.menu) { + _FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", true))); } _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-width", graphic_w= idth)); _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-height", graphic_= height)); diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 4b5eb77afd..8612684d48 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -290,13 +290,10 @@ static Property s390_ipl_properties[] =3D { =20 static void s390_ipl_set_boot_menu(S390IPLState *ipl) { - QemuOptsList *plist =3D qemu_find_opts("boot-opts"); - QemuOpts *opts =3D QTAILQ_FIRST(&plist->head); - const char *tmp; unsigned long splash_time =3D 0; =20 if (!get_boot_device(0)) { - if (boot_menu) { + if (current_machine->boot_config.has_menu && current_machine->boot= _config.menu) { error_report("boot menu requires a bootindex to be specified f= or " "the IPL device"); } @@ -306,7 +303,7 @@ static void s390_ipl_set_boot_menu(S390IPLState *ipl) switch (ipl->iplb.pbt) { case S390_IPL_TYPE_CCW: /* In the absence of -boot menu, use zipl parameters */ - if (!qemu_opt_get(opts, "menu")) { + if (!current_machine->boot_config.has_menu) { ipl->qipl.qipl_flags |=3D QIPL_FLAG_BM_OPTS_ZIPL; return; } @@ -314,26 +311,21 @@ static void s390_ipl_set_boot_menu(S390IPLState *ipl) case S390_IPL_TYPE_QEMU_SCSI: break; default: - if (boot_menu) { + if (current_machine->boot_config.has_menu && current_machine->boot= _config.menu) { error_report("boot menu is not supported for this device type"= ); } return; } =20 - if (!boot_menu) { + if (!current_machine->boot_config.has_menu || !current_machine->boot_c= onfig.menu) { return; } =20 ipl->qipl.qipl_flags |=3D QIPL_FLAG_BM_OPTS_CMD; =20 - tmp =3D qemu_opt_get(opts, "splash-time"); - - if (tmp && qemu_strtoul(tmp, NULL, 10, &splash_time)) { - error_report("splash-time is invalid, forcing it to 0"); - ipl->qipl.boot_menu_timeout =3D 0; - return; + if (current_machine->boot_config.has_splash_time) { + splash_time =3D current_machine->boot_config.splash_time; } - if (splash_time > 0xffffffff) { error_report("splash-time is too large, forcing it to max value"); ipl->qipl.boot_menu_timeout =3D 0xffffffff; diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index b693eea0e0..9d57491f68 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -1050,7 +1050,7 @@ static void sun4m_hw_init(MachineState *machine) machine->ram_size, &initrd_size); =20 nvram_init(nvram, (uint8_t *)&nd->macaddr, machine->kernel_cmdline, - machine->boot_order, machine->ram_size, kernel_size, + machine->boot_config.order, machine->ram_size, kernel_size, graphic_width, graphic_height, graphic_depth, hwdef->nvram_machine_id, "Sun4m"); =20 @@ -1091,7 +1091,7 @@ static void sun4m_hw_init(MachineState *machine) } fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR); fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); - fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_order[0]); + fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_config.order[= 0]); qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); } =20 diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 7c461d194a..d1bc77d27e 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -695,7 +695,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, &kernel_addr, &kernel_entry); =20 sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", machine->ram_size, - machine->boot_order, + machine->boot_config.order, kernel_addr, kernel_size, machine->kernel_cmdline, initrd_addr, initrd_size, @@ -727,7 +727,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, } fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); - fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_order[0]); + fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_config.order[= 0]); =20 fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_WIDTH, graphic_width); fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_HEIGHT, graphic_height); diff --git a/include/hw/boards.h b/include/hw/boards.h index d64b5481e8..6cda7e4308 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -26,6 +26,7 @@ OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE) extern MachineState *current_machine; =20 void machine_run_board_init(MachineState *machine); +void machine_boot_parse(MachineState *ms, QemuOpts *opts, Error **errp); bool machine_usb(MachineState *machine); int machine_phandle_start(MachineState *machine); bool machine_dump_guest_core(MachineState *machine); @@ -350,8 +351,7 @@ struct MachineState { ram_addr_t ram_size; ram_addr_t maxram_size; uint64_t ram_slots; - const char *boot_order; - const char *boot_once; + BootConfiguration boot_config; char *kernel_filename; char *kernel_cmdline; char *initrd_filename; diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 360a408edf..b4030acd74 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -46,8 +46,6 @@ extern int alt_grab; extern int ctrl_grab; extern int graphic_rotate; extern int old_param; -extern int boot_menu; -extern bool boot_strict; extern uint8_t *boot_splash_filedata; extern bool enable_mlock; extern bool enable_cpu_pm; diff --git a/qapi/machine.json b/qapi/machine.json index 4c417e32a5..e3dcf5a119 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -1395,6 +1395,36 @@ 'data': { 'device': 'str', 'msg': 'str' }, 'features': ['deprecated'] } =20 +## +# @BootConfiguration: +# +# Schema for virtual machine boot configuration. +# +# @order: Boot order (a=3Dfloppy, c=3Dhard disk, d=3DCD-ROM, n=3Dnetwork) +# +# @once: Boot order to apply on first boot +# +# @menu: Whether to show a boot menu +# +# @splash: The name of the file to be passed to the firmware as logo pictu= re, if @menu is true. +# +# @splash-time: How long to show the logo picture, in milliseconds +# +# @reboot-timeout: Timeout before guest reboots after boot fails +# +# @strict: Whether to attempt booting from devices not included in the boo= t order +# +# Since: 7.1 +## +{ 'struct': 'BootConfiguration', 'data': { + '*order': 'str', + '*once': 'str', + '*menu': 'bool', + '*splash': 'str', + '*splash-time': 'int', + '*reboot-timeout': 'int', + '*strict': 'bool' } } + ## # @SMPConfiguration: # diff --git a/softmmu/bootdevice.c b/softmmu/bootdevice.c index c0713bfa9f..2106f1026f 100644 --- a/softmmu/bootdevice.c +++ b/softmmu/bootdevice.c @@ -268,7 +268,8 @@ char *get_boot_devices_list(size_t *size) =20 *size =3D total; =20 - if (boot_strict && *size > 0) { + if (current_machine->boot_config.has_strict && + current_machine->boot_config.strict && *size > 0) { list[total-1] =3D '\n'; list =3D g_realloc(list, total + 5); memcpy(&list[total], "HALT", 5); diff --git a/softmmu/globals.c b/softmmu/globals.c index 98b64e0492..916bc12e2b 100644 --- a/softmmu/globals.c +++ b/softmmu/globals.c @@ -54,8 +54,6 @@ int alt_grab; int ctrl_grab; unsigned int nb_prom_envs; const char *prom_envs[MAX_PROM_ENVS]; -int boot_menu; -bool boot_strict; uint8_t *boot_splash_filedata; int only_migratable; /* turn it off unless user states otherwise */ int icount_align_option; diff --git a/softmmu/vl.c b/softmmu/vl.c index 488cc4d09e..dd90df3ed1 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -1884,9 +1884,6 @@ static bool object_create_early(const char *type) =20 static void qemu_apply_machine_options(QDict *qdict) { - MachineClass *machine_class =3D MACHINE_GET_CLASS(current_machine); - const char *boot_order =3D NULL; - const char *boot_once =3D NULL; QemuOpts *opts; =20 object_set_properties_from_keyval(OBJECT(current_machine), qdict, fals= e, &error_fatal); @@ -1895,27 +1892,7 @@ static void qemu_apply_machine_options(QDict *qdict) current_machine->ram_slots =3D ram_slots; =20 opts =3D qemu_opts_find(qemu_find_opts("boot-opts"), NULL); - if (opts) { - boot_order =3D qemu_opt_get(opts, "order"); - if (boot_order) { - validate_bootdevices(boot_order, &error_fatal); - } - - boot_once =3D qemu_opt_get(opts, "once"); - if (boot_once) { - validate_bootdevices(boot_once, &error_fatal); - } - - boot_menu =3D qemu_opt_get_bool(opts, "menu", boot_menu); - boot_strict =3D qemu_opt_get_bool(opts, "strict", false); - } - - if (!boot_order) { - boot_order =3D machine_class->default_boot_order; - } - - current_machine->boot_order =3D boot_order; - current_machine->boot_once =3D boot_once; + machine_boot_parse(current_machine, opts, &error_fatal); =20 if (semihosting_enabled() && !semihosting_get_argc()) { /* fall back to the -kernel/-append */ --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 12 May 2022 10:25:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz3lgSbvWxHDQOLHqjfGgFuWG/02q6NUf9yWCRx1GZtsI8/nAluBfgOe9kVVKLly1jdI8NJiQ== X-Received: by 2002:a17:907:8a0f:b0:6f4:3eeb:90db with SMTP id sc15-20020a1709078a0f00b006f43eeb90dbmr830566ejc.27.1652376334226; Thu, 12 May 2022 10:25:34 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 12/27] machine: add boot compound property Date: Thu, 12 May 2022 19:24:50 +0200 Message-Id: <20220512172505.1065394-13-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378050250100001 Content-Type: text/plain; charset="utf-8" Make -boot syntactic sugar for a compound property "-machine boot.{order,me= nu,...}". machine_boot_parse is replaced by the setter for the property. Signed-off-by: Paolo Bonzini Message-Id: <20220414165300.555321-3-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- hw/core/machine.c | 100 +++++++++++++++++++++++--------------------- include/hw/boards.h | 1 - softmmu/vl.c | 16 +++---- 3 files changed, 58 insertions(+), 59 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index b3deb8146f..8cea94537d 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -784,66 +784,63 @@ static void machine_set_smp(Object *obj, Visitor *v, = const char *name, machine_parse_smp_config(ms, config, errp); } =20 -void machine_boot_parse(MachineState *ms, QemuOpts *opts, Error **errp) +static void machine_get_boot(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + MachineState *ms =3D MACHINE(obj); + BootConfiguration *config =3D &ms->boot_config; + visit_type_BootConfiguration(v, name, &config, &error_abort); +} + +static void machine_free_boot_config(MachineState *ms) +{ + g_free(ms->boot_config.order); + g_free(ms->boot_config.once); + g_free(ms->boot_config.splash); +} + +static void machine_copy_boot_config(MachineState *ms, BootConfiguration *= config) { MachineClass *machine_class =3D MACHINE_GET_CLASS(ms); - const char *s; - ERRP_GUARD(); =20 - ms->boot_config =3D (BootConfiguration) { - .has_order =3D true, - .order =3D (char *)machine_class->default_boot_order, - .has_strict =3D true, - .strict =3D false, - }; - if (!opts) { + machine_free_boot_config(ms); + ms->boot_config =3D *config; + if (!config->has_order) { + ms->boot_config.has_order =3D true; + ms->boot_config.order =3D g_strdup(machine_class->default_boot_ord= er); + } +} + +static void machine_set_boot(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + ERRP_GUARD(); + MachineState *ms =3D MACHINE(obj); + BootConfiguration *config =3D NULL; + + if (!visit_type_BootConfiguration(v, name, &config, errp)) { return; } - - s =3D qemu_opt_get(opts, "order"); - if (s) { - validate_bootdevices(s, errp); + if (config->has_order) { + validate_bootdevices(config->order, errp); if (*errp) { - return; + goto out_free; } - ms->boot_config.order =3D (char *)s; } - - s =3D qemu_opt_get(opts, "once"); - if (s) { - validate_bootdevices(s, errp); + if (config->has_once) { + validate_bootdevices(config->once, errp); if (*errp) { - return; + goto out_free; } - ms->boot_config.has_once =3D true; - ms->boot_config.once =3D (char *)s; } =20 - s =3D qemu_opt_get(opts, "splash"); - if (s) { - ms->boot_config.has_splash =3D true; - ms->boot_config.splash =3D (char *)s; - } + machine_copy_boot_config(ms, config); + /* Strings live in ms->boot_config. */ + free(config); + return; =20 - s =3D qemu_opt_get(opts, "splash-time"); - if (s) { - ms->boot_config.has_splash_time =3D true; - ms->boot_config.splash_time =3D qemu_opt_get_number(opts, "splash-= time", -1); - } - - s =3D qemu_opt_get(opts, "reboot-timeout"); - if (s) { - ms->boot_config.has_reboot_timeout =3D true; - ms->boot_config.reboot_timeout =3D qemu_opt_get_number(opts, "rebo= ot-timeout", -1); - } - - s =3D qemu_opt_get(opts, "menu"); - if (s) { - ms->boot_config.has_menu =3D true; - ms->boot_config.menu =3D qemu_opt_get_bool(opts, "menu", false); - } - - ms->boot_config.strict =3D qemu_opt_get_bool(opts, "strict", false); +out_free: + qapi_free_BootConfiguration(config); } =20 static void machine_class_init(ObjectClass *oc, void *data) @@ -884,6 +881,12 @@ static void machine_class_init(ObjectClass *oc, void *= data) object_class_property_set_description(oc, "dumpdtb", "Dump current dtb to a file and quit"); =20 + object_class_property_add(oc, "boot", "BootConfiguration", + machine_get_boot, machine_set_boot, + NULL, NULL); + object_class_property_set_description(oc, "boot", + "Boot configuration"); + object_class_property_add(oc, "smp", "SMPConfiguration", machine_get_smp, machine_set_smp, NULL, NULL); @@ -1017,12 +1020,15 @@ static void machine_initfn(Object *obj) ms->smp.clusters =3D 1; ms->smp.cores =3D 1; ms->smp.threads =3D 1; + + machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); } =20 static void machine_finalize(Object *obj) { MachineState *ms =3D MACHINE(obj); =20 + machine_free_boot_config(ms); g_free(ms->kernel_filename); g_free(ms->initrd_filename); g_free(ms->kernel_cmdline); diff --git a/include/hw/boards.h b/include/hw/boards.h index 6cda7e4308..910c3ffde2 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -26,7 +26,6 @@ OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE) extern MachineState *current_machine; =20 void machine_run_board_init(MachineState *machine); -void machine_boot_parse(MachineState *ms, QemuOpts *opts, Error **errp); bool machine_usb(MachineState *machine); int machine_phandle_start(MachineState *machine); bool machine_dump_guest_core(MachineState *machine); diff --git a/softmmu/vl.c b/softmmu/vl.c index dd90df3ed1..13ae31e92f 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -1884,16 +1884,11 @@ static bool object_create_early(const char *type) =20 static void qemu_apply_machine_options(QDict *qdict) { - QemuOpts *opts; - object_set_properties_from_keyval(OBJECT(current_machine), qdict, fals= e, &error_fatal); current_machine->ram_size =3D ram_size; current_machine->maxram_size =3D maxram_size; current_machine->ram_slots =3D ram_slots; =20 - opts =3D qemu_opts_find(qemu_find_opts("boot-opts"), NULL); - machine_boot_parse(current_machine, opts, &error_fatal); - if (semihosting_enabled() && !semihosting_get_argc()) { /* fall back to the -kernel/-append */ semihosting_arg_fallback(current_machine->kernel_filename, current= _machine->kernel_cmdline); @@ -2189,7 +2184,8 @@ static bool is_qemuopts_group(const char *group) { if (g_str_equal(group, "object") || g_str_equal(group, "machine") || - g_str_equal(group, "smp-opts")) { + g_str_equal(group, "smp-opts") || + g_str_equal(group, "boot-opts")) { return false; } return true; @@ -2211,6 +2207,8 @@ static void qemu_record_config_group(const char *grou= p, QDict *dict, keyval_merge(machine_opts_dict, dict, errp); } else if (g_str_equal(group, "smp-opts")) { machine_merge_property("smp", dict, &error_fatal); + } else if (g_str_equal(group, "boot-opts")) { + machine_merge_property("boot", dict, &error_fatal); } else { abort(); } @@ -2956,11 +2954,7 @@ void qemu_init(int argc, char **argv, char **envp) drive_add(IF_DEFAULT, 2, optarg, CDROM_OPTS); break; case QEMU_OPTION_boot: - opts =3D qemu_opts_parse_noisily(qemu_find_opts("boot-opts= "), - optarg, true); - if (!opts) { - exit(1); - } + machine_parse_property_opt(qemu_find_opts("boot-opts"), "b= oot", optarg); break; case QEMU_OPTION_fda: case QEMU_OPTION_fdb: --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652378398; cv=none; d=zohomail.com; s=zohoarc; b=XpOr9UbWnak1FtJ4BOztn9R99VARTns4df+uJMQBUzPAT8VOctPU74UVfZoah2jLB6LsAzaYRrKw90ylA/fxMOv7pLoKMzsg37Et99fDgAgG3mE39BUq9Dd4hzy61/mCZZuTfrM6ZI3Y6GjoNQIs2ug46FsfFmcaqhv0VPjtmUM= ARC-Message-Signature: i=1; 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Thu, 12 May 2022 10:25:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxr1lk3GOs7GUtMJZr+TUAVepshMs1PLO+AYYLlcZvPDUWiyP4Bx29+Ty6K8Xe8BTbWtgS5TA== X-Received: by 2002:a17:907:d01:b0:6f4:d873:d7a0 with SMTP id gn1-20020a1709070d0100b006f4d873d7a0mr827396ejc.717.1652376336107; Thu, 12 May 2022 10:25:36 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 13/27] machine: add mem compound property Date: Thu, 12 May 2022 19:24:51 +0200 Message-Id: <20220512172505.1065394-14-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378400309100001 Content-Type: text/plain; charset="utf-8" Make -m syntactic sugar for a compound property "-machine mem.{size,max-size,slots}". The new property does not have the magic conversion to megabytes of unsuffixed arguments, and also does not understand that "0" means the default size (you have to leave it out to get the default). This means that we need to convert the QemuOpts by hand to a QDict. Signed-off-by: Paolo Bonzini Message-Id: <20220414165300.555321-4-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- hw/core/machine.c | 80 ++++++++++++++++++++++++++++++ qapi/machine.json | 18 +++++++ softmmu/vl.c | 123 +++++++++++++++------------------------------- 3 files changed, 138 insertions(+), 83 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 8cea94537d..46b8d0effa 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -523,6 +523,78 @@ static void machine_set_hmat(Object *obj, bool value, = Error **errp) ms->numa_state->hmat_enabled =3D value; } =20 +static void machine_get_mem(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + MachineState *ms =3D MACHINE(obj); + MemorySizeConfiguration mem =3D { + .has_size =3D true, + .size =3D ms->ram_size, + .has_max_size =3D !!ms->ram_slots, + .max_size =3D ms->maxram_size, + .has_slots =3D !!ms->ram_slots, + .slots =3D ms->ram_slots, + }; + MemorySizeConfiguration *p_mem =3D &mem; + + visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); +} + +static void machine_set_mem(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + MachineState *ms =3D MACHINE(obj); + MachineClass *mc =3D MACHINE_GET_CLASS(obj); + MemorySizeConfiguration *mem; + + ERRP_GUARD(); + + if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { + return; + } + + if (!mem->has_size) { + mem->has_size =3D true; + mem->size =3D mc->default_ram_size; + } + mem->size =3D QEMU_ALIGN_UP(mem->size, 8192); + if (mc->fixup_ram_size) { + mem->size =3D mc->fixup_ram_size(mem->size); + } + if ((ram_addr_t)mem->size !=3D mem->size) { + error_setg(errp, "ram size too large"); + goto out_free; + } + + if (mem->has_max_size) { + if (mem->max_size < mem->size) { + error_setg(errp, "invalid value of maxmem: " + "maximum memory size (0x%" PRIx64 ") must be at lea= st " + "the initial memory size (0x%" PRIx64 ")", + mem->max_size, mem->size); + goto out_free; + } + if (mem->has_slots && mem->slots && mem->max_size =3D=3D mem->size= ) { + error_setg(errp, "invalid value of maxmem: " + "memory slots were specified but maximum memory siz= e " + "(0x%" PRIx64 ") is equal to the initial memory siz= e " + "(0x%" PRIx64 ")", mem->max_size, mem->size); + goto out_free; + } + ms->maxram_size =3D mem->max_size; + } else { + if (mem->has_slots) { + error_setg(errp, "slots specified but no max-size"); + goto out_free; + } + ms->maxram_size =3D mem->size; + } + ms->ram_size =3D mem->size; + ms->ram_slots =3D mem->has_slots ? mem->slots : 0; +out_free: + qapi_free_MemorySizeConfiguration(mem); +} + static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) { MachineState *ms =3D MACHINE(obj); @@ -953,6 +1025,12 @@ static void machine_class_init(ObjectClass *oc, void = *data) object_class_property_set_description(oc, "memory-backend", "Set RAM backend" "Valid value is ID of hostmem ba= sed backend"); + + object_class_property_add(oc, "memory", "MemorySizeConfiguration", + machine_get_mem, machine_set_mem, + NULL, NULL); + object_class_property_set_description(oc, "memory", + "Memory size configuration"); } =20 static void machine_class_base_init(ObjectClass *oc, void *data) @@ -983,6 +1061,8 @@ static void machine_initfn(Object *obj) ms->mem_merge =3D true; ms->enable_graphics =3D true; ms->kernel_cmdline =3D g_strdup(""); + ms->ram_size =3D mc->default_ram_size; + ms->maxram_size =3D mc->default_ram_size; =20 if (mc->nvdimm_supported) { Object *obj =3D OBJECT(ms); diff --git a/qapi/machine.json b/qapi/machine.json index e3dcf5a119..92480d4044 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -1614,3 +1614,21 @@ ## { 'enum': 'SmbiosEntryPointType', 'data': [ '32', '64' ] } + +## +# @MemorySizeConfiguration: +# +# Schema for memory size configuration. +# +# @size: memory size in bytes +# +# @max-size: maximum hotpluggable memory size in bytes +# +# @slots: number of available memory slots for hotplug +# +# Since: 7.1 +## +{ 'struct': 'MemorySizeConfiguration', 'data': { + '*size': 'size', + '*max-size': 'size', + '*slots': 'uint64' } } diff --git a/softmmu/vl.c b/softmmu/vl.c index 13ae31e92f..65a665e0bc 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -159,11 +159,10 @@ static const char *mem_path; static const char *incoming; static const char *loadvm; static const char *accelerators; +static bool have_custom_ram_size; static QDict *machine_opts_dict; static QTAILQ_HEAD(, ObjectOption) object_opts =3D QTAILQ_HEAD_INITIALIZER= (object_opts); static QTAILQ_HEAD(, DeviceOption) device_opts =3D QTAILQ_HEAD_INITIALIZER= (device_opts); -static ram_addr_t maxram_size; -static uint64_t ram_slots; static int display_remote; static int snapshot; static bool preconfig_requested; @@ -171,7 +170,6 @@ static QemuPluginList plugin_list =3D QTAILQ_HEAD_INITI= ALIZER(plugin_list); static BlockdevOptionsQueue bdo_queue =3D QSIMPLEQ_HEAD_INITIALIZER(bdo_qu= eue); static bool nographic =3D false; static int mem_prealloc; /* force preallocation of physical target memory = */ -static ram_addr_t ram_size; static const char *vga_model =3D NULL; static DisplayOptions dpy; static int num_serial_hds; @@ -1736,6 +1734,7 @@ static void keyval_dashify(QDict *qdict, Error **errp) static void qemu_apply_legacy_machine_options(QDict *qdict) { const char *value; + QObject *prop; =20 keyval_dashify(qdict, &error_fatal); =20 @@ -1768,6 +1767,13 @@ static void qemu_apply_legacy_machine_options(QDict = *qdict) false); qdict_del(qdict, "kernel-irqchip"); } + + prop =3D qdict_get(qdict, "memory"); + if (prop) { + have_custom_ram_size =3D + qobject_type(prop) =3D=3D QTYPE_QDICT && + qdict_haskey(qobject_to(QDict, prop), "size"); + } } =20 static void object_option_foreach_add(bool (*type_opt_predicate)(const cha= r *)) @@ -1885,9 +1891,6 @@ static bool object_create_early(const char *type) static void qemu_apply_machine_options(QDict *qdict) { object_set_properties_from_keyval(OBJECT(current_machine), qdict, fals= e, &error_fatal); - current_machine->ram_size =3D ram_size; - current_machine->maxram_size =3D maxram_size; - current_machine->ram_slots =3D ram_slots; =20 if (semihosting_enabled() && !semihosting_get_argc()) { /* fall back to the -kernel/-append */ @@ -1998,12 +2001,6 @@ static void qemu_create_late_backends(void) qemu_semihosting_console_init(); } =20 -static bool have_custom_ram_size(void) -{ - QemuOpts *opts =3D qemu_find_opts_singleton("memory"); - return !!qemu_opt_get_size(opts, "size", 0); -} - static void qemu_resolve_machine_memdev(void) { if (current_machine->ram_memdev_id) { @@ -2018,7 +2015,7 @@ static void qemu_resolve_machine_memdev(void) exit(EXIT_FAILURE); } backend_size =3D object_property_get_uint(backend, "size", &error= _abort); - if (have_custom_ram_size() && backend_size !=3D ram_size) { + if (have_custom_ram_size && backend_size !=3D current_machine->ram= _size) { error_report("Size specified by -m option must match size = of " "explicitly specified 'memory-backend' proper= ty"); exit(EXIT_FAILURE); @@ -2028,95 +2025,58 @@ static void qemu_resolve_machine_memdev(void) "'-machine memory-backend'"); exit(EXIT_FAILURE); } - ram_size =3D backend_size; + current_machine->ram_size =3D backend_size; } =20 if (!xen_enabled()) { /* On 32-bit hosts, QEMU is limited by virtual address space */ - if (ram_size > (2047 << 20) && HOST_LONG_BITS =3D=3D 32) { + if (current_machine->ram_size > (2047 << 20) && HOST_LONG_BITS =3D= =3D 32) { error_report("at most 2047 MB RAM can be simulated"); exit(1); } } } =20 -static void set_memory_options(MachineClass *mc) +static void parse_memory_options(const char *arg) { - uint64_t sz; + QemuOpts *opts; + QDict *dict, *prop; const char *mem_str; - const ram_addr_t default_ram_size =3D mc->default_ram_size; - QemuOpts *opts =3D qemu_find_opts_singleton("memory"); - Location loc; =20 - loc_push_none(&loc); - qemu_opts_loc_restore(opts); + opts =3D qemu_opts_parse_noisily(qemu_find_opts("memory"), arg, true); + if (!opts) { + exit(EXIT_FAILURE); + } =20 - sz =3D 0; - mem_str =3D qemu_opt_get(opts, "size"); - if (mem_str) { + prop =3D qdict_new(); + + if (qemu_opt_get_size(opts, "size", 0) !=3D 0) { + mem_str =3D qemu_opt_get(opts, "size"); if (!*mem_str) { error_report("missing 'size' option value"); exit(EXIT_FAILURE); } =20 - sz =3D qemu_opt_get_size(opts, "size", ram_size); - /* Fix up legacy suffix-less format */ if (g_ascii_isdigit(mem_str[strlen(mem_str) - 1])) { - uint64_t overflow_check =3D sz; - - sz *=3D MiB; - if (sz / MiB !=3D overflow_check) { - error_report("too large 'size' option value"); - exit(EXIT_FAILURE); - } + g_autofree char *mib_str =3D g_strdup_printf("%sM", mem_str); + qdict_put_str(prop, "size", mib_str); + } else { + qdict_put_str(prop, "size", mem_str); } } =20 - /* backward compatibility behaviour for case "-m 0" */ - if (sz =3D=3D 0) { - sz =3D default_ram_size; - } - - sz =3D QEMU_ALIGN_UP(sz, 8192); - if (mc->fixup_ram_size) { - sz =3D mc->fixup_ram_size(sz); - } - ram_size =3D sz; - if (ram_size !=3D sz) { - error_report("ram size too large"); - exit(EXIT_FAILURE); - } - - maxram_size =3D ram_size; - if (qemu_opt_get(opts, "maxmem")) { - uint64_t slots; - - sz =3D qemu_opt_get_size(opts, "maxmem", 0); - slots =3D qemu_opt_get_number(opts, "slots", 0); - if (sz < ram_size) { - error_report("invalid value of -m option maxmem: " - "maximum memory size (0x%" PRIx64 ") must be at l= east " - "the initial memory size (0x" RAM_ADDR_FMT ")", - sz, ram_size); - exit(EXIT_FAILURE); - } else if (slots && sz =3D=3D ram_size) { - error_report("invalid value of -m option maxmem: " - "memory slots were specified but maximum memory s= ize " - "(0x%" PRIx64 ") is equal to the initial memory s= ize " - "(0x" RAM_ADDR_FMT ")", sz, ram_size); - exit(EXIT_FAILURE); - } - - maxram_size =3D sz; - ram_slots =3D slots; - } else if (qemu_opt_get(opts, "slots")) { - error_report("invalid -m option value: missing 'maxmem' option"); - exit(EXIT_FAILURE); + qdict_put_str(prop, "max-size", qemu_opt_get(opts, "maxmem")); + } + if (qemu_opt_get(opts, "slots")) { + qdict_put_str(prop, "slots", qemu_opt_get(opts, "slots")); } =20 - loc_pop(&loc); + dict =3D qdict_new(); + qdict_put(dict, "memory", prop); + keyval_merge(machine_opts_dict, dict, &error_fatal); + qobject_unref(dict); } =20 static void qemu_create_machine(QDict *qdict) @@ -2124,8 +2084,6 @@ static void qemu_create_machine(QDict *qdict) MachineClass *machine_class =3D select_machine(qdict, &error_fatal); object_set_machine_compat_props(machine_class->compat_props); =20 - set_memory_options(machine_class); - current_machine =3D MACHINE(object_new_with_class(OBJECT_CLASS(machine= _class))); object_property_add_child(object_get_root(), "machine", OBJECT(current_machine)); @@ -2185,7 +2143,8 @@ static bool is_qemuopts_group(const char *group) if (g_str_equal(group, "object") || g_str_equal(group, "machine") || g_str_equal(group, "smp-opts") || - g_str_equal(group, "boot-opts")) { + g_str_equal(group, "boot-opts") || + g_str_equal(group, "memory")) { return false; } return true; @@ -2209,6 +2168,8 @@ static void qemu_record_config_group(const char *grou= p, QDict *dict, machine_merge_property("smp", dict, &error_fatal); } else if (g_str_equal(group, "boot-opts")) { machine_merge_property("boot", dict, &error_fatal); + } else if (g_str_equal(group, "memory")) { + machine_merge_property("memory", dict, &error_fatal); } else { abort(); } @@ -3009,11 +2970,7 @@ void qemu_init(int argc, char **argv, char **envp) exit(0); break; case QEMU_OPTION_m: - opts =3D qemu_opts_parse_noisily(qemu_find_opts("memory"), - optarg, true); - if (!opts) { - exit(EXIT_FAILURE); - } + parse_memory_options(optarg); break; #ifdef CONFIG_TPM case QEMU_OPTION_tpmdev: --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Thu, 12 May 2022 10:25:38 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 14/27] machine: make memory-backend a link property Date: Thu, 12 May 2022 19:24:52 +0200 Message-Id: <20220512172505.1065394-15-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652377475850100001 Content-Type: text/plain; charset="utf-8" Handle HostMemoryBackend creation and setting of ms->ram entirely in machine_run_board_init. Signed-off-by: Paolo Bonzini Message-Id: <20220414165300.555321-5-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- hw/core/machine.c | 70 ++++++++++++++++++++++++++++++--------------- hw/core/numa.c | 2 +- hw/sparc/sun4m.c | 5 ++-- include/hw/boards.h | 4 +-- softmmu/vl.c | 62 ++++++++++++++------------------------- 5 files changed, 74 insertions(+), 69 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 46b8d0effa..8aab5416dd 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -36,6 +36,7 @@ #include "exec/confidential-guest-support.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-pci.h" +#include "qom/object_interfaces.h" =20 GlobalProperty hw_compat_7_0[] =3D {}; const size_t hw_compat_7_0_len =3D G_N_ELEMENTS(hw_compat_7_0); @@ -653,21 +654,6 @@ bool device_type_is_dynamic_sysbus(MachineClass *mc, c= onst char *type) return allowed; } =20 -static char *machine_get_memdev(Object *obj, Error **errp) -{ - MachineState *ms =3D MACHINE(obj); - - return g_strdup(ms->ram_memdev_id); -} - -static void machine_set_memdev(Object *obj, const char *value, Error **err= p) -{ - MachineState *ms =3D MACHINE(obj); - - g_free(ms->ram_memdev_id); - ms->ram_memdev_id =3D g_strdup(value); -} - HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) { int i; @@ -1020,8 +1006,9 @@ static void machine_class_init(ObjectClass *oc, void = *data) object_class_property_set_description(oc, "memory-encryption", "Set memory encryption object to use"); =20 - object_class_property_add_str(oc, "memory-backend", - machine_get_memdev, machine_set_memdev); + object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKE= ND, + offsetof(MachineState, memdev), object_= property_allow_set_link, + OBJ_PROP_LINK_STRONG); object_class_property_set_description(oc, "memory-backend", "Set RAM backend" "Valid value is ID of hostmem ba= sed backend"); @@ -1270,7 +1257,40 @@ MemoryRegion *machine_consume_memdev(MachineState *m= achine, return ret; } =20 -void machine_run_board_init(MachineState *machine) +static bool create_default_memdev(MachineState *ms, const char *path, Erro= r **errp) +{ + Object *obj; + MachineClass *mc =3D MACHINE_GET_CLASS(ms); + bool r =3D false; + + obj =3D object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKE= ND_RAM); + if (path) { + if (!object_property_set_str(obj, "mem-path", path, errp)) { + goto out; + } + } + if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { + goto out; + } + object_property_add_child(object_get_objects_root(), mc->default_ram_i= d, + obj); + /* Ensure backend's memory region name is equal to mc->default_ram_id = */ + if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-= id", + false, errp)) { + goto out; + } + if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { + goto out; + } + r =3D object_property_set_link(OBJECT(ms), "memory-backend", obj, errp= ); + +out: + object_unref(obj); + return r; +} + + +void machine_run_board_init(MachineState *machine, const char *mem_path, E= rror **errp) { MachineClass *machine_class =3D MACHINE_GET_CLASS(machine); ObjectClass *oc =3D object_class_by_name(machine->cpu_type); @@ -1281,11 +1301,11 @@ void machine_run_board_init(MachineState *machine) clock values from the log. */ replay_checkpoint(CHECKPOINT_INIT); =20 - if (machine->ram_memdev_id) { - Object *o; - o =3D object_resolve_path_type(machine->ram_memdev_id, - TYPE_MEMORY_BACKEND, NULL); - machine->ram =3D machine_consume_memdev(machine, MEMORY_BACKEND(o)= ); + if (machine_class->default_ram_id && machine->ram_size && + numa_uses_legacy_mem() && !machine->memdev) { + if (!create_default_memdev(current_machine, mem_path, errp)) { + return; + } } =20 if (machine->numa_state) { @@ -1295,6 +1315,10 @@ void machine_run_board_init(MachineState *machine) } } =20 + if (!machine->ram && machine->memdev) { + machine->ram =3D machine_consume_memdev(machine, machine->memdev); + } + /* If the machine supports the valid_cpu_types check and the user * specified a CPU with -cpu check here that the user CPU is supported. */ diff --git a/hw/core/numa.c b/hw/core/numa.c index 1aa05dcf42..26d8e5f616 100644 --- a/hw/core/numa.c +++ b/hw/core/numa.c @@ -695,7 +695,7 @@ void numa_complete_configuration(MachineState *ms) } =20 if (!numa_uses_legacy_mem() && mc->default_ram_id) { - if (ms->ram_memdev_id) { + if (ms->memdev) { error_report("'-machine memory-backend' and '-numa memdev'" " properties are mutually exclusive"); exit(1); diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 9d57491f68..d9288326d6 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -831,8 +831,7 @@ static void sun4m_hw_init(MachineState *machine) SysBusDevice *s; unsigned int smp_cpus =3D machine->smp.cpus; unsigned int max_cpus =3D machine->smp.max_cpus; - Object *ram_memdev =3D object_resolve_path_type(machine->ram_memdev_id, - TYPE_MEMORY_BACKEND, NUL= L); + HostMemoryBackend *ram_memdev =3D machine->memdev; NICInfo *nd =3D &nd_table[0]; =20 if (machine->ram_size > hwdef->max_mem) { @@ -852,7 +851,7 @@ static void sun4m_hw_init(MachineState *machine) =20 /* Create and map RAM frontend */ dev =3D qdev_new("memory"); - object_property_set_link(OBJECT(dev), "memdev", ram_memdev, &error_fat= al); + object_property_set_link(OBJECT(dev), "memdev", OBJECT(ram_memdev), &e= rror_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); =20 diff --git a/include/hw/boards.h b/include/hw/boards.h index 910c3ffde2..7b416c9787 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -25,7 +25,7 @@ OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE) =20 extern MachineState *current_machine; =20 -void machine_run_board_init(MachineState *machine); +void machine_run_board_init(MachineState *machine, const char *mem_path, E= rror **errp); bool machine_usb(MachineState *machine); int machine_phandle_start(MachineState *machine); bool machine_dump_guest_core(MachineState *machine); @@ -339,7 +339,7 @@ struct MachineState { bool suppress_vmdesc; bool enable_graphics; ConfidentialGuestSupport *cgs; - char *ram_memdev_id; + HostMemoryBackend *memdev; /* * convenience alias to ram_memdev_id backend memory region * or to numa container memory region diff --git a/softmmu/vl.c b/softmmu/vl.c index 65a665e0bc..f6deec9380 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -160,6 +160,7 @@ static const char *incoming; static const char *loadvm; static const char *accelerators; static bool have_custom_ram_size; +static const char *ram_memdev_id; static QDict *machine_opts_dict; static QTAILQ_HEAD(, ObjectOption) object_opts =3D QTAILQ_HEAD_INITIALIZER= (object_opts); static QTAILQ_HEAD(, DeviceOption) device_opts =3D QTAILQ_HEAD_INITIALIZER= (device_opts); @@ -1768,6 +1769,19 @@ static void qemu_apply_legacy_machine_options(QDict = *qdict) qdict_del(qdict, "kernel-irqchip"); } =20 + value =3D qdict_get_try_str(qdict, "memory-backend"); + if (value) { + if (mem_path) { + error_report("'-mem-path' can't be used together with" + "'-machine memory-backend'"); + exit(EXIT_FAILURE); + } + + /* Resolved later. */ + ram_memdev_id =3D g_strdup(value); + qdict_del(qdict, "memory-backend"); + } + prop =3D qdict_get(qdict, "memory"); if (prop) { have_custom_ram_size =3D @@ -2003,29 +2017,25 @@ static void qemu_create_late_backends(void) =20 static void qemu_resolve_machine_memdev(void) { - if (current_machine->ram_memdev_id) { + if (ram_memdev_id) { Object *backend; ram_addr_t backend_size; =20 - backend =3D object_resolve_path_type(current_machine->ram_memdev_i= d, + backend =3D object_resolve_path_type(ram_memdev_id, TYPE_MEMORY_BACKEND, NULL); if (!backend) { - error_report("Memory backend '%s' not found", - current_machine->ram_memdev_id); + error_report("Memory backend '%s' not found", ram_memdev_id); exit(EXIT_FAILURE); } backend_size =3D object_property_get_uint(backend, "size", &error= _abort); if (have_custom_ram_size && backend_size !=3D current_machine->ram= _size) { - error_report("Size specified by -m option must match size = of " - "explicitly specified 'memory-backend' proper= ty"); - exit(EXIT_FAILURE); - } - if (mem_path) { - error_report("'-mem-path' can't be used together with" - "'-machine memory-backend'"); + error_report("Size specified by -m option must match size of " + "explicitly specified 'memory-backend' property"); exit(EXIT_FAILURE); } current_machine->ram_size =3D backend_size; + object_property_set_link(OBJECT(current_machine), + "memory-backend", backend, &error_fatal); } =20 if (!xen_enabled()) { @@ -2376,27 +2386,6 @@ static void configure_accelerators(const char *progn= ame) } } =20 -static void create_default_memdev(MachineState *ms, const char *path) -{ - Object *obj; - MachineClass *mc =3D MACHINE_GET_CLASS(ms); - - obj =3D object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKE= ND_RAM); - if (path) { - object_property_set_str(obj, "mem-path", path, &error_fatal); - } - object_property_set_int(obj, "size", ms->ram_size, &error_fatal); - object_property_add_child(object_get_objects_root(), mc->default_ram_i= d, - obj); - /* Ensure backend's memory region name is equal to mc->default_ram_id = */ - object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", - false, &error_fatal); - user_creatable_complete(USER_CREATABLE(obj), &error_fatal); - object_unref(obj); - object_property_set_str(OBJECT(ms), "memory-backend", mc->default_ram_= id, - &error_fatal); -} - static void qemu_validate_options(const QDict *machine_opts) { const char *kernel_filename =3D qdict_get_try_str(machine_opts, "kerne= l"); @@ -2581,18 +2570,11 @@ static void qemu_init_displays(void) =20 static void qemu_init_board(void) { - MachineClass *machine_class =3D MACHINE_GET_CLASS(current_machine); - - if (machine_class->default_ram_id && current_machine->ram_size && - numa_uses_legacy_mem() && !current_machine->ram_memdev_id) { - create_default_memdev(current_machine, mem_path); - } - /* process plugin before CPUs are created, but once -smp has been pars= ed */ qemu_plugin_load_list(&plugin_list, &error_fatal); =20 /* From here on we enter MACHINE_PHASE_INITIALIZED. */ - machine_run_board_init(current_machine); + machine_run_board_init(current_machine, mem_path, &error_fatal); =20 drive_check_orphaned(); =20 --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652377164; cv=none; d=zohomail.com; s=zohoarc; b=PdAZtI+zyOapy3Ygdd3EmDuwcbTV5VXIE7ewdk0G9qCGXoYVZ1W5DRJ30aEYBDmFrBQrO068//S0EH/PpM47VZq7o1dyMF8SrEN7npY3Z/dMwkx2DSCBj6AGMnSIraP4X2FD9MMPsk1KpYfKYcBqidRe1UNo2eJ3wDhbDFP0cSM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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Thu, 12 May 2022 10:25:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzgFQzunrx13pjrt1G94foytHAKo6mz0Q3g+5C8278jhv6wMmjSH/ufrPhy5IHjXzNot2nmrw== X-Received: by 2002:a17:907:6089:b0:6f8:5933:7062 with SMTP id ht9-20020a170907608900b006f859337062mr842668ejc.169.1652376339892; Thu, 12 May 2022 10:25:39 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 15/27] machine: move more memory validation to Machine object Date: Thu, 12 May 2022 19:24:53 +0200 Message-Id: <20220512172505.1065394-16-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652377165102100003 Content-Type: text/plain; charset="utf-8" This allows setting memory properties without going through vl.c, and have them validated just the same. Signed-off-by: Paolo Bonzini Message-Id: <20220414165300.555321-6-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- hw/core/machine.c | 21 +++++++++++++++++++-- softmmu/vl.c | 17 +++-------------- 2 files changed, 22 insertions(+), 16 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 8aab5416dd..3264c1e11d 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -21,12 +21,14 @@ #include "qapi/qapi-visit-common.h" #include "qapi/qapi-visit-machine.h" #include "qapi/visitor.h" +#include "qom/object_interfaces.h" #include "hw/sysbus.h" #include "sysemu/cpus.h" #include "sysemu/sysemu.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" #include "sysemu/numa.h" +#include "sysemu/xen.h" #include "qemu/error-report.h" #include "sysemu/qtest.h" #include "hw/pci/pci.h" @@ -1301,8 +1303,23 @@ void machine_run_board_init(MachineState *machine, c= onst char *mem_path, Error * clock values from the log. */ replay_checkpoint(CHECKPOINT_INIT); =20 - if (machine_class->default_ram_id && machine->ram_size && - numa_uses_legacy_mem() && !machine->memdev) { + if (!xen_enabled()) { + /* On 32-bit hosts, QEMU is limited by virtual address space */ + if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS =3D=3D 32) { + error_setg(errp, "at most 2047 MB RAM can be simulated"); + return; + } + } + + if (machine->memdev) { + ram_addr_t backend_size =3D object_property_get_uint(OBJECT(machin= e->memdev), + "size", &error= _abort); + if (backend_size !=3D machine->ram_size) { + error_setg(errp, "Machine memory size does not match the size = of the memory backend"); + return; + } + } else if (machine_class->default_ram_id && machine->ram_size && + numa_uses_legacy_mem()) { if (!create_default_memdev(current_machine, mem_path, errp)) { return; } diff --git a/softmmu/vl.c b/softmmu/vl.c index f6deec9380..edba74f075 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -2027,24 +2027,13 @@ static void qemu_resolve_machine_memdev(void) error_report("Memory backend '%s' not found", ram_memdev_id); exit(EXIT_FAILURE); } - backend_size =3D object_property_get_uint(backend, "size", &error= _abort); - if (have_custom_ram_size && backend_size !=3D current_machine->ram= _size) { - error_report("Size specified by -m option must match size of " - "explicitly specified 'memory-backend' property"); - exit(EXIT_FAILURE); + if (!have_custom_ram_size) { + backend_size =3D object_property_get_uint(backend, "size", &e= rror_abort); + current_machine->ram_size =3D backend_size; } - current_machine->ram_size =3D backend_size; object_property_set_link(OBJECT(current_machine), "memory-backend", backend, &error_fatal); } - - if (!xen_enabled()) { - /* On 32-bit hosts, QEMU is limited by virtual address space */ - if (current_machine->ram_size > (2047 << 20) && HOST_LONG_BITS =3D= =3D 32) { - error_report("at most 2047 MB RAM can be simulated"); - exit(1); - } - } } =20 static void parse_memory_options(const char *arg) --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652378186; 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Thu, 12 May 2022 10:25:41 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Subject: [PULL 16/27] slirp: bump submodule past 4.7 release Date: Thu, 12 May 2022 19:24:54 +0200 Message-Id: <20220512172505.1065394-17-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378186982100001 Version 4.7 of slirp provides a new timer API that works better with CFI, together with several other improvements: * Allow disabling the internal DHCP server !22 * Support Unix sockets in hostfwd !103 * IPv6 DNS proxying support !110 * bootp: add support for UEFI HTTP boot !111 and bugfixes. The submodule update also includes 2 commits to fix warnings in the Win32 build. Reviewed-by: Marc-Andr=C3=A9 Lureau Signed-off-by: Paolo Bonzini --- slirp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/slirp b/slirp index a88d9ace23..9d59bb775d 160000 --- a/slirp +++ b/slirp @@ -1 +1 @@ -Subproject commit a88d9ace234a24ce1c17189642ef9104799425e0 +Subproject commit 9d59bb775d6294c8b447a88512f7bb43f12a25a8 --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652378539; cv=none; d=zohomail.com; s=zohoarc; b=n+kglHjYE5mHXeJyfxm9WE4luWifv58KeardrHaP1GtTQle6Gj6OZ4j1gfvMEGma29bN1rxYZ6trL5gLg3G2nJlNJ+ltwhHxw4A63WD/41Gb1PJNLei6V0xC+mW99QS/LQohAwsgONimgeaMjH4UccGNsU+EJbdpNhkhQ1xpYT4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Thu, 12 May 2022 10:25:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwNxZ01JqylR8FKN4+vaYPxcfazHONEnCJFxIOckxUv/qRoS/2bvzVckjgtICvzB4RdQz0dNg== X-Received: by 2002:aa7:c6da:0:b0:428:24bc:e652 with SMTP id b26-20020aa7c6da000000b0042824bce652mr36194424eds.21.1652376343248; Thu, 12 May 2022 10:25:43 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Samuel Thibault , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Subject: [PULL 17/27] net: slirp: introduce a wrapper struct for QemuTimer Date: Thu, 12 May 2022 19:24:55 +0200 Message-Id: <20220512172505.1065394-18-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378541403100001 This struct will be extended in the next few patches to support the new slirp_handle_timer() call. For that we need to store an additional "int" for each SLIRP timer, in addition to the cb_opaque. Reviewed-by: Samuel Thibault Reviewed-by: Marc-Andr=C3=A9 Lureau Signed-off-by: Paolo Bonzini --- net/slirp.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/net/slirp.c b/net/slirp.c index bc5e9e4f77..f1e25d741f 100644 --- a/net/slirp.c +++ b/net/slirp.c @@ -184,23 +184,32 @@ static int64_t net_slirp_clock_get_ns(void *opaque) return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } =20 +struct SlirpTimer { + QEMUTimer timer; +} + static void *net_slirp_timer_new(SlirpTimerCb cb, void *cb_opaque, void *opaque) { - return timer_new_full(NULL, QEMU_CLOCK_VIRTUAL, - SCALE_MS, QEMU_TIMER_ATTR_EXTERNAL, - cb, cb_opaque); + SlirpTimer *t =3D g_new(SlirpTimer, 1); + timer_init_full(&t->timer, NULL, QEMU_CLOCK_VIRTUAL, + SCALE_MS, QEMU_TIMER_ATTR_EXTERNAL, + cb, cb_opaque); + return t; } =20 static void net_slirp_timer_free(void *timer, void *opaque) { - timer_free(timer); + SlirpTimer *t =3D timer; + timer_del(&t->timer); + g_free(t); } =20 static void net_slirp_timer_mod(void *timer, int64_t expire_timer, void *opaque) { - timer_mod(timer, expire_timer); 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Thu, 12 May 2022 10:25:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwS9MjhMw2pBrmD419DdY/J9dvSBMnkUTq5O7bV+nMP47YIvS7qVKcmXDAtp9LYgMt9afPU2w== X-Received: by 2002:a05:6402:2291:b0:425:deb5:73be with SMTP id cw17-20020a056402229100b00425deb573bemr35840329edb.392.1652376344779; Thu, 12 May 2022 10:25:44 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 18/27] net: slirp: switch to slirp_new Date: Thu, 12 May 2022 19:24:56 +0200 Message-Id: <20220512172505.1065394-19-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378553347100001 Content-Type: text/plain; charset="utf-8" Replace slirp_init with slirp_new, so that a more recent cfg.version can be specified. The function appeared in version 4.1.0. Signed-off-by: Paolo Bonzini --- meson.build | 2 +- net/slirp.c | 27 +++++++++++++++++++++------ 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/meson.build b/meson.build index 03f63e95e2..ea72ba7c2f 100644 --- a/meson.build +++ b/meson.build @@ -2638,7 +2638,7 @@ if have_system if slirp_opt in ['enabled', 'auto', 'system'] have_internal =3D fs.exists(meson.current_source_dir() / 'slirp/meson.= build') slirp =3D dependency('slirp', kwargs: static_kwargs, - method: 'pkg-config', + method: 'pkg-config', version: '>=3D4.1.0', required: slirp_opt =3D=3D 'system' or slirp_opt =3D=3D 'enabled' and not have_i= nternal) if slirp.found() diff --git a/net/slirp.c b/net/slirp.c index f1e25d741f..b7464be86b 100644 --- a/net/slirp.c +++ b/net/slirp.c @@ -389,6 +389,7 @@ static int net_slirp_init(NetClientState *peer, const c= har *model, #if defined(CONFIG_SMBD_COMMAND) struct in_addr smbsrv =3D { .s_addr =3D 0 }; #endif + SlirpConfig cfg =3D { 0 }; NetClientState *nc; SlirpState *s; char buf[20]; @@ -577,12 +578,26 @@ static int net_slirp_init(NetClientState *peer, const= char *model, =20 s =3D DO_UPCAST(SlirpState, nc, nc); =20 - s->slirp =3D slirp_init(restricted, ipv4, net, mask, host, - ipv6, ip6_prefix, vprefix6_len, ip6_host, - vhostname, tftp_server_name, - tftp_export, bootfile, dhcp, - dns, ip6_dns, dnssearch, vdomainname, - &slirp_cb, s); + cfg.version =3D 1; + cfg.restricted =3D restricted; + cfg.in_enabled =3D ipv4; + cfg.vnetwork =3D net; + cfg.vnetmask =3D mask; + cfg.vhost =3D host; + cfg.in6_enabled =3D ipv6; + cfg.vprefix_addr6 =3D ip6_prefix; + cfg.vprefix_len =3D vprefix6_len; + cfg.vhost6 =3D ip6_host; + cfg.vhostname =3D vhostname; + cfg.tftp_server_name =3D tftp_server_name; + cfg.tftp_path =3D tftp_export; + cfg.bootfile =3D bootfile; + cfg.vdhcp_start =3D dhcp; + cfg.vnameserver =3D dns; + cfg.vnameserver6 =3D ip6_dns; + cfg.vdnssearch =3D dnssearch; + cfg.vdomainname =3D vdomainname; + s->slirp =3D slirp_new(&cfg, &slirp_cb, s); QTAILQ_INSERT_TAIL(&slirp_stacks, s, entry); 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Thu, 12 May 2022 10:25:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJybP3V9wZuOGejmSUZAUUrh7dpCxJJyxcz4CmxRph8lEJGPJGzHHMWtAd20bDroC67CwyFQ2Q== X-Received: by 2002:a50:ee11:0:b0:425:b5b3:a48d with SMTP id g17-20020a50ee11000000b00425b5b3a48dmr36093320eds.246.1652376346758; Thu, 12 May 2022 10:25:46 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Samuel Thibault , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Subject: [PULL 19/27] net: slirp: add support for CFI-friendly timer API Date: Thu, 12 May 2022 19:24:57 +0200 Message-Id: <20220512172505.1065394-20-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378845350100001 libslirp 4.7 introduces a CFI-friendly version of the .timer_new callback. The new callback replaces the function pointer with an enum; invoking the callback is done with a new function slirp_handle_timer. Support the new API so that CFI can be made compatible with using a system libslirp. Reviewed-by: Samuel Thibault Reviewed-by: Marc-Andr=C3=A9 Lureau Signed-off-by: Paolo Bonzini --- net/slirp.c | 41 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/net/slirp.c b/net/slirp.c index b7464be86b..8679be6444 100644 --- a/net/slirp.c +++ b/net/slirp.c @@ -184,10 +184,43 @@ static int64_t net_slirp_clock_get_ns(void *opaque) return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } =20 +typedef struct SlirpTimer SlirpTimer; struct SlirpTimer { QEMUTimer timer; +#if SLIRP_CHECK_VERSION(4,7,0) + Slirp *slirp; + SlirpTimerId id; + void *cb_opaque; +#endif +}; + +#if SLIRP_CHECK_VERSION(4,7,0) +static void net_slirp_init_completed(Slirp *slirp, void *opaque) +{ + SlirpState *s =3D opaque; + s->slirp =3D slirp; } =20 +static void net_slirp_timer_cb(void *opaque) +{ + SlirpTimer *t =3D opaque; + slirp_handle_timer(t->slirp, t->id, t->cb_opaque); +} + +static void *net_slirp_timer_new_opaque(SlirpTimerId id, + void *cb_opaque, void *opaque) +{ + SlirpState *s =3D opaque; + SlirpTimer *t =3D g_new(SlirpTimer, 1); + t->slirp =3D s->slirp; + t->id =3D id; + t->cb_opaque =3D cb_opaque; + timer_init_full(&t->timer, NULL, QEMU_CLOCK_VIRTUAL, + SCALE_MS, QEMU_TIMER_ATTR_EXTERNAL, + net_slirp_timer_cb, t); + return t; +} +#else static void *net_slirp_timer_new(SlirpTimerCb cb, void *cb_opaque, void *opaque) { @@ -197,6 +230,7 @@ static void *net_slirp_timer_new(SlirpTimerCb cb, cb, cb_opaque); return t; } +#endif =20 static void net_slirp_timer_free(void *timer, void *opaque) { @@ -231,7 +265,12 @@ static const SlirpCb slirp_cb =3D { .send_packet =3D net_slirp_send_packet, .guest_error =3D net_slirp_guest_error, .clock_get_ns =3D net_slirp_clock_get_ns, +#if SLIRP_CHECK_VERSION(4,7,0) + .init_completed =3D net_slirp_init_completed, + .timer_new_opaque =3D net_slirp_timer_new_opaque, +#else .timer_new =3D net_slirp_timer_new, +#endif .timer_free =3D net_slirp_timer_free, .timer_mod =3D net_slirp_timer_mod, .register_poll_fd =3D net_slirp_register_poll_fd, @@ -578,7 +617,7 @@ static int net_slirp_init(NetClientState *peer, const c= har *model, =20 s =3D DO_UPCAST(SlirpState, nc, nc); =20 - cfg.version =3D 1; + cfg.version =3D SLIRP_CHECK_VERSION(4,7,0) ? 4 : 1; cfg.restricted =3D restricted; cfg.in_enabled =3D ipv4; cfg.vnetwork =3D net; --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652378908; cv=none; d=zohomail.com; s=zohoarc; b=X4KQlyakOuu94bjEQ5nqo+5gjswdk3WV+o4UoWw8yJQD7PMuUl5UELMuMz9yEIcMmN89sgZUeIi+XFdQvi30NWLM07awYrxZXaWIjCs7/KUvWDKliWPQqkPp1QM5ti1ZAXdiIctHnlkoSKMoZWXCYtdzwfnZmbLJYE06WAIE2Js= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1652378908; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 12 May 2022 10:25:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxKNl+ToWI5gk6+PgmFUMNtVSBWxDW9CfQtd1EXYRVySmecB/Ryu/OUhJSAOT7LI/W14Zan8Q== X-Received: by 2002:a17:907:6e1d:b0:6f4:60e6:9fa6 with SMTP id sd29-20020a1709076e1d00b006f460e69fa6mr884725ejc.184.1652376348926; Thu, 12 May 2022 10:25:48 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Samuel Thibault , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Subject: [PULL 20/27] net: slirp: allow CFI with libslirp >= 4.7 Date: Thu, 12 May 2022 19:24:58 +0200 Message-Id: <20220512172505.1065394-21-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PP_MIME_FAKE_ASCII_TEXT=0.999, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378909615100001 slirp 4.7 introduces a new CFI-friendly timer callback that does not pass function pointers within libslirp as callbacks for timers. Check the version number and, if it is new enough, allow using CFI even with a system libslirp. Reviewed-by: Samuel Thibault Reviewed-by: Marc-Andr=C3=A9 Lureau Signed-off-by: Paolo Bonzini --- meson.build | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/meson.build b/meson.build index ea72ba7c2f..9b20dcd143 100644 --- a/meson.build +++ b/meson.build @@ -2637,10 +2637,25 @@ if have_system slirp_opt =3D get_option('slirp') if slirp_opt in ['enabled', 'auto', 'system'] have_internal =3D fs.exists(meson.current_source_dir() / 'slirp/meson.= build') + slirp_dep_required =3D (slirp_opt =3D=3D 'system' or + slirp_opt =3D=3D 'enabled' and not have_internal) slirp =3D dependency('slirp', kwargs: static_kwargs, method: 'pkg-config', version: '>=3D4.1.0', - required: slirp_opt =3D=3D 'system' or - slirp_opt =3D=3D 'enabled' and not have_i= nternal) + required: slirp_dep_required) + # slirp <4.7 is incompatible with CFI support in QEMU. This is because + # it passes function pointers within libslirp as callbacks for timers. + # When using a system-wide shared libslirp, the type information for t= he + # callback is missing and the timer call produces a false positive wit= h CFI. + # Do not use the "version" keyword argument to produce a better error. + # with control-flow integrity. + if get_option('cfi') and slirp.found() and slirp.version().version_com= pare('<4.7') + if slirp_dep_required + error('Control-Flow Integrity requires libslirp 4.7.') + else + warning('Control-Flow Integrity requires libslirp 4.7, not using s= ystem-wide libslirp.') + slirp =3D not_found + endif + endif if slirp.found() slirp_opt =3D 'system' elif have_internal @@ -2713,18 +2728,6 @@ if have_system endif endif =20 -# For CFI, we need to compile slirp as a static library together with qemu. -# This is because we register slirp functions as callbacks for QEMU Timers. -# When using a system-wide shared libslirp, the type information for the -# callback is missing and the timer call produces a false positive with CF= I. -# -# Now that slirp_opt has been defined, check if the selected slirp is comp= atible -# with control-flow integrity. -if get_option('cfi') and slirp_opt =3D=3D 'system' - error('Control-Flow Integrity is not compatible with system-wide slirp.'= \ - + ' Please configure with --enable-slirp=3Dgit') -endif - fdt =3D not_found if have_system fdt_opt =3D get_option('fdt') --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 12 May 2022 10:25:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwSxY3ayjkzk7BGOa9rI8d4j3z58JO4d/NrOJzRkjoPy7DGI8I9oCRFi9AH2mRwCKtALHIcHw== X-Received: by 2002:a05:6402:1941:b0:413:2822:9c8 with SMTP id f1-20020a056402194100b00413282209c8mr36015257edz.13.1652376350567; Thu, 12 May 2022 10:25:50 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Eric Blake Subject: [PULL 21/27] coroutine-lock: qemu_co_queue_next is a coroutine-only qemu_co_enter_next Date: Thu, 12 May 2022 19:24:59 +0200 Message-Id: <20220512172505.1065394-22-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652379345830100001 Content-Type: text/plain; charset="utf-8" qemu_co_queue_next is basically the same as qemu_co_enter_next but without a QemuLockable argument. That's perfectly fine, but only as long as the function is marked coroutine_fn. If used outside coroutine context, qemu_co_queue_wait will attempt to take the lock and that is just broken: if you are calling qemu_co_queue_next outside coroutine context, the lock is going to be a QemuMutex which cannot be taken twice by the same thread. The patch adds the marker and reimplements qemu_co_queue_next in terms of qemu_co_enter_next_impl, to remove duplicated code and to clarify that the latter also works in coroutine context. Signed-off-by: Paolo Bonzini Reviewed-by: Eric Blake Message-Id: <20220427130830.150180-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- include/qemu/coroutine.h | 7 ++++--- util/qemu-coroutine-lock.c | 21 +++++++-------------- 2 files changed, 11 insertions(+), 17 deletions(-) diff --git a/include/qemu/coroutine.h b/include/qemu/coroutine.h index 284571badb..c23d41e1ff 100644 --- a/include/qemu/coroutine.h +++ b/include/qemu/coroutine.h @@ -208,11 +208,12 @@ void qemu_co_queue_init(CoQueue *queue); void coroutine_fn qemu_co_queue_wait_impl(CoQueue *queue, QemuLockable *lo= ck); =20 /** - * Removes the next coroutine from the CoQueue, and wake it up. + * Removes the next coroutine from the CoQueue, and queue it to run after + * the currently-running coroutine yields. * Returns true if a coroutine was removed, false if the queue is empty. - * OK to run from coroutine and non-coroutine context. + * Used from coroutine context, use qemu_co_enter_next outside. */ -bool qemu_co_queue_next(CoQueue *queue); +bool coroutine_fn qemu_co_queue_next(CoQueue *queue); =20 /** * Empties the CoQueue; all coroutines are woken up. diff --git a/util/qemu-coroutine-lock.c b/util/qemu-coroutine-lock.c index 2669403839..5705cfea2e 100644 --- a/util/qemu-coroutine-lock.c +++ b/util/qemu-coroutine-lock.c @@ -67,7 +67,7 @@ void coroutine_fn qemu_co_queue_wait_impl(CoQueue *queue,= QemuLockable *lock) } } =20 -static bool qemu_co_queue_do_restart(CoQueue *queue, bool single) +void qemu_co_queue_restart_all(CoQueue *queue) { Coroutine *next; =20 @@ -78,23 +78,10 @@ static bool qemu_co_queue_do_restart(CoQueue *queue, bo= ol single) while ((next =3D QSIMPLEQ_FIRST(&queue->entries)) !=3D NULL) { QSIMPLEQ_REMOVE_HEAD(&queue->entries, co_queue_next); aio_co_wake(next); - if (single) { - break; - } } return true; } =20 -bool qemu_co_queue_next(CoQueue *queue) -{ - return qemu_co_queue_do_restart(queue, true); -} - -void qemu_co_queue_restart_all(CoQueue *queue) -{ - qemu_co_queue_do_restart(queue, false); -} - bool qemu_co_enter_next_impl(CoQueue *queue, QemuLockable *lock) { Coroutine *next; @@ -115,6 +102,12 @@ bool qemu_co_enter_next_impl(CoQueue *queue, QemuLocka= ble *lock) return true; } =20 +bool coroutine_fn qemu_co_queue_next(CoQueue *queue) +{ + /* No unlock/lock needed in coroutine context. */ + return qemu_co_enter_next_impl(queue, NULL); +} + bool qemu_co_queue_empty(CoQueue *queue) { return QSIMPLEQ_FIRST(&queue->entries) =3D=3D NULL; --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652378941; cv=none; d=zohomail.com; s=zohoarc; b=b0nwqgDchamOniiSK7NzTfoE1dIjfz8VDs3CodBKDLDJajFUW9xw4+5UUGnHE1UYv3hdq6ffDWGO6ybREBsqI0EfQtbquujjgXD6cAhKIMpETO0HZS3oNZFVrviF7yC0l+G14g3UCNyl9ibFjX7LbfogFjnuzp7ZNHrnPmOcE7c= ARC-Message-Signature: i=1; a=rsa-sha256; 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Thu, 12 May 2022 10:25:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwu7VZjnPqKdcsMVlstlzckZqTNI8WPhI5LPbDXZPUGw80CnKrBsrtLjPzo99JzTD2+gpRy2g== X-Received: by 2002:a17:907:1623:b0:6f6:e9ce:9926 with SMTP id hb35-20020a170907162300b006f6e9ce9926mr873671ejc.360.1652376352074; Thu, 12 May 2022 10:25:52 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Eric Blake Subject: [PULL 22/27] coroutine-lock: introduce qemu_co_queue_enter_all Date: Thu, 12 May 2022 19:25:00 +0200 Message-Id: <20220512172505.1065394-23-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378943562100001 Content-Type: text/plain; charset="utf-8" Because qemu_co_queue_restart_all does not release the lock, it should be used only in coroutine context. Introduce a new function that, like qemu_co_enter_next, does release the lock, and use it whenever qemu_co_queue_restart_all was used outside coroutine context. Signed-off-by: Paolo Bonzini Reviewed-by: Eric Blake Message-Id: <20220427130830.150180-3-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- include/qemu/coroutine.h | 13 +++++++++++++ ui/console.c | 2 +- util/qemu-coroutine-lock.c | 7 +++++++ 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/include/qemu/coroutine.h b/include/qemu/coroutine.h index c23d41e1ff..e5954635f6 100644 --- a/include/qemu/coroutine.h +++ b/include/qemu/coroutine.h @@ -234,6 +234,19 @@ void qemu_co_queue_restart_all(CoQueue *queue); qemu_co_enter_next_impl(queue, QEMU_MAKE_LOCKABLE(lock)) bool qemu_co_enter_next_impl(CoQueue *queue, QemuLockable *lock); =20 +/** + * Empties the CoQueue, waking the waiting coroutine one at a time. Unlike + * qemu_co_queue_all, this function releases the lock during aio_co_wake + * because it is meant to be used outside coroutine context; in that case,= the + * coroutine is entered immediately, before qemu_co_enter_all returns. + * + * If used in coroutine context, qemu_co_enter_all is equivalent to + * qemu_co_queue_all. + */ +#define qemu_co_enter_all(queue, lock) \ + qemu_co_enter_all_impl(queue, QEMU_MAKE_LOCKABLE(lock)) +void qemu_co_enter_all_impl(CoQueue *queue, QemuLockable *lock); + /** * Checks if the CoQueue is empty. */ diff --git a/ui/console.c b/ui/console.c index 15d0f6affd..36c80cd1de 100644 --- a/ui/console.c +++ b/ui/console.c @@ -221,7 +221,7 @@ static void gui_setup_refresh(DisplayState *ds) void graphic_hw_update_done(QemuConsole *con) { if (con) { - qemu_co_queue_restart_all(&con->dump_queue); + qemu_co_enter_all(&con->dump_queue, NULL); } } =20 diff --git a/util/qemu-coroutine-lock.c b/util/qemu-coroutine-lock.c index 5705cfea2e..5b0342faed 100644 --- a/util/qemu-coroutine-lock.c +++ b/util/qemu-coroutine-lock.c @@ -108,6 +108,13 @@ bool coroutine_fn qemu_co_queue_next(CoQueue *queue) return qemu_co_enter_next_impl(queue, NULL); } =20 +void qemu_co_enter_all_impl(CoQueue *queue, QemuLockable *lock) +{ + while (qemu_co_enter_next_impl(queue, lock)) { + /* just loop */ + } +} + bool qemu_co_queue_empty(CoQueue *queue) { return QSIMPLEQ_FIRST(&queue->entries) =3D=3D NULL; --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1652379449; cv=none; d=zohomail.com; s=zohoarc; b=efUUy+l34TsZaZSI/KYTGw8e5sc0BrNAYhLyffcQA1+XLW4mjp6HgS90UTZgdTEHCiJIRol5sevYPSa03IbcufJysee8+nh/dbHC70TeM/zh911v8IBKcXBh2m40BHvlifm3WIfJyKblkOOLkn/6LJaHg9GJxO4Etl1e58X+XU8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1652379449; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 12 May 2022 10:25:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwrbmY40vKBdFN0xqeq46aoJ0FuMgTBsGaWG6LH8a6RLOXvpwEagohnfmBFZZfUVR4+3NU7rw== X-Received: by 2002:a17:906:c149:b0:6f9:2a43:ef37 with SMTP id dp9-20020a170906c14900b006f92a43ef37mr860205ejc.17.1652376353868; Thu, 12 May 2022 10:25:53 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Eric Blake Subject: [PULL 23/27] coroutine-lock: qemu_co_queue_restart_all is a coroutine-only qemu_co_enter_all Date: Thu, 12 May 2022 19:25:01 +0200 Message-Id: <20220512172505.1065394-24-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652379449530100001 Content-Type: text/plain; charset="utf-8" qemu_co_queue_restart_all is basically the same as qemu_co_enter_all but without a QemuLockable argument. That's perfectly fine, but only as long as the function is marked coroutine_fn. If used outside coroutine context, qemu_co_queue_wait will attempt to take the lock and that is just broken: if you are calling qemu_co_queue_restart_all outside coroutine context, the lock is going to be a QemuMutex which cannot be taken twice by the same thread. The patch adds the marker to qemu_co_queue_restart_all and to its sole non-coroutine_fn caller; it then reimplements the function in terms of qemu_co_enter_all_impl, to remove duplicated code and to clarify that the latter also works in coroutine context. Signed-off-by: Paolo Bonzini Reviewed-by: Eric Blake Message-Id: <20220427130830.150180-4-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- block/io.c | 2 +- include/qemu/coroutine.h | 7 ++++--- util/qemu-coroutine-lock.c | 21 ++++++--------------- 3 files changed, 11 insertions(+), 19 deletions(-) diff --git a/block/io.c b/block/io.c index 9769ec53b0..789e6373d5 100644 --- a/block/io.c +++ b/block/io.c @@ -751,7 +751,7 @@ void bdrv_drain_all(void) * * This function should be called when a tracked request is completing. */ -static void tracked_request_end(BdrvTrackedRequest *req) +static void coroutine_fn tracked_request_end(BdrvTrackedRequest *req) { if (req->serialising) { qatomic_dec(&req->bs->serialising_in_flight); diff --git a/include/qemu/coroutine.h b/include/qemu/coroutine.h index e5954635f6..43df7a7e66 100644 --- a/include/qemu/coroutine.h +++ b/include/qemu/coroutine.h @@ -216,10 +216,11 @@ void coroutine_fn qemu_co_queue_wait_impl(CoQueue *qu= eue, QemuLockable *lock); bool coroutine_fn qemu_co_queue_next(CoQueue *queue); =20 /** - * Empties the CoQueue; all coroutines are woken up. - * OK to run from coroutine and non-coroutine context. + * Empties the CoQueue and queues the coroutine to run after + * the currently-running coroutine yields. + * Used from coroutine context, use qemu_co_enter_all outside. */ -void qemu_co_queue_restart_all(CoQueue *queue); +void coroutine_fn qemu_co_queue_restart_all(CoQueue *queue); =20 /** * Removes the next coroutine from the CoQueue, and wake it up. Unlike diff --git a/util/qemu-coroutine-lock.c b/util/qemu-coroutine-lock.c index 5b0342faed..9ad24ab1af 100644 --- a/util/qemu-coroutine-lock.c +++ b/util/qemu-coroutine-lock.c @@ -67,21 +67,6 @@ void coroutine_fn qemu_co_queue_wait_impl(CoQueue *queue= , QemuLockable *lock) } } =20 -void qemu_co_queue_restart_all(CoQueue *queue) -{ - Coroutine *next; - - if (QSIMPLEQ_EMPTY(&queue->entries)) { - return false; - } - - while ((next =3D QSIMPLEQ_FIRST(&queue->entries)) !=3D NULL) { - QSIMPLEQ_REMOVE_HEAD(&queue->entries, co_queue_next); - aio_co_wake(next); - } - return true; -} - bool qemu_co_enter_next_impl(CoQueue *queue, QemuLockable *lock) { Coroutine *next; @@ -115,6 +100,12 @@ void qemu_co_enter_all_impl(CoQueue *queue, QemuLockab= le *lock) } } =20 +void coroutine_fn qemu_co_queue_restart_all(CoQueue *queue) +{ + /* No unlock/lock needed in coroutine context. */ + qemu_co_enter_all_impl(queue, NULL); +} + bool qemu_co_queue_empty(CoQueue *queue) { return QSIMPLEQ_FIRST(&queue->entries) =3D=3D NULL; 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Thu, 12 May 2022 10:25:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwbKbED0gi1YVf7xOk3C2DHqGnLXFanbcz2e8928vW1CWjlOynGNGbILHyB7ZW8ghm9egIzgA== X-Received: by 2002:a17:906:974c:b0:6fa:8c68:62a8 with SMTP id o12-20020a170906974c00b006fa8c6862a8mr880077ejy.293.1652376358223; Thu, 12 May 2022 10:25:58 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Dov Murik Subject: [PULL 24/27] vhost-backend: do not depend on CONFIG_VHOST_VSOCK Date: Thu, 12 May 2022 19:25:02 +0200 Message-Id: <20220512172505.1065394-25-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378335876100001 Content-Type: text/plain; charset="utf-8" The vsock callbacks .vhost_vsock_set_guest_cid and .vhost_vsock_set_running are the only ones to be conditional on #ifdef CONFIG_VHOST_VSOCK. This is different from any other device-dependent callbacks like .vhost_scsi_set_endpoint, and it also broke when CONFIG_VHOST_VSOCK was changed to a per-target symbol. It would be possible to also use the CONFIG_DEVICES include, but really there is no reason for most virtio files to be per-target so just remove the #ifdef to fix the issue. Reported-by: Dov Murik Fixes: 9972ae314f ("build: move vhost-vsock configuration to Kconfig") Signed-off-by: Paolo Bonzini --- hw/virtio/vhost-backend.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/virtio/vhost-backend.c b/hw/virtio/vhost-backend.c index e409a865ae..4de8b6b3b0 100644 --- a/hw/virtio/vhost-backend.c +++ b/hw/virtio/vhost-backend.c @@ -203,7 +203,6 @@ static int vhost_kernel_get_vq_index(struct vhost_dev *= dev, int idx) return idx - dev->vq_index; } =20 -#ifdef CONFIG_VHOST_VSOCK static int vhost_kernel_vsock_set_guest_cid(struct vhost_dev *dev, uint64_t guest_cid) { @@ -214,7 +213,6 @@ static int vhost_kernel_vsock_set_running(struct vhost_= dev *dev, int start) { return vhost_kernel_call(dev, VHOST_VSOCK_SET_RUNNING, &start); } -#endif /* CONFIG_VHOST_VSOCK */ =20 static void vhost_kernel_iotlb_read(void *opaque) { @@ -319,10 +317,8 @@ const VhostOps kernel_ops =3D { .vhost_set_owner =3D vhost_kernel_set_owner, .vhost_reset_device =3D vhost_kernel_reset_device, .vhost_get_vq_index =3D vhost_kernel_get_vq_index, -#ifdef CONFIG_VHOST_VSOCK .vhost_vsock_set_guest_cid =3D vhost_kernel_vsock_set_guest_cid, .vhost_vsock_set_running =3D vhost_kernel_vsock_set_running, -#endif /* CONFIG_VHOST_VSOCK */ .vhost_set_iotlb_callback =3D vhost_kernel_set_iotlb_callback, .vhost_send_device_iotlb_msg =3D vhost_kernel_send_device_iotlb_ms= g, }; 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Thu, 12 May 2022 10:26:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzb90kIjAObf7/57ETpSOsAIKjZ8m8nl/MdfKmTUNT95+Rei6sGkzhbtBrnx4+59O77lRkdTw== X-Received: by 2002:a05:6402:3585:b0:427:ccd4:bec3 with SMTP id y5-20020a056402358500b00427ccd4bec3mr36497505edc.2.1652376361198; Thu, 12 May 2022 10:26:01 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Kshitij Suri Subject: [PULL 25/27] meson: link libpng independent of vnc Date: Thu, 12 May 2022 19:25:03 +0200 Message-Id: <20220512172505.1065394-26-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652378815100100001 Content-Type: text/plain; charset="utf-8" From: Kshitij Suri Currently png support is dependent on vnc for linking object file to libpng. This commit makes the parameter independent of vnc as it breaks system emulator with --disable-vnc unless --disable-png is added. Fixes: 9a0a119a38 ("Added parameter to take screenshot with screendump as P= NG", 2022-04-27) Signed-off-by: Kshitij Suri Message-Id: <20220510161932.228481-1-kshitij.suri@nutanix.com> Signed-off-by: Paolo Bonzini --- ui/meson.build | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ui/meson.build b/ui/meson.build index eba93b41e3..e9f48c5315 100644 --- a/ui/meson.build +++ b/ui/meson.build @@ -2,6 +2,7 @@ softmmu_ss.add(pixman) specific_ss.add(when: ['CONFIG_SOFTMMU'], if_true: pixman) # for the inc= lude path specific_ss.add(when: ['CONFIG_SOFTMMU'], if_true: opengl) # for the inc= lude path =20 +softmmu_ss.add(png) softmmu_ss.add(files( 'clipboard.c', 'console.c', @@ -40,7 +41,7 @@ vnc_ss.add(files( 'vnc-jobs.c', 'vnc-clipboard.c', )) -vnc_ss.add(zlib, png, jpeg, gnutls) +vnc_ss.add(zlib, jpeg, gnutls) vnc_ss.add(when: sasl, if_true: files('vnc-auth-sasl.c')) softmmu_ss.add_all(when: vnc, if_true: vnc_ss) softmmu_ss.add(when: vnc, if_false: files('vnc-stubs.c')) --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Reviewed-by: Markus Armbruster Message-Id: <20220511175043.27327-1-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini --- softmmu/vl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/softmmu/vl.c b/softmmu/vl.c index edba74f075..817d515783 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -3631,7 +3631,7 @@ void qemu_init(int argc, char **argv, char **envp) =20 machine_class =3D MACHINE_GET_CLASS(current_machine); if (!qtest_enabled() && machine_class->deprecation_reason) { - error_report("Machine type '%s' is deprecated: %s", + warn_report("Machine type '%s' is deprecated: %s", machine_class->name, machine_class->deprecation_reaso= n); } =20 --=20 2.36.0 From nobody Fri Apr 19 20:41:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Thu, 12 May 2022 10:26:05 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 27/27] vmxcap: add tertiary execution controls Date: Thu, 12 May 2022 19:25:05 +0200 Message-Id: <20220512172505.1065394-28-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220512172505.1065394-1-pbonzini@redhat.com> References: <20220512172505.1065394-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1652379811793100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Paolo Bonzini --- scripts/kvm/vmxcap | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap index f140040104..ce27f5e635 100755 --- a/scripts/kvm/vmxcap +++ b/scripts/kvm/vmxcap @@ -23,6 +23,7 @@ MSR_IA32_VMX_TRUE_PROCBASED_CTLS =3D 0x48E MSR_IA32_VMX_TRUE_EXIT_CTLS =3D 0x48F MSR_IA32_VMX_TRUE_ENTRY_CTLS =3D 0x490 MSR_IA32_VMX_VMFUNC =3D 0x491 +MSR_IA32_VMX_PROCBASED_CTLS3 =3D 0x492 =20 class msr(object): def __init__(self): @@ -71,6 +72,13 @@ class Control(object): s =3D 'yes' print(' %-40s %s' % (self.bits[bit], s)) =20 +# All 64 bits in the tertiary controls MSR are allowed-1 +class Allowed1Control(Control): + def read2(self, nr): + m =3D msr() + val =3D m.read(nr, 0) + return (0, val) + class Misc(object): def __init__(self, name, bits, msr): self.name =3D name @@ -135,6 +143,7 @@ controls =3D [ 12: 'RDTSC exiting', 15: 'CR3-load exiting', 16: 'CR3-store exiting', + 17: 'Activate tertiary controls', 19: 'CR8-load exiting', 20: 'CR8-store exiting', 21: 'Use TPR shadow', @@ -186,6 +195,14 @@ controls =3D [ cap_msr =3D MSR_IA32_VMX_PROCBASED_CTLS2, ), =20 + Allowed1Control( + name =3D 'tertiary processor-based controls', + bits =3D { + 4: 'Enable IPI virtualization' + }, + cap_msr =3D MSR_IA32_VMX_PROCBASED_CTLS3, + ), + Control( name =3D 'VM-Exit controls', bits =3D { --=20 2.36.0