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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650992983438100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-sve.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 7a39ed0c06..727f5cca36 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -3568,7 +3568,7 @@ static bool trans_CTERM(DisasContext *s, arg_CTERM *a) static bool trans_WHILE(DisasContext *s, arg_WHILE *a) { TCGv_i64 op0, op1, t0, t1, tmax; - TCGv_i32 t2, t3; + TCGv_i32 t2; TCGv_ptr ptr; unsigned vsz =3D vec_full_reg_size(s); unsigned desc =3D 0; @@ -3624,7 +3624,7 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE *a) } } =20 - tmax =3D tcg_const_i64(vsz >> a->esz); + tmax =3D tcg_constant_i64(vsz >> a->esz); if (eq) { /* Equality means one more iteration. */ tcg_gen_addi_i64(t0, t0, 1); @@ -3644,7 +3644,6 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE *a) =20 /* Bound to the maximum. */ tcg_gen_umin_i64(t0, t0, tmax); - tcg_temp_free_i64(tmax); =20 /* Set the count to zero if the condition is false. */ tcg_gen_movi_i64(t1, 0); @@ -3661,28 +3660,26 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE = *a) =20 desc =3D FIELD_DP32(desc, PREDDESC, OPRSZ, vsz / 8); desc =3D FIELD_DP32(desc, PREDDESC, ESZ, a->esz); - t3 =3D tcg_const_i32(desc); =20 ptr =3D tcg_temp_new_ptr(); tcg_gen_addi_ptr(ptr, cpu_env, pred_full_reg_offset(s, a->rd)); =20 if (a->lt) { - gen_helper_sve_whilel(t2, ptr, t2, t3); + gen_helper_sve_whilel(t2, ptr, t2, tcg_constant_i32(desc)); } else { - gen_helper_sve_whileg(t2, ptr, t2, t3); + gen_helper_sve_whileg(t2, ptr, t2, tcg_constant_i32(desc)); } do_pred_flags(t2); =20 tcg_temp_free_ptr(ptr); tcg_temp_free_i32(t2); - tcg_temp_free_i32(t3); return true; } =20 static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a) { TCGv_i64 op0, op1, diff, t1, tmax; - TCGv_i32 t2, t3; + TCGv_i32 t2; TCGv_ptr ptr; unsigned vsz =3D vec_full_reg_size(s); unsigned desc =3D 0; @@ -3697,7 +3694,7 @@ static bool trans_WHILE_ptr(DisasContext *s, arg_WHIL= E_ptr *a) op0 =3D read_cpu_reg(s, a->rn, 1); op1 =3D read_cpu_reg(s, a->rm, 1); =20 - tmax =3D tcg_const_i64(vsz); + tmax =3D tcg_constant_i64(vsz); diff =3D tcg_temp_new_i64(); =20 if (a->rw) { @@ -3723,7 +3720,6 @@ static bool trans_WHILE_ptr(DisasContext *s, arg_WHIL= E_ptr *a) =20 /* Bound to the maximum. */ tcg_gen_umin_i64(diff, diff, tmax); - tcg_temp_free_i64(tmax); =20 /* Since we're bounded, pass as a 32-bit type. */ t2 =3D tcg_temp_new_i32(); @@ -3732,17 +3728,15 @@ static bool trans_WHILE_ptr(DisasContext *s, arg_WH= ILE_ptr *a) =20 desc =3D FIELD_DP32(desc, PREDDESC, OPRSZ, vsz / 8); desc =3D FIELD_DP32(desc, PREDDESC, ESZ, a->esz); - t3 =3D tcg_const_i32(desc); =20 ptr =3D tcg_temp_new_ptr(); tcg_gen_addi_ptr(ptr, cpu_env, pred_full_reg_offset(s, a->rd)); =20 - gen_helper_sve_whilel(t2, ptr, t2, t3); + gen_helper_sve_whilel(t2, ptr, t2, tcg_constant_i32(desc)); do_pred_flags(t2); =20 tcg_temp_free_ptr(ptr); tcg_temp_free_i32(t2); - tcg_temp_free_i32(t3); return true; } =20 --=20 2.34.1