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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 21/31] hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both
combiners
Date: Thu, 21 Apr 2022 12:18:36 +0100
Message-Id: <20220421111846.2011565-22-peter.maydell@linaro.org>
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Currently for the interrupts MCT_G0 and MCT_G1 which are
the only ones in the input range of the external combiner
and which are also wired to the external GIC, we connect
them only to the internal combiner and the external GIC.
This seems likely to be a bug, as all other interrupts
which are in the input range of both combiners are
connected to both combiners. (The fact that the code in
exynos4210_combiner_get_gpioin() is also trying to wire
up these inputs on both combiners also suggests this.)
Wire these interrupts up to both combiners, like the rest.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-15-peter.maydell@linaro.org
---
hw/arm/exynos4210.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index a4527f819ef..962d6d0ac2a 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -281,16 +281,15 @@ static void exynos4210_init_board_irqs(Exynos4210Stat=
e *s)
=20
assert(splitcount < EXYNOS4210_NUM_SPLITTERS);
splitter =3D DEVICE(&s->splitter[splitcount]);
- qdev_prop_set_uint16(splitter, "num-lines", 2);
+ qdev_prop_set_uint16(splitter, "num-lines", irq_id ? 3 : 2);
qdev_realize(splitter, NULL, &error_abort);
splitcount++;
s->irq_table[n] =3D qdev_get_gpio_in(splitter, 0);
qdev_connect_gpio_out(splitter, 0, is->int_combiner_irq[n]);
+ qdev_connect_gpio_out(splitter, 1, is->ext_combiner_irq[n]);
if (irq_id) {
- qdev_connect_gpio_out(splitter, 1,
+ qdev_connect_gpio_out(splitter, 2,
qdev_get_gpio_in(extgicdev, irq_id - 32)=
);
- } else {
- qdev_connect_gpio_out(splitter, 1, is->ext_combiner_irq[n]);
}
}
for (; n < EXYNOS4210_MAX_INT_COMBINER_IN_IRQ; n++) {
--=20
2.25.1