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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 12/31] hw/arm/exynos4210: Coalesce board_irqs and irq_table
Date: Thu, 21 Apr 2022 12:18:27 +0100
Message-Id: <20220421111846.2011565-13-peter.maydell@linaro.org>
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The exynos4210 code currently has two very similar arrays of IRQs:
* board_irqs is a field of the Exynos4210Irq struct which is filled
in by exynos4210_init_board_irqs() with the appropriate qemu_irqs
for each IRQ the board/SoC can assert
* irq_table is a set of qemu_irqs pointed to from the
Exynos4210State struct. It's allocated in exynos4210_init_irq,
and the only behaviour these irqs have is that they pass on the
level to the equivalent board_irqs[] irq
The extra indirection through irq_table is unnecessary, so coalesce
these into a single irq_table[] array as a direct field in
Exynos4210State which exynos4210_init_board_irqs() fills in.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-6-peter.maydell@linaro.org
---
include/hw/arm/exynos4210.h | 8 ++------
hw/arm/exynos4210.c | 6 +-----
hw/intc/exynos4210_gic.c | 32 ++++++++------------------------
3 files changed, 11 insertions(+), 35 deletions(-)
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index 923ce987627..a9f186370ee 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -83,7 +83,6 @@ typedef struct Exynos4210Irq {
qemu_irq int_combiner_irq[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
qemu_irq ext_combiner_irq[EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ];
qemu_irq ext_gic_irq[EXYNOS4210_EXT_GIC_NIRQ];
- qemu_irq board_irqs[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
} Exynos4210Irq;
=20
struct Exynos4210State {
@@ -92,7 +91,7 @@ struct Exynos4210State {
/*< public >*/
ARMCPU *cpu[EXYNOS4210_NCPUS];
Exynos4210Irq irqs;
- qemu_irq *irq_table;
+ qemu_irq irq_table[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
=20
MemoryRegion chipid_mem;
MemoryRegion iram_mem;
@@ -112,12 +111,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210State, EXYNOS4210=
_SOC)
void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info);
=20
-/* Initialize exynos4210 IRQ subsystem stub */
-qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);
-
/* Initialize board IRQs.
* These IRQs contain splitted Int/External Combiner and External Gic IRQs=
*/
-void exynos4210_init_board_irqs(Exynos4210Irq *s);
+void exynos4210_init_board_irqs(Exynos4210State *s);
=20
/* Get IRQ number from exynos4210 IRQ subsystem stub.
* To identify IRQ source use internal combiner group and bit number
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 60fc5a2ffe7..11e321d7830 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -228,10 +228,6 @@ static void exynos4210_realize(DeviceState *socdev, Er=
ror **errp)
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
}
=20
- /*** IRQs ***/
-
- s->irq_table =3D exynos4210_init_irq(&s->irqs);
-
/* IRQ Gate */
for (i =3D 0; i < EXYNOS4210_NCPUS; i++) {
DeviceState *orgate =3D DEVICE(&s->cpu_irq_orgate[i]);
@@ -296,7 +292,7 @@ static void exynos4210_realize(DeviceState *socdev, Err=
or **errp)
sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_COMBINER_BASE_ADDR);
=20
/* Initialize board IRQs. */
- exynos4210_init_board_irqs(&s->irqs);
+ exynos4210_init_board_irqs(s);
=20
/*** Memory ***/
=20
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index 794f6b5ac72..ec79b96f6d1 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -192,30 +192,14 @@ combiner_grp_to_gic_id[64-EXYNOS4210_MAX_EXT_COMBINER=
_OUT_IRQ][8] =3D {
#define EXYNOS4210_GIC_CPU_REGION_SIZE 0x100
#define EXYNOS4210_GIC_DIST_REGION_SIZE 0x1000
=20
-static void exynos4210_irq_handler(void *opaque, int irq, int level)
-{
- Exynos4210Irq *s =3D (Exynos4210Irq *)opaque;
-
- /* Bypass */
- qemu_set_irq(s->board_irqs[irq], level);
-}
-
-/*
- * Initialize exynos4210 IRQ subsystem stub.
- */
-qemu_irq *exynos4210_init_irq(Exynos4210Irq *s)
-{
- return qemu_allocate_irqs(exynos4210_irq_handler, s,
- EXYNOS4210_MAX_INT_COMBINER_IN_IRQ);
-}
-
/*
* Initialize board IRQs.
* These IRQs contain splitted Int/External Combiner and External Gic IRQs.
*/
-void exynos4210_init_board_irqs(Exynos4210Irq *s)
+void exynos4210_init_board_irqs(Exynos4210State *s)
{
uint32_t grp, bit, irq_id, n;
+ Exynos4210Irq *is =3D &s->irqs;
=20
for (n =3D 0; n < EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ; n++) {
irq_id =3D 0;
@@ -230,11 +214,11 @@ void exynos4210_init_board_irqs(Exynos4210Irq *s)
irq_id =3D EXT_GIC_ID_MCT_G1;
}
if (irq_id) {
- s->board_irqs[n] =3D qemu_irq_split(s->int_combiner_irq[n],
- s->ext_gic_irq[irq_id-32]);
+ s->irq_table[n] =3D qemu_irq_split(is->int_combiner_irq[n],
+ is->ext_gic_irq[irq_id - 32]);
} else {
- s->board_irqs[n] =3D qemu_irq_split(s->int_combiner_irq[n],
- s->ext_combiner_irq[n]);
+ s->irq_table[n] =3D qemu_irq_split(is->int_combiner_irq[n],
+ is->ext_combiner_irq[n]);
}
}
for (; n < EXYNOS4210_MAX_INT_COMBINER_IN_IRQ; n++) {
@@ -245,8 +229,8 @@ void exynos4210_init_board_irqs(Exynos4210Irq *s)
EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ][bit];
=20
if (irq_id) {
- s->board_irqs[n] =3D qemu_irq_split(s->int_combiner_irq[n],
- s->ext_gic_irq[irq_id-32]);
+ s->irq_table[n] =3D qemu_irq_split(is->int_combiner_irq[n],
+ is->ext_gic_irq[irq_id - 32]);
}
}
}
--=20
2.25.1