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dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1650351233; x=1652943234; bh=/LhyZf2nYA3CHhEVP9 i1qF21zpSIkG1ugCVQa7PPYo4=; b=plHND4LB2ipeZK/a9wKxzlqQCyTG0xxwFv CEmhVpIsCfL7z8kdX56gNuZYo4gB1Bs5WxlDKuoBS2vQsKtpqGxUpaaKJRRbXFW/ pgyKnp9g47opnSjEB2Kk+WP3CUghq9v/uck1/kB2NoojNimBdqG5lIAjxgm++ZE+ KmML5YMFdfi6lZ7n7gLUwFcQMxPOfOi4HorA+vaHHDH1IKFxOfU+CvF8XdVEoIAV Hgs1xyUFBgaqUteiuz1z+gwEyL5bCCRIllr9Bvlu+WpG4x5el3hjkXVJ/5I2iT7m IOJk1q4EJ9V/IfAQMSsdIWDOTpwkJKm+osHLCMssdlBsj7upKRPQ== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Alistair Francis , Bin Meng , alistair23@gmail.com, palmer@dabbelt.com, bmeng.cn@gmail.com Subject: [PATCH v3 1/6] hw/riscv: virt: Add a machine done notifier Date: Tue, 19 Apr 2022 16:53:37 +1000 Message-Id: <20220419065342.878415-2-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220419065342.878415-1-alistair.francis@opensource.wdc.com> References: <20220419065342.878415-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.153.141; envelope-from=prvs=101f09098=alistair.francis@opensource.wdc.com; helo=esa3.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650354126006100003 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Move the binary and device tree loading code to the machine done notifier. This allows us to prepare for editing the device tree as part of the notifier. This is based on similar code in the ARM virt machine. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- include/hw/riscv/virt.h | 1 + hw/riscv/virt.c | 180 +++++++++++++++++++++------------------- 2 files changed, 97 insertions(+), 84 deletions(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 78b058ec86..8b8db3fb7c 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -45,6 +45,7 @@ struct RISCVVirtState { MachineState parent; =20 /*< public >*/ + Notifier machine_done; RISCVHartArrayState soc[VIRT_SOCKETS_MAX]; DeviceState *irqchip[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index da50cbed43..3d48469367 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1156,6 +1156,95 @@ static DeviceState *virt_create_aia(RISCVVirtAIAType= aia_type, int aia_guests, return aplic_m; } =20 +static +void virt_machine_done(Notifier *notifier, void *data) +{ + RISCVVirtState *s =3D container_of(notifier, RISCVVirtState, + machine_done); + const MemMapEntry *memmap =3D virt_memmap; + MachineState *machine =3D MACHINE(s); + target_ulong start_addr =3D memmap[VIRT_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; + uint32_t fdt_load_addr; + uint64_t kernel_entry; + + /* + * Only direct boot kernel is currently supported for KVM VM, + * so the "-bios" parameter is ignored and treated like "-bios none" + * when KVM is enabled. + */ + if (kvm_enabled()) { + g_free(machine->firmware); + machine->firmware =3D g_strdup("none"); + } + + if (riscv_is_32bit(&s->soc[0])) { + firmware_end_addr =3D riscv_find_and_load_firmware(machine, + RISCV32_BIOS_BIN, start_addr, NULL); + } else { + firmware_end_addr =3D riscv_find_and_load_firmware(machine, + RISCV64_BIOS_BIN, start_addr, NULL); + } + + if (machine->kernel_filename) { + kernel_start_addr =3D riscv_calc_kernel_start_addr(&s->soc[0], + firmware_end_addr= ); + + kernel_entry =3D riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); + + if (machine->initrd_filename) { + hwaddr start; + hwaddr end =3D riscv_load_initrd(machine->initrd_filename, + machine->ram_size, kernel_entry, + &start); + qemu_fdt_setprop_cell(machine->fdt, "/chosen", + "linux,initrd-start", start); + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", + end); + } + } else { + /* + * If dynamic firmware is used, it doesn't know where is the next m= ode + * if kernel argument is not set. + */ + kernel_entry =3D 0; + } + + if (drive_get(IF_PFLASH, 0, 0)) { + /* + * Pflash was supplied, let's overwrite the address we jump to aft= er + * reset to the base of the flash. + */ + start_addr =3D virt_memmap[VIRT_FLASH].base; + } + + /* + * Init fw_cfg. Must be done before riscv_load_fdt, otherwise the dev= ice + * tree cannot be altered and we get FDT_ERR_NOSPACE. + */ + s->fw_cfg =3D create_fw_cfg(machine); + rom_set_fw(s->fw_cfg); + + /* Compute the fdt load address in dram */ + fdt_load_addr =3D riscv_load_fdt(memmap[VIRT_DRAM].base, + machine->ram_size, machine->fdt); + /* load the reset vector */ + riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, + virt_memmap[VIRT_MROM].base, + virt_memmap[VIRT_MROM].size, kernel_entry, + fdt_load_addr, machine->fdt); + + /* + * Only direct boot kernel is currently supported for KVM VM, + * So here setup kernel start address and fdt address. + * TODO:Support firmware loading and integrate to TCG start + */ + if (kvm_enabled()) { + riscv_setup_direct_kernel(kernel_entry, fdt_load_addr); + } +} + static void virt_machine_init(MachineState *machine) { const MemMapEntry *memmap =3D virt_memmap; @@ -1163,10 +1252,6 @@ static void virt_machine_init(MachineState *machine) MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *mask_rom =3D g_new(MemoryRegion, 1); char *soc_name; - target_ulong start_addr =3D memmap[VIRT_DRAM].base; - target_ulong firmware_end_addr, kernel_start_addr; - uint32_t fdt_load_addr; - uint64_t kernel_entry; DeviceState *mmio_irqchip, *virtio_irqchip, *pcie_irqchip; int i, base_hartid, hart_count; =20 @@ -1296,92 +1381,12 @@ static void virt_machine_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[VIRT_DRAM].base, machine->ram); =20 - /* create device tree */ - create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline, - riscv_is_32bit(&s->soc[0])); - /* boot rom */ memory_region_init_rom(mask_rom, NULL, "riscv_virt_board.mrom", memmap[VIRT_MROM].size, &error_fatal); memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, mask_rom); =20 - /* - * Only direct boot kernel is currently supported for KVM VM, - * so the "-bios" parameter is ignored and treated like "-bios none" - * when KVM is enabled. - */ - if (kvm_enabled()) { - g_free(machine->firmware); - machine->firmware =3D g_strdup("none"); - } - - if (riscv_is_32bit(&s->soc[0])) { - firmware_end_addr =3D riscv_find_and_load_firmware(machine, - RISCV32_BIOS_BIN, start_addr, NULL); - } else { - firmware_end_addr =3D riscv_find_and_load_firmware(machine, - RISCV64_BIOS_BIN, start_addr, NULL); - } - - if (machine->kernel_filename) { - kernel_start_addr =3D riscv_calc_kernel_start_addr(&s->soc[0], - firmware_end_addr= ); - - kernel_entry =3D riscv_load_kernel(machine->kernel_filename, - kernel_start_addr, NULL); - - if (machine->initrd_filename) { - hwaddr start; - hwaddr end =3D riscv_load_initrd(machine->initrd_filename, - machine->ram_size, kernel_entry, - &start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", - "linux,initrd-start", start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", - end); - } - } else { - /* - * If dynamic firmware is used, it doesn't know where is the next m= ode - * if kernel argument is not set. - */ - kernel_entry =3D 0; - } - - if (drive_get(IF_PFLASH, 0, 0)) { - /* - * Pflash was supplied, let's overwrite the address we jump to aft= er - * reset to the base of the flash. - */ - start_addr =3D virt_memmap[VIRT_FLASH].base; - } - - /* - * Init fw_cfg. Must be done before riscv_load_fdt, otherwise the dev= ice - * tree cannot be altered and we get FDT_ERR_NOSPACE. - */ - s->fw_cfg =3D create_fw_cfg(machine); - rom_set_fw(s->fw_cfg); - - /* Compute the fdt load address in dram */ - fdt_load_addr =3D riscv_load_fdt(memmap[VIRT_DRAM].base, - machine->ram_size, machine->fdt); - /* load the reset vector */ - riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, - virt_memmap[VIRT_MROM].base, - virt_memmap[VIRT_MROM].size, kernel_entry, - fdt_load_addr, machine->fdt); - - /* - * Only direct boot kernel is currently supported for KVM VM, - * So here setup kernel start address and fdt address. - * TODO:Support firmware loading and integrate to TCG start - */ - if (kvm_enabled()) { - riscv_setup_direct_kernel(kernel_entry, fdt_load_addr); - } - /* SiFive Test MMIO device */ sifive_test_create(memmap[VIRT_TEST].base); =20 @@ -1417,6 +1422,13 @@ static void virt_machine_init(MachineState *machine) drive_get(IF_PFLASH, 0, i)); } virt_flash_map(s, system_memory); + + /* create device tree */ + create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline, + riscv_is_32bit(&s->soc[0])); + + s->machine_done.notify =3D virt_machine_done; + qemu_add_machine_init_done_notifier(&s->machine_done); } =20 static void virt_machine_instance_init(Object *obj) --=20 2.35.1 From nobody Wed May 1 16:57:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650354086875208.33567721176212; Tue, 19 Apr 2022 00:41:26 -0700 (PDT) Received: from localhost ([::1]:48910 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngiUH-0001mH-O7 for importer@patchew.org; Tue, 19 Apr 2022 03:41:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41276) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nghkX-0003uf-Ev for qemu-devel@nongnu.org; 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dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1650351237; x=1652943238; bh=MDWFWDRchKuYdI+t20 XFRd6iszdOc+o4yz5MgNB95Fg=; b=Hl4w3No0ZN7QLMMXPZ9xkdHqip9YNAXIQ3 VnExy1aCHNlh3lGK8dlxWp3CBEDDsULbJlYLauOP4bNGPRnqu3XWTTAeTs/Hyt0L xfE4//ToFmD07h9MDfMOjUcIZ3r8L+jFDlfvAcY+/8LOJuERfRmo8P7/2ZzFm0tM pWuQPVDqVlbChxN+8Kz1/CUq4EL1lyRN16Szcf/St3UJobERHdJL+a/zDSbuNRGB m3t0P87zt0I5RGVY2rpJq5uqtD5q+Z1SwEt0NUs78cxMLYgOGgT2njq0RKASMK7J xVB1zoudXCgQ3CeksdTbOewlngDV3wqd7r26yUbbVsOD2QIxYJ4Q== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Alistair Francis , Bin Meng , alistair23@gmail.com, palmer@dabbelt.com, bmeng.cn@gmail.com Subject: [PATCH v3 2/6] hw/core: Move the ARM sysbus-fdt to core Date: Tue, 19 Apr 2022 16:53:38 +1000 Message-Id: <20220419065342.878415-3-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220419065342.878415-1-alistair.francis@opensource.wdc.com> References: <20220419065342.878415-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=101f09098=alistair.francis@opensource.wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650354088612100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis The ARM virt machine currently uses sysbus-fdt to create device tree entries for dynamically created MMIO devices. The RISC-V virt machine can also benefit from this, so move the code to the core directory. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- include/hw/{arm =3D> core}/sysbus-fdt.h | 0 hw/arm/virt.c | 2 +- hw/arm/xlnx-versal-virt.c | 1 - hw/{arm =3D> core}/sysbus-fdt.c | 2 +- hw/arm/meson.build | 1 - hw/core/meson.build | 1 + 6 files changed, 3 insertions(+), 4 deletions(-) rename include/hw/{arm =3D> core}/sysbus-fdt.h (100%) rename hw/{arm =3D> core}/sysbus-fdt.c (99%) diff --git a/include/hw/arm/sysbus-fdt.h b/include/hw/core/sysbus-fdt.h similarity index 100% rename from include/hw/arm/sysbus-fdt.h rename to include/hw/core/sysbus-fdt.h diff --git a/hw/arm/virt.c b/hw/arm/virt.c index d2e5ecd234..cfababa292 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -56,7 +56,7 @@ #include "qemu/module.h" #include "hw/pci-host/gpex.h" #include "hw/virtio/virtio-pci.h" -#include "hw/arm/sysbus-fdt.h" +#include "hw/core/sysbus-fdt.h" #include "hw/platform-bus.h" #include "hw/qdev-properties.h" #include "hw/arm/fdt.h" diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 7c7baff8b7..bc20af4ba8 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -15,7 +15,6 @@ #include "sysemu/device_tree.h" #include "hw/boards.h" #include "hw/sysbus.h" -#include "hw/arm/sysbus-fdt.h" #include "hw/arm/fdt.h" #include "cpu.h" #include "hw/qdev-properties.h" diff --git a/hw/arm/sysbus-fdt.c b/hw/core/sysbus-fdt.c similarity index 99% rename from hw/arm/sysbus-fdt.c rename to hw/core/sysbus-fdt.c index 48c5fe9bf1..19d22cbe73 100644 --- a/hw/arm/sysbus-fdt.c +++ b/hw/core/sysbus-fdt.c @@ -27,7 +27,7 @@ #ifdef CONFIG_LINUX #include #endif -#include "hw/arm/sysbus-fdt.h" +#include "hw/core/sysbus-fdt.h" #include "qemu/error-report.h" #include "sysemu/device_tree.h" #include "sysemu/tpm.h" diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 721a8eb8be..122e5dd992 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -1,6 +1,5 @@ arm_ss =3D ss.source_set() arm_ss.add(files('boot.c'), fdt) -arm_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c')) arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c')) arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c')) diff --git a/hw/core/meson.build b/hw/core/meson.build index 0f884d6fd4..7a4d02b6c0 100644 --- a/hw/core/meson.build +++ b/hw/core/meson.build @@ -33,6 +33,7 @@ softmmu_ss.add(when: 'CONFIG_PTIMER', if_true: files('pti= mer.c')) softmmu_ss.add(when: 'CONFIG_REGISTER', if_true: files('register.c')) softmmu_ss.add(when: 'CONFIG_SPLIT_IRQ', if_true: files('split-irq.c')) softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('stream.c')) +softmmu_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c')) =20 softmmu_ss.add(files( 'cpu-sysemu.c', --=20 2.35.1 From nobody Wed May 1 16:57:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=101f09098=alistair.francis@opensource.wdc.com; helo=esa4.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650354466641100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Create a platform bus to allow dynamic devices to be connected. This is based on the ARM implementation. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- include/hw/riscv/virt.h | 7 ++++- hw/riscv/virt.c | 68 +++++++++++++++++++++++++++++------------ hw/riscv/Kconfig | 1 + 3 files changed, 56 insertions(+), 20 deletions(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 8b8db3fb7c..984e55c77f 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -46,6 +46,7 @@ struct RISCVVirtState { =20 /*< public >*/ Notifier machine_done; + DeviceState *platform_bus_dev; RISCVHartArrayState soc[VIRT_SOCKETS_MAX]; DeviceState *irqchip[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; @@ -76,6 +77,7 @@ enum { VIRT_DRAM, VIRT_PCIE_MMIO, VIRT_PCIE_PIO, + VIRT_PLATFORM_BUS, VIRT_PCIE_ECAM }; =20 @@ -85,9 +87,12 @@ enum { VIRTIO_IRQ =3D 1, /* 1 to 8 */ VIRTIO_COUNT =3D 8, PCIE_IRQ =3D 0x20, /* 32 to 35 */ - VIRTIO_NDEV =3D 0x35 /* Arbitrary maximum number of interrupts */ + VIRT_PLATFORM_BUS_IRQ =3D 64, /* 64 to 96 */ + VIRTIO_NDEV =3D 96 /* Arbitrary maximum number of interrupts */ }; =20 +#define VIRT_PLATFORM_BUS_NUM_IRQS 32 + #define VIRT_IRQCHIP_IPI_MSI 1 #define VIRT_IRQCHIP_NUM_MSIS 255 #define VIRT_IRQCHIP_NUM_SOURCES VIRTIO_NDEV diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 3d48469367..169da70350 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -37,6 +37,7 @@ #include "hw/intc/riscv_imsic.h" #include "hw/intc/sifive_plic.h" #include "hw/misc/sifive_test.h" +#include "hw/platform-bus.h" #include "chardev/char.h" #include "sysemu/device_tree.h" #include "sysemu/sysemu.h" @@ -68,25 +69,26 @@ #endif =20 static const MemMapEntry virt_memmap[] =3D { - [VIRT_DEBUG] =3D { 0x0, 0x100 }, - [VIRT_MROM] =3D { 0x1000, 0xf000 }, - [VIRT_TEST] =3D { 0x100000, 0x1000 }, - [VIRT_RTC] =3D { 0x101000, 0x1000 }, - [VIRT_CLINT] =3D { 0x2000000, 0x10000 }, - [VIRT_ACLINT_SSWI] =3D { 0x2F00000, 0x4000 }, - [VIRT_PCIE_PIO] =3D { 0x3000000, 0x10000 }, - [VIRT_PLIC] =3D { 0xc000000, VIRT_PLIC_SIZE(VIRT_CPUS_MAX * 2)= }, - [VIRT_APLIC_M] =3D { 0xc000000, APLIC_SIZE(VIRT_CPUS_MAX) }, - [VIRT_APLIC_S] =3D { 0xd000000, APLIC_SIZE(VIRT_CPUS_MAX) }, - [VIRT_UART0] =3D { 0x10000000, 0x100 }, - [VIRT_VIRTIO] =3D { 0x10001000, 0x1000 }, - [VIRT_FW_CFG] =3D { 0x10100000, 0x18 }, - [VIRT_FLASH] =3D { 0x20000000, 0x4000000 }, - [VIRT_IMSIC_M] =3D { 0x24000000, VIRT_IMSIC_MAX_SIZE }, - [VIRT_IMSIC_S] =3D { 0x28000000, VIRT_IMSIC_MAX_SIZE }, - [VIRT_PCIE_ECAM] =3D { 0x30000000, 0x10000000 }, - [VIRT_PCIE_MMIO] =3D { 0x40000000, 0x40000000 }, - [VIRT_DRAM] =3D { 0x80000000, 0x0 }, + [VIRT_DEBUG] =3D { 0x0, 0x100 }, + [VIRT_MROM] =3D { 0x1000, 0xf000 }, + [VIRT_TEST] =3D { 0x100000, 0x1000 }, + [VIRT_RTC] =3D { 0x101000, 0x1000 }, + [VIRT_CLINT] =3D { 0x2000000, 0x10000 }, + [VIRT_ACLINT_SSWI] =3D { 0x2F00000, 0x4000 }, + [VIRT_PCIE_PIO] =3D { 0x3000000, 0x10000 }, + [VIRT_PLATFORM_BUS] =3D { 0x4000000, 0x2000000 }, + [VIRT_PLIC] =3D { 0xc000000, VIRT_PLIC_SIZE(VIRT_CPUS_MAX * 2= ) }, + [VIRT_APLIC_M] =3D { 0xc000000, APLIC_SIZE(VIRT_CPUS_MAX) }, + [VIRT_APLIC_S] =3D { 0xd000000, APLIC_SIZE(VIRT_CPUS_MAX) }, + [VIRT_UART0] =3D { 0x10000000, 0x100 }, + [VIRT_VIRTIO] =3D { 0x10001000, 0x1000 }, + [VIRT_FW_CFG] =3D { 0x10100000, 0x18 }, + [VIRT_FLASH] =3D { 0x20000000, 0x4000000 }, + [VIRT_IMSIC_M] =3D { 0x24000000, VIRT_IMSIC_MAX_SIZE }, + [VIRT_IMSIC_S] =3D { 0x28000000, VIRT_IMSIC_MAX_SIZE }, + [VIRT_PCIE_ECAM] =3D { 0x30000000, 0x10000000 }, + [VIRT_PCIE_MMIO] =3D { 0x40000000, 0x40000000 }, + [VIRT_DRAM] =3D { 0x80000000, 0x0 }, }; =20 /* PCIe high mmio is fixed for RV32 */ @@ -1156,6 +1158,32 @@ static DeviceState *virt_create_aia(RISCVVirtAIAType= aia_type, int aia_guests, return aplic_m; } =20 +static void create_platform_bus(RISCVVirtState *s, DeviceState *irqchip) +{ + DeviceState *dev; + SysBusDevice *sysbus; + const MemMapEntry *memmap =3D virt_memmap; + int i; + MemoryRegion *sysmem =3D get_system_memory(); + + dev =3D qdev_new(TYPE_PLATFORM_BUS_DEVICE); + dev->id =3D g_strdup(TYPE_PLATFORM_BUS_DEVICE); + qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); + qdev_prop_set_uint32(dev, "mmio_size", memmap[VIRT_PLATFORM_BUS].size); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + s->platform_bus_dev =3D dev; + + sysbus =3D SYS_BUS_DEVICE(dev); + for (i =3D 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { + int irq =3D VIRT_PLATFORM_BUS_IRQ + i; + sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(irqchip, irq)); + } + + memory_region_add_subregion(sysmem, + memmap[VIRT_PLATFORM_BUS].base, + sysbus_mmio_get_region(sysbus, 0)); +} + static void virt_machine_done(Notifier *notifier, void *data) { @@ -1407,6 +1435,8 @@ static void virt_machine_init(MachineState *machine) memmap[VIRT_PCIE_PIO].base, DEVICE(pcie_irqchip)); =20 + create_platform_bus(s, DEVICE(mmio_irqchip)); + serial_mm_init(system_memory, memmap[VIRT_UART0].base, 0, qdev_get_gpio_in(DEVICE(mmio_irqchip), UART0_IRQ), 399193, serial_hd(0), DEVICE_LITTLE_ENDIAN); diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index 91bb9d21c4..da790f5936 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -48,6 +48,7 @@ config RISCV_VIRT select SIFIVE_TEST select VIRTIO_MMIO select FW_CFG_DMA + select PLATFORM_BUS =20 config SIFIVE_E bool --=20 2.35.1 From nobody Wed May 1 16:57:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650354502499605.1429566449167; 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s=dkim; t=1650351244; x=1652943245; bh=H2nNCdBlGkbhKY2PzS 9ttJJUrgi/BvPdzYzwwCBJy3c=; b=YodiCT/J+iM6olQ53Q0tdnPw4QAXQoQWoV 73Z+9Z9DnkPAJGsSGlNvKn8nrJeYlREZidryMrlzg65hSBh4QujugRWau5w/dSrj J4UMDLHPhyYBJPJoukx9YVx1xBP0G8oBOIgxdHvvp+HeL5xeT3tTRHPMbPlDbxZ1 aqOkj7XenaJh2ix/KKBwJrXs2Vx4Ks0fPYcrsibiWirkm9OninPuAoa/Hq4MM3ko odRKXkG83MjYxYbVRguSLkoAEbvyDIQxBQi7WdA+Jp5FmFTFO7guvPb0hw+pV0r3 g1VGLpqxf2Aur23P3xhzTn/6vU49j/3UyuaE8B2R7gJrJqlOfYkg== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Alistair Francis , Bin Meng , alistair23@gmail.com, palmer@dabbelt.com, bmeng.cn@gmail.com Subject: [PATCH v3 4/6] hw/riscv: virt: Add support for generating platform FDT entries Date: Tue, 19 Apr 2022 16:53:40 +1000 Message-Id: <20220419065342.878415-5-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220419065342.878415-1-alistair.francis@opensource.wdc.com> References: <20220419065342.878415-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=101f09098=alistair.francis@opensource.wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650354504809100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Similar to the ARM virt machine add support for adding device tree entries for dynamically created devices. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- hw/riscv/virt.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 169da70350..e4a5c6c28b 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "hw/char/serial.h" #include "target/riscv/cpu.h" +#include "hw/core/sysbus-fdt.h" #include "hw/riscv/riscv_hart.h" #include "hw/riscv/virt.h" #include "hw/riscv/boot.h" @@ -411,6 +412,12 @@ static void create_fdt_socket_aclint(RISCVVirtState *s, qemu_fdt_setprop(mc->fdt, name, "interrupt-controller", NULL, 0); qemu_fdt_setprop_cell(mc->fdt, name, "#interrupt-cells", 0); riscv_socket_fdt_write_id(mc, mc->fdt, name, socket); + + platform_bus_add_all_fdt_nodes(mc->fdt, name, + memmap[VIRT_PLATFORM_BUS].base, + memmap[VIRT_PLATFORM_BUS].size, + VIRT_PLATFORM_BUS_IRQ); + g_free(name); } =20 @@ -469,6 +476,12 @@ static void create_fdt_socket_plic(RISCVVirtState *s, riscv_socket_fdt_write_id(mc, mc->fdt, plic_name, socket); qemu_fdt_setprop_cell(mc->fdt, plic_name, "phandle", plic_phandles[socket]); + + platform_bus_add_all_fdt_nodes(mc->fdt, plic_name, + memmap[VIRT_PLATFORM_BUS].base, + memmap[VIRT_PLATFORM_BUS].size, + VIRT_PLATFORM_BUS_IRQ); + g_free(plic_name); =20 g_free(plic_cells); @@ -546,6 +559,12 @@ static void create_fdt_imsic(RISCVVirtState *s, const = MemMapEntry *memmap, IMSIC_MMIO_GROUP_MIN_SHIFT); } qemu_fdt_setprop_cell(mc->fdt, imsic_name, "phandle", *msi_m_phandle); + + platform_bus_add_all_fdt_nodes(mc->fdt, imsic_name, + memmap[VIRT_PLATFORM_BUS].base, + memmap[VIRT_PLATFORM_BUS].size, + VIRT_PLATFORM_BUS_IRQ); + g_free(imsic_name); =20 /* S-level IMSIC node */ @@ -683,6 +702,12 @@ static void create_fdt_socket_aplic(RISCVVirtState *s, VIRT_IRQCHIP_NUM_SOURCES); riscv_socket_fdt_write_id(mc, mc->fdt, aplic_name, socket); qemu_fdt_setprop_cell(mc->fdt, aplic_name, "phandle", aplic_s_phandle); + + platform_bus_add_all_fdt_nodes(mc->fdt, aplic_name, + memmap[VIRT_PLATFORM_BUS].base, + memmap[VIRT_PLATFORM_BUS].size, + VIRT_PLATFORM_BUS_IRQ); + g_free(aplic_name); =20 g_free(aplic_cells); --=20 2.35.1 From nobody Wed May 1 16:57:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=quarantine dis=quarantine) header.from=opensource.wdc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650353613094600.6799458130296; Tue, 19 Apr 2022 00:33:33 -0700 (PDT) Received: from localhost ([::1]:36194 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngiMe-00014x-3N for importer@patchew.org; Tue, 19 Apr 2022 03:33:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41406) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nghka-0003wI-Go for qemu-devel@nongnu.org; Tue, 19 Apr 2022 02:54:12 -0400 Received: from esa5.hgst.iphmx.com ([216.71.153.144]:36262) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nghkY-0004KS-Sd for qemu-devel@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=101f09098=alistair.francis@opensource.wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650353614684100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Add support for plugging in devices, this was tested with the TPM device. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- hw/riscv/virt.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index e4a5c6c28b..6eed1f4d70 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1564,10 +1564,37 @@ static void virt_set_aclint(Object *obj, bool value= , Error **errp) s->have_aclint =3D value; } =20 +static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *mach= ine, + DeviceState *dev) +{ + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + + if (device_is_dynamic_sysbus(mc, dev)) { + return HOTPLUG_HANDLER(machine); + } + return NULL; +} + +static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + RISCVVirtState *s =3D RISCV_VIRT_MACHINE(hotplug_dev); + + if (s->platform_bus_dev) { + MachineClass *mc =3D MACHINE_GET_CLASS(s); + + if (device_is_dynamic_sysbus(mc, dev)) { + platform_bus_link_device(PLATFORM_BUS_DEVICE(s->platform_bus_d= ev), + SYS_BUS_DEVICE(dev)); + } + } +} + static void virt_machine_class_init(ObjectClass *oc, void *data) { char str[128]; MachineClass *mc =3D MACHINE_CLASS(oc); + HotplugHandlerClass *hc =3D HOTPLUG_HANDLER_CLASS(oc); =20 mc->desc =3D "RISC-V VirtIO board"; mc->init =3D virt_machine_init; @@ -1579,6 +1606,10 @@ static void virt_machine_class_init(ObjectClass *oc,= void *data) mc->get_default_cpu_node_id =3D riscv_numa_get_default_cpu_node_id; mc->numa_mem_supported =3D true; mc->default_ram_id =3D "riscv_virt_board.ram"; + assert(!mc->get_hotplug_handler); + mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; + + hc->plug =3D virt_machine_device_plug_cb; =20 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); =20 @@ -1609,6 +1640,10 @@ static const TypeInfo virt_machine_typeinfo =3D { .class_init =3D virt_machine_class_init, .instance_init =3D virt_machine_instance_init, .instance_size =3D sizeof(RISCVVirtState), + .interfaces =3D (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + }, }; =20 static void virt_machine_init_register_types(void) --=20 2.35.1 From nobody Wed May 1 16:57:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.153.141; envelope-from=prvs=101f09098=alistair.francis@opensource.wdc.com; helo=esa3.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650353920355100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Imply the TPM sysbus devices. This allows users to add TPM devices to the RISC-V virt board. This was tested by first creating an emulated TPM device: swtpm socket --tpm2 -t -d --tpmstate dir=3D/tmp/tpm \ --ctrl type=3Dunixio,path=3Dswtpm-sock Then launching QEMU with: -chardev socket,id=3Dchrtpm,path=3Dswtpm-sock \ -tpmdev emulator,id=3Dtpm0,chardev=3Dchrtpm \ -device tpm-tis-device,tpmdev=3Dtpm0 The TPM device can be seen in the memory tree and the generated device tree. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/942 Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- hw/riscv/virt.c | 4 ++++ hw/riscv/Kconfig | 1 + 2 files changed, 5 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 6eed1f4d70..b62fd66a49 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -43,6 +43,7 @@ #include "sysemu/device_tree.h" #include "sysemu/sysemu.h" #include "sysemu/kvm.h" +#include "sysemu/tpm.h" #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" #include "hw/display/ramfb.h" @@ -1612,6 +1613,9 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) hc->plug =3D virt_machine_device_plug_cb; =20 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); +#ifdef CONFIG_TPM + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); +#endif =20 object_class_property_add_bool(oc, "aclint", virt_get_aclint, virt_set_aclint); diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index da790f5936..79ff61c464 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -34,6 +34,7 @@ config RISCV_VIRT imply PCI_DEVICES imply VIRTIO_VGA imply TEST_DEVICES + imply TPM_TIS_SYSBUS select RISCV_NUMA select GOLDFISH_RTC select MSI_NONBROKEN --=20 2.35.1