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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id i2-20020a17090a138200b001cb6512b579sm10372119pja.44.2022.04.17.10.44.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Apr 2022 10:44:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cNQuYWlWJo1H5z1dgSCS+oQAsg1LmaUsgazYdgc9pgo=; b=ym3Y2Isq+BXoC2A9zRIR6pePFMeZnt2Y7+I1qAuS3ZvonwR7P9BlWi84Y5W2XNzSpR LpvPOjMiAahrDGD1fqOOMl/a0P/pEgv1/g7sB2O2Q+U0AVgmbBRTEROPJ4SLStTw0UiR UDJcMIArWg4UjD8Gagg+1rzUto7+LWZdpURYxmesbMtCS+Uqq1khyUtNF5DvzVSO5Cmp gwsAB+P/+cVQPaPQnxN+xFLLCyrwklEkyu0QAeqm4RMmteRe/yJbORbp6vEAKvCo0J8n SqvVl4NmghpXqHWuZsjCeawVvU33rPsB+ufwwGhnNWmDuGsvhik4DXyZ6MdRMJ0dkKjb Wg7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cNQuYWlWJo1H5z1dgSCS+oQAsg1LmaUsgazYdgc9pgo=; b=fUb6QVc8/0okXtPpI2feN7dTrftreMidqcGK3QZu0EWNS4OUnJ44hJAYcmLCsj+N2O bCusd9EHtLjhV99b3ZSxxjyz5LuppKFonIcT4Ok66M5FZtK4QEdMcgRwQZETwOov/Hqa R18k9i94/07AplrFkyIAnJa0dqnlWC1+WMBCG56p9KPM2dKdI6bynqUNnSEprdzgpAna 4O75mrEhgbRqBVPsXoDeB7IU0/2LNQy1jaTELhRwJcC8rGed6dRVrk/5CgCuLWFd/1NG yYRjA08nj6x/dj2UIN6grSxt9vIn6nf6Oe4KHKqlepYEsoXSIvxpo0ZgxR5xDGitQS5Y C1kQ== X-Gm-Message-State: AOAM532ThEyv3CJ4jjqczoWksX+/wyefRVtU+/38oVOGW65Mm/QPFWUp K0X9YDgQUpcDS4b3iJWM4HSJPn/KIrRdqw== X-Google-Smtp-Source: ABdhPJzwn59B6UjD+PKR0F9QtQ8noDL9+7s/Kg4HbwFSN8E5LEUGWKPsdQYUyzjFeY+Ae3a1nWIzcw== X-Received: by 2002:a63:cf0c:0:b0:380:fb66:fa2a with SMTP id j12-20020a63cf0c000000b00380fb66fa2amr7099075pgg.273.1650217495172; Sun, 17 Apr 2022 10:44:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 29/60] target/arm: Change cpreg access permissions to enum Date: Sun, 17 Apr 2022 10:43:55 -0700 Message-Id: <20220417174426.711829-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220417174426.711829-1-richard.henderson@linaro.org> References: <20220417174426.711829-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650220162033100001 Content-Type: text/plain; charset="utf-8" Create a typedef as well, and use it in ARMCPRegInfo. This won't be perfect for debugging, but it'll nicely display the most common cases. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/cpregs.h | 44 +++++++++++++++++++++++--------------------- target/arm/helper.c | 5 ++--- 2 files changed, 25 insertions(+), 24 deletions(-) diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h index 031e4b7ec8..2c991ab5df 100644 --- a/target/arm/cpregs.h +++ b/target/arm/cpregs.h @@ -156,31 +156,33 @@ enum { * described with these bits, then use a laxer set of restrictions, and * do the more restrictive/complex check inside a helper function. */ -#define PL3_R 0x80 -#define PL3_W 0x40 -#define PL2_R (0x20 | PL3_R) -#define PL2_W (0x10 | PL3_W) -#define PL1_R (0x08 | PL2_R) -#define PL1_W (0x04 | PL2_W) -#define PL0_R (0x02 | PL1_R) -#define PL0_W (0x01 | PL1_W) +typedef enum { + PL3_R =3D 0x80, + PL3_W =3D 0x40, + PL2_R =3D 0x20 | PL3_R, + PL2_W =3D 0x10 | PL3_W, + PL1_R =3D 0x08 | PL2_R, + PL1_W =3D 0x04 | PL2_W, + PL0_R =3D 0x02 | PL1_R, + PL0_W =3D 0x01 | PL1_W, =20 -/* - * For user-mode some registers are accessible to EL0 via a kernel - * trap-and-emulate ABI. In this case we define the read permissions - * as actually being PL0_R. However some bits of any given register - * may still be masked. - */ + /* + * For user-mode some registers are accessible to EL0 via a kernel + * trap-and-emulate ABI. In this case we define the read permissions + * as actually being PL0_R. However some bits of any given register + * may still be masked. + */ #ifdef CONFIG_USER_ONLY -#define PL0U_R PL0_R + PL0U_R =3D PL0_R, #else -#define PL0U_R PL1_R + PL0U_R =3D PL1_R, #endif =20 -#define PL3_RW (PL3_R | PL3_W) -#define PL2_RW (PL2_R | PL2_W) -#define PL1_RW (PL1_R | PL1_W) -#define PL0_RW (PL0_R | PL0_W) + PL3_RW =3D PL3_R | PL3_W, + PL2_RW =3D PL2_R | PL2_W, + PL1_RW =3D PL1_R | PL1_W, + PL0_RW =3D PL0_R | PL0_W, +} CPAccessRights; =20 typedef enum CPAccessResult { /* Access is permitted */ @@ -264,7 +266,7 @@ struct ARMCPRegInfo { /* Register type: ARM_CP_* bits/values */ int type; /* Access rights: PL*_[RW] */ - int access; + CPAccessRights access; /* Security state: ARM_CP_SECSTATE_* bits/values */ int secure; /* diff --git a/target/arm/helper.c b/target/arm/helper.c index 1bbaf0a3af..33ba77890b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8712,7 +8712,7 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, * to encompass the generic architectural permission check. */ if (r->state !=3D ARM_CP_STATE_AA32) { - int mask =3D 0; + CPAccessRights mask; switch (r->opc1) { case 0: /* min_EL EL1, but some accessible to EL0 via kernel ABI */ @@ -8741,8 +8741,7 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, break; default: /* broken reginfo with out-of-range opc1 */ - assert(false); - break; + g_assert_not_reached(); } /* assert our permissions are not too lax (stricter is fine) */ assert((r->access & ~mask) =3D=3D 0); --=20 2.25.1