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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id g15-20020a056a0023cf00b004e17e11cb17sm38346669pfc.111.2022.04.11.17.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 17:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T0NCGCLb0/jnRMpSTq7CEyTx8JltKRBy1weeZ4yC0a0=; b=TEzj9Fzg0ZrGdKmzZGeqDQbJM4phOLbTeoo6oJAuEPgbFgXqsA7ROtv6YdPz5Y+SIG b5cQCcNvtu88ghO1jK5dhjFlL7PlwsfjsMtTBY18FUf0OTryUhryD4uyaqh0dKiVBZ/J efNMesSBLhIFfOKo8yhp6E/daTVl4U3lxB+h0qxvLqMMGx+TxxaJqwO1nuuGoC2cHYwL 6+GyQZHjHr3LdKg5D4Bm7LQPk1Ovib3IAY+HchfNvjXUcZYGbSZlNza+FCNfbSX8+SH4 c6UCdKnDe6L7Cex30bwFdJbCFJ/r7oEMScE3eCidXRDvEJxzZwyn+cWcWiEA81tsu5Ue l1oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T0NCGCLb0/jnRMpSTq7CEyTx8JltKRBy1weeZ4yC0a0=; b=OPFjhVP6MLNVMoWZC3Jhk1i4ESoQJ4fo9+lw3kSQB+orBJwbepBQjKwceMBqERjAHl VQD+dJ+b731ujqKZFmg7UuRBaSe1x94csGY+IOU97HLm3rg6+cGaF9TJDAwxq2/PSsJn QEN2cxT0D5bnZ3L6Z7gXjGg3SfeFn97vWH+8vTTSRt56D4R0ZR3TgbfVKsod8eyfcW3d 3E8V4feUZUIMWamWtEqBQjvfjdntPaHrkfccx6Z1/SbdUR54fO2eYdU7M/NgNNf1gqoA erPc24/Jt2P+mWdgMa9gKFOMbwPiGIQ9a58De85SecybY3n4OVxnpIdkTzQ3KHt2NPVh g5Hw== X-Gm-Message-State: AOAM530UcBpur+8JitMIe4GCcv0odgp00kh4N/P6jcqYO/gsmAbhaN1Z tNrEBmaA+YgnHa7aOF8O3sm7bWVkonU+vA== X-Google-Smtp-Source: ABdhPJwmkcZV4UpeTvEZZ/vxVBGeEkUXQ9MSkrfcUZIA9mf9SzD5gIaA2ZQD3IpC4N+rL8fh50FXlg== X-Received: by 2002:a65:604b:0:b0:398:ebeb:ad8f with SMTP id a11-20020a65604b000000b00398ebebad8fmr29161043pgp.89.1649723623253; Mon, 11 Apr 2022 17:33:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 17/24] target/arm: Enable FEAT_IESB for -cpu max Date: Mon, 11 Apr 2022 17:33:19 -0700 Message-Id: <20220412003326.588530-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412003326.588530-1-richard.henderson@linaro.org> References: <20220412003326.588530-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1649724595299100001 Content-Type: text/plain; charset="utf-8" This feature is AArch64 only, and applies to physical SErrors, which QEMU does not implement, thus the feature is a nop. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Update emulation.rst --- docs/system/arm/emulation.rst | 1 + target/arm/cpu64.c | 1 + 2 files changed, 2 insertions(+) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 35b6f7d4de..ebd9e418cc 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -24,6 +24,7 @@ the following architecture extensions: - FEAT_FlagM2 (Enhancements to flag manipulation instructions) - FEAT_HPDS (Hierarchical permission disables) - FEAT_I8MM (AArch64 Int8 matrix multiplication instructions) +- FEAT_IESB (Implicit error synchronization event) - FEAT_JSCVT (JavaScript conversion instructions) - FEAT_LOR (Limited ordering regions) - FEAT_LPA (Large Physical Address space) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 3525aba610..c91528a12e 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -781,6 +781,7 @@ static void aarch64_max_initfn(Object *obj) t =3D cpu->isar.id_aa64mmfr2; t =3D FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* FEAT_TTCNP */ t =3D FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); /* FEAT_UAO */ + t =3D FIELD_DP64(t, ID_AA64MMFR2, IESB, 1); /* FEAT_IESB */ t =3D FIELD_DP64(t, ID_AA64MMFR2, VARANGE, 1); /* FEAT_LVA */ t =3D FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* FEAT_TTST */ cpu->isar.id_aa64mmfr2 =3D t; --=20 2.25.1