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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id g15-20020a056a0023cf00b004e17e11cb17sm38346669pfc.111.2022.04.11.17.33.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 17:33:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T/yvSxxK5KUGQ/GUB85StZPpHbnwQifk0lCtMvXSxOk=; b=IqTYOljpLcLx600eEcM+SBXVNMKLMTeLJ5LCHJrVFaUzv4+27whshnUcjijCTzHnXm lliGMWE6IbABrtZIl1fTRskQtDNh3VOPrATnYgJ5L6VkVYU+UvQB5xVxeBZnDsIkMRAg rTYU6aHt39Gpx0mmsFyO4IXcG1jnI9eUI+YzXdh2e25K1lFM+NgzTyWXaP6CZtQNojaw Eszs8auULG0Jh6CObAJrlLYylgmVCRjlY42OWTc8GGzMf3y1p0SoSID9p0lfZFFDveBs bEDCnoKib+rl82ZsXmrAwtPvby+K/3Rw9bCU794jWsrqNzCoH9q7zY9oEjFqlVeS/TQq ZqQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T/yvSxxK5KUGQ/GUB85StZPpHbnwQifk0lCtMvXSxOk=; b=p7D8Qm5h88+cz0zhqIjfdkURWlJmdDf66pVmlI2Scv17QESE23RVBvU0BAXCxnhZCN W/jMaxYTlVbtqhhs0uT8d+bMsT97/XJ3pbuvPHgYt+AWMma3JImAqk9v/XYyZrR/NroW IMWDXZCl3NraEZdp1zSYuIQXYm6/Z83ivAPIEK1cq/7b/BE4NOwrU3q6DvKSaNfN81/7 MA2lmH5chBqhg0kPkPsIvs/s3pUMq72ZNU6xeotmN69mtBXmNsLjffBFY4fL75E1Yy2a +hqBt0cYbQrabIsP4hCgn2ips+pqnLH8/qwK6qCHxijx7WaKS/yC5s6J9DQ2tFWjs/xk zkYw== X-Gm-Message-State: AOAM533eK1Sx+plxf7DvXkcLBFJTeF1zJIn6UM9nNB+zBIbi+6seK317 EoH4fzmNeiawhggyA01+4XdUtXYhY9fXag== X-Google-Smtp-Source: ABdhPJymEK4e8vye9K9zZ8Ztv+4XmZNUNNhWvgQX06jFRTuG3Plj+KurMd/JS1vlAGnxv7Ku9QSQGw== X-Received: by 2002:a17:903:11c7:b0:154:b936:d1d4 with SMTP id q7-20020a17090311c700b00154b936d1d4mr35073116plh.78.1649723619571; Mon, 11 Apr 2022 17:33:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 13/24] target/arm: Enable SCR and HCR bits for RAS Date: Mon, 11 Apr 2022 17:33:15 -0700 Message-Id: <20220412003326.588530-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412003326.588530-1-richard.henderson@linaro.org> References: <20220412003326.588530-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1649724807545100001 Content-Type: text/plain; charset="utf-8" Enable writes to the TERR and TEA bits when RAS is enabled. These bits are otherwise RES0. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index b066a86f04..aa05a15e5c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1765,6 +1765,9 @@ static void scr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, uint64_t value) } valid_mask &=3D ~SCR_NET; =20 + if (cpu_isar_feature(aa64_ras, cpu)) { + valid_mask |=3D SCR_TERR; + } if (cpu_isar_feature(aa64_lor, cpu)) { valid_mask |=3D SCR_TLOR; } @@ -1779,6 +1782,9 @@ static void scr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, uint64_t value) } } else { valid_mask &=3D ~(SCR_RW | SCR_ST); + if (cpu_isar_feature(aa32_ras, cpu)) { + valid_mask |=3D SCR_TERR; + } } =20 if (!arm_feature(env, ARM_FEATURE_EL2)) { @@ -5289,6 +5295,9 @@ static void do_hcr_write(CPUARMState *env, uint64_t v= alue, uint64_t valid_mask) if (cpu_isar_feature(aa64_vh, cpu)) { valid_mask |=3D HCR_E2H; } + if (cpu_isar_feature(aa64_ras, cpu)) { + valid_mask |=3D HCR_TERR | HCR_TEA; + } if (cpu_isar_feature(aa64_lor, cpu)) { valid_mask |=3D HCR_TLOR; } --=20 2.25.1