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Tue, 05 Apr 2022 15:37:59 -0700 (PDT) Date: Tue, 5 Apr 2022 15:36:31 -0700 In-Reply-To: <20220405223640.2595730-1-wuhaotsh@google.com> Message-Id: <20220405223640.2595730-3-wuhaotsh@google.com> Mime-Version: 1.0 References: <20220405223640.2595730-1-wuhaotsh@google.com> X-Mailer: git-send-email 2.35.1.1094.g7c7d902a7c-goog Subject: [PATCH for-7.1 02/11] hw/ssi: Make flash size a property in NPCM7XX FIU From: Hao Wu To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wuhaotsh@google.com, venture@google.com, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, hskinnemoen@google.com, Uri.Trichter@nuvoton.com, Vishal.Soni@microsoft.com, titusr@google.com Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::649; envelope-from=3x8RMYggKCpwSQD6KPODCKKCHA.8KIMAIQ-9ARAHJKJCJQ.KNC@flex--wuhaotsh.bounces.google.com; helo=mail-pl1-x649.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1649198449281100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This allows different FIUs to have different flash sizes, useful in NPCM8XX which has multiple different sized FIU modules. Signed-off-by: Hao Wu Reviewed-by: Patrick Venture --- hw/arm/npcm7xx.c | 6 ++++++ hw/ssi/npcm7xx_fiu.c | 6 ++---- include/hw/ssi/npcm7xx_fiu.h | 1 + 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index d85cc02765..9946b94120 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -274,17 +274,21 @@ static const struct { hwaddr regs_addr; int cs_count; const hwaddr *flash_addr; + size_t flash_size; } npcm7xx_fiu[] =3D { { .name =3D "fiu0", .regs_addr =3D 0xfb000000, .cs_count =3D ARRAY_SIZE(npcm7xx_fiu0_flash_addr), .flash_addr =3D npcm7xx_fiu0_flash_addr, + .flash_size =3D 128 * MiB, + }, { .name =3D "fiu3", .regs_addr =3D 0xc0000000, .cs_count =3D ARRAY_SIZE(npcm7xx_fiu3_flash_addr), .flash_addr =3D npcm7xx_fiu3_flash_addr, + .flash_size =3D 128 * MiB, }, }; =20 @@ -686,6 +690,8 @@ static void npcm7xx_realize(DeviceState *dev, Error **e= rrp) =20 object_property_set_int(OBJECT(sbd), "cs-count", npcm7xx_fiu[i].cs_count, &error_abort); + object_property_set_int(OBJECT(sbd), "flash-size", + npcm7xx_fiu[i].flash_size, &error_abort); sysbus_realize(sbd, &error_abort); =20 sysbus_mmio_map(sbd, 0, npcm7xx_fiu[i].regs_addr); diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c index 4eedb2927e..ea490f1332 100644 --- a/hw/ssi/npcm7xx_fiu.c +++ b/hw/ssi/npcm7xx_fiu.c @@ -28,9 +28,6 @@ =20 #include "trace.h" =20 -/* Up to 128 MiB of flash may be accessed directly as memory. */ -#define NPCM7XX_FIU_FLASH_WINDOW_SIZE (128 * MiB) - /* Each module has 4 KiB of register space. Only a fraction of it is used.= */ #define NPCM7XX_FIU_CTRL_REGS_SIZE (4 * KiB) =20 @@ -525,7 +522,7 @@ static void npcm7xx_fiu_realize(DeviceState *dev, Error= **errp) flash->fiu =3D s; memory_region_init_io(&flash->direct_access, OBJECT(s), &npcm7xx_fiu_flash_ops, &s->flash[i], "flash= ", - NPCM7XX_FIU_FLASH_WINDOW_SIZE); + s->flash_size); sysbus_init_mmio(sbd, &flash->direct_access); } } @@ -543,6 +540,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu =3D= { =20 static Property npcm7xx_fiu_properties[] =3D { DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0), + DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/include/hw/ssi/npcm7xx_fiu.h b/include/hw/ssi/npcm7xx_fiu.h index a3a1704289..1785ea16f4 100644 --- a/include/hw/ssi/npcm7xx_fiu.h +++ b/include/hw/ssi/npcm7xx_fiu.h @@ -60,6 +60,7 @@ struct NPCM7xxFIUState { int32_t cs_count; int32_t active_cs; qemu_irq *cs_lines; + size_t flash_size; NPCM7xxFIUFlash *flash; =20 SSIBus *spi; --=20 2.35.1.1094.g7c7d902a7c-goog