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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=usBGdU69HnTg1ydjW8JNew56t92jp2FL4YFsAVLWtpc=; b=xz2O1rjB8ob2xnlrLPRolq4r0J6kggBWpmum7atF/6zdLshSsbrelkcyoVX3vR/F7v VWfaWdw+AQLuGnCNhkRz/384t3docLuaed0zmH5SZAZm8u5I0oUaHRFsEp/AmaNolCM5 XuY2rr/ByoEYqZzcSC3MpKAeTnYJwl9T2PvM/IKasGyhfWAMCWh2TSLI8sMS8ZwO9srm Ukp5d3ssw+qkQ3rraBTCVJSO72WOcqp15NMdzxK6aokl8fd06hCIusjwpGPO4OzFHLY6 0VOsMExZPfxNT2vI5jAzay6dT+woJt3fnqd/yWjCnEgXQWQj62mw2UNAOLZh7E/zsB94 hY9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=usBGdU69HnTg1ydjW8JNew56t92jp2FL4YFsAVLWtpc=; b=ifQ4ZMZIw+yvp76UhlBG09Tz8+nxI3pq9oKp/P97NVw+A8nfkc5+H65QX3LV7tUli6 13chr1skwX4XUGN85i/rDP9w4vf8b9AUld2nFdndlJ8md4/ho9VzfPuresgdnIFmbjbp Pq/NS6BlxQzqCMphqcupWmqYVFQ8CNUR95O2xSbd1P8iE8/k7aT00CYOspcFDqNBrUid 5YSjt+0d4ZJzIh3EDqu/J0NeNymvrRXWVRBAzR2VQSUyS8WvF9JNyIvlRKkZvttB+vUk l9wUcULX+gMtDLgggcqD/PuTiTQQ2u+MTA0Q3dEBnIT90hxNFTJxFaNXIpP17P7AtyyT iVvg== X-Gm-Message-State: AOAM530fKM4IgYiE6YkaTeOEjgjUmuywP2jVM8/NsPs4X2o3WkArhFo3 pe+R9jwsycgqIPZVMmcy/PrjeU0pHq1GoA== X-Google-Smtp-Source: ABdhPJwaJFzXkuiFUCRWYFB6C/G/gCHKBdq1b9JksxUCYd5MXV1agMDgJPAq0PXLcCAEFTlE/aXaaQ== X-Received: by 2002:a17:90a:c984:b0:1bf:aee2:3503 with SMTP id w4-20020a17090ac98400b001bfaee23503mr3287461pjt.28.1647493541249; Wed, 16 Mar 2022 22:05:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 01/51] tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH Date: Wed, 16 Mar 2022 22:04:48 -0700 Message-Id: <20220317050538.924111-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::631 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647493715150100001 Content-Type: text/plain; charset="utf-8" With TCG_OPF_COND_BRANCH, we extended the lifetimes of globals across extended basic blocks. This means that the liveness computed in pass 1 does not kill globals in the same way as normal temps. Introduce TYPE_EBB to match this lifetime, so that we get correct register allocation for the temps that we introduce during the indirect lowering pass. Fixes: b4cb76e6208 ("tcg: Do not kill globals at conditional branches") Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- include/tcg/tcg.h | 2 ++ tcg/tcg.c | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 73869fd9d0..27de13fae0 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -433,6 +433,8 @@ typedef enum TCGTempVal { typedef enum TCGTempKind { /* Temp is dead at the end of all basic blocks. */ TEMP_NORMAL, + /* Temp is live across conditional branch, but dead otherwise. */ + TEMP_EBB, /* Temp is saved across basic blocks but dead at the end of TBs. */ TEMP_LOCAL, /* Temp is saved across both basic blocks and translation blocks. */ diff --git a/tcg/tcg.c b/tcg/tcg.c index 33a97eabdb..45030e88fd 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1674,6 +1674,7 @@ static void tcg_reg_alloc_start(TCGContext *s) case TEMP_GLOBAL: break; case TEMP_NORMAL: + case TEMP_EBB: val =3D TEMP_VAL_DEAD; /* fall through */ case TEMP_LOCAL: @@ -1701,6 +1702,9 @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char = *buf, int buf_size, case TEMP_LOCAL: snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); break; + case TEMP_EBB: + snprintf(buf, buf_size, "ebb%d", idx - s->nb_globals); + break; case TEMP_NORMAL: snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); break; @@ -2378,6 +2382,7 @@ static void la_bb_end(TCGContext *s, int ng, int nt) state =3D TS_DEAD | TS_MEM; break; case TEMP_NORMAL: + case TEMP_EBB: case TEMP_CONST: state =3D TS_DEAD; break; @@ -2427,6 +2432,7 @@ static void la_bb_sync(TCGContext *s, int ng, int nt) case TEMP_NORMAL: s->temps[i].state =3D TS_DEAD; break; + case TEMP_EBB: case TEMP_CONST: continue; default: @@ -2797,6 +2803,7 @@ static bool liveness_pass_2(TCGContext *s) TCGTemp *dts =3D tcg_temp_alloc(s); dts->type =3D its->type; dts->base_type =3D its->base_type; + dts->kind =3D TEMP_EBB; its->state_ptr =3D dts; } else { its->state_ptr =3D NULL; @@ -3107,6 +3114,7 @@ static void temp_free_or_dead(TCGContext *s, TCGTemp = *ts, int free_or_dead) new_type =3D TEMP_VAL_MEM; break; case TEMP_NORMAL: + case TEMP_EBB: new_type =3D free_or_dead < 0 ? TEMP_VAL_MEM : TEMP_VAL_DEAD; break; case TEMP_CONST: @@ -3353,6 +3361,7 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRe= gSet allocated_regs) temp_save(s, ts, allocated_regs); break; case TEMP_NORMAL: + case TEMP_EBB: /* The liveness analysis already ensures that temps are dead. Keep an tcg_debug_assert for safety. */ tcg_debug_assert(ts->val_type =3D=3D TEMP_VAL_DEAD); @@ -3390,6 +3399,7 @@ static void tcg_reg_alloc_cbranch(TCGContext *s, TCGR= egSet allocated_regs) case TEMP_NORMAL: tcg_debug_assert(ts->val_type =3D=3D TEMP_VAL_DEAD); break; + case TEMP_EBB: case TEMP_CONST: break; default: --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647493958097306.7252537922923; Wed, 16 Mar 2022 22:12:38 -0700 (PDT) Received: from localhost ([::1]:55584 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiRA-0000hk-PB for importer@patchew.org; Thu, 17 Mar 2022 01:12:36 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50480) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKX-0000JE-5I for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:45 -0400 Received: from [2607:f8b0:4864:20::1036] (port=53762 helo=mail-pj1-x1036.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKV-0002C1-L5 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:44 -0400 Received: by mail-pj1-x1036.google.com with SMTP id bx5so3937073pjb.3 for ; Wed, 16 Mar 2022 22:05:43 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NA9HskFqPeLh+02a0cXnYrdAXovGtw+F2Po8AxVhC7E=; b=jQKBj7M1B5PT4TVdwx8qOBj0rMYajDxageJyB2R9YfLuFnkRheYOnbvI9fDQlJcWaI G8TvYeQkMiBw7NUTm+wQZ7vacbDTYRHCgADZi5kToyLWzDMpOh8oI5vMZjXAjZpLcM3Q wR7G736RgNXcFbNStfEdsqZIhL472cnI4DM6tkk6Ta80XhRLiuYyQkoYcmCvlQ2yNxB3 SIVz4RMwaJWE3lF5ja6DKZG7N8ziQ9/NIeOUcrtBZk1ILZzNIGUxi7GwvyY0SHhLrilw v1qKQ2iJ7MLcLvQfRbBZEOOzj8IIk/CqCU3Nm3pFAflj9C1MZjYg19myuUQJ6f6NQ2J+ f5hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NA9HskFqPeLh+02a0cXnYrdAXovGtw+F2Po8AxVhC7E=; b=4iJsbRTrB8yFQr82DvUDNYOMjisuAIk1VfWv7iY4VWbF7amXsRUXiaFJD+3aErRJd8 elhfaqhrFfn24er+oFuRmdWtxRxsLZjFiYBhGQeDqWkpq35hyslHjtBAMi8cyi99Kt/S MLAt2xsjFNuCbYFYoay1cJT5W6AVjPC3Aw/z8uACK3aYWRt3RpT/K+JhbrZ8x6Zw7y8t Nhu315TpUSyecC7uu05n0QEbMlWiwHDiASLOj/2Ye69dNiLYsN97StWrb9LBYOcsCl+t ThN4knbH95ug3x5jhABMSHbH3+EnHEkZYs8BJJkDk9FSK5QNx/OGy5EJKKSXYfacLrRV 5PqA== X-Gm-Message-State: AOAM531Sm+uZSpSrCPy1OV+q3HFUvF8MlQS+LmMnbz2CDwS9KJbzhtnT uSzS99F78Q/WmLh2yoXRCX4ZcK8XK+MQvg== X-Google-Smtp-Source: ABdhPJyw1JnXh/0kecOIe1l7Rlp+q+JmRuojyxNDR0eOhQ63gm4IuKYHckkV7d8IpR/gkpBvR4on0g== X-Received: by 2002:a17:90a:1f88:b0:1c6:7cf9:8a23 with SMTP id x8-20020a17090a1f8800b001c67cf98a23mr2171350pja.21.1647493542179; Wed, 16 Mar 2022 22:05:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 02/51] target/nios2: Check supervisor on eret Date: Wed, 16 Mar 2022 22:04:49 -0700 Message-Id: <20220317050538.924111-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1036 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647493958896100001 Content-Type: text/plain; charset="utf-8" From: Amir Gonnen eret instruction is only allowed in supervisor mode. Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson Signed-off-by: Amir Gonnen Message-Id: <20220303153906.2024748-2-amir.gonnen@neuroblade.ai> Signed-off-by: Richard Henderson --- target/nios2/translate.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index f89271dbed..341f3a8273 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -384,6 +384,8 @@ static const Nios2Instruction i_type_instructions[] =3D= { */ static void eret(DisasContext *dc, uint32_t code, uint32_t flags) { + gen_check_supervisor(dc); + tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_EA]); =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494098988619.2274423725374; Wed, 16 Mar 2022 22:14:58 -0700 (PDT) Received: from localhost ([::1]:35928 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiTR-0006Va-D2 for importer@patchew.org; Thu, 17 Mar 2022 01:14:57 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50498) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKX-0000K5-Ul for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:45 -0400 Received: from [2607:f8b0:4864:20::629] (port=35606 helo=mail-pl1-x629.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKW-0002CA-F1 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:45 -0400 Received: by mail-pl1-x629.google.com with SMTP id n15so3573187plh.2 for ; Wed, 16 Mar 2022 22:05:43 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bz8zlZqp+XNpUuV3WS3uKIWPzFVnLucU6nOyII1L55M=; b=BHf8zlCwCgR3BgKLndonE1HLKnPfGWzrvrCDDjBn/42kR5/1y2TiySGOw4Bk8qcibh QTQ2Kz9YH9lHvNy3SofonXilLnN560QeaZHCWpFh3qmKArIUro22Rq6q3T2iHiVvc62E jE3c+gEl1rKnPL9ufHj2mV/164xRQa0Fvn3/xaWvGubGw5SsuTJWJmXq/CJfyzE0Pilq cb449LpRwP1fvXaHkPowFIL2v6FXRcIb19y5VS1yUbH5Bj/R8A9wn9IhZDRSWnW4Ab1B Hxd5qiMwps3gAXDVLy1g9peaZ+YyduSbCSts1V74t3HfHeZLKblrOuHnzHdIaamzz+2+ MfIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bz8zlZqp+XNpUuV3WS3uKIWPzFVnLucU6nOyII1L55M=; b=qNyRpKTD86wsg3YiPsC+5Bl/wA2vmXWEiz7dwTmP9dDvqVFOVUocqSnhsl6HS5f+sW nuoyElXenAm2sf/sIMV7jjQqdfnOsYJDPmjV5RYM6a/nI4nnAQSgNftuOpwF2L083AvK YlFZ7kaTVbxQCcR5nvt8jfPcaRL9e47HsQRd5g04JCmk6bLUdjslSQldm0wPgcyIBMVT Fkps4MpXwwxQiv9WAqFRyqqQ4OBrbucQTTih0C6vbdBYvosyVbZjOT/zRr4DakVwDZGW 4HAvhF6NUvkITuUfWowbxxAF1M2UxnGCkx5tbf+OcmlISLf0rQ2Qr4+ldVxco8RcbDmx K5pg== X-Gm-Message-State: AOAM533wX/n91CmRyNqTVj6H9ffzpH3XOVlHYkwCkfGXRHgZhVVND/nE 5j2l1RZHQI9SA6PK87meZeC2+VstTw+iVg== X-Google-Smtp-Source: ABdhPJz1stlSrEYjvRRTDG0g+DcHm55Ou17bRQBtPsPc4TQ7FaF/JWBysyktCisr8sR63eSE4URVTw== X-Received: by 2002:a17:90b:3b89:b0:1c6:56a2:1397 with SMTP id pc9-20020a17090b3b8900b001c656a21397mr3333431pjb.239.1647493543033; Wed, 16 Mar 2022 22:05:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 03/51] target/nios2: Stop generating code if gen_check_supervisor fails Date: Wed, 16 Mar 2022 22:04:50 -0700 Message-Id: <20220317050538.924111-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::629 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494099596100001 Content-Type: text/plain; charset="utf-8" Whether the cpu is in user-mode or not is something that we know at translation-time. We do not need to generate code after having raised an exception. Suggested-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/translate.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 341f3a8273..1e0ab686dc 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -169,12 +169,14 @@ static void gen_excp(DisasContext *dc, uint32_t code,= uint32_t flags) t_gen_helper_raise_exception(dc, flags); } =20 -static void gen_check_supervisor(DisasContext *dc) +static bool gen_check_supervisor(DisasContext *dc) { if (dc->base.tb->flags & CR_STATUS_U) { /* CPU in user mode, privileged instruction called, stop. */ t_gen_helper_raise_exception(dc, EXCP_SUPERI); + return false; } + return true; } =20 /* @@ -384,7 +386,9 @@ static const Nios2Instruction i_type_instructions[] =3D= { */ static void eret(DisasContext *dc, uint32_t code, uint32_t flags) { - gen_check_supervisor(dc); + if (!gen_check_supervisor(dc)) { + return; + } =20 tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_EA]); @@ -447,7 +451,9 @@ static void rdctl(DisasContext *dc, uint32_t code, uint= 32_t flags) { R_TYPE(instr, code); =20 - gen_check_supervisor(dc); + if (!gen_check_supervisor(dc)) { + return; + } =20 if (unlikely(instr.c =3D=3D R_ZERO)) { return; @@ -474,9 +480,13 @@ static void rdctl(DisasContext *dc, uint32_t code, uin= t32_t flags) /* ctlN <- rA */ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags) { - gen_check_supervisor(dc); + if (!gen_check_supervisor(dc)) { + return; + } =20 -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else R_TYPE(instr, code); TCGv v =3D load_gpr(dc, instr.a); =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647493715234531.6391106184292; Wed, 16 Mar 2022 22:08:35 -0700 (PDT) Received: from localhost ([::1]:46988 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiNH-0003GH-Kw for importer@patchew.org; Thu, 17 Mar 2022 01:08:35 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50512) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKY-0000L6-Kr for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:46 -0400 Received: from [2607:f8b0:4864:20::102d] (port=40541 helo=mail-pj1-x102d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKX-0002CP-3G for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:46 -0400 Received: by mail-pj1-x102d.google.com with SMTP id mp6-20020a17090b190600b001c6841b8a52so617533pjb.5 for ; Wed, 16 Mar 2022 22:05:44 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tamfos1uvfrgy6OTL/hYTKA67kxVDj5ysduH3BCBsBo=; b=QAHbwSdIssQcShnOhNJFbQlfNKbiDhNLSrTWafGWgc896A1D3oH6/gh8I5niinulMq 6l9/T3+NpZQuFt4cpFigaJ2p3Nmykcd+Ff8bUdyzZHLGXUc0zy0+4aIrNgEg3oF8im/Z rlX3fGB2vm0TKIt2VbfDGKQG10rpdO/0x9eHSioTI3Oz4sZQsH8u+an9qXfw0v+wegGC aATw9vCLhXz2fplXD07XapD80VfTofajNYOE98PfRYF07j0D6Q2ox3tjFzW0pUUHs7Q/ 2/oepVYSD0SY/fG1vR4qfCxmJ2Elh/MIxdUfiAWA3GWCgLHzfgT6vcxhypP/gX6FUywr SSQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tamfos1uvfrgy6OTL/hYTKA67kxVDj5ysduH3BCBsBo=; b=7JWAoW1c73b7nyJ9gXFTprDkiDbEByr4+qCWzuKmQhsdXazvUHhpAXNc+GaoALwSvq /t5BNAT3N4z2OuJ38FVKwzNUPd/UGmF+iHPxLDYg/Ca2WWG8/LGqzAneqxiJmchTL8PC P2Ai7axSkzeoUro6hmxXVIzNU3H7cs3CeHe1N139t4vxP8YLSRHT+tzbNVwp6q9IYuBv DxC1BzmrVSHTiqSTvTLYKjgTRW8NYVOYMTdMUum6YaNWKMsCbONG4HfuzTmBn1uZvgqv AxeExyCm8sQhbT6kGeLAiJWkq+MCcH7wnGxIBpVFijFQWa1IsWF+ZV4sQaNZ0ziYhdGr /ZXg== X-Gm-Message-State: AOAM533MYiPRymICtOiw8lY+nIjti/7scEIHWv1I2mno30Od566uXHZ9 9A2r3jKSj1ZWCmZrlU5Lfpha2SOibpVGYg== X-Google-Smtp-Source: ABdhPJyZo5QknB53NiTQ1dbCtg0qDrWlwHJPv3UV70s5liQGxOJRAEkGQ1LhQeUDC9GvNpYNuHlnwQ== X-Received: by 2002:a17:903:2341:b0:151:d33b:90f4 with SMTP id c1-20020a170903234100b00151d33b90f4mr2862921plh.22.1647493543804; Wed, 16 Mar 2022 22:05:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 04/51] target/nios2: Add NUM_GP_REGS and NUM_CP_REGS Date: Wed, 16 Mar 2022 22:04:51 -0700 Message-Id: <20220317050538.924111-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647493718132100001 Content-Type: text/plain; charset="utf-8" From: Amir Gonnen Split NUM_CORE_REGS into components that can be used elsewhere. Reviewed-by: Peter Maydell Signed-off-by: Amir Gonnen Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai> [rth: Split out of a larger patch for shadow register sets.] Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index ca0f3420cd..adeb16377d 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -56,9 +56,11 @@ struct Nios2CPUClass { #define EXCEPTION_ADDRESS 0x00000004 #define FAST_TLB_MISS_ADDRESS 0x00000008 =20 +#define NUM_GP_REGS 32 +#define NUM_CR_REGS 32 =20 /* GP regs + CR regs + PC */ -#define NUM_CORE_REGS (32 + 32 + 1) +#define NUM_CORE_REGS (NUM_GP_REGS + NUM_CR_REGS + 1) =20 /* General purpose register aliases */ #define R_ZERO 0 @@ -79,7 +81,7 @@ struct Nios2CPUClass { #define R_RA 31 =20 /* Control register aliases */ -#define CR_BASE 32 +#define CR_BASE NUM_GP_REGS #define CR_STATUS (CR_BASE + 0) #define CR_STATUS_PIE (1 << 0) #define CR_STATUS_U (1 << 1) --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494448653287.4761031260783; Wed, 16 Mar 2022 22:20:48 -0700 (PDT) Received: from localhost ([::1]:53030 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiZ5-000175-GN for importer@patchew.org; Thu, 17 Mar 2022 01:20:47 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50566) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKa-0000Q0-P0 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:48 -0400 Received: from [2607:f8b0:4864:20::630] (port=34470 helo=mail-pl1-x630.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKY-0002Ck-8F for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:48 -0400 Received: by mail-pl1-x630.google.com with SMTP id i11so2867345plr.1 for ; Wed, 16 Mar 2022 22:05:45 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bkOrHFoETWid+QekyrDcDE4JYVn7YyGDinnjYK+GH7Y=; b=lcjLPhW76XGlrXlN+7/PWZuH8hzV71Lw7vWvbOE1aPeg5wHM2/mJybrk8Q5egTM++9 xes6GxzZJJpkgkO2KhpbgE1tsxeJraBpBdNzN6hWYIYWY4PegC34FwIg0BVR3Aj2njXj dLKA2U+rY6J1AbvL1LLeaHwbnHbkdeATaA8JzY9ajhrXGQ7KC61TVSMUCpmooqFhdM+o SDffR2G2PmLIVCwHYyXNsSKpVs5QYTC9ZCcqcliuUUNCCkRAkkPs+fQEsVqBlUuGxC2Z aSSw/Du5KL192Mw2UpAYzFKKtXLmyFrBkeBC3aQiGxjGdKnXWfuBnaqfSircs1C/hZ+G Afxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bkOrHFoETWid+QekyrDcDE4JYVn7YyGDinnjYK+GH7Y=; b=eMw9JAxCgHreA/31CztcEWsgmRa1RUh50WzTGgnvg0mlym19G1pYWd7WkbNtfMMNhZ J8PxlADgW68IxQPzAhLJq9hkkinvNXPox5cBqkJKx+jTxhJ/TPxluL+5OpcfEnldJHXA XtafyYP5z/byzFedNwVDcC2vjCEC/ZyNGgyHH0PiO9SZzSIUUbmrKa3WH/L4VcSNtfeF +w5t9AJOk7R2gBySKd3M3iB7SvqCagl+Mm5SzNKTsRAQnLM7monfu6+AJcYdab7lgb3s 1zGMRdKvHzD6+fG2ET9fctWxjSwHA5my7kr9U0m3YCx4IsUP53peMSau45NzHP91sfoX uwlA== X-Gm-Message-State: AOAM532shxp/cklNFQJIbzO+0vk37jewPekcU9gOpEQgiKzW0Of2voCb FLE+a7nd/q3+e4G8t1ENm77fHXukBxfTbA== X-Google-Smtp-Source: ABdhPJyFQLY39YBvltDMyMyBCZqIOLnhAA9O5u1bMny64sJaa8uodD54UCaWYFSqI9Tt2TDZhwxnng== X-Received: by 2002:a17:902:8f83:b0:151:5c71:a6e6 with SMTP id z3-20020a1709028f8300b001515c71a6e6mr2883976plo.126.1647493544822; Wed, 16 Mar 2022 22:05:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 05/51] target/nios2: Split PC out of env->regs[] Date: Wed, 16 Mar 2022 22:04:52 -0700 Message-Id: <20220317050538.924111-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::630 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494450059100001 Content-Type: text/plain; charset="utf-8" It is cleaner to have a separate name for this variable. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 10 +++----- linux-user/elfload.c | 2 +- linux-user/nios2/cpu_loop.c | 17 ++++++------- linux-user/nios2/signal.c | 6 ++--- target/nios2/cpu.c | 8 +++--- target/nios2/helper.c | 51 +++++++++++++++++-------------------- target/nios2/translate.c | 29 +++++++++++---------- 7 files changed, 58 insertions(+), 65 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index adeb16377d..9be128d63a 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -59,8 +59,8 @@ struct Nios2CPUClass { #define NUM_GP_REGS 32 #define NUM_CR_REGS 32 =20 -/* GP regs + CR regs + PC */ -#define NUM_CORE_REGS (NUM_GP_REGS + NUM_CR_REGS + 1) +/* GP regs + CR regs */ +#define NUM_CORE_REGS (NUM_GP_REGS + NUM_CR_REGS) =20 /* General purpose register aliases */ #define R_ZERO 0 @@ -130,9 +130,6 @@ struct Nios2CPUClass { #define CR_MPUBASE (CR_BASE + 14) #define CR_MPUACC (CR_BASE + 15) =20 -/* Other registers */ -#define R_PC 64 - /* Exceptions */ #define EXCP_BREAK 0x1000 #define EXCP_RESET 0 @@ -158,6 +155,7 @@ struct Nios2CPUClass { =20 struct CPUArchState { uint32_t regs[NUM_CORE_REGS]; + uint32_t pc; =20 #if !defined(CONFIG_USER_ONLY) Nios2MMU mmu; @@ -241,7 +239,7 @@ typedef Nios2CPU ArchCPU; static inline void cpu_get_tb_cpu_state(CPUNios2State *env, target_ulong *= pc, target_ulong *cs_base, uint32_t *f= lags) { - *pc =3D env->regs[R_PC]; + *pc =3D env->pc; *cs_base =3D 0; *flags =3D (env->regs[CR_STATUS] & (CR_STATUS_EH | CR_STATUS_U)); } diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 9628a38361..23ff9659a5 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1170,7 +1170,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *= regs, (*regs)[30] =3D -1; /* R_SSTATUS */ (*regs)[31] =3D tswapreg(env->regs[R_RA]); =20 - (*regs)[32] =3D tswapreg(env->regs[R_PC]); + (*regs)[32] =3D tswapreg(env->pc); =20 (*regs)[33] =3D -1; /* R_STATUS */ (*regs)[34] =3D tswapreg(env->regs[CR_ESTATUS]); diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index 1e93ef34e6..7b20c024db 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -56,25 +56,24 @@ void cpu_loop(CPUNios2State *env) env->regs[2] =3D abs(ret); /* Return value is 0..4096 */ env->regs[7] =3D ret > 0xfffff000u; - env->regs[R_PC] +=3D 4; + env->pc +=3D 4; break; =20 case 1: qemu_log_mask(CPU_LOG_INT, "\nTrap 1\n"); - force_sig_fault(TARGET_SIGUSR1, 0, env->regs[R_PC]); + force_sig_fault(TARGET_SIGUSR1, 0, env->pc); break; case 2: qemu_log_mask(CPU_LOG_INT, "\nTrap 2\n"); - force_sig_fault(TARGET_SIGUSR2, 0, env->regs[R_PC]); + force_sig_fault(TARGET_SIGUSR2, 0, env->pc); break; case 31: qemu_log_mask(CPU_LOG_INT, "\nTrap 31\n"); - force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->re= gs[R_PC]); + force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc= ); break; default: qemu_log_mask(CPU_LOG_INT, "\nTrap %d\n", env->error_code); - force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLTRP, - env->regs[R_PC]); + force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLTRP, env->pc); break; =20 case 16: /* QEMU specific, for __kuser_cmpxchg */ @@ -99,7 +98,7 @@ void cpu_loop(CPUNios2State *env) o =3D env->regs[5]; n =3D env->regs[6]; env->regs[2] =3D qatomic_cmpxchg(h, o, n) - o; - env->regs[R_PC] +=3D 4; + env->pc +=3D 4; } break; } @@ -117,7 +116,7 @@ void cpu_loop(CPUNios2State *env) info.si_errno =3D 0; /* TODO: check env->error_code */ info.si_code =3D TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr =3D env->regs[R_PC]; + info._sifields._sigfault._addr =3D env->pc; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); } break; @@ -155,6 +154,6 @@ void target_cpu_copy_regs(CPUArchState *env, struct tar= get_pt_regs *regs) env->regs[R_SP] =3D regs->sp; env->regs[R_GP] =3D regs->gp; env->regs[CR_ESTATUS] =3D regs->estatus; - env->regs[R_PC] =3D regs->ea; + env->pc =3D regs->ea; /* TODO: unsigned long orig_r7; */ } diff --git a/linux-user/nios2/signal.c b/linux-user/nios2/signal.c index 517cd39270..ccfaa75d3b 100644 --- a/linux-user/nios2/signal.c +++ b/linux-user/nios2/signal.c @@ -73,7 +73,7 @@ static void rt_setup_ucontext(struct target_ucontext *uc,= CPUNios2State *env) __put_user(env->regs[R_RA], &gregs[23]); __put_user(env->regs[R_FP], &gregs[24]); __put_user(env->regs[R_GP], &gregs[25]); - __put_user(env->regs[R_PC], &gregs[27]); + __put_user(env->pc, &gregs[27]); __put_user(env->regs[R_SP], &gregs[28]); } =20 @@ -122,7 +122,7 @@ static int rt_restore_ucontext(CPUNios2State *env, stru= ct target_ucontext *uc, __get_user(env->regs[R_GP], &gregs[25]); /* Not really necessary no user settable bits */ __get_user(temp, &gregs[26]); - __get_user(env->regs[R_PC], &gregs[27]); + __get_user(env->pc, &gregs[27]); =20 __get_user(env->regs[R_RA], &gregs[23]); __get_user(env->regs[R_SP], &gregs[28]); @@ -180,7 +180,7 @@ void setup_rt_frame(int sig, struct target_sigaction *k= a, env->regs[4] =3D sig; env->regs[5] =3D frame_addr + offsetof(struct target_rt_sigframe, info= ); env->regs[6] =3D frame_addr + offsetof(struct target_rt_sigframe, uc); - env->regs[R_PC] =3D ka->_sa_handler; + env->pc =3D ka->_sa_handler; =20 unlock_user_struct(frame, frame_addr, 1); } diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 6975ae4bdb..40031c9f20 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -31,7 +31,7 @@ static void nios2_cpu_set_pc(CPUState *cs, vaddr value) Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUNios2State *env =3D &cpu->env; =20 - env->regs[R_PC] =3D value; + env->pc =3D value; } =20 static bool nios2_cpu_has_work(CPUState *cs) @@ -54,7 +54,7 @@ static void nios2_cpu_reset(DeviceState *dev) ncc->parent_reset(dev); =20 memset(env->regs, 0, sizeof(uint32_t) * NUM_CORE_REGS); - env->regs[R_PC] =3D cpu->reset_addr; + env->pc =3D cpu->reset_addr; =20 #if defined(CONFIG_USER_ONLY) /* Start in user mode with interrupts enabled. */ @@ -161,7 +161,7 @@ static int nios2_cpu_gdb_read_register(CPUState *cs, GB= yteArray *mem_buf, int n) if (n < 32) { /* GP regs */ return gdb_get_reg32(mem_buf, env->regs[n]); } else if (n =3D=3D 32) { /* PC */ - return gdb_get_reg32(mem_buf, env->regs[R_PC]); + return gdb_get_reg32(mem_buf, env->pc); } else if (n < 49) { /* Status regs */ return gdb_get_reg32(mem_buf, env->regs[n - 1]); } @@ -183,7 +183,7 @@ static int nios2_cpu_gdb_write_register(CPUState *cs, u= int8_t *mem_buf, int n) if (n < 32) { /* GP regs */ env->regs[n] =3D ldl_p(mem_buf); } else if (n =3D=3D 32) { /* PC */ - env->regs[R_PC] =3D ldl_p(mem_buf); + env->pc =3D ldl_p(mem_buf); } else if (n < 49) { /* Status regs */ env->regs[n - 1] =3D ldl_p(mem_buf); } diff --git a/target/nios2/helper.c b/target/nios2/helper.c index e5c98650e1..31cec29e89 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -35,7 +35,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUNios2State *env =3D &cpu->env; cs->exception_index =3D -1; - env->regs[R_EA] =3D env->regs[R_PC] + 4; + env->regs[R_EA] =3D env->pc + 4; } =20 void nios2_cpu_record_sigsegv(CPUState *cs, vaddr addr, @@ -58,7 +58,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_IRQ: assert(env->regs[CR_STATUS] & CR_STATUS_PIE); =20 - qemu_log_mask(CPU_LOG_INT, "interrupt at pc=3D%x\n", env->regs[R_P= C]); + qemu_log_mask(CPU_LOG_INT, "interrupt at pc=3D%x\n", env->pc); =20 env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; env->regs[CR_STATUS] |=3D CR_STATUS_IH; @@ -67,14 +67,13 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - env->regs[R_EA] =3D env->regs[R_PC] + 4; - env->regs[R_PC] =3D cpu->exception_addr; + env->regs[R_EA] =3D env->pc + 4; + env->pc =3D cpu->exception_addr; break; =20 case EXCP_TLBD: if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=3D%x\n", - env->regs[R_PC]); + qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=3D%x\n", env= ->pc); =20 /* Fast TLB miss */ /* Variation from the spec. Table 3-35 of the cpu reference sh= ows @@ -90,11 +89,10 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; env->regs[CR_TLBMISC] |=3D CR_TLBMISC_WR; =20 - env->regs[R_EA] =3D env->regs[R_PC] + 4; - env->regs[R_PC] =3D cpu->fast_tlb_miss_addr; + env->regs[R_EA] =3D env->pc + 4; + env->pc =3D cpu->fast_tlb_miss_addr; } else { - qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=3D%x\n", - env->regs[R_PC]); + qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=3D%x\n", e= nv->pc); =20 /* Double TLB miss */ env->regs[CR_STATUS] |=3D CR_STATUS_EH; @@ -105,14 +103,14 @@ void nios2_cpu_do_interrupt(CPUState *cs) =20 env->regs[CR_TLBMISC] |=3D CR_TLBMISC_DBL; =20 - env->regs[R_PC] =3D cpu->exception_addr; + env->pc =3D cpu->exception_addr; } break; =20 case EXCP_TLBR: case EXCP_TLBW: case EXCP_TLBX: - qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=3D%x\n", env->regs[R_PC= ]); + qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=3D%x\n", env->pc); =20 env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; env->regs[CR_STATUS] |=3D CR_STATUS_EH; @@ -125,19 +123,18 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[CR_TLBMISC] |=3D CR_TLBMISC_WR; } =20 - env->regs[R_EA] =3D env->regs[R_PC] + 4; - env->regs[R_PC] =3D cpu->exception_addr; + env->regs[R_EA] =3D env->pc + 4; + env->pc =3D cpu->exception_addr; break; =20 case EXCP_SUPERA: case EXCP_SUPERI: case EXCP_SUPERD: - qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=3D%x\n", - env->regs[R_PC]); + qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=3D%x\n", en= v->pc); =20 if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; - env->regs[R_EA] =3D env->regs[R_PC] + 4; + env->regs[R_EA] =3D env->pc + 4; } =20 env->regs[CR_STATUS] |=3D CR_STATUS_EH; @@ -146,17 +143,16 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - env->regs[R_PC] =3D cpu->exception_addr; + env->pc =3D cpu->exception_addr; break; =20 case EXCP_ILLEGAL: case EXCP_TRAP: - qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=3D%x\n", - env->regs[R_PC]); + qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=3D%x\n", env->pc); =20 if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; - env->regs[R_EA] =3D env->regs[R_PC] + 4; + env->regs[R_EA] =3D env->pc + 4; } =20 env->regs[CR_STATUS] |=3D CR_STATUS_EH; @@ -165,24 +161,23 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - env->regs[R_PC] =3D cpu->exception_addr; + env->pc =3D cpu->exception_addr; break; =20 case EXCP_BREAK: - qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=3D%x\n", - env->regs[R_PC]); + qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=3D%x\n", env->pc= ); /* The semihosting instruction is "break 1". */ if (semihosting_enabled() && - cpu_ldl_code(env, env->regs[R_PC]) =3D=3D 0x003da07a) { + cpu_ldl_code(env, env->pc) =3D=3D 0x003da07a) { qemu_log_mask(CPU_LOG_INT, "Entering semihosting\n"); - env->regs[R_PC] +=3D 4; + env->pc +=3D 4; do_nios2_semihosting(env); break; } =20 if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->regs[CR_BSTATUS] =3D env->regs[CR_STATUS]; - env->regs[R_BA] =3D env->regs[R_PC] + 4; + env->regs[R_BA] =3D env->pc + 4; } =20 env->regs[CR_STATUS] |=3D CR_STATUS_EH; @@ -191,7 +186,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - env->regs[R_PC] =3D cpu->exception_addr; + env->pc =3D cpu->exception_addr; break; =20 default: diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 1e0ab686dc..154ffacbea 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -104,6 +104,7 @@ typedef struct DisasContext { } DisasContext; =20 static TCGv cpu_R[NUM_CORE_REGS]; +static TCGv cpu_pc; =20 typedef struct Nios2Instruction { void (*handler)(DisasContext *dc, uint32_t code, uint32_t flags); @@ -144,7 +145,7 @@ static void t_gen_helper_raise_exception(DisasContext *= dc, { TCGv_i32 tmp =3D tcg_const_i32(index); =20 - tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); + tcg_gen_movi_tl(cpu_pc, dc->pc); gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); dc->base.is_jmp =3D DISAS_NORETURN; @@ -156,10 +157,10 @@ static void gen_goto_tb(DisasContext *dc, int n, uint= 32_t dest) =20 if (translator_use_goto_tb(&dc->base, dest)) { tcg_gen_goto_tb(n); - tcg_gen_movi_tl(cpu_R[R_PC], dest); + tcg_gen_movi_tl(cpu_pc, dest); tcg_gen_exit_tb(tb, n); } else { - tcg_gen_movi_tl(cpu_R[R_PC], dest); + tcg_gen_movi_tl(cpu_pc, dest); tcg_gen_exit_tb(NULL, 0); } } @@ -391,7 +392,7 @@ static void eret(DisasContext *dc, uint32_t code, uint3= 2_t flags) } =20 tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); - tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_EA]); + tcg_gen_mov_tl(cpu_pc, cpu_R[R_EA]); =20 dc->base.is_jmp =3D DISAS_JUMP; } @@ -399,7 +400,7 @@ static void eret(DisasContext *dc, uint32_t code, uint3= 2_t flags) /* PC <- ra */ static void ret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_RA]); + tcg_gen_mov_tl(cpu_pc, cpu_R[R_RA]); =20 dc->base.is_jmp =3D DISAS_JUMP; } @@ -407,7 +408,7 @@ static void ret(DisasContext *dc, uint32_t code, uint32= _t flags) /* PC <- ba */ static void bret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_BA]); + tcg_gen_mov_tl(cpu_pc, cpu_R[R_BA]); =20 dc->base.is_jmp =3D DISAS_JUMP; } @@ -417,7 +418,7 @@ static void jmp(DisasContext *dc, uint32_t code, uint32= _t flags) { R_TYPE(instr, code); =20 - tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a)); + tcg_gen_mov_tl(cpu_pc, load_gpr(dc, instr.a)); =20 dc->base.is_jmp =3D DISAS_JUMP; } @@ -440,7 +441,7 @@ static void callr(DisasContext *dc, uint32_t code, uint= 32_t flags) { R_TYPE(instr, code); =20 - tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a)); + tcg_gen_mov_tl(cpu_pc, load_gpr(dc, instr.a)); tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next); =20 dc->base.is_jmp =3D DISAS_JUMP; @@ -742,7 +743,7 @@ illegal_op: t_gen_helper_raise_exception(dc, EXCP_ILLEGAL); } =20 -static const char * const regnames[] =3D { +static const char * const regnames[NUM_CORE_REGS] =3D { "zero", "at", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", @@ -759,7 +760,6 @@ static const char * const regnames[] =3D { "reserved6", "reserved7", "reserved8", "reserved9", "reserved10", "reserved11", "reserved12", "reserved13", "reserved14", "reserved15", "reserved16", "reserved17", - "rpc" }; =20 #include "exec/gen-icount.h" @@ -827,7 +827,7 @@ static void nios2_tr_tb_stop(DisasContextBase *dcbase, = CPUState *cs) case DISAS_TOO_MANY: case DISAS_UPDATE: /* Save the current PC back into the CPU register */ - tcg_gen_movi_tl(cpu_R[R_PC], dc->base.pc_next); + tcg_gen_movi_tl(cpu_pc, dc->base.pc_next); tcg_gen_exit_tb(NULL, 0); break; =20 @@ -876,8 +876,7 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int fl= ags) return; } =20 - qemu_fprintf(f, "IN: PC=3D%x %s\n", - env->regs[R_PC], lookup_symbol(env->regs[R_PC])); + qemu_fprintf(f, "IN: PC=3D%x %s\n", env->pc, lookup_symbol(env->pc)); =20 for (i =3D 0; i < NUM_CORE_REGS; i++) { qemu_fprintf(f, "%9s=3D%8.8x ", regnames[i], env->regs[i]); @@ -903,10 +902,12 @@ void nios2_tcg_init(void) offsetof(CPUNios2State, regs[i]), regnames[i]); } + cpu_pc =3D tcg_global_mem_new(cpu_env, + offsetof(CPUNios2State, pc), "pc"); } =20 void restore_state_to_opc(CPUNios2State *env, TranslationBlock *tb, target_ulong *data) { - env->regs[R_PC] =3D data[0]; + env->pc =3D data[0]; } --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494290551481.10907535413253; Wed, 16 Mar 2022 22:18:10 -0700 (PDT) Received: from localhost ([::1]:44488 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiWX-0003p1-K7 for importer@patchew.org; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JwvNUZim2yApAOIks/gNVf1oLVx5CVGA+91qmxfeNYY=; b=k917HWq/iApWpmnPKFi67UggyNWz8Z6FLFyfAxPHGfYu+XfOlo63pPsMtPRfHjAYr+ AMG885VFHtpOlGnzAFq1PuQd0PwMEjraLnB2DLL2Pe/3IA38K02EXNYk6JwcKCBFkwvX SB2qeg286BeUk48nYy3WyX2EaXXpL9MEkQ677GwjYB0viI/DT2DryXBsgTL4i9gnt7VI vFEvVwdvLXqW9sgiFQPQiDxiPmRpF6Wjd5lCY6cO/50/zgCu2eHySHS2BAEveOiwSa0l /t5oo3JZYD0zIeouRyXd1kGs7Vl/N7qIaqzZCnYTiKds8pbxo81lXLpdBFZ/R3GxRnBh MLZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JwvNUZim2yApAOIks/gNVf1oLVx5CVGA+91qmxfeNYY=; b=owjuUvQtdOlEFxG0O+Y826tdnTDue7dmIhMrrOjoOjHf8HQVGIvEbmkmdhHHKYdlHv zSTVNgJoxxsJgnw/IBtk4ogD8Qo/R2DfkzX0OeYcHF+jrJNw5Lb+/Au5OQXK5V4OQU1T LMYN2GB+cGrBtPcGDTTKTLgKiZq/+K5dkwoWXRojHADbkZx0Ec28G+r4lJ5ev7/QVmWJ xPqY5l80jvSXp09bSGw7fLT/18YOrMJgv4a0/qlWqE+E7rCg74t1ahj2U7/Ko428mEd/ TT9U84kCxTog2HC6MC7BEee+LIrnhtk2FjPdDATlsNdoMmrqpSSE49IA57GobB/qhFCJ oRKQ== X-Gm-Message-State: AOAM533KPwBHjQ0fzagWhUHfvhOLylFcGvzdBXyicPETykU1zr6E4dGX eCP+Y4U5frSrv2pz6GhA1U6S0OmqHgvfkw== X-Google-Smtp-Source: ABdhPJzwWFK0xxbxBrmpGP4icV3n8OSr82Ez0LuY8lPS9H+pj/ISQc02i8YVO9DaNbKUha2W+YVwog== X-Received: by 2002:a17:90b:4b09:b0:1c6:3223:8048 with SMTP id lx9-20020a17090b4b0900b001c632238048mr13404880pjb.240.1647493545764; Wed, 16 Mar 2022 22:05:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 06/51] target/nios2: Split out helper for eret instruction Date: Wed, 16 Mar 2022 22:04:53 -0700 Message-Id: <20220317050538.924111-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::636 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494292837100001 Content-Type: text/plain; charset="utf-8" From: Amir Gonnen The implementation of eret will become much more complex with the introduction of shadow registers. Reviewed-by: Peter Maydell Signed-off-by: Amir Gonnen Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai> [rth: Split out of a larger patch for shadow register sets. Directly exit to the cpu loop from the helper.] Signed-off-by: Richard Henderson --- target/nios2/helper.h | 1 + target/nios2/op_helper.c | 9 +++++++++ target/nios2/translate.c | 10 ++++++---- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/target/nios2/helper.h b/target/nios2/helper.h index a44ecfdf7a..525b6b685b 100644 --- a/target/nios2/helper.h +++ b/target/nios2/helper.h @@ -21,6 +21,7 @@ DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) =20 #if !defined(CONFIG_USER_ONLY) +DEF_HELPER_3(eret, noreturn, env, i32, i32) DEF_HELPER_2(mmu_write_tlbacc, void, env, i32) DEF_HELPER_2(mmu_write_tlbmisc, void, env, i32) DEF_HELPER_2(mmu_write_pteaddr, void, env, i32) diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index caa885f7b4..ee5ad8b23f 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -30,3 +30,12 @@ void helper_raise_exception(CPUNios2State *env, uint32_t= index) cs->exception_index =3D index; cpu_loop_exit(cs); } + +#ifndef CONFIG_USER_ONLY +void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc) +{ + env->regs[CR_STATUS] =3D new_status; + env->pc =3D new_pc; + cpu_loop_exit(env_cpu(env)); +} +#endif /* !CONFIG_USER_ONLY */ diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 154ffacbea..7c2c430e99 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -391,10 +391,12 @@ static void eret(DisasContext *dc, uint32_t code, uin= t32_t flags) return; } =20 - tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); - tcg_gen_mov_tl(cpu_pc, cpu_R[R_EA]); - - dc->base.is_jmp =3D DISAS_JUMP; +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + gen_helper_eret(cpu_env, cpu_R[CR_ESTATUS], cpu_R[R_EA]); + dc->base.is_jmp =3D DISAS_NORETURN; +#endif } =20 /* PC <- ra */ --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494646153336.29840858679995; Wed, 16 Mar 2022 22:24:06 -0700 (PDT) Received: from localhost ([::1]:33168 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUicG-0006uH-Rl for importer@patchew.org; Thu, 17 Mar 2022 01:24:04 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50622) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKc-0000Us-An for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:50 -0400 Received: from [2607:f8b0:4864:20::62a] (port=38572 helo=mail-pl1-x62a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKa-0002DA-L9 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:50 -0400 Received: by mail-pl1-x62a.google.com with SMTP id n18so3559966plg.5 for ; Wed, 16 Mar 2022 22:05:48 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L+hHIFlWfBTWBYr3FWgA0oFT6zz/eF9rCjwaIxiotag=; b=CBkjPBEjEnkCygb/TQ0Lwvh9voa/HM7X3RdQUdZZ9PzDHMESJy6LNFS1bOwRID5Y2/ 1N9c+UQ9LBtmCoBPxLOdbKIerT8eIgw4rtbIReTLgViBQbh3mgjWJPN5855mS7l4l/RU rjjnEFBvbnxzGcbxSY5eJK30s3Q5pVRZprq9bZfXJX+dJqsugKz82YpWn7YlgDozVLIb qNgCByblyQg57GbGZsprAsMyG3J9MdmUxYJgxD3IOud2qobvbb5AjCNcBJgTTBE09lrH DDlOSpB4b3orVtYc6Vk3e9Ci6Mr2GhysNBze6DgQU07xqy2THADhrCpeK/dLvJtWEha0 zkPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L+hHIFlWfBTWBYr3FWgA0oFT6zz/eF9rCjwaIxiotag=; b=xIuu5n/pIRN4Rg4PFVXh9jbjgU/SaCzljNNF/L2p13XpVZlh6xoJOoNHQcOI3cfx2N bme32xhq9g0PXW0DCyzGwxkwctjiy7bMJ6PAqX5FTf5beFXcM42a1zlbCB11IjOfse/r DUGMWPYccutJb7izy3ZABlh0dKbrEzbE+kI38tVdcz8SI7RojpcoVIcMH3e+hWigOMyT d6ssSTiQlTqINJC7rJkLwIB+1aUOjt041wkTjtPcnj3jaW1+OoQ9VIUDw3GnKSuPrmWo X8Z1e+l3q0zIaWUTV7kKULiSPDv0PWw9mbnWcH1Mjfyb1LbRNggdtMVmh9bFK94QmH6G 1FoQ== X-Gm-Message-State: AOAM531xz1R+14srLkUaSSXYpmaJ+MIIzQiCTRYOkmWFnKuQR53qrNGJ xHbq+zvySGLXYaBaPZBXKJMvWeFSkEb6CA== X-Google-Smtp-Source: ABdhPJzatySXpc9wuCJnrSieRJBrsurUfQo8Vuq3dlc25dol1guKpBkjLVHxWOOgBx2WdaloL0tWsA== X-Received: by 2002:a17:903:240c:b0:153:c8df:7207 with SMTP id e12-20020a170903240c00b00153c8df7207mr2990519plo.44.1647493546831; Wed, 16 Mar 2022 22:05:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 07/51] target/nios2: Fix BRET instruction Date: Wed, 16 Mar 2022 22:04:54 -0700 Message-Id: <20220317050538.924111-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494650756100003 Content-Type: text/plain; charset="utf-8" We had failed to copy BSTATUS back to STATUS, and diagnose supervisor-only. The spec is light on the specifics of the implementation of bret, but it is an easy assumption that the restore into STATUS should work the same as eret. Therefore, reuse the existing helper_eret. Reviewed-by: Peter Maydell Reported-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/translate.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 7c2c430e99..3f7bbd6d7b 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -407,12 +407,22 @@ static void ret(DisasContext *dc, uint32_t code, uint= 32_t flags) dc->base.is_jmp =3D DISAS_JUMP; } =20 -/* PC <- ba */ +/* + * status <- bstatus + * PC <- ba + */ static void bret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(cpu_pc, cpu_R[R_BA]); + if (!gen_check_supervisor(dc)) { + return; + } =20 - dc->base.is_jmp =3D DISAS_JUMP; +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + gen_helper_eret(cpu_env, cpu_R[CR_BSTATUS], cpu_R[R_BA]); + dc->base.is_jmp =3D DISAS_NORETURN; +#endif } =20 /* PC <- rA */ --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494932662454.92144791588976; Wed, 16 Mar 2022 22:28:52 -0700 (PDT) Received: from localhost ([::1]:41376 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUigt-0004G2-Bt for importer@patchew.org; Thu, 17 Mar 2022 01:28:51 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50632) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKc-0000WF-O3 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:50 -0400 Received: from [2607:f8b0:4864:20::62c] (port=45052 helo=mail-pl1-x62c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKb-0002DJ-1k for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:50 -0400 Received: by mail-pl1-x62c.google.com with SMTP id q11so3535032pln.11 for ; Wed, 16 Mar 2022 22:05:48 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PuQXs01EVc8/4vklrwlVd1dwEAykk2bEYyKpnLalt08=; b=NlDtwI6aWx+FV0LsnjRSnRrmCxqZXyQPTPtyY/3PAWjAHICL/BqEuNFacb7Mt97SD2 VoSd/tW0bwoWMhi93FDGNRVNy/KIbnQfVwnmo9lkXcMJITasfJh6kJzfDotXpNtamxTX XyC7ONrJHVJqBFHYMRsd0/x/g46ZjQ80AlqTXKVXLuFzeAtqLPSQn9Uw6Pbilubo3qnb I8cSzrtbMVmGcGiHF0zp6l+Y7m6rQyeARd04HIVl7F23RBKau0hbedu5F8ezeOT0bZh0 JjW1u0Ab6fa07CIX61HvjVIZH6vtHi1sISL5q2PW6tNXpxjPshYd99RrIiPXiQRWiKkw /CJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PuQXs01EVc8/4vklrwlVd1dwEAykk2bEYyKpnLalt08=; b=WReY/zMI38dblVmLa2P0hp5dYCP4EzIxbMHDqQglOtjM12xDjhqcWsLsHfoIc8WTVy Zq5GArT/fzdb3jGQOv8NGjNbU5FPTyk3B6HY32/MOFqgvmA4/0p04gUHUWWOWsoLJkyG qyJdOCGJtNPofm2QXobAqJGsq77+qU3aB3XVQdFGp8qjIRcp+G2sIOZJVWmdAXyktS0i xoFlyE4+D6ks0AZWnn7JyBLuA/tVDyIRsmdj2wGcuv6Xj7xwwTx4vpKcgMDVmRqHyGeY kpMIeaXEQls0wq8/ai0oyWCHlKbkDQ3LEXyjzTjJlQrrrgzaGqC8meVhD6uqyupksiK1 n+cA== X-Gm-Message-State: AOAM533oFSUTOiDNT1vOYIgejcnlxg+hUwhPyznd4ou/8Tpc2xB2gPt2 s1qYuMRuAJDt8iTOLW+jUu2EIuUfUugspw== X-Google-Smtp-Source: ABdhPJyib8evnnc2xcT31IclFizSOH005cKGzV7VJctLN4GeW2izhLE6W77iVJkU7NhHdqOsao32jw== X-Received: by 2002:a17:90a:de96:b0:1be:e427:8745 with SMTP id n22-20020a17090ade9600b001bee4278745mr3316205pjv.175.1647493547752; Wed, 16 Mar 2022 22:05:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 08/51] target/nios2: Do not create TCGv for control registers Date: Wed, 16 Mar 2022 22:04:55 -0700 Message-Id: <20220317050538.924111-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494933402100001 Content-Type: text/plain; charset="utf-8" We don't need to reference them often, and when we do it is just as easy to load/store from cpu_env directly. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/translate.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 3f7bbd6d7b..e6e9a5ac6f 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -103,7 +103,7 @@ typedef struct DisasContext { int mem_idx; } DisasContext; =20 -static TCGv cpu_R[NUM_CORE_REGS]; +static TCGv cpu_R[NUM_GP_REGS]; static TCGv cpu_pc; =20 typedef struct Nios2Instruction { @@ -394,7 +394,11 @@ static void eret(DisasContext *dc, uint32_t code, uint= 32_t flags) #ifdef CONFIG_USER_ONLY g_assert_not_reached(); #else - gen_helper_eret(cpu_env, cpu_R[CR_ESTATUS], cpu_R[R_EA]); + TCGv tmp =3D tcg_temp_new(); + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, regs[CR_ESTATUS])); + gen_helper_eret(cpu_env, tmp, cpu_R[R_EA]); + tcg_temp_free(tmp); + dc->base.is_jmp =3D DISAS_NORETURN; #endif } @@ -420,7 +424,11 @@ static void bret(DisasContext *dc, uint32_t code, uint= 32_t flags) #ifdef CONFIG_USER_ONLY g_assert_not_reached(); #else - gen_helper_eret(cpu_env, cpu_R[CR_BSTATUS], cpu_R[R_BA]); + TCGv tmp =3D tcg_temp_new(); + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, regs[CR_BSTATUS])); + gen_helper_eret(cpu_env, tmp, cpu_R[R_BA]); + tcg_temp_free(tmp); + dc->base.is_jmp =3D DISAS_NORETURN; #endif } @@ -463,6 +471,7 @@ static void callr(DisasContext *dc, uint32_t code, uint= 32_t flags) static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, code); + TCGv t1, t2; =20 if (!gen_check_supervisor(dc)) { return; @@ -482,10 +491,19 @@ static void rdctl(DisasContext *dc, uint32_t code, ui= nt32_t flags) * must perform the AND here, and anywhere else we need the * guest value of ipending. */ - tcg_gen_and_tl(cpu_R[instr.c], cpu_R[CR_IPENDING], cpu_R[CR_IENABL= E]); + t1 =3D tcg_temp_new(); + t2 =3D tcg_temp_new(); + tcg_gen_ld_tl(t1, cpu_env, + offsetof(CPUNios2State, regs[CR_IPENDING])); + tcg_gen_ld_tl(t2, cpu_env, + offsetof(CPUNios2State, regs[CR_IENABLE])); + tcg_gen_and_tl(cpu_R[instr.c], t1, t2); + tcg_temp_free(t1); + tcg_temp_free(t2); break; default: - tcg_gen_mov_tl(cpu_R[instr.c], cpu_R[instr.imm5 + CR_BASE]); + tcg_gen_ld_tl(cpu_R[instr.c], cpu_env, + offsetof(CPUNios2State, regs[instr.imm5 + CR_BASE])); break; } } @@ -522,7 +540,8 @@ static void wrctl(DisasContext *dc, uint32_t code, uint= 32_t flags) dc->base.is_jmp =3D DISAS_UPDATE; /* fall through */ default: - tcg_gen_mov_tl(cpu_R[instr.imm5 + CR_BASE], v); + tcg_gen_st_tl(v, cpu_env, + offsetof(CPUNios2State, regs[instr.imm5 + CR_BASE])); break; } #endif @@ -909,7 +928,7 @@ void nios2_tcg_init(void) { int i; =20 - for (i =3D 0; i < NUM_CORE_REGS; i++) { + for (i =3D 0; i < NUM_GP_REGS; i++) { cpu_R[i] =3D tcg_global_mem_new(cpu_env, offsetof(CPUNios2State, regs[i]), regnames[i]); --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494024768382.0870817662013; Wed, 16 Mar 2022 22:13:44 -0700 (PDT) Received: from localhost ([::1]:58472 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiSH-0002jg-3Y for importer@patchew.org; Thu, 17 Mar 2022 01:13:45 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50670) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKd-0000Zf-T8 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:51 -0400 Received: from [2607:f8b0:4864:20::535] (port=33682 helo=mail-pg1-x535.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKc-0002Dc-3a for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:51 -0400 Received: by mail-pg1-x535.google.com with SMTP id 6so1807890pgg.0 for ; Wed, 16 Mar 2022 22:05:49 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=V6MtvqowYaVi0x7SdYoHS8WdpajzKex2EuqCuCmkLJA=; b=OJAPnaFVm8IoIR0xvAbBHoCmcVnrt/pahQ+wX0DPATQV7X4LiPqr3DCyOROoVkn5q4 fRNur0iUNU1TSWsF1KyEnkZEY/zF0e9Bd+GVI2sf3DOkZvxHXVZtBvy+FBs26ZmDAthP QzuqdDStnmhyXY/tGekuvra02hRWpRiY11tuzZ2MraCuubV3ryiBa6dlYSaSGti6PcbW mh78qFASJev05H+YR6gQ4MgX3NnqtxvODMeOqnxr5pcfrewkhHfqiHtVZf+JKc2+XHea ZL6nBkN2tpXJP3YEksZtJIwyZ04JJXLASCJVbZZSjhsw+RNjGJioEF4I7SjiMnq3plgj Mnjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=V6MtvqowYaVi0x7SdYoHS8WdpajzKex2EuqCuCmkLJA=; b=ScZZi+mNQOofP99oxyg2sFO4k8frl/cyn6ZVlQovvThqaUid8NSItm0Tz8M9YNd8Dx jreQ7F5CFuvsiX10XEDg1JRwLYbDMByI7Y9s1ZasOhRbuzCXTZoGuqFOSU4vNA2mgkkk vNkqwHfxtGlq8qzBiymrnoy04aPvN6iWHIYaXShnXZcB4yIFPaleF9EB7o9i1F7C/+qS BhMDY9H/x3kRu61DJAbLp4qXhbRfbCukRk73SlOm+dSJC9H30Il86YaMcy+T9z5cU4ls lg3NJZsNz4ebtuA/nmkVivvfz9cTxWTxmQPwEbmnSnmebD92f5X9h73j4ZCF5PJ3w3P5 /+tA== X-Gm-Message-State: AOAM533e/fE6+oMx7aj+F282iDomsUaAaZAC+VddBAlGO+0vA6jrM5kp pCrjsrPEsPfZp3xgtF6Q50hQQlPHhnAL2g== X-Google-Smtp-Source: ABdhPJxzLUntpnZjgOlH679YshM7jMyWSCdWgA4ihvGcjKr5EIvh9MzC6OfOZj/kZNL+6/0tqJs6KA== X-Received: by 2002:a05:6a00:885:b0:4f4:17d8:be31 with SMTP id q5-20020a056a00088500b004f417d8be31mr3016859pfj.57.1647493548767; Wed, 16 Mar 2022 22:05:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 09/51] linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs Date: Wed, 16 Mar 2022 22:04:56 -0700 Message-Id: <20220317050538.924111-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::535 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494026812100001 Content-Type: text/plain; charset="utf-8" Drop the set of estatus in init_thread; it was clearly intended to be setting the value of CR_STATUS for the application, but we never actually performed that copy. However, the proper value is set in nios2_cpu_reset so we don't need to do anything here. We only initialize SP and EA in init_thread, there's no value in copying other uninitialized data into ENV. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 1 - linux-user/nios2/cpu_loop.c | 22 ---------------------- 2 files changed, 23 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 23ff9659a5..8c85c933b7 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1096,7 +1096,6 @@ static void init_thread(struct target_pt_regs *regs, = struct image_info *infop) { regs->ea =3D infop->entry; regs->sp =3D infop->start_stack; - regs->estatus =3D 0x3; } =20 #define LO_COMMPAGE TARGET_PAGE_SIZE diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index 7b20c024db..fa234cb2af 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -132,28 +132,6 @@ void cpu_loop(CPUNios2State *env) =20 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { - env->regs[0] =3D 0; - env->regs[1] =3D regs->r1; - env->regs[2] =3D regs->r2; - env->regs[3] =3D regs->r3; - env->regs[4] =3D regs->r4; - env->regs[5] =3D regs->r5; - env->regs[6] =3D regs->r6; - env->regs[7] =3D regs->r7; - env->regs[8] =3D regs->r8; - env->regs[9] =3D regs->r9; - env->regs[10] =3D regs->r10; - env->regs[11] =3D regs->r11; - env->regs[12] =3D regs->r12; - env->regs[13] =3D regs->r13; - env->regs[14] =3D regs->r14; - env->regs[15] =3D regs->r15; - /* TODO: unsigned long orig_r2; */ - env->regs[R_RA] =3D regs->ra; - env->regs[R_FP] =3D regs->fp; env->regs[R_SP] =3D regs->sp; - env->regs[R_GP] =3D regs->gp; - env->regs[CR_ESTATUS] =3D regs->estatus; env->pc =3D regs->ea; - /* TODO: unsigned long orig_r7; */ } --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647493729198350.5977775836993; Wed, 16 Mar 2022 22:08:49 -0700 (PDT) Received: from localhost ([::1]:47586 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiNT-0003ej-W8 for importer@patchew.org; Thu, 17 Mar 2022 01:08:48 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50680) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKe-0000c7-LW for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:52 -0400 Received: from [2607:f8b0:4864:20::42f] (port=33388 helo=mail-pf1-x42f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKd-0002Dq-3K for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:52 -0400 Received: by mail-pf1-x42f.google.com with SMTP id s42so5987214pfg.0 for ; Wed, 16 Mar 2022 22:05:50 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cj1Mv1TK+d1R4GNVLpYWtLlcIcx/OqQSWvfjy4IfC40=; b=Irf3JKD0HDQ7INP+tvbPf3Obiwy9viqWZf6YNRvDBego1xRVgux4RU2D7lToxg+lU2 QPxP+xRPNd1+ygUEPKoqHiqSIqRBtYuQKr35IW4fFcAPnLLJKUAXIvhWi1z3ElQFa99W MO9T/YBpkdFWO3vRftZvaF1aL/H4aVNQVi3NP4QEbEIIbCU487foH56midMc1UmKwlsO DXZEI0s/KPCblRLTqXjW/p2wA3BcPkGLn+zVynKxalihqNaepWDaWHdUcJaKHsH/gIsd ybIu5E5rZH0S9Sa+4zl/MxeMF3MQ9tPqkZMM1GiNyPX+adosZWYtfU28d1ewiT2q4IVl E9RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cj1Mv1TK+d1R4GNVLpYWtLlcIcx/OqQSWvfjy4IfC40=; b=4gQ4TG23yDtW07YchM+7VSu3U7qXkbs+LlapGHkKMHI2wTbC5seew0aZ60XdOG/y8D XPoGcIzbGChHEbwtKm+OOBaH2UVrqj+TYg+yIfYw26d9DHLqJViXHNk0JDTE8vruV8bl 6zK/azMMeV95TvlDoMhCUQ5+aQQ0VErkwK+Dhg2hWIDMPHHfq7WbCxyUk2KXz9jViLHz XnZoB16/vc2auuzPwxeg1/03MMtM2ZA9grSE0RXFlUWQGug6rRW3ri5uPWOFwtHFoT8+ VFZDfK81HVw+5VBuunUX3DaXYn0G186Ljqvx961G1cQ4I3/JIpPRUQ+hqMo5kRck4910 lQcw== X-Gm-Message-State: AOAM5317rS05DE581t+DfP0U/EH3jdXzA6thIqNgOgV5vqapEY8TWwF/ 9YGD3ez0GPwEDHmFzqUdekT5ozaCk+1JQQ== X-Google-Smtp-Source: ABdhPJzo4tRK6Sb5drfbnSbbhcsYMn80AzjbMxSTVYMYEKld/dVAB5g9/d+auWUS1EREIn1f81LSUA== X-Received: by 2002:a63:fc5a:0:b0:381:744c:9781 with SMTP id r26-20020a63fc5a000000b00381744c9781mr2320067pgk.158.1647493549807; Wed, 16 Mar 2022 22:05:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 10/51] target/nios2: Remove cpu_interrupts_enabled Date: Wed, 16 Mar 2022 22:04:57 -0700 Message-Id: <20220317050538.924111-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647493730758100001 Content-Type: text/plain; charset="utf-8" This function is unused. The real computation of this value is located in nios2_cpu_exec_interrupt. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 9be128d63a..59e950dae6 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -226,11 +226,6 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, bool probe, uintptr_t retaddr); #endif =20 -static inline int cpu_interrupts_enabled(CPUNios2State *env) -{ - return env->regs[CR_STATUS] & CR_STATUS_PIE; -} - typedef CPUNios2State CPUArchState; typedef Nios2CPU ArchCPU; =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495091087123.81839650718689; Wed, 16 Mar 2022 22:31:31 -0700 (PDT) Received: from localhost ([::1]:49828 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUijT-0001aT-9t for importer@patchew.org; Thu, 17 Mar 2022 01:31:31 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50724) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKh-0000lT-Fm for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:55 -0400 Received: from [2607:f8b0:4864:20::42c] (port=41893 helo=mail-pf1-x42c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKe-0002EG-Oz for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:55 -0400 Received: by mail-pf1-x42c.google.com with SMTP id p8so5884549pfh.8 for ; Wed, 16 Mar 2022 22:05:52 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ODzUuO9Bo/dCZ/z6T/TQX0tDH/2DhM3+AVV8gLtx3XM=; b=v3a4TL5QAaE8zRSVwEY8GU/Ahtg4LG9en1A6TqZgtFB3SguFRCZXpyhG9O1T8yQDAM vddDH4w5uTYt/ipHOBrZtb3vfxdK6I6gpj+/4MVXE74rHWMdvuMh12PbDZC3pidAJtym cvqvyoI34kR6emkT2kXwYAiiIUU4MhTyXrnZF0iHe7EjP0S/5BUEIx+2ZeKHuF4RuNym oYFtPj8fxCLRssHOBmCNwEyFBlK6qNNlrnM1s8435fG4ysNA+PL3EPBsUP+WxBQQRBGy F8EoO6rpMg1mzaqutMLulZ0OJuyv8+0Vbk94i0YjDpwvZmKZUD7zdkx8GI7uLy3TU2Vh N8qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ODzUuO9Bo/dCZ/z6T/TQX0tDH/2DhM3+AVV8gLtx3XM=; b=Acb6HUzxPK5bhrfBa0Di8uxP2h8gG2R0lLJxtXoEE2EFTyc71fkL/3d25hJj6JSSEP GDLZ+OKzyc2oXRa4/ECl6IymiXcAAp3qVsyIv0yEMs/v7/vwU5RooUTu/K1JICFM0Y7i yaonA1fOeVQ6Vgl6ZvtOW9STSYVwjiEEDGpwgQ3psLtHuzE0pq/vZw6x1cdMFIcBtZRf PSZ9iiNqo9iP0Dt3ATA19QSE4ObBcesx0iNmm4lYlgIBV7QzUvOn271MoWVBKidmVeJL 65e2+27pPW0+G04Gr9ls2jsUXeT2sRfcijI63ZPdzRsrK1Ab5Gz4DBgJhMwb1n1Fd/vJ u8nA== X-Gm-Message-State: AOAM533Men0rz9/bLBEDkQ5BWYXU6Z160YzDqUuz3qxgLzCzdDG+FXgR qwH763ok6EHXm8k6Wq1X8kfn3N5y+3txdg== X-Google-Smtp-Source: ABdhPJzvhGQJL1ikajgM8+TfsVOl2YGotRb8/eT0iQX2FDu000pNo5oSecKX4XqOU1EwUOVCmys4MQ== X-Received: by 2002:a63:7b49:0:b0:37f:ed43:4fc4 with SMTP id k9-20020a637b49000000b0037fed434fc4mr2265438pgn.387.1647493551276; Wed, 16 Mar 2022 22:05:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 11/51] target/nios2: Split control registers away from general registers Date: Wed, 16 Mar 2022 22:04:58 -0700 Message-Id: <20220317050538.924111-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495092882100001 Content-Type: text/plain; charset="utf-8" Place the control registers into their own array, env->ctrl[]. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 43 ++++++++-------- target/nios2/cpu.c | 19 +++---- target/nios2/helper.c | 106 +++++++++++++++++++-------------------- target/nios2/mmu.c | 26 +++++----- target/nios2/op_helper.c | 2 +- target/nios2/translate.c | 35 +++++++------ 6 files changed, 118 insertions(+), 113 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 59e950dae6..1bcbc9ed63 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -59,9 +59,6 @@ struct Nios2CPUClass { #define NUM_GP_REGS 32 #define NUM_CR_REGS 32 =20 -/* GP regs + CR regs */ -#define NUM_CORE_REGS (NUM_GP_REGS + NUM_CR_REGS) - /* General purpose register aliases */ #define R_ZERO 0 #define R_AT 1 @@ -81,8 +78,7 @@ struct Nios2CPUClass { #define R_RA 31 =20 /* Control register aliases */ -#define CR_BASE NUM_GP_REGS -#define CR_STATUS (CR_BASE + 0) +#define CR_STATUS 0 #define CR_STATUS_PIE (1 << 0) #define CR_STATUS_U (1 << 1) #define CR_STATUS_EH (1 << 2) @@ -92,19 +88,19 @@ struct Nios2CPUClass { #define CR_STATUS_PRS (63 << 16) #define CR_STATUS_NMI (1 << 22) #define CR_STATUS_RSIE (1 << 23) -#define CR_ESTATUS (CR_BASE + 1) -#define CR_BSTATUS (CR_BASE + 2) -#define CR_IENABLE (CR_BASE + 3) -#define CR_IPENDING (CR_BASE + 4) -#define CR_CPUID (CR_BASE + 5) -#define CR_CTL6 (CR_BASE + 6) -#define CR_EXCEPTION (CR_BASE + 7) -#define CR_PTEADDR (CR_BASE + 8) +#define CR_ESTATUS 1 +#define CR_BSTATUS 2 +#define CR_IENABLE 3 +#define CR_IPENDING 4 +#define CR_CPUID 5 +#define CR_CTL6 6 +#define CR_EXCEPTION 7 +#define CR_PTEADDR 8 #define CR_PTEADDR_PTBASE_SHIFT 22 #define CR_PTEADDR_PTBASE_MASK (0x3FF << CR_PTEADDR_PTBASE_SHIFT) #define CR_PTEADDR_VPN_SHIFT 2 #define CR_PTEADDR_VPN_MASK (0xFFFFF << CR_PTEADDR_VPN_SHIFT) -#define CR_TLBACC (CR_BASE + 9) +#define CR_TLBACC 9 #define CR_TLBACC_IGN_SHIFT 25 #define CR_TLBACC_IGN_MASK (0x7F << CR_TLBACC_IGN_SHIFT) #define CR_TLBACC_C (1 << 24) @@ -113,7 +109,7 @@ struct Nios2CPUClass { #define CR_TLBACC_X (1 << 21) #define CR_TLBACC_G (1 << 20) #define CR_TLBACC_PFN_MASK 0x000FFFFF -#define CR_TLBMISC (CR_BASE + 10) +#define CR_TLBMISC 10 #define CR_TLBMISC_WAY_SHIFT 20 #define CR_TLBMISC_WAY_MASK (0xF << CR_TLBMISC_WAY_SHIFT) #define CR_TLBMISC_RD (1 << 19) @@ -124,11 +120,11 @@ struct Nios2CPUClass { #define CR_TLBMISC_BAD (1 << 2) #define CR_TLBMISC_PERM (1 << 1) #define CR_TLBMISC_D (1 << 0) -#define CR_ENCINJ (CR_BASE + 11) -#define CR_BADADDR (CR_BASE + 12) -#define CR_CONFIG (CR_BASE + 13) -#define CR_MPUBASE (CR_BASE + 14) -#define CR_MPUACC (CR_BASE + 15) +#define CR_ENCINJ 11 +#define CR_BADADDR 12 +#define CR_CONFIG 13 +#define CR_MPUBASE 14 +#define CR_MPUACC 15 =20 /* Exceptions */ #define EXCP_BREAK 0x1000 @@ -154,7 +150,8 @@ struct Nios2CPUClass { #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 =20 struct CPUArchState { - uint32_t regs[NUM_CORE_REGS]; + uint32_t regs[NUM_GP_REGS]; + uint32_t ctrl[NUM_CR_REGS]; uint32_t pc; =20 #if !defined(CONFIG_USER_ONLY) @@ -212,7 +209,7 @@ void do_nios2_semihosting(CPUNios2State *env); =20 static inline int cpu_mmu_index(CPUNios2State *env, bool ifetch) { - return (env->regs[CR_STATUS] & CR_STATUS_U) ? MMU_USER_IDX : + return (env->ctrl[CR_STATUS] & CR_STATUS_U) ? MMU_USER_IDX : MMU_SUPERVISOR_IDX; } =20 @@ -236,7 +233,7 @@ static inline void cpu_get_tb_cpu_state(CPUNios2State *= env, target_ulong *pc, { *pc =3D env->pc; *cs_base =3D 0; - *flags =3D (env->regs[CR_STATUS] & (CR_STATUS_EH | CR_STATUS_U)); + *flags =3D env->ctrl[CR_STATUS] & (CR_STATUS_EH | CR_STATUS_U); } =20 #endif /* NIOS2_CPU_H */ diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 40031c9f20..182ddcc18f 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -53,14 +53,15 @@ static void nios2_cpu_reset(DeviceState *dev) =20 ncc->parent_reset(dev); =20 - memset(env->regs, 0, sizeof(uint32_t) * NUM_CORE_REGS); + memset(env->regs, 0, sizeof(env->regs)); + memset(env->ctrl, 0, sizeof(env->ctrl)); env->pc =3D cpu->reset_addr; =20 #if defined(CONFIG_USER_ONLY) /* Start in user mode with interrupts enabled. */ - env->regs[CR_STATUS] =3D CR_STATUS_U | CR_STATUS_PIE; + env->ctrl[CR_STATUS] =3D CR_STATUS_U | CR_STATUS_PIE; #else - env->regs[CR_STATUS] =3D 0; + env->ctrl[CR_STATUS] =3D 0; #endif } =20 @@ -71,9 +72,9 @@ static void nios2_cpu_set_irq(void *opaque, int irq, int = level) CPUNios2State *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); =20 - env->regs[CR_IPENDING] =3D deposit32(env->regs[CR_IPENDING], irq, 1, != !level); + env->ctrl[CR_IPENDING] =3D deposit32(env->ctrl[CR_IPENDING], irq, 1, != !level); =20 - if (env->regs[CR_IPENDING]) { + if (env->ctrl[CR_IPENDING]) { cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); @@ -131,8 +132,8 @@ static bool nios2_cpu_exec_interrupt(CPUState *cs, int = interrupt_request) CPUNios2State *env =3D &cpu->env; =20 if ((interrupt_request & CPU_INTERRUPT_HARD) && - (env->regs[CR_STATUS] & CR_STATUS_PIE) && - (env->regs[CR_IPENDING] & env->regs[CR_IENABLE])) { + (env->ctrl[CR_STATUS] & CR_STATUS_PIE) && + (env->ctrl[CR_IPENDING] & env->ctrl[CR_IENABLE])) { cs->exception_index =3D EXCP_IRQ; nios2_cpu_do_interrupt(cs); return true; @@ -163,7 +164,7 @@ static int nios2_cpu_gdb_read_register(CPUState *cs, GB= yteArray *mem_buf, int n) } else if (n =3D=3D 32) { /* PC */ return gdb_get_reg32(mem_buf, env->pc); } else if (n < 49) { /* Status regs */ - return gdb_get_reg32(mem_buf, env->regs[n - 1]); + return gdb_get_reg32(mem_buf, env->ctrl[n - 33]); } =20 /* Invalid regs */ @@ -185,7 +186,7 @@ static int nios2_cpu_gdb_write_register(CPUState *cs, u= int8_t *mem_buf, int n) } else if (n =3D=3D 32) { /* PC */ env->pc =3D ldl_p(mem_buf); } else if (n < 49) { /* Status regs */ - env->regs[n - 1] =3D ldl_p(mem_buf); + env->ctrl[n - 33] =3D ldl_p(mem_buf); } =20 return 4; diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 31cec29e89..90f918524e 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -56,38 +56,38 @@ void nios2_cpu_do_interrupt(CPUState *cs) =20 switch (cs->exception_index) { case EXCP_IRQ: - assert(env->regs[CR_STATUS] & CR_STATUS_PIE); + assert(env->ctrl[CR_STATUS] & CR_STATUS_PIE); =20 qemu_log_mask(CPU_LOG_INT, "interrupt at pc=3D%x\n", env->pc); =20 - env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; - env->regs[CR_STATUS] |=3D CR_STATUS_IH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; + env->ctrl[CR_STATUS] |=3D CR_STATUS_IH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 env->regs[R_EA] =3D env->pc + 4; env->pc =3D cpu->exception_addr; break; =20 case EXCP_TLBD: - if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { + if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=3D%x\n", env= ->pc); =20 /* Fast TLB miss */ /* Variation from the spec. Table 3-35 of the cpu reference sh= ows * estatus not being changed for TLB miss but this appears to * be incorrect. */ - env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; - env->regs[CR_STATUS] |=3D CR_STATUS_EH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; + env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - env->regs[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; - env->regs[CR_TLBMISC] |=3D CR_TLBMISC_WR; + env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; + env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WR; =20 env->regs[R_EA] =3D env->pc + 4; env->pc =3D cpu->fast_tlb_miss_addr; @@ -95,13 +95,13 @@ void nios2_cpu_do_interrupt(CPUState *cs) qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=3D%x\n", e= nv->pc); =20 /* Double TLB miss */ - env->regs[CR_STATUS] |=3D CR_STATUS_EH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - env->regs[CR_TLBMISC] |=3D CR_TLBMISC_DBL; + env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_DBL; =20 env->pc =3D cpu->exception_addr; } @@ -112,15 +112,15 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_TLBX: qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=3D%x\n", env->pc); =20 - env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; - env->regs[CR_STATUS] |=3D CR_STATUS_EH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; + env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 - if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->regs[CR_TLBMISC] |=3D CR_TLBMISC_WR; + if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { + env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WR; } =20 env->regs[R_EA] =3D env->pc + 4; @@ -132,16 +132,16 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_SUPERD: qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=3D%x\n", en= v->pc); =20 - if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; + if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { + env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; env->regs[R_EA] =3D env->pc + 4; } =20 - env->regs[CR_STATUS] |=3D CR_STATUS_EH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 env->pc =3D cpu->exception_addr; break; @@ -150,16 +150,16 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_TRAP: qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=3D%x\n", env->pc); =20 - if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->regs[CR_ESTATUS] =3D env->regs[CR_STATUS]; + if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { + env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; env->regs[R_EA] =3D env->pc + 4; } =20 - env->regs[CR_STATUS] |=3D CR_STATUS_EH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 env->pc =3D cpu->exception_addr; break; @@ -175,16 +175,16 @@ void nios2_cpu_do_interrupt(CPUState *cs) break; } =20 - if ((env->regs[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->regs[CR_BSTATUS] =3D env->regs[CR_STATUS]; + if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { + env->ctrl[CR_BSTATUS] =3D env->ctrl[CR_STATUS]; env->regs[R_BA] =3D env->pc + 4; } =20 - env->regs[CR_STATUS] |=3D CR_STATUS_EH; - env->regs[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; + env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->regs[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->regs[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); + env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; =20 env->pc =3D cpu->exception_addr; break; @@ -227,8 +227,8 @@ void nios2_cpu_do_unaligned_access(CPUState *cs, vaddr = addr, Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUNios2State *env =3D &cpu->env; =20 - env->regs[CR_BADADDR] =3D addr; - env->regs[CR_EXCEPTION] =3D EXCP_UNALIGN << 2; + env->ctrl[CR_BADADDR] =3D addr; + env->ctrl[CR_EXCEPTION] =3D EXCP_UNALIGN << 2; helper_raise_exception(env, EXCP_UNALIGN); } =20 @@ -266,7 +266,7 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, return false; } cs->exception_index =3D EXCP_SUPERA; - env->regs[CR_BADADDR] =3D address; + env->ctrl[CR_BADADDR] =3D address; cpu_loop_exit_restore(cs, retaddr); } } @@ -295,16 +295,16 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, } =20 if (access_type =3D=3D MMU_INST_FETCH) { - env->regs[CR_TLBMISC] &=3D ~CR_TLBMISC_D; + env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_D; } else { - env->regs[CR_TLBMISC] |=3D CR_TLBMISC_D; + env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_D; } - env->regs[CR_PTEADDR] &=3D CR_PTEADDR_PTBASE_MASK; - env->regs[CR_PTEADDR] |=3D (address >> 10) & CR_PTEADDR_VPN_MASK; - env->mmu.pteaddr_wr =3D env->regs[CR_PTEADDR]; + env->ctrl[CR_PTEADDR] &=3D CR_PTEADDR_PTBASE_MASK; + env->ctrl[CR_PTEADDR] |=3D (address >> 10) & CR_PTEADDR_VPN_MASK; + env->mmu.pteaddr_wr =3D env->ctrl[CR_PTEADDR]; =20 cs->exception_index =3D excp; - env->regs[CR_BADADDR] =3D address; + env->ctrl[CR_BADADDR] =3D address; cpu_loop_exit_restore(cs, retaddr); } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 4daab2a7ab..95900724e8 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -95,8 +95,8 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32_t= v) v & CR_TLBACC_PFN_MASK); =20 /* if tlbmisc.WE =3D=3D 1 then trigger a TLB write on writes to TLBACC= */ - if (env->regs[CR_TLBMISC] & CR_TLBMISC_WR) { - int way =3D (env->regs[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT); + if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WR) { + int way =3D (env->ctrl[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT); int vpn =3D (env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK) >> 2; int pid =3D (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4; int g =3D (v & CR_TLBACC_G) ? 1 : 0; @@ -117,8 +117,8 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32= _t v) entry->data =3D newData; } /* Auto-increment tlbmisc.WAY */ - env->regs[CR_TLBMISC] =3D - (env->regs[CR_TLBMISC] & ~CR_TLBMISC_WAY_MASK) | + env->ctrl[CR_TLBMISC] =3D + (env->ctrl[CR_TLBMISC] & ~CR_TLBMISC_WAY_MASK) | (((way + 1) & (cpu->tlb_num_ways - 1)) << CR_TLBMISC_WAY_SHIFT); } @@ -153,17 +153,17 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uin= t32_t v) &env->mmu.tlb[(way * cpu->tlb_num_ways) + (vpn & env->mmu.tlb_entry_mask)]; =20 - env->regs[CR_TLBACC] &=3D CR_TLBACC_IGN_MASK; - env->regs[CR_TLBACC] |=3D entry->data; - env->regs[CR_TLBACC] |=3D (entry->tag & (1 << 11)) ? CR_TLBACC_G := 0; - env->regs[CR_TLBMISC] =3D + env->ctrl[CR_TLBACC] &=3D CR_TLBACC_IGN_MASK; + env->ctrl[CR_TLBACC] |=3D entry->data; + env->ctrl[CR_TLBACC] |=3D (entry->tag & (1 << 11)) ? CR_TLBACC_G := 0; + env->ctrl[CR_TLBMISC] =3D (v & ~CR_TLBMISC_PID_MASK) | ((entry->tag & ((1 << cpu->pid_num_bits) - 1)) << CR_TLBMISC_PID_SHIFT); - env->regs[CR_PTEADDR] &=3D ~CR_PTEADDR_VPN_MASK; - env->regs[CR_PTEADDR] |=3D (entry->tag >> 12) << CR_PTEADDR_VPN_SH= IFT; + env->ctrl[CR_PTEADDR] &=3D ~CR_PTEADDR_VPN_MASK; + env->ctrl[CR_PTEADDR] |=3D (entry->tag >> 12) << CR_PTEADDR_VPN_SH= IFT; } else { - env->regs[CR_TLBMISC] =3D v; + env->ctrl[CR_TLBMISC] =3D v; } =20 env->mmu.tlbmisc_wr =3D v; @@ -175,8 +175,8 @@ void helper_mmu_write_pteaddr(CPUNios2State *env, uint3= 2_t v) (v & CR_PTEADDR_VPN_MASK) >> CR_PTEADDR_= VPN_SHIFT); =20 /* Writes to PTEADDR don't change the read-back VPN value */ - env->regs[CR_PTEADDR] =3D (v & ~CR_PTEADDR_VPN_MASK) | - (env->regs[CR_PTEADDR] & CR_PTEADDR_VPN_MASK); + env->ctrl[CR_PTEADDR] =3D ((v & ~CR_PTEADDR_VPN_MASK) | + (env->ctrl[CR_PTEADDR] & CR_PTEADDR_VPN_MASK)= ); env->mmu.pteaddr_wr =3D v; } =20 diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index ee5ad8b23f..08ed3b4598 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -34,7 +34,7 @@ void helper_raise_exception(CPUNios2State *env, uint32_t = index) #ifndef CONFIG_USER_ONLY void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc) { - env->regs[CR_STATUS] =3D new_status; + env->ctrl[CR_STATUS] =3D new_status; env->pc =3D new_pc; cpu_loop_exit(env_cpu(env)); } diff --git a/target/nios2/translate.c b/target/nios2/translate.c index e6e9a5ac6f..2e486651f5 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -395,7 +395,7 @@ static void eret(DisasContext *dc, uint32_t code, uint3= 2_t flags) g_assert_not_reached(); #else TCGv tmp =3D tcg_temp_new(); - tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, regs[CR_ESTATUS])); + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_ESTATUS])); gen_helper_eret(cpu_env, tmp, cpu_R[R_EA]); tcg_temp_free(tmp); =20 @@ -425,7 +425,7 @@ static void bret(DisasContext *dc, uint32_t code, uint3= 2_t flags) g_assert_not_reached(); #else TCGv tmp =3D tcg_temp_new(); - tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, regs[CR_BSTATUS])); + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_BSTATUS])); gen_helper_eret(cpu_env, tmp, cpu_R[R_BA]); tcg_temp_free(tmp); =20 @@ -481,7 +481,7 @@ static void rdctl(DisasContext *dc, uint32_t code, uint= 32_t flags) return; } =20 - switch (instr.imm5 + CR_BASE) { + switch (instr.imm5) { case CR_IPENDING: /* * The value of the ipending register is synthetic. @@ -493,17 +493,15 @@ static void rdctl(DisasContext *dc, uint32_t code, ui= nt32_t flags) */ t1 =3D tcg_temp_new(); t2 =3D tcg_temp_new(); - tcg_gen_ld_tl(t1, cpu_env, - offsetof(CPUNios2State, regs[CR_IPENDING])); - tcg_gen_ld_tl(t2, cpu_env, - offsetof(CPUNios2State, regs[CR_IENABLE])); + tcg_gen_ld_tl(t1, cpu_env, offsetof(CPUNios2State, ctrl[CR_IPENDIN= G])); + tcg_gen_ld_tl(t2, cpu_env, offsetof(CPUNios2State, ctrl[CR_IENABLE= ])); tcg_gen_and_tl(cpu_R[instr.c], t1, t2); tcg_temp_free(t1); tcg_temp_free(t2); break; default: tcg_gen_ld_tl(cpu_R[instr.c], cpu_env, - offsetof(CPUNios2State, regs[instr.imm5 + CR_BASE])); + offsetof(CPUNios2State, ctrl[instr.imm5])); break; } } @@ -521,7 +519,7 @@ static void wrctl(DisasContext *dc, uint32_t code, uint= 32_t flags) R_TYPE(instr, code); TCGv v =3D load_gpr(dc, instr.a); =20 - switch (instr.imm5 + CR_BASE) { + switch (instr.imm5) { case CR_PTEADDR: gen_helper_mmu_write_pteaddr(cpu_env, v); break; @@ -541,7 +539,7 @@ static void wrctl(DisasContext *dc, uint32_t code, uint= 32_t flags) /* fall through */ default: tcg_gen_st_tl(v, cpu_env, - offsetof(CPUNios2State, regs[instr.imm5 + CR_BASE])); + offsetof(CPUNios2State, ctrl[instr.imm5])); break; } #endif @@ -774,7 +772,7 @@ illegal_op: t_gen_helper_raise_exception(dc, EXCP_ILLEGAL); } =20 -static const char * const regnames[NUM_CORE_REGS] =3D { +static const char * const gr_regnames[NUM_GP_REGS] =3D { "zero", "at", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", @@ -783,6 +781,9 @@ static const char * const regnames[NUM_CORE_REGS] =3D { "r20", "r21", "r22", "r23", "et", "bt", "gp", "sp", "fp", "ea", "ba", "ra", +}; + +static const char * const cr_regnames[NUM_CR_REGS] =3D { "status", "estatus", "bstatus", "ienable", "ipending", "cpuid", "reserved0", "exception", "pteaddr", "tlbacc", "tlbmisc", "reserved1", @@ -909,8 +910,14 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int f= lags) =20 qemu_fprintf(f, "IN: PC=3D%x %s\n", env->pc, lookup_symbol(env->pc)); =20 - for (i =3D 0; i < NUM_CORE_REGS; i++) { - qemu_fprintf(f, "%9s=3D%8.8x ", regnames[i], env->regs[i]); + for (i =3D 0; i < NUM_GP_REGS; i++) { + qemu_fprintf(f, "%9s=3D%8.8x ", gr_regnames[i], env->regs[i]); + if ((i + 1) % 4 =3D=3D 0) { + qemu_fprintf(f, "\n"); + } + } + for (i =3D 0; i < NUM_CR_REGS; i++) { + qemu_fprintf(f, "%9s=3D%8.8x ", cr_regnames[i], env->ctrl[i]); if ((i + 1) % 4 =3D=3D 0) { qemu_fprintf(f, "\n"); } @@ -931,7 +938,7 @@ void nios2_tcg_init(void) for (i =3D 0; i < NUM_GP_REGS; i++) { cpu_R[i] =3D tcg_global_mem_new(cpu_env, offsetof(CPUNios2State, regs[i]), - regnames[i]); + gr_regnames[i]); } cpu_pc =3D tcg_global_mem_new(cpu_env, offsetof(CPUNios2State, pc), "pc"); --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495292496189.84704688600368; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NO5qDCidg6tXT/kBs+ctrp9mOI+zlSE5VUcpn5RQSbI=; b=dtWNXL17CIp5HDLx6Usl05GimCNgKBYWhw6gnoUq9u1PEguLaSGg1VlY3KDhu4wwSz VR+Zw72Dt4z1kSbYouQdDkCB5sEndpbTfgIErnNkteYYTjQpH9qDUEBEHunTThVSmA0o C0UWLl/w3qCtNLN8hptwPaTvhgmmq02qIQisWVhHRQ2iQ1B0vqBEttChKCz2eupo1Y59 J609yoUFeUDvw4W0QTnAUlG4E2apXvlF7VR4M6wB8Mk7AjkhIHgB2WBqk2myiepxauEE xJpoapolAYRtlgEqgoiPkwnQ3X9QVqxwXac2rXVPRhdiwtKtLdljgtpn18NtC1BKsYA4 oIEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NO5qDCidg6tXT/kBs+ctrp9mOI+zlSE5VUcpn5RQSbI=; b=AFzDs/ahZjiLRlG0Igy7vBeyzqH2zvrRt2/8xbO7jcABEkjSmFStzAYMuiK2aC3TRZ YFOudRB1sqAgZJtTyD+D1ZFNEIwFPNkmjtA5AvSYDCh7jUf+JChus4HxUt7qCWsexeNN Tsn1eOaZaCrsKYE0WXD9hAks2LU5/opNnMr3qksOD5ZVIpf0jZTUW9MpfNEZrHAO87/9 b68W3FrJMezVgMwMGyHlDCVOofE7ktEQ/TBZ7eLfC5T1oNdurkQu3f65oVbRGDdpxE+8 QYGVi/hIRWmPtcUXvj0aDDL5YflU0vvZ/ZpQxE/hjQfJ6Cl1Zv6NgtfpQBuKG8NZLnp9 gWyA== X-Gm-Message-State: AOAM531USEHu+7I2rO42PAUMd0Wgiehi1+tXqa4qKXwN7tYVz62IItmO 64kolcy2ArcCb2g9ygDysXUKPZFJM/8g3g== X-Google-Smtp-Source: ABdhPJxt8h1Q5sua9HvhWAw7/f/1eitnCDcSXXmflhgRxZulim4OPULZ1bAkIsfqqCQsTvaLKg67Aw== X-Received: by 2002:a05:6a00:9a9:b0:4f7:876e:1e83 with SMTP id u41-20020a056a0009a900b004f7876e1e83mr3204380pfg.71.1647493552192; Wed, 16 Mar 2022 22:05:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 12/51] target/nios2: Clean up nios2_cpu_dump_state Date: Wed, 16 Mar 2022 22:04:59 -0700 Message-Id: <20220317050538.924111-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::430 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495294608100003 Content-Type: text/plain; charset="utf-8" Do not print control registers for user-only mode. Rename reserved control registers to "resN", where N is the control register index. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/translate.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 2e486651f5..45fe2f9a05 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -783,16 +783,18 @@ static const char * const gr_regnames[NUM_GP_REGS] = =3D { "fp", "ea", "ba", "ra", }; =20 +#ifndef CONFIG_USER_ONLY static const char * const cr_regnames[NUM_CR_REGS] =3D { "status", "estatus", "bstatus", "ienable", - "ipending", "cpuid", "reserved0", "exception", + "ipending", "cpuid", "res6", "exception", "pteaddr", "tlbacc", "tlbmisc", "reserved1", "badaddr", "config", "mpubase", "mpuacc", - "reserved2", "reserved3", "reserved4", "reserved5", - "reserved6", "reserved7", "reserved8", "reserved9", - "reserved10", "reserved11", "reserved12", "reserved13", - "reserved14", "reserved15", "reserved16", "reserved17", + "res16", "res17", "res18", "res19", + "res20", "res21", "res22", "res23", + "res24", "res25", "res26", "res27", + "res28", "res29", "res30", "res31", }; +#endif =20 #include "exec/gen-icount.h" =20 @@ -904,10 +906,6 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int f= lags) CPUNios2State *env =3D &cpu->env; int i; =20 - if (!env) { - return; - } - qemu_fprintf(f, "IN: PC=3D%x %s\n", env->pc, lookup_symbol(env->pc)); =20 for (i =3D 0; i < NUM_GP_REGS; i++) { @@ -916,13 +914,14 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int = flags) qemu_fprintf(f, "\n"); } } + +#if !defined(CONFIG_USER_ONLY) for (i =3D 0; i < NUM_CR_REGS; i++) { qemu_fprintf(f, "%9s=3D%8.8x ", cr_regnames[i], env->ctrl[i]); if ((i + 1) % 4 =3D=3D 0) { qemu_fprintf(f, "\n"); } } -#if !defined(CONFIG_USER_ONLY) qemu_fprintf(f, " mmu write: VPN=3D%05X PID %02X TLBACC %08X\n", env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK, (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4, --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16474939800861.2069018490434473; Wed, 16 Mar 2022 22:13:00 -0700 (PDT) Received: from localhost ([::1]:55768 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiRU-0000p6-O0 for importer@patchew.org; Thu, 17 Mar 2022 01:12:58 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50784) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKi-0000q5-Vv for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:57 -0400 Received: from [2607:f8b0:4864:20::52f] (port=34784 helo=mail-pg1-x52f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKg-0002Eh-CB for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:56 -0400 Received: by mail-pg1-x52f.google.com with SMTP id t187so1804819pgb.1 for ; Wed, 16 Mar 2022 22:05:53 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Gt6Df7YFZj3yIOaHOAXNxeneFRB5t2HH9HYYGKeZPd8=; b=AoMDWL3RNV8QZvhwtI2r31hnQFnzdBwZXh3sQMQSWeRPUUM64NXQtZC5IOfcAtFWqs airz4nRvPBkNf87lk9hrvKsK7BRAO0t4N7ghBtoizbeqWBgKVsJO8jTe/I3Taad6Jsur rGQk39/OF8Pdi6eFoURmxpaQaIF8sF8VIJ+XoQK3jwEcTYo5PHroNgb43Y3mi/c/LnhX itzL5EIYzrxDd2cW7JRGp35ZrrMt42vb+ae+U8jGZp7bfFZzVPxvCUpexWyoYPjRwfBC HWnjOFzu3RcVSD3OnGGKMctkSYWXuMuxj5WSjWdOXwdmxs7ZkrwMrQqDTLA+MUCoJoGu awnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Gt6Df7YFZj3yIOaHOAXNxeneFRB5t2HH9HYYGKeZPd8=; b=wu7y2zZat8mEcrTv59AuCvKTDyiLSYMCOacYiX1vgyiN36xdUJGSPe2Ih6+ezzy7+m WEv62/uIR4ABCuj7dS2oJ9kXR20t9+JMmD6b58e1oLGTDAxTR8CEKzfZpBN7tdTADxjC PQN1SNRJ+EKYqAqFeuOTSQHLAvXNBFt1IGZYqtr26iXgpZmqoy6jnasM5e0eJbyDm9Kj Y6LDBqUiWOJksx0cYSK51mqFTstNWVuFLZj6jrcI7t1lA9nJgelSnprb3Iiu0RCysQk6 UkUufh/OgH7ehdy40qphg0P9tAUgWnWW4O9zJ3Mya6OQH5Fb5c8OtL+CafEKvCX7m+az dC3g== X-Gm-Message-State: AOAM530F0QwEcIPT9UFw32glzJekqllMOsLlx/S5uA6aeTQW8aC6ejYc r5z1F+Zu8+UZ1wMk1geW3B+iZKpb58Sd0g== X-Google-Smtp-Source: ABdhPJzyihoS1Tcyrrq2gw7etvYBnTtHJkYcQlYXUDn7xzyq8diMGxwBBizk4hs974D7fDXtsdaA3w== X-Received: by 2002:a63:944:0:b0:374:5324:eea1 with SMTP id 65-20020a630944000000b003745324eea1mr2307731pgj.366.1647493553084; Wed, 16 Mar 2022 22:05:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 13/51] target/nios2: Use hw/registerfields.h for CR_STATUS fields Date: Wed, 16 Mar 2022 22:05:00 -0700 Message-Id: <20220317050538.924111-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647493980644100001 Content-Type: text/plain; charset="utf-8" Add all fields; retain the helper macros for single bit fields. So far there are no uses of the multi-bit status fields. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/cpu.h | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 1bcbc9ed63..ecf8cc929f 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -23,6 +23,7 @@ =20 #include "exec/cpu-defs.h" #include "hw/core/cpu.h" +#include "hw/registerfields.h" #include "qom/object.h" =20 typedef struct CPUArchState CPUNios2State; @@ -79,15 +80,24 @@ struct Nios2CPUClass { =20 /* Control register aliases */ #define CR_STATUS 0 -#define CR_STATUS_PIE (1 << 0) -#define CR_STATUS_U (1 << 1) -#define CR_STATUS_EH (1 << 2) -#define CR_STATUS_IH (1 << 3) -#define CR_STATUS_IL (63 << 4) -#define CR_STATUS_CRS (63 << 10) -#define CR_STATUS_PRS (63 << 16) -#define CR_STATUS_NMI (1 << 22) -#define CR_STATUS_RSIE (1 << 23) + +FIELD(CR_STATUS, PIE, 0, 1) +FIELD(CR_STATUS, U, 1, 1) +FIELD(CR_STATUS, EH, 2, 1) +FIELD(CR_STATUS, IH, 3, 1) +FIELD(CR_STATUS, IL, 4, 6) +FIELD(CR_STATUS, CRS, 10, 6) +FIELD(CR_STATUS, PRS, 16, 6) +FIELD(CR_STATUS, NMI, 22, 1) +FIELD(CR_STATUS, RSIE, 23, 1) + +#define CR_STATUS_PIE R_CR_STATUS_PIE_MASK +#define CR_STATUS_U R_CR_STATUS_U_MASK +#define CR_STATUS_EH R_CR_STATUS_EH_MASK +#define CR_STATUS_IH R_CR_STATUS_IH_MASK +#define CR_STATUS_NMI R_CR_STATUS_NMI_MASK +#define CR_STATUS_RSIE R_CR_STATUS_RSIE_MASK + #define CR_ESTATUS 1 #define CR_BSTATUS 2 #define CR_IENABLE 3 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495477868695.7170553247597; Wed, 16 Mar 2022 22:37:57 -0700 (PDT) Received: from localhost ([::1]:38322 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUipi-0004jb-5N for importer@patchew.org; Thu, 17 Mar 2022 01:37:58 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50796) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKj-0000rc-Dw for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:57 -0400 Received: from [2607:f8b0:4864:20::1031] (port=55270 helo=mail-pj1-x1031.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKh-0002En-Eu for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:57 -0400 Received: by mail-pj1-x1031.google.com with SMTP id b8so3934008pjb.4 for ; Wed, 16 Mar 2022 22:05:55 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9FWwMXqC9iumPnJnO/Sltv35jl4kn2h5ImUTKmfNWoM=; b=c8da+3g+sjkVCOWoF6AdgpgCynvSzMPhZ0fPDERvP8XnXGvABXZvEZ39GxtqVJa0PA rv+kwvFBTh5SmkCVEw8TGgktSugd3wjHejia1YIjfCb3a/0vy8NRnm0CZkGcWeVyr8+j GsWaOMUhFPOp6B68Ka1baXVAMityG2jpC3qehQ69gdivFKN+Gzg5rC5GszHBDQueSfHl i6OAuNi9uUDmh0ygMpcCfmxTdm2hGAheCB+n64nZMTS4jWDALH34DVWytzo2EjUHXY2+ giqxz3ic93UbcYSTfRguaqMBJ2T6y+ki3uLJDo0hxhbvDAVmyLMaS/Isg0DkowHNNmnY Oh0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9FWwMXqC9iumPnJnO/Sltv35jl4kn2h5ImUTKmfNWoM=; b=TXeMAVJoas6834+ix4GXzrRWtlIx6JuFb7k8qa8E4vvUg4koriVvN/OHSBG2k+PGeZ Hm10lkkb9oNUwTb3XT5jIlbPXzgi3E2Td7vpMa4yCN3Lh4VXFzQhaThoivQnYSrQ+aGO OTa+dJ3MjKJYhb+J6eixa5D51zvn5M4cxbazsrIpi8hsRmg9FPNSB1wE5Xq0gUr9mMCd Xxd70D0+c1M6vw6tQn4rhtXgeNdpjGEktySPgQ6CcIw2FkaQlzw1yGrGq2ARgA6pQV+j DC8hX/MoNTnpcVNnj0NAwChHHKZeFvQvpYiJ6zn+HeS/L5Z4ARuT8D5DWyEy3DcFTJD+ QGKg== X-Gm-Message-State: AOAM530FUxxlUPlioAUnJxW+Bi2mrvO/L5IwOVly2N0y6QtTpGEvTfzq DG3qeWP63qn+yM2RROjbQXYJYi4qpNw5dA== X-Google-Smtp-Source: ABdhPJwYMxwnID6uiq1TdhlOI9IZhNvLXOM6MlkY9wznKOHrCC8sh1hiS0OLsaXtL9WNIctSIvMAIg== X-Received: by 2002:a17:902:b941:b0:14d:af72:3f23 with SMTP id h1-20020a170902b94100b0014daf723f23mr3071627pls.6.1647493554114; Wed, 16 Mar 2022 22:05:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 14/51] target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields Date: Wed, 16 Mar 2022 22:05:01 -0700 Message-Id: <20220317050538.924111-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1031 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495493484100001 Content-Type: text/plain; charset="utf-8" Use FIELD_DP32 instead of manual shifting and masking. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 4 ++++ target/nios2/helper.c | 37 ++++++++++++++++++++++--------------- 2 files changed, 26 insertions(+), 15 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index ecf8cc929f..963cdec161 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -105,6 +105,10 @@ FIELD(CR_STATUS, RSIE, 23, 1) #define CR_CPUID 5 #define CR_CTL6 6 #define CR_EXCEPTION 7 + +FIELD(CR_EXCEPTION, CAUSE, 2, 5) +FIELD(CR_EXCEPTION, ECCFTL, 31, 1) + #define CR_PTEADDR 8 #define CR_PTEADDR_PTBASE_SHIFT 22 #define CR_PTEADDR_PTBASE_MASK (0x3FF << CR_PTEADDR_PTBASE_SHIFT) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 90f918524e..54458a5447 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -64,8 +64,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_IH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 env->regs[R_EA] =3D env->pc + 4; env->pc =3D cpu->exception_addr; @@ -83,8 +84,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WR; @@ -98,8 +100,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_DBL; =20 @@ -116,8 +119,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WR; @@ -140,8 +144,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 env->pc =3D cpu->exception_addr; break; @@ -158,8 +163,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 env->pc =3D cpu->exception_addr; break; @@ -183,8 +189,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 - env->ctrl[CR_EXCEPTION] &=3D ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |=3D (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); =20 env->pc =3D cpu->exception_addr; break; @@ -228,7 +235,7 @@ void nios2_cpu_do_unaligned_access(CPUState *cs, vaddr = addr, CPUNios2State *env =3D &cpu->env; =20 env->ctrl[CR_BADADDR] =3D addr; - env->ctrl[CR_EXCEPTION] =3D EXCP_UNALIGN << 2; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(0, CR_EXCEPTION, CAUSE, EXCP_UN= ALIGN); helper_raise_exception(env, EXCP_UNALIGN); } =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647493999710816.4734344114495; Wed, 16 Mar 2022 22:13:19 -0700 (PDT) Received: from localhost ([::1]:56218 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiRq-00019n-OW for importer@patchew.org; Thu, 17 Mar 2022 01:13:18 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50812) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKk-0000vS-9o for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:58 -0400 Received: from [2607:f8b0:4864:20::630] (port=39425 helo=mail-pl1-x630.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKi-0002F4-Id for qemu-devel@nongnu.org; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f9kEO6gPHdFHbcVjWJEx3cRnSvZ1MpAPY6GCaaYYMWU=; b=vVRgau5y8JyOGkXSsmqecLafh1PANnbK9GxxRuQJTZLdz/uLKmf0tolNhi5aEaLPeQ BchlVTULed1Tw8IZhZ76ctWeHQNXBa86AhZGoWQmzzeJ/9hDSmlmdTxJMGi6565iuhq4 merqVJA2Dcluw62GVlTS2kmv7C8yHYuBw6yzWomM7e6FVm5gWj5Diak//i5Vq8rsHocO aJXKa87lXjng9/9Cc9I3fyHZe5Ft7Ogm02v1EluaJzPWPvpfLSj/tCq3OlJH2yaMwQQ+ yYVHS6qZ7/IIwkUcmBYOdYqWafnuCe8zbxFUBHnJSxbbGM4ctAizqRp84i/iAfsjUnug rKtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f9kEO6gPHdFHbcVjWJEx3cRnSvZ1MpAPY6GCaaYYMWU=; b=a8cjmzruIOt2CWEBXvFh0qjlTSP3lfBNiHaIWl6UhwypkdW49LxVvzOCu6uG71NMCA sdrVaKfkM7IMuFONJRApYC0DJS0YqQa0hd+oNxUd1hphVUpN3kEZ8wW+QpL95Ti0N6ci sKu5zTf+d2abOb7VPLEQHE1GrTL3vMyz6gFF7/llSnzY+ByAD4dmpfj92sUsXUG9SgRQ TaQW7kgApUNhi73EjV97Go23R5MwoJzzAyqKEcGXccIR5MHyQyE7o9aP2vwUDwTp0/pi OzohxXwXFlO4Fucw+p1P0uw9MtS8nCaEnPoBHgPwutKSdBXgY4lNJcq0JFeV9rK5PpDw /Y0Q== X-Gm-Message-State: AOAM531OWRPO7gQmsUzv5wxH9KGbHzvt/osOdrVhIl4XASP22wsTmGwS yiZFv9cRdGMoX6HhcbqagjXf5zeK7k2CDw== X-Google-Smtp-Source: ABdhPJx8/sKcnOq3P0JLYGFxUprdvVrL6wKEL4mPlB0mz4Azc6rSPQb/LaDq2SM3gB3e+7G3um9rKA== X-Received: by 2002:a17:902:9007:b0:14f:3680:66d1 with SMTP id a7-20020a170902900700b0014f368066d1mr3270516plp.91.1647493555330; Wed, 16 Mar 2022 22:05:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 15/51] target/nios2: Use hw/registerfields.h for CR_TLBADDR fields Date: Wed, 16 Mar 2022 22:05:02 -0700 Message-Id: <20220317050538.924111-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::630 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494000730100001 Content-Type: text/plain; charset="utf-8" Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation of the fields. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 8 ++++---- target/nios2/helper.c | 4 ++-- target/nios2/mmu.c | 17 +++++++++-------- target/nios2/translate.c | 2 +- 4 files changed, 16 insertions(+), 15 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 963cdec161..e1c2bf8c31 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -110,10 +110,10 @@ FIELD(CR_EXCEPTION, CAUSE, 2, 5) FIELD(CR_EXCEPTION, ECCFTL, 31, 1) =20 #define CR_PTEADDR 8 -#define CR_PTEADDR_PTBASE_SHIFT 22 -#define CR_PTEADDR_PTBASE_MASK (0x3FF << CR_PTEADDR_PTBASE_SHIFT) -#define CR_PTEADDR_VPN_SHIFT 2 -#define CR_PTEADDR_VPN_MASK (0xFFFFF << CR_PTEADDR_VPN_SHIFT) + +FIELD(CR_PTEADDR, VPN, 2, 20) +FIELD(CR_PTEADDR, PTBASE, 22, 10) + #define CR_TLBACC 9 #define CR_TLBACC_IGN_SHIFT 25 #define CR_TLBACC_IGN_MASK (0x7F << CR_TLBACC_IGN_SHIFT) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 54458a5447..da3a289fc7 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -306,8 +306,8 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, } else { env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_D; } - env->ctrl[CR_PTEADDR] &=3D CR_PTEADDR_PTBASE_MASK; - env->ctrl[CR_PTEADDR] |=3D (address >> 10) & CR_PTEADDR_VPN_MASK; + env->ctrl[CR_PTEADDR] =3D FIELD_DP32(env->ctrl[CR_PTEADDR], CR_PTEADDR= , VPN, + address >> TARGET_PAGE_BITS); env->mmu.pteaddr_wr =3D env->ctrl[CR_PTEADDR]; =20 cs->exception_index =3D excp; diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 95900724e8..75afc56daf 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -97,7 +97,7 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32_t= v) /* if tlbmisc.WE =3D=3D 1 then trigger a TLB write on writes to TLBACC= */ if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WR) { int way =3D (env->ctrl[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT); - int vpn =3D (env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK) >> 2; + int vpn =3D FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN); int pid =3D (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4; int g =3D (v & CR_TLBACC_G) ? 1 : 0; int valid =3D ((vpn & CR_TLBACC_PFN_MASK) < 0xC0000) ? 1 : 0; @@ -148,7 +148,7 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint3= 2_t v) /* if tlbmisc.RD =3D=3D 1 then trigger a TLB read on writes to TLBMISC= */ if (v & CR_TLBMISC_RD) { int way =3D (v >> CR_TLBMISC_WAY_SHIFT); - int vpn =3D (env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK) >> 2; + int vpn =3D FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN); Nios2TLBEntry *entry =3D &env->mmu.tlb[(way * cpu->tlb_num_ways) + (vpn & env->mmu.tlb_entry_mask)]; @@ -160,8 +160,9 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint3= 2_t v) (v & ~CR_TLBMISC_PID_MASK) | ((entry->tag & ((1 << cpu->pid_num_bits) - 1)) << CR_TLBMISC_PID_SHIFT); - env->ctrl[CR_PTEADDR] &=3D ~CR_PTEADDR_VPN_MASK; - env->ctrl[CR_PTEADDR] |=3D (entry->tag >> 12) << CR_PTEADDR_VPN_SH= IFT; + env->ctrl[CR_PTEADDR] =3D FIELD_DP32(env->ctrl[CR_PTEADDR], + CR_PTEADDR, VPN, + entry->tag >> TARGET_PAGE_BITS); } else { env->ctrl[CR_TLBMISC] =3D v; } @@ -171,12 +172,12 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uin= t32_t v) =20 void helper_mmu_write_pteaddr(CPUNios2State *env, uint32_t v) { - trace_nios2_mmu_write_pteaddr(v >> CR_PTEADDR_PTBASE_SHIFT, - (v & CR_PTEADDR_VPN_MASK) >> CR_PTEADDR_= VPN_SHIFT); + trace_nios2_mmu_write_pteaddr(FIELD_EX32(v, CR_PTEADDR, PTBASE), + FIELD_EX32(v, CR_PTEADDR, VPN)); =20 /* Writes to PTEADDR don't change the read-back VPN value */ - env->ctrl[CR_PTEADDR] =3D ((v & ~CR_PTEADDR_VPN_MASK) | - (env->ctrl[CR_PTEADDR] & CR_PTEADDR_VPN_MASK)= ); + env->ctrl[CR_PTEADDR] =3D ((v & ~R_CR_PTEADDR_VPN_MASK) | + (env->ctrl[CR_PTEADDR] & R_CR_PTEADDR_VPN_MAS= K)); env->mmu.pteaddr_wr =3D v; } =20 diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 45fe2f9a05..9b81a2b29e 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -923,7 +923,7 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int fl= ags) } } qemu_fprintf(f, " mmu write: VPN=3D%05X PID %02X TLBACC %08X\n", - env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK, + env->mmu.pteaddr_wr & R_CR_PTEADDR_VPN_MASK, (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4, env->mmu.tlbacc_wr); #endif --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494164387189.77429669352762; Wed, 16 Mar 2022 22:16:04 -0700 (PDT) Received: from localhost ([::1]:38824 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiUV-0008Om-Az for importer@patchew.org; Thu, 17 Mar 2022 01:16:03 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50836) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKl-0000yZ-DZ for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:59 -0400 Received: from [2607:f8b0:4864:20::62a] (port=34465 helo=mail-pl1-x62a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKj-0002FP-NR for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:05:59 -0400 Received: by mail-pl1-x62a.google.com with SMTP id i11so2867634plr.1 for ; Wed, 16 Mar 2022 22:05:57 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GKFLxmbTYTFJV6/p4TM5MrilKQbtlOw6w8FSPR9X89E=; b=SZpJt/ilQdGCuAKAFbLw2Lt4Ve4D5LFGmAKQXF1pcv3cVwpWlgJLCcbJ406jNHrcIX 3vFlSjLKhPV1z0d3OuIapt7OoFIRfw8xHvQoGojJ3JKtEMnJh46PSTFHAWDnjtC1I6De 1CQCLds1EGe9Ie2qE6HDmVGUdijZhnBSHyNDsqCZXI9Ri9sYbWr8ous/O8486PBfESen y+TsQDmkfp0UDn7d0tko9cFoLBasBDXVWhqpMj1s2L63aRDAPtrpzFnTRqpGt770wYP6 t4U81GC1UxjQSLJVvhsX16YCbD0xCmPkZ/rbqI0H+uVghyvwUjJ+F7+Un+oEytISPlyS hgog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GKFLxmbTYTFJV6/p4TM5MrilKQbtlOw6w8FSPR9X89E=; b=s50For4MCX4mPoSVCnL7ar3UWJiLM7OigW6n0wqAfX+vm//qfjLiBj5xuTVBqHryW2 Z7tmwQFw+uPU+4HjUI/KJIuHcjGXZB3TCVp8i1tKHUtIU/wkkoU5oB7NBjMZ1ILVFLDp ix/ta/5JvZ5zIQ4bLDrNrGUDFte74IDYGE/cNObYJwZyenpaaf+auQZvE/aAGT7SAwhI dFSxCvxgn5RB5AFLFe42UMEPmDGTC1KcsuMCLEecYqcKKNIhK+gh1Mg8POSSCYW5pLlY sfdTTwJKwgCFi4lpAw0oN21x9ZeFKweaU8qpqh3L3N6GFm4rILN8Rg/D6apKNHZyBf9Y mB5w== X-Gm-Message-State: AOAM5317vr/oKECDicjJgXxQd2Ic58scC+GgyrsEtxwTUc05xTvv2a1/ oZgNV+jYL+CukA8GKDPqPdRkYuA5W/L0eQ== X-Google-Smtp-Source: ABdhPJzGFu7H2Nk2w8nNXMiZyaIAvEZyKISVA3jXWGEtbMcfLkVwyFGJrJZ5+YM7JkYWT+3lLCs3lA== X-Received: by 2002:a17:902:c407:b0:151:f794:ac5e with SMTP id k7-20020a170902c40700b00151f794ac5emr3256282plk.67.1647493556344; Wed, 16 Mar 2022 22:05:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 16/51] target/nios2: Use hw/registerfields.h for CR_TLBACC fields Date: Wed, 16 Mar 2022 22:05:03 -0700 Message-Id: <20220317050538.924111-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494165970100001 Content-Type: text/plain; charset="utf-8" Retain the helper macros for single bit fields as aliases to the longer R_*_MASK names. Use FIELD_EX32 and FIELD_DP32 instead of manually manipulating the fields. Since we're rewriting the references to CR_TLBACC_IGN_* anyway, we correct the name of this field to IG, which is its name in the official CPU documentation. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 23 +++++++++++++++-------- target/nios2/mmu.c | 16 ++++++++-------- 2 files changed, 23 insertions(+), 16 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index e1c2bf8c31..25b77916ca 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -115,14 +115,21 @@ FIELD(CR_PTEADDR, VPN, 2, 20) FIELD(CR_PTEADDR, PTBASE, 22, 10) =20 #define CR_TLBACC 9 -#define CR_TLBACC_IGN_SHIFT 25 -#define CR_TLBACC_IGN_MASK (0x7F << CR_TLBACC_IGN_SHIFT) -#define CR_TLBACC_C (1 << 24) -#define CR_TLBACC_R (1 << 23) -#define CR_TLBACC_W (1 << 22) -#define CR_TLBACC_X (1 << 21) -#define CR_TLBACC_G (1 << 20) -#define CR_TLBACC_PFN_MASK 0x000FFFFF + +FIELD(CR_TLBACC, PFN, 0, 20) +FIELD(CR_TLBACC, G, 20, 1) +FIELD(CR_TLBACC, X, 21, 1) +FIELD(CR_TLBACC, W, 22, 1) +FIELD(CR_TLBACC, R, 23, 1) +FIELD(CR_TLBACC, C, 24, 1) +FIELD(CR_TLBACC, IG, 25, 7) + +#define CR_TLBACC_C R_CR_TLBACC_C_MASK +#define CR_TLBACC_R R_CR_TLBACC_R_MASK +#define CR_TLBACC_W R_CR_TLBACC_W_MASK +#define CR_TLBACC_X R_CR_TLBACC_X_MASK +#define CR_TLBACC_G R_CR_TLBACC_G_MASK + #define CR_TLBMISC 10 #define CR_TLBMISC_WAY_SHIFT 20 #define CR_TLBMISC_WAY_MASK (0xF << CR_TLBMISC_WAY_SHIFT) diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 75afc56daf..826cd2afb4 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -49,7 +49,7 @@ unsigned int mmu_translate(CPUNios2State *env, } =20 lu->vaddr =3D vaddr & TARGET_PAGE_MASK; - lu->paddr =3D (entry->data & CR_TLBACC_PFN_MASK) << TARGET_PAGE_BI= TS; + lu->paddr =3D FIELD_EX32(entry->data, CR_TLBACC, PFN) << TARGET_PA= GE_BITS; lu->prot =3D ((entry->data & CR_TLBACC_R) ? PAGE_READ : 0) | ((entry->data & CR_TLBACC_W) ? PAGE_WRITE : 0) | ((entry->data & CR_TLBACC_X) ? PAGE_EXEC : 0); @@ -86,27 +86,27 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32= _t v) CPUState *cs =3D env_cpu(env); Nios2CPU *cpu =3D env_archcpu(env); =20 - trace_nios2_mmu_write_tlbacc(v >> CR_TLBACC_IGN_SHIFT, + trace_nios2_mmu_write_tlbacc(FIELD_EX32(v, CR_TLBACC, IG), (v & CR_TLBACC_C) ? 'C' : '.', (v & CR_TLBACC_R) ? 'R' : '.', (v & CR_TLBACC_W) ? 'W' : '.', (v & CR_TLBACC_X) ? 'X' : '.', (v & CR_TLBACC_G) ? 'G' : '.', - v & CR_TLBACC_PFN_MASK); + FIELD_EX32(v, CR_TLBACC, PFN)); =20 /* if tlbmisc.WE =3D=3D 1 then trigger a TLB write on writes to TLBACC= */ if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WR) { int way =3D (env->ctrl[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT); int vpn =3D FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN); int pid =3D (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4; - int g =3D (v & CR_TLBACC_G) ? 1 : 0; - int valid =3D ((vpn & CR_TLBACC_PFN_MASK) < 0xC0000) ? 1 : 0; + int g =3D FIELD_EX32(v, CR_TLBACC, G); + int valid =3D FIELD_EX32(vpn, CR_TLBACC, PFN) < 0xC0000; Nios2TLBEntry *entry =3D &env->mmu.tlb[(way * cpu->tlb_num_ways) + (vpn & env->mmu.tlb_entry_mask)]; uint32_t newTag =3D (vpn << 12) | (g << 11) | (valid << 10) | pid; uint32_t newData =3D v & (CR_TLBACC_C | CR_TLBACC_R | CR_TLBACC_W | - CR_TLBACC_X | CR_TLBACC_PFN_MASK); + CR_TLBACC_X | R_CR_TLBACC_PFN_MASK); =20 if ((entry->tag !=3D newTag) || (entry->data !=3D newData)) { if (entry->tag & (1 << 10)) { @@ -153,7 +153,7 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint3= 2_t v) &env->mmu.tlb[(way * cpu->tlb_num_ways) + (vpn & env->mmu.tlb_entry_mask)]; =20 - env->ctrl[CR_TLBACC] &=3D CR_TLBACC_IGN_MASK; + env->ctrl[CR_TLBACC] &=3D R_CR_TLBACC_IG_MASK; env->ctrl[CR_TLBACC] |=3D entry->data; env->ctrl[CR_TLBACC] |=3D (entry->tag & (1 << 11)) ? CR_TLBACC_G := 0; env->ctrl[CR_TLBMISC] =3D @@ -208,7 +208,7 @@ void dump_mmu(CPUNios2State *env) entry->tag >> 12, entry->tag & ((1 << cpu->pid_num_bits) - 1), (entry->tag & (1 << 11)) ? 'G' : '-', - entry->data & CR_TLBACC_PFN_MASK, + FIELD_EX32(entry->data, CR_TLBACC, PFN), (entry->data & CR_TLBACC_C) ? 'C' : '-', (entry->data & CR_TLBACC_R) ? 'R' : '-', (entry->data & CR_TLBACC_W) ? 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zk2WWZW0S1igOGpBKjkWDy7mDtUeAKYWgc1671h+gmk=; b=lqlz3LFyWfyrmPTT9HVnrPtc0bl9bY8mn4ovC6q1AmyCjl3whMZd+i2fHsEnNPVolG 6ahLbqDVS0CX5w50WADmV6hhLRgJYyeiR+6CCnqyIDSqfKl6YA7SxOmhnywoN99mFrt0 bcwlzEXNNnINKI/jtcJtWuEadmDG5RIRXnSZ/FCrgDPhyRcoUa2BpmU+SEjS41Dwk+/z tkDleJWB1Hy34h9ZzQumhziKlBWPRoWyw8A2Q6blxi1VHMCr2U005X39qO3G6L1pXhDn VmpzI8arww/Hz4EJzFx5UjRkCi+aQ+xNcSuNIMaUt+BsNwRD5XNVgc6qidNZtjcKkA3d /Hqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zk2WWZW0S1igOGpBKjkWDy7mDtUeAKYWgc1671h+gmk=; b=22YKSMrrR0r3jVJVkUiGNct3bZxdVNArPIWCa4RMFxgveSIgt3GrgVdEzfMADqNb5s KkuYcXOYJ6sW5eVI+4fxq7+KBZYjUShC9gyQxYG6iBbzJOMFtIphWLJCNQ/2ln0E/Jwn v3eUtpqFKWr/AqX3CH2No8u7qLPewCqoteKFU7t/dnmYTB6cWvDeI5RJXE4Od1XqTqS1 G/nHQ9XQzzv9cix6Vn/e8jZqd6yReerhgvBgDxVXtcSJKMEwfO10wdgokG0gU9WCVUiQ VDbP5A1nDHzR81eCLpSG82y5z8na1FK7+OoKyDm52loLI7Nc9RkgmfgdGSM5eF+FTBU4 C6wg== X-Gm-Message-State: AOAM531lGwsxumDmAM6M0D7YdVfihhyeyV/EN1ZwLI/TaneVb96wbw0D ru5/jMmpNxrgQdvsRq3djjZ8XK/1FKGz0w== X-Google-Smtp-Source: ABdhPJwt5yghvfREArOwld5lUZeFbV0AztbCZp1j6exSgQbI2owlDip8zQ/bxlT271dEqN1sFpIzTA== X-Received: by 2002:a63:8648:0:b0:37c:8fc8:ae4 with SMTP id x69-20020a638648000000b0037c8fc80ae4mr2289224pgd.482.1647493557181; Wed, 16 Mar 2022 22:05:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 17/51] target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WE Date: Wed, 16 Mar 2022 22:05:04 -0700 Message-Id: <20220317050538.924111-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494103461100001 Content-Type: text/plain; charset="utf-8" WE is the architectural name of the field, not WR. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 2 +- target/nios2/helper.c | 4 ++-- target/nios2/mmu.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 25b77916ca..81472be686 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -134,7 +134,7 @@ FIELD(CR_TLBACC, IG, 25, 7) #define CR_TLBMISC_WAY_SHIFT 20 #define CR_TLBMISC_WAY_MASK (0xF << CR_TLBMISC_WAY_SHIFT) #define CR_TLBMISC_RD (1 << 19) -#define CR_TLBMISC_WR (1 << 18) +#define CR_TLBMISC_WE (1 << 18) #define CR_TLBMISC_PID_SHIFT 4 #define CR_TLBMISC_PID_MASK (0x3FFF << CR_TLBMISC_PID_SHIFT) #define CR_TLBMISC_DBL (1 << 3) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index da3a289fc7..308d66ad93 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -89,7 +89,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) cs->exception_index); =20 env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WR; + env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; =20 env->regs[R_EA] =3D env->pc + 4; env->pc =3D cpu->fast_tlb_miss_addr; @@ -124,7 +124,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) cs->exception_index); =20 if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WR; + env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; } =20 env->regs[R_EA] =3D env->pc + 4; diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 826cd2afb4..0f33ea5e04 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -95,7 +95,7 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32_t= v) FIELD_EX32(v, CR_TLBACC, PFN)); =20 /* if tlbmisc.WE =3D=3D 1 then trigger a TLB write on writes to TLBACC= */ - if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WR) { + if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WE) { int way =3D (env->ctrl[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT); int vpn =3D FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN); int pid =3D (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4; @@ -133,7 +133,7 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint3= 2_t v) =20 trace_nios2_mmu_write_tlbmisc(v >> CR_TLBMISC_WAY_SHIFT, (v & CR_TLBMISC_RD) ? 'R' : '.', - (v & CR_TLBMISC_WR) ? 'W' : '.', + (v & CR_TLBMISC_WE) ? 'W' : '.', (v & CR_TLBMISC_DBL) ? '2' : '.', (v & CR_TLBMISC_BAD) ? 'B' : '.', (v & CR_TLBMISC_PERM) ? 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GADV/jExPWz+mF0nwm5rQZ+l5e8TEkrJvePYWSdN3A0=; b=Q8hnACfba/skYtW8cauEFp+V3/wIU6NTsZw9JL2CqwlMco1W4NRoTV4e/ItTd3/EEY hcKsyQt8Chap0CII4u7j5D+VsjiNgL8VHcm+oEXv2TH5y6dpc1O+eadraEYA0VgDFqpa aRRzqGep3fQc+AUJoTs+Z6pBqt0s1/+Dl7uMf2072ORU4VQnVmJQSZXl0Vw3sJdF4BWS 3lYf0GkpwZGwwIUNXNBxG8lJd7Eezi/DZCv/JKwXR9TLPXFYcxAoTb124/Ot0212wUpO EMBL5d9Sa7omY5cNf/xD46nv+pZca8QdyjxnCXcUO37y53Fqg46VUTHtildxTeOmX59u bH+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GADV/jExPWz+mF0nwm5rQZ+l5e8TEkrJvePYWSdN3A0=; b=SoerpwBzUbgaFZqUIqq7RmA8OAmnLu/F5XJsxicppRoc8vIWdp+cTEqfw4m0TYH08y /z+B9CIMSLk2tK9kcaMaWv9oytmZJS+MJKaWK5OCE0nARGozRYRbzG3pL1Pe4kCO0GUS Hxn56Vj5YCiZ5M/n+EAu7tkNMi0Fe9lmgrpRM/2CKmjv9+ZFq81VniTCQIK4t2COSfZJ thSnicMkYbUFmfu8GAExWkpMAYMNnAmqkK78EQcqIdNDYrAliTiKqPg41Uyce4OQ2N+r J6PyBLGt4T5ZFE9+kplWU1GjNSIs2z3GzSTGbwUNTzjM+yf9RFmzXJKAfdMkWz1pqjFc p9tg== X-Gm-Message-State: AOAM530l/M6Wi6A+ZCmHoDVjgz+NQqepsnwRljhp4IrLHRHx4VousOcY /2cNcPRt7qjdfXMWZ0oR3V+14lXLrwweeg== X-Google-Smtp-Source: ABdhPJyjqOR2RCl9zGAFTagNMjeBIE0vhGzbIGIEk6fgRP2B0WDQfB5btaPWo6rUu3EEZkqAv2O5og== X-Received: by 2002:a17:902:7089:b0:14f:c32d:f0c4 with SMTP id z9-20020a170902708900b0014fc32df0c4mr3260015plk.97.1647493558059; Wed, 16 Mar 2022 22:05:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 18/51] target/nios2: Use hw/registerfields.h for CR_TLBMISC fields Date: Wed, 16 Mar 2022 22:05:05 -0700 Message-Id: <20220317050538.924111-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1035 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494359384100001 Content-Type: text/plain; charset="utf-8" Use FIELD_EX32 and FIELD_DP32 instead of managing the masking by hand. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/cpu.h | 29 +++++++++++++++++++---------- target/nios2/helper.c | 7 ++----- target/nios2/mmu.c | 35 +++++++++++++++++------------------ target/nios2/translate.c | 2 +- 4 files changed, 39 insertions(+), 34 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 81472be686..7f805a933e 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -131,16 +131,25 @@ FIELD(CR_TLBACC, IG, 25, 7) #define CR_TLBACC_G R_CR_TLBACC_G_MASK =20 #define CR_TLBMISC 10 -#define CR_TLBMISC_WAY_SHIFT 20 -#define CR_TLBMISC_WAY_MASK (0xF << CR_TLBMISC_WAY_SHIFT) -#define CR_TLBMISC_RD (1 << 19) -#define CR_TLBMISC_WE (1 << 18) -#define CR_TLBMISC_PID_SHIFT 4 -#define CR_TLBMISC_PID_MASK (0x3FFF << CR_TLBMISC_PID_SHIFT) -#define CR_TLBMISC_DBL (1 << 3) -#define CR_TLBMISC_BAD (1 << 2) -#define CR_TLBMISC_PERM (1 << 1) -#define CR_TLBMISC_D (1 << 0) + +FIELD(CR_TLBMISC, D, 0, 1) +FIELD(CR_TLBMISC, PERM, 1, 1) +FIELD(CR_TLBMISC, BAD, 2, 1) +FIELD(CR_TLBMISC, DBL, 3, 1) +FIELD(CR_TLBMISC, PID, 4, 14) +FIELD(CR_TLBMISC, WE, 18, 1) +FIELD(CR_TLBMISC, RD, 19, 1) +FIELD(CR_TLBMISC, WAY, 20, 4) +FIELD(CR_TLBMISC, EE, 24, 1) + +#define CR_TLBMISC_EE R_CR_TLBMISC_EE_MASK +#define CR_TLBMISC_RD R_CR_TLBMISC_RD_MASK +#define CR_TLBMISC_WE R_CR_TLBMISC_WE_MASK +#define CR_TLBMISC_DBL R_CR_TLBMISC_DBL_MASK +#define CR_TLBMISC_BAD R_CR_TLBMISC_BAD_MASK +#define CR_TLBMISC_PERM R_CR_TLBMISC_PERM_MASK +#define CR_TLBMISC_D R_CR_TLBMISC_D_MASK + #define CR_ENCINJ 11 #define CR_BADADDR 12 #define CR_CONFIG 13 diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 308d66ad93..52a49f7ead 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -301,11 +301,8 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, return false; } =20 - if (access_type =3D=3D MMU_INST_FETCH) { - env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_D; - } else { - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_D; - } + env->ctrl[CR_TLBMISC] =3D FIELD_DP32(env->ctrl[CR_TLBMISC], CR_TLBMISC= , D, + access_type !=3D MMU_INST_FETCH); env->ctrl[CR_PTEADDR] =3D FIELD_DP32(env->ctrl[CR_PTEADDR], CR_PTEADDR= , VPN, address >> TARGET_PAGE_BITS); env->mmu.pteaddr_wr =3D env->ctrl[CR_PTEADDR]; diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 0f33ea5e04..d9b690b78e 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -33,7 +33,7 @@ unsigned int mmu_translate(CPUNios2State *env, target_ulong vaddr, int rw, int mmu_idx) { Nios2CPU *cpu =3D env_archcpu(env); - int pid =3D (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4; + int pid =3D FIELD_EX32(env->mmu.tlbmisc_wr, CR_TLBMISC, PID); int vpn =3D vaddr >> 12; int way, n_ways =3D cpu->tlb_num_ways; =20 @@ -96,9 +96,9 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32_t= v) =20 /* if tlbmisc.WE =3D=3D 1 then trigger a TLB write on writes to TLBACC= */ if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WE) { - int way =3D (env->ctrl[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT); + int way =3D FIELD_EX32(env->ctrl[CR_TLBMISC], CR_TLBMISC, WAY); int vpn =3D FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN); - int pid =3D (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4; + int pid =3D FIELD_EX32(env->mmu.tlbmisc_wr, CR_TLBMISC, PID); int g =3D FIELD_EX32(v, CR_TLBACC, G); int valid =3D FIELD_EX32(vpn, CR_TLBACC, PFN) < 0xC0000; Nios2TLBEntry *entry =3D @@ -117,10 +117,9 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint3= 2_t v) entry->data =3D newData; } /* Auto-increment tlbmisc.WAY */ - env->ctrl[CR_TLBMISC] =3D - (env->ctrl[CR_TLBMISC] & ~CR_TLBMISC_WAY_MASK) | - (((way + 1) & (cpu->tlb_num_ways - 1)) << - CR_TLBMISC_WAY_SHIFT); + env->ctrl[CR_TLBMISC] =3D FIELD_DP32(env->ctrl[CR_TLBMISC], + CR_TLBMISC, WAY, + (way + 1) & (cpu->tlb_num_ways = - 1)); } =20 /* Writes to TLBACC don't change the read-back value */ @@ -130,24 +129,25 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint= 32_t v) void helper_mmu_write_tlbmisc(CPUNios2State *env, uint32_t v) { Nios2CPU *cpu =3D env_archcpu(env); + uint32_t new_pid =3D FIELD_EX32(v, CR_TLBMISC, PID); + uint32_t old_pid =3D FIELD_EX32(env->mmu.tlbmisc_wr, CR_TLBMISC, PID); + uint32_t way =3D FIELD_EX32(v, CR_TLBMISC, WAY); =20 - trace_nios2_mmu_write_tlbmisc(v >> CR_TLBMISC_WAY_SHIFT, + trace_nios2_mmu_write_tlbmisc(way, (v & CR_TLBMISC_RD) ? 'R' : '.', (v & CR_TLBMISC_WE) ? 'W' : '.', (v & CR_TLBMISC_DBL) ? '2' : '.', (v & CR_TLBMISC_BAD) ? 'B' : '.', (v & CR_TLBMISC_PERM) ? 'P' : '.', (v & CR_TLBMISC_D) ? 'D' : '.', - (v & CR_TLBMISC_PID_MASK) >> 4); + new_pid); =20 - if ((v & CR_TLBMISC_PID_MASK) !=3D - (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK)) { - mmu_flush_pid(env, (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> - CR_TLBMISC_PID_SHIFT); + if (new_pid !=3D old_pid) { + mmu_flush_pid(env, old_pid); } + /* if tlbmisc.RD =3D=3D 1 then trigger a TLB read on writes to TLBMISC= */ if (v & CR_TLBMISC_RD) { - int way =3D (v >> CR_TLBMISC_WAY_SHIFT); int vpn =3D FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN); Nios2TLBEntry *entry =3D &env->mmu.tlb[(way * cpu->tlb_num_ways) + @@ -156,10 +156,9 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint= 32_t v) env->ctrl[CR_TLBACC] &=3D R_CR_TLBACC_IG_MASK; env->ctrl[CR_TLBACC] |=3D entry->data; env->ctrl[CR_TLBACC] |=3D (entry->tag & (1 << 11)) ? CR_TLBACC_G := 0; - env->ctrl[CR_TLBMISC] =3D - (v & ~CR_TLBMISC_PID_MASK) | - ((entry->tag & ((1 << cpu->pid_num_bits) - 1)) << - CR_TLBMISC_PID_SHIFT); + env->ctrl[CR_TLBMISC] =3D FIELD_DP32(v, CR_TLBMISC, PID, + entry->tag & + ((1 << cpu->pid_num_bits) - 1)); env->ctrl[CR_PTEADDR] =3D FIELD_DP32(env->ctrl[CR_PTEADDR], CR_PTEADDR, VPN, entry->tag >> TARGET_PAGE_BITS); diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 9b81a2b29e..459e30b338 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -924,7 +924,7 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int fl= ags) } qemu_fprintf(f, " mmu write: VPN=3D%05X PID %02X TLBACC %08X\n", env->mmu.pteaddr_wr & R_CR_PTEADDR_VPN_MASK, - (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4, + FIELD_EX32(env->mmu.tlbmisc_wr, CR_TLBMISC, PID), env->mmu.tlbacc_wr); #endif qemu_fprintf(f, "\n\n"); --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494298649767.6612610951026; Wed, 16 Mar 2022 22:18:18 -0700 (PDT) Received: from localhost ([::1]:44658 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiWf-0003xN-GH for importer@patchew.org; Thu, 17 Mar 2022 01:18:17 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50878) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKo-00018O-00 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:02 -0400 Received: from [2607:f8b0:4864:20::42c] (port=43913 helo=mail-pf1-x42c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKm-0002G6-E7 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:01 -0400 Received: by mail-pf1-x42c.google.com with SMTP id t2so5877925pfj.10 for ; Wed, 16 Mar 2022 22:05:59 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e6sq5+VxzJ+iyeBdvkBx4ESzy/gdXULWUf0uyVhwts4=; b=h57VvCk4FjU05p2bubDNBqzbgSP/9rRAstfd1X3hQDBC75QVfao3zA7/ZWXRUwpaF9 zPASUU550gKQ4yvjuP1uIeuTvRGqrmusQSCEnVgchelY2vpPJVMqLPjuXmoLDdkuPbj9 NCMze3wtsbvG0Y9uml1UbjFEXOpd2+cFYrrYwvws7x1M75JC3pKmCMraV6aeCli1mWDt SSqxUbi7mt+SHefApxWTMN7XLO7Jk6SEJ3BEhzte2yVe7B5YE3oYCahKpKu5Sz1Yz2m7 rvKxr9MiImsnzkSHByKcM9WGjtvhW1Zt64+Mownu5jiUQ3D/3dqUecqMVvQYoT3t6nHb QOSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e6sq5+VxzJ+iyeBdvkBx4ESzy/gdXULWUf0uyVhwts4=; b=N4z/NhCfdonzkyvc/S/7srqI4qe7VNcFahZ9er4dQMO4mUvWTNN8dkZHt1wOKB/QSS HcS6Nju3szFidmy2CHmXtLKL1eH6kYw2RId7sckpTSeLFdH9Q3KG+WkHE4dVWQe4Crr3 vraY0kh2nley+UJ5P/3bdNibhLE0VcAu0ox6atdmioNt8UalpmwR2FqrSe8frYbrt1qP ZeOZIFp9YyNVVQrqhbXCqL0bN+02qN356/z+clYiK3NvpURtdAJpdeKbG3pr836cwrZv wEvSuKc5i/B61eVv6T6hSb7WSleoU68Cjjsm1IUh+/U+ca08KBy57KoytT5giD0pLv8l mAGg== X-Gm-Message-State: AOAM5307OuyqA0azmc2A7i4ql7N7KK/+QO3MR9AGh++oHlO3/8OU3H5L FPhKc7h1n3gKSaUZezGFt0NWXlUYEM7PVA== X-Google-Smtp-Source: ABdhPJwAH/foX3/3EP4RBI8Woc3zOu8DBtEunUj0xyPMne37mXlMGWCi3VKBAfYEPoLO76GfwZhWQw== X-Received: by 2002:a63:7cb:0:b0:380:f89f:c9a2 with SMTP id 194-20020a6307cb000000b00380f89fc9a2mr2266067pgh.264.1647493558989; Wed, 16 Mar 2022 22:05:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 19/51] target/nios2: Move R_FOO and CR_BAR into enumerations Date: Wed, 16 Mar 2022 22:05:06 -0700 Message-Id: <20220317050538.924111-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494300619100001 Content-Type: text/plain; charset="utf-8" These symbols become available to the debugger. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 72 ++++++++++++++++++++++------------------------ 1 file changed, 35 insertions(+), 37 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 7f805a933e..555972fe6b 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -61,25 +61,43 @@ struct Nios2CPUClass { #define NUM_CR_REGS 32 =20 /* General purpose register aliases */ -#define R_ZERO 0 -#define R_AT 1 -#define R_RET0 2 -#define R_RET1 3 -#define R_ARG0 4 -#define R_ARG1 5 -#define R_ARG2 6 -#define R_ARG3 7 -#define R_ET 24 -#define R_BT 25 -#define R_GP 26 -#define R_SP 27 -#define R_FP 28 -#define R_EA 29 -#define R_BA 30 -#define R_RA 31 +enum { + R_ZERO =3D 0, + R_AT =3D 1, + R_RET0 =3D 2, + R_RET1 =3D 3, + R_ARG0 =3D 4, + R_ARG1 =3D 5, + R_ARG2 =3D 6, + R_ARG3 =3D 7, + R_ET =3D 24, + R_BT =3D 25, + R_GP =3D 26, + R_SP =3D 27, + R_FP =3D 28, + R_EA =3D 29, + R_BA =3D 30, + R_RA =3D 31, +}; =20 /* Control register aliases */ -#define CR_STATUS 0 +enum { + CR_STATUS =3D 0, + CR_ESTATUS =3D 1, + CR_BSTATUS =3D 2, + CR_IENABLE =3D 3, + CR_IPENDING =3D 4, + CR_CPUID =3D 5, + CR_EXCEPTION =3D 7, + CR_PTEADDR =3D 8, + CR_TLBACC =3D 9, + CR_TLBMISC =3D 10, + CR_ENCINJ =3D 11, + CR_BADADDR =3D 12, + CR_CONFIG =3D 13, + CR_MPUBASE =3D 14, + CR_MPUACC =3D 15, +}; =20 FIELD(CR_STATUS, PIE, 0, 1) FIELD(CR_STATUS, U, 1, 1) @@ -98,24 +116,12 @@ FIELD(CR_STATUS, RSIE, 23, 1) #define CR_STATUS_NMI R_CR_STATUS_NMI_MASK #define CR_STATUS_RSIE R_CR_STATUS_RSIE_MASK =20 -#define CR_ESTATUS 1 -#define CR_BSTATUS 2 -#define CR_IENABLE 3 -#define CR_IPENDING 4 -#define CR_CPUID 5 -#define CR_CTL6 6 -#define CR_EXCEPTION 7 - FIELD(CR_EXCEPTION, CAUSE, 2, 5) FIELD(CR_EXCEPTION, ECCFTL, 31, 1) =20 -#define CR_PTEADDR 8 - FIELD(CR_PTEADDR, VPN, 2, 20) FIELD(CR_PTEADDR, PTBASE, 22, 10) =20 -#define CR_TLBACC 9 - FIELD(CR_TLBACC, PFN, 0, 20) FIELD(CR_TLBACC, G, 20, 1) FIELD(CR_TLBACC, X, 21, 1) @@ -130,8 +136,6 @@ FIELD(CR_TLBACC, IG, 25, 7) #define CR_TLBACC_X R_CR_TLBACC_X_MASK #define CR_TLBACC_G R_CR_TLBACC_G_MASK =20 -#define CR_TLBMISC 10 - FIELD(CR_TLBMISC, D, 0, 1) FIELD(CR_TLBMISC, PERM, 1, 1) FIELD(CR_TLBMISC, BAD, 2, 1) @@ -150,12 +154,6 @@ FIELD(CR_TLBMISC, EE, 24, 1) #define CR_TLBMISC_PERM R_CR_TLBMISC_PERM_MASK #define CR_TLBMISC_D R_CR_TLBMISC_D_MASK =20 -#define CR_ENCINJ 11 -#define CR_BADADDR 12 -#define CR_CONFIG 13 -#define CR_MPUBASE 14 -#define CR_MPUACC 15 - /* Exceptions */ #define EXCP_BREAK 0x1000 #define EXCP_RESET 0 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494451642157.88433982747313; Wed, 16 Mar 2022 22:20:51 -0700 (PDT) Received: from localhost ([::1]:53232 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiZ8-0001FO-BV for importer@patchew.org; Thu, 17 Mar 2022 01:20:50 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50892) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKp-0001BG-0s for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:03 -0400 Received: from [2607:f8b0:4864:20::102a] (port=45917 helo=mail-pj1-x102a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKn-0002GH-94 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:02 -0400 Received: by mail-pj1-x102a.google.com with SMTP id m11-20020a17090a7f8b00b001beef6143a8so4465014pjl.4 for ; Wed, 16 Mar 2022 22:06:00 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.05.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:05:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=62d8othJIfgAKm86Avncs/clZTnNTHcuD30Oj5z4NnM=; b=R9UV28LxjftClDxlNhGQsPEZ1qef9s1ohMZ4HCNwKFoXiPPaGyXzvaxRK2duSQAcjQ FEzJ1Gc7hhX6IWdSs5ps2fOPxlzGXZPAuoCZI88h/mbcKuqd141Fx3VkNPf/8B+a+wMO DydTWIJ7mckcAczTTEbX6k6c9xUhgpEdtvK1QpbM5+YrBu6lKo76xfu9OK/Zz6HElBBb PtkrlvuFEvRoJda8yCo12OedtDYUj0T/WnNDf5TH/idZ+wBHc4vDUZfeq8vHypvJyTMk JwF7JDurQmrp1YaQNHz/HfZ9nF4V9YekPeN1hXm8RkVN/aZOGljXcAsr/Wxs84NvxSjJ XT0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=62d8othJIfgAKm86Avncs/clZTnNTHcuD30Oj5z4NnM=; b=DpWzNsqYzIDCSV1Ul/tkA87PKCEdlxk84LBol/fpZ0na2zq1gIHWcp3PEGy8QeAF5N mQoxmxLAiT7BdlvrE3hsTd1XQqLebtuYIxocxUNRFZN4RF40jbXEBuucwZfFGte6+uzw KIPjTpk3RdZCY/Z4wSLHmJG95I4M5jQA/mNpAR5hSKDtkBmfpvQPlG3+pGWh1IuVaB7+ kCvzK2LERKajJ+SpljKWSuWDsw/Aj4UaopeD8oXEwvIGhTeKUyUvG439iE/5vNAr6rA4 SlHV1RToFeHjKOBydhxuzRvqs7871XXbbaq9128nMrfEz5tY7GPYNBLoaAWgMgpXv1Z4 bQ8w== X-Gm-Message-State: AOAM5317e118EfQtCqAxMkvxL8Mg94xmvFKaQ4TsxL/55akOVz2cM6yz 51M12OpEUwA8ldcaEkhNvcRNxDW11oYdGw== X-Google-Smtp-Source: ABdhPJxmIQtD44+ZY33lGh3ei+qgZw0YBNiA5iyTpwPD1VFqK/k7uiSEzleTB3/Lgk8LG8q5E5/hBA== X-Received: by 2002:a17:90b:314d:b0:1bf:acde:16e5 with SMTP id ip13-20020a17090b314d00b001bfacde16e5mr3284867pjb.165.1647493559985; Wed, 16 Mar 2022 22:05:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 20/51] target/nios2: Create EXCP_SEMIHOST for semi-hosting Date: Wed, 16 Mar 2022 22:05:07 -0700 Message-Id: <20220317050538.924111-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494453907100001 Content-Type: text/plain; charset="utf-8" Decode 'break 1' during translation, rather than doing it again during exception processing. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 1 + target/nios2/helper.c | 14 ++++++-------- target/nios2/translate.c | 17 ++++++++++++++++- 3 files changed, 23 insertions(+), 9 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 555972fe6b..d003af5afc 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -156,6 +156,7 @@ FIELD(CR_TLBMISC, EE, 24, 1) =20 /* Exceptions */ #define EXCP_BREAK 0x1000 +#define EXCP_SEMIHOST 0x1001 #define EXCP_RESET 0 #define EXCP_PRESET 1 #define EXCP_IRQ 2 diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 52a49f7ead..eeff032379 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -172,14 +172,6 @@ void nios2_cpu_do_interrupt(CPUState *cs) =20 case EXCP_BREAK: qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=3D%x\n", env->pc= ); - /* The semihosting instruction is "break 1". */ - if (semihosting_enabled() && - cpu_ldl_code(env, env->pc) =3D=3D 0x003da07a) { - qemu_log_mask(CPU_LOG_INT, "Entering semihosting\n"); - env->pc +=3D 4; - do_nios2_semihosting(env); - break; - } =20 if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->ctrl[CR_BSTATUS] =3D env->ctrl[CR_STATUS]; @@ -196,6 +188,12 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->pc =3D cpu->exception_addr; break; =20 + case EXCP_SEMIHOST: + qemu_log_mask(CPU_LOG_INT, "BREAK semihosting at pc=3D%x\n", env->= pc); + env->pc +=3D 4; + do_nios2_semihosting(env); + break; + default: cpu_abort(cs, "unhandled exception type=3D%d\n", cs->exception_index); diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 459e30b338..cfad110186 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -33,6 +33,7 @@ #include "exec/translator.h" #include "qemu/qemu-print.h" #include "exec/gen-icount.h" +#include "semihosting/semihost.h" =20 /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ @@ -686,6 +687,20 @@ static void trap(DisasContext *dc, uint32_t code, uint= 32_t flags) t_gen_helper_raise_exception(dc, EXCP_TRAP); } =20 +static void gen_break(DisasContext *dc, uint32_t code, uint32_t flags) +{ +#ifndef CONFIG_USER_ONLY + /* The semihosting instruction is "break 1". */ + R_TYPE(instr, code); + if (semihosting_enabled() && instr.imm5 =3D=3D 1) { + t_gen_helper_raise_exception(dc, EXCP_SEMIHOST); + return; + } +#endif + + t_gen_helper_raise_exception(dc, EXCP_BREAK); +} + static const Nios2Instruction r_type_instructions[] =3D { INSTRUCTION_ILLEGAL(), INSTRUCTION(eret), /* eret */ @@ -739,7 +754,7 @@ static const Nios2Instruction r_type_instructions[] =3D= { INSTRUCTION(add), /* add */ INSTRUCTION_ILLEGAL(), INSTRUCTION_ILLEGAL(), - INSTRUCTION_FLG(gen_excp, EXCP_BREAK), /* break */ + INSTRUCTION(gen_break), /* break */ INSTRUCTION_ILLEGAL(), INSTRUCTION(nop), /* nop */ INSTRUCTION_ILLEGAL(), --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495931337269.94666210349726; Wed, 16 Mar 2022 22:45:31 -0700 (PDT) Received: from localhost ([::1]:44556 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUix0-0000jB-82 for importer@patchew.org; Thu, 17 Mar 2022 01:45:30 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50922) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKq-0001E2-1k for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:04 -0400 Received: from [2607:f8b0:4864:20::62d] (port=43737 helo=mail-pl1-x62d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKo-0002GR-7S for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:03 -0400 Received: by mail-pl1-x62d.google.com with SMTP id w8so3539210pll.10 for ; Wed, 16 Mar 2022 22:06:01 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rza+S9dP6OxTxmW7BN1PpFg5SK23R8f/DSGJ4keNmyI=; b=bpW7YUUPyu5ca/rNkhHzwMXoQucg24ThhwGbbQ41itxN0jqJnLIBGs8RoWkFdLu7IO Box4tx62OifPzy26IAFn831Jt6W3hr0JNXz+DsgSMEOcU0Puhcc7Fbj+AohUWZcGr87f +mbhbYWy5onfF+46JD0ITJKTsFd6uDkGIncejEVVKQC2+E5ZEKtqbEndz3AJJAjDLv6E sQDoddn3jIKqOzVQCb7AaOQulo1ELPPHY9rE1qMeQfhKy1MMfOvdxiqjxSBpfJJyiSiD NHocJxitkh1dik3PvVbo6SQmC3jYE9iAaTtVJnLKxnHlYmu7q2YJFqTsIA7Oj9QUe/GZ B66w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rza+S9dP6OxTxmW7BN1PpFg5SK23R8f/DSGJ4keNmyI=; b=sFOnOgg5Uldno5PIbZKfBP1o4aSSwcJDZGaUFdyhRzIQoA+oITInmzUxODO0Jrx+H1 NMireg7Onery1zpj5WAKQTthiIlFSBSXb0nGz5Jn9uh5FvcfrddLcTcpM9x5e/GI3Cjw rfjs5Fh3hKpgEoAM1UrBl55ruumn/VC7nlWsIx937VMDF//pKS7Gf1sIum2E6DJamic8 aPlfvyfGLw1+awvcfJX7GB+KWKpgv3hvQZD5yVKIyn+WCIfBmaNcQ3Zx56yKwsxMbbKn AHQhxrIp2LFlDyk1/1YcFjQtjaLUMyG+Z+51jN87HB3OTrCb2LUSGzAIKDPqyA7bYvbl BUTQ== X-Gm-Message-State: AOAM533cmBBHUMfEkhFMBqUghKRVDCe1Vmw0hpG+Z/qVhdSS7DRPVV8K AJVS4obATmGblnUq1CT4GezYYW1aOIAQNQ== X-Google-Smtp-Source: ABdhPJyk8hqFWztqjYcOYufDRN5ahat/GWJJ3ZbToVrTJ7ewfZt3P4nmmlQ/5EfQ2gaUU3uF/YYwjA== X-Received: by 2002:a17:90b:4b0d:b0:1bc:4cdb:ebe3 with SMTP id lx13-20020a17090b4b0d00b001bc4cdbebe3mr3343961pjb.176.1647493560930; Wed, 16 Mar 2022 22:06:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 21/51] target/nios2: Clean up nios2_cpu_do_interrupt Date: Wed, 16 Mar 2022 22:05:08 -0700 Message-Id: <20220317050538.924111-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495932267100001 Content-Type: text/plain; charset="utf-8" Split out do_exception and do_iic_irq to handle bulk of the interrupt and exception processing. Parameterize the changes required to cpu state. The status.EH bit, which protects some data against double-faults, is only present with the MMU. Several exception cases did not check for status.EH being set, as required. The status.IH bit, which had been set by EXCP_IRQ, is exclusive to the external interrupt controller, which we do not yet implement. The internal interrupt controller, when the MMU is also present, sets the status.EH bit. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/helper.c | 141 +++++++++++++----------------------------- 1 file changed, 44 insertions(+), 97 deletions(-) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index eeff032379..6019e2443b 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -49,6 +49,42 @@ void nios2_cpu_record_sigsegv(CPUState *cs, vaddr addr, =20 #else /* !CONFIG_USER_ONLY */ =20 +static void do_exception(Nios2CPU *cpu, uint32_t exception_addr, bool is_b= reak) +{ + CPUNios2State *env =3D &cpu->env; + CPUState *cs =3D CPU(cpu); + uint32_t old_status =3D env->ctrl[CR_STATUS]; + uint32_t new_status =3D old_status; + + if ((old_status & CR_STATUS_EH) =3D=3D 0) { + int r_ea =3D R_EA, cr_es =3D CR_ESTATUS; + + if (is_break) { + r_ea =3D R_BA; + cr_es =3D CR_BSTATUS; + } + env->ctrl[cr_es] =3D old_status; + env->regs[r_ea] =3D env->pc + 4; + + if (cpu->mmu_present) { + new_status |=3D CR_STATUS_EH; + } + } + + new_status &=3D ~(CR_STATUS_PIE | CR_STATUS_U); + + env->ctrl[CR_STATUS] =3D new_status; + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); + env->pc =3D exception_addr; +} + +static void do_iic_irq(Nios2CPU *cpu) +{ + do_exception(cpu, cpu->exception_addr, false); +} + void nios2_cpu_do_interrupt(CPUState *cs) { Nios2CPU *cpu =3D NIOS2_CPU(cs); @@ -56,57 +92,20 @@ void nios2_cpu_do_interrupt(CPUState *cs) =20 switch (cs->exception_index) { case EXCP_IRQ: - assert(env->ctrl[CR_STATUS] & CR_STATUS_PIE); - qemu_log_mask(CPU_LOG_INT, "interrupt at pc=3D%x\n", env->pc); - - env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; - env->ctrl[CR_STATUS] |=3D CR_STATUS_IH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - - env->regs[R_EA] =3D env->pc + 4; - env->pc =3D cpu->exception_addr; + do_iic_irq(cpu); break; =20 case EXCP_TLBD: if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=3D%x\n", env= ->pc); - - /* Fast TLB miss */ - /* Variation from the spec. Table 3-35 of the cpu reference sh= ows - * estatus not being changed for TLB miss but this appears to - * be incorrect. */ - env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; - env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; - - env->regs[R_EA] =3D env->pc + 4; - env->pc =3D cpu->fast_tlb_miss_addr; + do_exception(cpu, cpu->fast_tlb_miss_addr, false); } else { qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=3D%x\n", e= nv->pc); - - /* Double TLB miss */ - env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_DBL; - - env->pc =3D cpu->exception_addr; + do_exception(cpu, cpu->exception_addr, false); } break; =20 @@ -114,78 +113,28 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_TLBW: case EXCP_TLBX: qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=3D%x\n", env->pc); - - env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; - env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; } - - env->regs[R_EA] =3D env->pc + 4; - env->pc =3D cpu->exception_addr; + do_exception(cpu, cpu->exception_addr, false); break; =20 case EXCP_SUPERA: case EXCP_SUPERI: case EXCP_SUPERD: qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=3D%x\n", en= v->pc); - - if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; - env->regs[R_EA] =3D env->pc + 4; - } - - env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - - env->pc =3D cpu->exception_addr; + do_exception(cpu, cpu->exception_addr, false); break; =20 case EXCP_ILLEGAL: case EXCP_TRAP: qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=3D%x\n", env->pc); - - if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->ctrl[CR_ESTATUS] =3D env->ctrl[CR_STATUS]; - env->regs[R_EA] =3D env->pc + 4; - } - - env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - - env->pc =3D cpu->exception_addr; + do_exception(cpu, cpu->exception_addr, false); break; =20 case EXCP_BREAK: qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=3D%x\n", env->pc= ); - - if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->ctrl[CR_BSTATUS] =3D env->ctrl[CR_STATUS]; - env->regs[R_BA] =3D env->pc + 4; - } - - env->ctrl[CR_STATUS] |=3D CR_STATUS_EH; - env->ctrl[CR_STATUS] &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); - - env->pc =3D cpu->exception_addr; + do_exception(cpu, cpu->exception_addr, true); break; =20 case EXCP_SEMIHOST: @@ -195,9 +144,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) break; =20 default: - cpu_abort(cs, "unhandled exception type=3D%d\n", - cs->exception_index); - break; + cpu_abort(cs, "unhandled exception type=3D%d\n", cs->exception_ind= ex); } } =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494648102845.1652066693903; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CrZNI1SxmaS+Q1Ja/qtDT6B5V9ddvf4cp0nG/uUGkSI=; b=V5XS3F1Q9V69D9ilyF7+etx9XLBTWRdy253x/A3LiG6eLgJfH4wxh1yIRmAMx0uQlC ZpIevHMC0P2R/w+Wk/jVY6B0XfIRhMdYg1j02z74FW5ZgzbhiiMP/MmFvj0BG0jiMmdG Z/+OEfnKFzbuwpb1QkOkBQI+RVIGWqBjg0BOO5la8UI1fcquORgqE0XqIcrIldBfQsLl dVRKzcUUfXqoAqDbs5oquiWlDwIkpJZNn6Z64rw49BA2vNGipi0bfDXMuVb2uuh3jniK yb+Nf/ZU4oFUQrM08OHh8X7LcSXsRl2bqrsh4YGgghXBPmAcq9wiMJXs/UZT1cHqoOn7 EAmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CrZNI1SxmaS+Q1Ja/qtDT6B5V9ddvf4cp0nG/uUGkSI=; b=xTgwpWObqteSxz9+bTiWoJiWJk/oHbrmBjiZ11d81NnY/BJXBTTavwP75ApVmCt9bf +CTe+QFAndFCzRjxK8mdlQZrKlfGUysDquoIJmKg5KxoUgx4+H/vIDne06klxjpRtaS9 lzEKBFQMsouV/2A2yX4cqG+gJV+3iW9yUqj/UFMYN4wgJpNqaiUdnvhwmyibXMjrVoDF 1VyZ2mkdBxXZmFU9bUztXkr/TcXSzEzfsKU5PQBTxcYB7x8ab1F9Jkwg4Qp1RoqY04ek G++A6WHznJBQPK5Ce6G77it2aZyAWG3s/pBftO9XRwKJ3CWlsct/55GQAlHl2K304tDl uYAA== X-Gm-Message-State: AOAM533F7YM8Ouk8NyjlceM4kx8lNN8TRFsH8IMLJiMt0AEaG4AfRxT7 exyFH5El5/K6/dTWUzA60ZbvKX1Km4pBQw== X-Google-Smtp-Source: ABdhPJwHPwa0eQPWB4txEzL3VK3iZeDE+me7aJsp9Zqc1ZlDePyR56qb1xxYvR4DBtUSCi0hV/8wDQ== X-Received: by 2002:a17:90b:2246:b0:1c6:5781:7193 with SMTP id hk6-20020a17090b224600b001c657817193mr8517165pjb.48.1647493561857; Wed, 16 Mar 2022 22:06:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 22/51] target/nios2: Hoist CPU_LOG_INT logging Date: Wed, 16 Mar 2022 22:05:09 -0700 Message-Id: <20220317050538.924111-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102e (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494649430100001 Content-Type: text/plain; charset="utf-8" Performing this early means that we can merge more cases within the non-logging switch statement. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/helper.c | 58 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 47 insertions(+), 11 deletions(-) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 6019e2443b..285f3aae1d 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -90,20 +90,64 @@ void nios2_cpu_do_interrupt(CPUState *cs) Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUNios2State *env =3D &cpu->env; =20 + if (qemu_loglevel_mask(CPU_LOG_INT)) { + const char *name =3D NULL; + + switch (cs->exception_index) { + case EXCP_IRQ: + name =3D "interrupt"; + break; + case EXCP_TLBD: + if (env->ctrl[CR_STATUS] & CR_STATUS_EH) { + name =3D "TLB MISS (double)"; + } else { + name =3D "TLB MISS (fast)"; + } + break; + case EXCP_TLBR: + case EXCP_TLBW: + case EXCP_TLBX: + name =3D "TLB PERM"; + break; + case EXCP_SUPERA: + case EXCP_SUPERD: + name =3D "SUPERVISOR (address)"; + break; + case EXCP_SUPERI: + name =3D "SUPERVISOR (insn)"; + break; + case EXCP_ILLEGAL: + name =3D "ILLEGAL insn"; + break; + case EXCP_TRAP: + name =3D "TRAP insn"; + break; + case EXCP_BREAK: + name =3D "TRAP insn"; + break; + case EXCP_SEMIHOST: + name =3D "SEMIHOST insn"; + break; + } + if (name) { + qemu_log("%s at pc=3D0x%08x\n", name, env->pc); + } else { + qemu_log("Unknown exception %d at pc=3D0x%08x\n", + cs->exception_index, env->pc); + } + } + switch (cs->exception_index) { case EXCP_IRQ: - qemu_log_mask(CPU_LOG_INT, "interrupt at pc=3D%x\n", env->pc); do_iic_irq(cpu); break; =20 case EXCP_TLBD: if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=3D%x\n", env= ->pc); env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; do_exception(cpu, cpu->fast_tlb_miss_addr, false); } else { - qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=3D%x\n", e= nv->pc); env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_DBL; do_exception(cpu, cpu->exception_addr, false); } @@ -112,7 +156,6 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_TLBR: case EXCP_TLBW: case EXCP_TLBX: - qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=3D%x\n", env->pc); if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; } @@ -122,23 +165,16 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_SUPERA: case EXCP_SUPERI: case EXCP_SUPERD: - qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=3D%x\n", en= v->pc); - do_exception(cpu, cpu->exception_addr, false); - break; - case EXCP_ILLEGAL: case EXCP_TRAP: - qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=3D%x\n", env->pc); do_exception(cpu, cpu->exception_addr, false); break; =20 case EXCP_BREAK: - qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=3D%x\n", env->pc= ); do_exception(cpu, cpu->exception_addr, true); break; =20 case EXCP_SEMIHOST: - qemu_log_mask(CPU_LOG_INT, "BREAK semihosting at pc=3D%x\n", env->= pc); env->pc +=3D 4; do_nios2_semihosting(env); break; --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494104278658.1933909472593; Wed, 16 Mar 2022 22:15:04 -0700 (PDT) Received: from localhost ([::1]:36504 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiTX-0006sa-8t for importer@patchew.org; Thu, 17 Mar 2022 01:15:03 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50962) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKr-0001HO-J4 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:05 -0400 Received: from [2607:f8b0:4864:20::52f] (port=47100 helo=mail-pg1-x52f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKq-0002Gu-2x for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:05 -0400 Received: by mail-pg1-x52f.google.com with SMTP id o23so1809157pgk.13 for ; Wed, 16 Mar 2022 22:06:03 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GQKtq5EmgHv2pf8acDMhuJ8SB17+NoN37aNM30IhfvE=; b=Lsod1GtFUEt517UJOi3A3oEv86HBCdTwBElarCuipGoSc0O0Jxun5sXB/K5aNG27MR Xy86Grkaka2so4CY88pyQ4lJ7YnSwpmhMXrjUvSKVG9cL9KdOfRje04nXvEHVE8ION0f Le2sye3e649YM5LTlwtoPN3uXDWInzhD6JM30ZIHYHUID9Kqg0S7xHhWDA+/meXvQ8ED pH+rPmgqSrGtX/hDMreK9iOix4aWFglwiF2W9ZdgR+1sN/lAifutsk3rORXePkAX1toz 8tEq+V8DDp3KZ1XVBW5TyIVjRsGM33G9PtDF4jx+tYJ68wgkwZ7mDSDX7pBwpMVQ0eBA jnow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GQKtq5EmgHv2pf8acDMhuJ8SB17+NoN37aNM30IhfvE=; b=JYdxAD7wCut2M/GWWwcHCcJ2ZhsuY5e03D4+1edHlPbFBIbNk6dITmpQDp8GniO/Es hJZP++xJpJJrWfDTtDfcU3jCHKlZ+oQXfCPfnD0ZYVB/GwBT8pAcrYqVNA63VeWyYqpn 5PWrGheJywVaRFCXcHypJxOhEs+SMC8cn7uZZEjKWKjSX9kXn93M7/OGrGDvCcjoJqLA mLIrdVVXs7uHklATRU6paE0eU/tB++hbRXLVpbwWgFnu2+TvmQQOtLCdb19wDHMKy51Z w92hIbl+chVxvdQXGLr3/wsg/l+dND8t8EAkr+R+lqdQ5WC9BnXmVpOvDAie1ajovj8X Kbvw== X-Gm-Message-State: AOAM530cLMmFsW8aKom8o6Sk0yp0NVwm7iqvT6frqM7+hLc+yQtdosou Wz4lnECW8YXIAvhGD8zWndE9Pgk2RsJQMg== X-Google-Smtp-Source: ABdhPJwOHGi6NKmOFcx2gFtneGE9RPRZb9xbX75fzCa6Uft/F1stbmY8wvIxII7P0l1PhIKE/gvn2Q== X-Received: by 2002:a63:6a41:0:b0:37c:7a6e:e7a3 with SMTP id f62-20020a636a41000000b0037c7a6ee7a3mr2245861pgc.528.1647493562740; Wed, 16 Mar 2022 22:06:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 23/51] target/nios2: Handle EXCP_UNALIGN and EXCP_UALIGND Date: Wed, 16 Mar 2022 22:05:10 -0700 Message-Id: <20220317050538.924111-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494105407100003 Content-Type: text/plain; charset="utf-8" These misaligned data and misaligned destination exceptions are defined, but not currently raised. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 285f3aae1d..0392c0ea84 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -119,6 +119,12 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_ILLEGAL: name =3D "ILLEGAL insn"; break; + case EXCP_UNALIGN: + name =3D "Misaligned (data)"; + break; + case EXCP_UNALIGND: + name =3D "Misaligned (destination)"; + break; case EXCP_TRAP: name =3D "TRAP insn"; break; @@ -167,6 +173,8 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_SUPERD: case EXCP_ILLEGAL: case EXCP_TRAP: + case EXCP_UNALIGN: + case EXCP_UNALIGND: do_exception(cpu, cpu->exception_addr, false); break; =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496277733477.54353771197555; Wed, 16 Mar 2022 22:51:17 -0700 (PDT) Received: from localhost ([::1]:48986 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUj2a-0003rl-DE for importer@patchew.org; Thu, 17 Mar 2022 01:51:16 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50972) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKs-0001J0-84 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:07 -0400 Received: from [2607:f8b0:4864:20::102b] (port=41524 helo=mail-pj1-x102b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKq-0002H2-Qp for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:05 -0400 Received: by mail-pj1-x102b.google.com with SMTP id l4-20020a17090a49c400b001c6840df4a3so675561pjm.0 for ; Wed, 16 Mar 2022 22:06:04 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kC6IYNjsGbxQ1O1vqjxYEFxpw4YN+TjfQjKfECaeneY=; b=kJ0Y7HEYKbNdPW8liQQ5iRDrIhi9hCabwJN5Egj7VfvJI3apLC8ZnEupX0rJ8kNeiL iYIAuQOnptEaSoavex+2GjCuBicw44CtF42SQfvhYeq6Q1FEz5pW5nakZmNEzG7rAYf7 JIiaF65e+wnpqz3TMothlTDxDn3ZVB+CXWzEfGr4V7k3GfooWRFsJSgdGqPC1Sge8FQc HfXAJu2JAgpv12lX6RhDAIsfH2odeOIK0vHdzVocUeUO/sm1PCR5PoJy5h+0xmcEL7vE 8VBHwAMcROc3k2BCk942J45bRURS0HPKdzquID7zS3JbhgPy6zsKbL0TEtNHysi3oJVB uZtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kC6IYNjsGbxQ1O1vqjxYEFxpw4YN+TjfQjKfECaeneY=; b=1WvmQ9cqLTjmJcMZ1bUw98OpsHg76gJfT3Pl0cYs2lAU0FHH44UaTVr5KkeYBb98OT GH1QBFH0Dmtb0HviYrC1/Z4hCX/TZDEUDyffKoBRAwG9iD46Tzt5fi1TFyC7zTI/aLXu X60HuZgF58FeOSXHCYGYnLLvsQfWVl8eN+FCr9z1GesouXLTzXBOmVM1iQf7Q8UBPlSs 4eGOmaXhusWSI2bacpN8UYeL3lbrEajtv6mhxcqBdz3meBpRh5TuGD2oOtkPR5L1x9zr DYm+HJWTUeuHFg4j3oFiMwb2CPUAOSPi/F3i11xpT4rlJUiNDhLXs6sZ5X28jhQuEvqd jlWQ== X-Gm-Message-State: AOAM53041Z4ZPaU/UG01BDvRO2orwBC3GqqASHS0Lpd+mRZBG/xhO5oI K6e8R/AFcrVD5QSIqSgNrkQ7pqsBalHaVg== X-Google-Smtp-Source: ABdhPJzWFt9ouedKWm0UolL7cN/glf8QdAOReApphDymAaTuVjeHniXXo4vTQQUSufoiFQEg9Ojj1g== X-Received: by 2002:a17:90a:6393:b0:1bf:70e7:27d2 with SMTP id f19-20020a17090a639300b001bf70e727d2mr13737240pjj.1.1647493563508; Wed, 16 Mar 2022 22:06:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 24/51] target/nios2: Cleanup set of CR_EXCEPTION for do_interrupt Date: Wed, 16 Mar 2022 22:05:11 -0700 Message-Id: <20220317050538.924111-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496280356100001 Content-Type: text/plain; charset="utf-8" The register is entirely read-only for software, and we do not implement ECC, so we need not deposit the cause into an existing value; just create a new value from scratch. Furthermore, exception.CAUSE is not written for break exceptions. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/helper.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 0392c0ea84..afbafd1fdc 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -74,9 +74,10 @@ static void do_exception(Nios2CPU *cpu, uint32_t excepti= on_addr, bool is_break) new_status &=3D ~(CR_STATUS_PIE | CR_STATUS_U); =20 env->ctrl[CR_STATUS] =3D new_status; - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(env->ctrl[CR_EXCEPTION], - CR_EXCEPTION, CAUSE, - cs->exception_index); + if (!is_break) { + env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(0, CR_EXCEPTION, CAUSE, + cs->exception_index); + } env->pc =3D exception_addr; } =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494582942317.9555501343324; Wed, 16 Mar 2022 22:23:02 -0700 (PDT) Received: from localhost ([::1]:58704 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUibF-00054V-SQ for importer@patchew.org; Thu, 17 Mar 2022 01:23:01 -0400 Received: from eggs.gnu.org ([209.51.188.92]:50996) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKu-0001KQ-13 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:09 -0400 Received: from [2607:f8b0:4864:20::1030] (port=46897 helo=mail-pj1-x1030.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKr-0002HG-Tj for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:07 -0400 Received: by mail-pj1-x1030.google.com with SMTP id bx24-20020a17090af49800b001c6872a9e4eso362972pjb.5 for ; Wed, 16 Mar 2022 22:06:05 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EnAEYpcIY00+k1hPlmrXoRht11ltOEwUcRv8uGR7V3g=; b=RJzjZBB+Yj8UZxHdi1xxNdn5hD1i5MgnCw2ImHyf+JPjIwO3NRg0odjKKjkIU+u0lo +ZGdIYaGDt3/snHlCGZQa6PsFD1Xt7m/582TmHJO9QEVdlUpIZ8Cv6R85ZTmdbPhIDJV R4Xq8qm0d064T5Sdbbvc0x55Rcx0CaGpjkjjBP6CdVc7V17sYkKZy3z1Ml+ILElCUcHg llCT5EkToSRfXynS814bfiQQXjBwgoagsRane411K1O/CBSydjsUP4kpVoCTGvE4qJeN yi91CqE+vX5UQg1XTOPaArqNx681hl5QXYsTrZxUpZM0GWbhsISxqyv/ZALk40aRs9e9 LVsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EnAEYpcIY00+k1hPlmrXoRht11ltOEwUcRv8uGR7V3g=; b=1CqUUpVa978Iic1kPeUKgBVw7H3/TQ6RxGafx9hQNOSC0ZVhXBGERxwXCpshW4v6KG cI4oj2wR5+enfb+HBXPLngMiWDWsjrQ/ItlYlHXHxWqbJWrCkTOlqRCE7v5xaoAB9nnW ALnXvG4LlgCNHV8xY4n+TpCej+LHcS5+ekP5oIpz+RESp5EXsGQIJKCDmUGa13XOi8ya hpPKGFoiTeHaxO10mGmI7XSe+MMFe02wx5AXpftnWrvgH8E7zN+TNZME2+Ewru3PZOic JRBlMxQg3jSd/EzFaYcTcn72QICMMpmEeI/3eSCNwb6IoF2q6k77be2sama9uHHCedh+ bLqQ== X-Gm-Message-State: AOAM533K2EqPO3+OmvZSyaD09G1kp/LBjBwl1sFUc1Oc+6ghtB6Qc6s3 iIpMtAR/o/0Anxxrr7YxseWlLB3ft8m1Lw== X-Google-Smtp-Source: ABdhPJw4xISSsCfbLC1Y85IUPMAt37rA6oYZhmN6FTCm6/4pY251imxQVqu3w+ZzGyYoMzeV4J7+/A== X-Received: by 2002:a17:902:6a88:b0:151:f21d:b03e with SMTP id n8-20020a1709026a8800b00151f21db03emr3381346plk.33.1647493564591; Wed, 16 Mar 2022 22:06:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 25/51] target/nios2: Clean up handling of tlbmisc in do_exception Date: Wed, 16 Mar 2022 22:05:12 -0700 Message-Id: <20220317050538.924111-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1030 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494585050100001 Content-Type: text/plain; charset="utf-8" The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any exception with EH=3D0, or so says Table 42 (Processor Status After Taking Exception). We currently do not set PERM or BAD at all, and only set/clear DBL for tlb miss, and do not clear DBL for any other exception. It is a bit confusing to set D in tlb_fill and the rest during do_interrupt, so move the setting of D to do_interrupt as well. To do this, split EXP_TLBD into two cases, EXCP_TLB_X and EXCP_TLB_D, which allows us to distinguish them during do_interrupt. Choose a value for EXCP_TLB_D such that when truncated it produces the correct value for exception.CAUSE. Rename EXCP_TLB[RWX] to EXCP_PERM_[RWX], to emphasize that the exception is permissions related. Rename EXCP_SUPER[AD] to EXCP_SUPERA_[DX] to emphasize that they are both "supervisor address" exceptions, data and execute. Retain the setting of tlbmisc.WE for the fast-tlb-miss path, as it is being relied upon, but remove it from the permission path. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/cpu.h | 13 +++--- target/nios2/helper.c | 102 +++++++++++++++++++++++++++++------------- 2 files changed, 77 insertions(+), 38 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index d003af5afc..c925cdd8e3 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -166,13 +166,14 @@ FIELD(CR_TLBMISC, EE, 24, 1) #define EXCP_UNALIGN 6 #define EXCP_UNALIGND 7 #define EXCP_DIV 8 -#define EXCP_SUPERA 9 +#define EXCP_SUPERA_X 9 #define EXCP_SUPERI 10 -#define EXCP_SUPERD 11 -#define EXCP_TLBD 12 -#define EXCP_TLBX 13 -#define EXCP_TLBR 14 -#define EXCP_TLBW 15 +#define EXCP_SUPERA_D 11 +#define EXCP_TLB_X 12 +#define EXCP_TLB_D (0x1000 | EXCP_TLB_X) +#define EXCP_PERM_X 13 +#define EXCP_PERM_R 14 +#define EXCP_PERM_W 15 #define EXCP_MPUI 16 #define EXCP_MPUD 17 =20 diff --git a/target/nios2/helper.c b/target/nios2/helper.c index afbafd1fdc..8b69918ba3 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -49,7 +49,8 @@ void nios2_cpu_record_sigsegv(CPUState *cs, vaddr addr, =20 #else /* !CONFIG_USER_ONLY */ =20 -static void do_exception(Nios2CPU *cpu, uint32_t exception_addr, bool is_b= reak) +static void do_exception(Nios2CPU *cpu, uint32_t exception_addr, + uint32_t tlbmisc_set, bool is_break) { CPUNios2State *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); @@ -68,6 +69,16 @@ static void do_exception(Nios2CPU *cpu, uint32_t excepti= on_addr, bool is_break) =20 if (cpu->mmu_present) { new_status |=3D CR_STATUS_EH; + + /* + * There are 4 bits that are always written. + * Explicitly clear them, to be set via the argument. + */ + env->ctrl[CR_TLBMISC] &=3D ~(CR_TLBMISC_D | + CR_TLBMISC_PERM | + CR_TLBMISC_BAD | + CR_TLBMISC_DBL); + env->ctrl[CR_TLBMISC] |=3D tlbmisc_set; } } =20 @@ -83,13 +94,14 @@ static void do_exception(Nios2CPU *cpu, uint32_t except= ion_addr, bool is_break) =20 static void do_iic_irq(Nios2CPU *cpu) { - do_exception(cpu, cpu->exception_addr, false); + do_exception(cpu, cpu->exception_addr, 0, false); } =20 void nios2_cpu_do_interrupt(CPUState *cs) { Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUNios2State *env =3D &cpu->env; + uint32_t tlbmisc_set =3D 0; =20 if (qemu_loglevel_mask(CPU_LOG_INT)) { const char *name =3D NULL; @@ -98,20 +110,21 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_IRQ: name =3D "interrupt"; break; - case EXCP_TLBD: + case EXCP_TLB_X: + case EXCP_TLB_D: if (env->ctrl[CR_STATUS] & CR_STATUS_EH) { name =3D "TLB MISS (double)"; } else { name =3D "TLB MISS (fast)"; } break; - case EXCP_TLBR: - case EXCP_TLBW: - case EXCP_TLBX: + case EXCP_PERM_R: + case EXCP_PERM_W: + case EXCP_PERM_X: name =3D "TLB PERM"; break; - case EXCP_SUPERA: - case EXCP_SUPERD: + case EXCP_SUPERA_X: + case EXCP_SUPERA_D: name =3D "SUPERVISOR (address)"; break; case EXCP_SUPERI: @@ -149,38 +162,60 @@ void nios2_cpu_do_interrupt(CPUState *cs) do_iic_irq(cpu); break; =20 - case EXCP_TLBD: - if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->ctrl[CR_TLBMISC] &=3D ~CR_TLBMISC_DBL; - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; - do_exception(cpu, cpu->fast_tlb_miss_addr, false); + case EXCP_TLB_D: + tlbmisc_set =3D CR_TLBMISC_D; + /* fall through */ + case EXCP_TLB_X: + if (env->ctrl[CR_STATUS] & CR_STATUS_EH) { + tlbmisc_set |=3D CR_TLBMISC_DBL; + /* + * Normally, we don't write to tlbmisc unless !EH, + * so do it manually for the double-tlb miss exception. + */ + env->ctrl[CR_TLBMISC] &=3D ~(CR_TLBMISC_D | + CR_TLBMISC_PERM | + CR_TLBMISC_BAD); + env->ctrl[CR_TLBMISC] |=3D tlbmisc_set; + do_exception(cpu, cpu->exception_addr, 0, false); } else { - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_DBL; - do_exception(cpu, cpu->exception_addr, false); + /* + * ??? Implicitly setting tlbmisc.WE for the fast-tlb-miss + * handler appears to be out of spec. But, the linux kernel + * handler relies on it, writing to tlbacc without first + * setting tlbmisc.WE. + */ + tlbmisc_set |=3D CR_TLBMISC_WE; + do_exception(cpu, cpu->fast_tlb_miss_addr, tlbmisc_set, false); } break; =20 - case EXCP_TLBR: - case EXCP_TLBW: - case EXCP_TLBX: - if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) =3D=3D 0) { - env->ctrl[CR_TLBMISC] |=3D CR_TLBMISC_WE; - } - do_exception(cpu, cpu->exception_addr, false); + case EXCP_PERM_R: + case EXCP_PERM_W: + tlbmisc_set =3D CR_TLBMISC_D; + /* fall through */ + case EXCP_PERM_X: + tlbmisc_set |=3D CR_TLBMISC_PERM; + do_exception(cpu, cpu->exception_addr, tlbmisc_set, false); + break; + + case EXCP_SUPERA_D: + case EXCP_UNALIGN: + tlbmisc_set =3D CR_TLBMISC_D; + /* fall through */ + case EXCP_SUPERA_X: + case EXCP_UNALIGND: + tlbmisc_set |=3D CR_TLBMISC_BAD; + do_exception(cpu, cpu->exception_addr, tlbmisc_set, false); break; =20 - case EXCP_SUPERA: case EXCP_SUPERI: - case EXCP_SUPERD: case EXCP_ILLEGAL: case EXCP_TRAP: - case EXCP_UNALIGN: - case EXCP_UNALIGND: - do_exception(cpu, cpu->exception_addr, false); + do_exception(cpu, cpu->exception_addr, 0, false); break; =20 case EXCP_BREAK: - do_exception(cpu, cpu->exception_addr, true); + do_exception(cpu, cpu->exception_addr, 0, true); break; =20 case EXCP_SEMIHOST: @@ -235,7 +270,7 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, { Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUNios2State *env =3D &cpu->env; - unsigned int excp =3D EXCP_TLBD; + unsigned int excp; target_ulong vaddr, paddr; Nios2MMULookup lu; unsigned int hit; @@ -262,7 +297,8 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, if (probe) { return false; } - cs->exception_index =3D EXCP_SUPERA; + cs->exception_index =3D (access_type =3D=3D MMU_INST_FETCH + ? EXCP_SUPERA_X : EXCP_SUPERA_D); env->ctrl[CR_BADADDR] =3D address; cpu_loop_exit_restore(cs, retaddr); } @@ -283,8 +319,10 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, } =20 /* Permission violation */ - excp =3D (access_type =3D=3D MMU_DATA_LOAD ? EXCP_TLBR : - access_type =3D=3D MMU_DATA_STORE ? EXCP_TLBW : EXCP_TLBX); + excp =3D (access_type =3D=3D MMU_DATA_LOAD ? EXCP_PERM_R : + access_type =3D=3D MMU_DATA_STORE ? EXCP_PERM_W : EXCP_PER= M_X); + } else { + excp =3D (access_type =3D=3D MMU_INST_FETCH ? EXCP_TLB_X: EXCP_TLB= _D); } =20 if (probe) { --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496379794312.7849673356053; Wed, 16 Mar 2022 22:52:59 -0700 (PDT) Received: from localhost ([::1]:53394 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUj4G-0006s0-38 for importer@patchew.org; Thu, 17 Mar 2022 01:53:00 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51030) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKv-0001MD-Rt for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:09 -0400 Received: from [2607:f8b0:4864:20::62b] (port=38574 helo=mail-pl1-x62b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKt-0002HT-NN for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:09 -0400 Received: by mail-pl1-x62b.google.com with SMTP id n18so3560395plg.5 for ; Wed, 16 Mar 2022 22:06:06 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U2yPZvOlMYKvtTPlyeLmVSFVWnXL5/rMkhu8LYRz224=; b=BkDbBNxqj1ieYNaDO6X6C8B9Gjg1caYwydPQC6cb8KiZg66zglavNTx9Gm/AvvJrqF vQ3AXW4ze8C/F9TLWr+2I9wH7Yvp1VzKVsRYH0s71iZtRXX1B+lJWLf2SRWHMoUKwbgF zxaau93oHwCXd8we4pqQALEHJPsydFcb5VHgCOrYjlg558eoVyyZmVAHa/GDy74+mqQS 9u/ne0rKNvHZxZqK1y55Re0rvhd6A1UJ/snWUfF5Wbr6JNCSuMl4H3KCKhZc22BXEHNj 5KGI4A+FcwQoXAjvJtwyH6ex+PKOEHWlM6adtHJaulyHR+dZ15zMJzgiJnAAd8RPIaAj 1spw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U2yPZvOlMYKvtTPlyeLmVSFVWnXL5/rMkhu8LYRz224=; b=jKtMupIpdTi+MGyCH3+T5czqz3uaR+969DvQIudR1lbNC9VSiZP+RzF8xFvoVnItWd 47qiVsGu8Mjlm0BaFfGfmVHdnwDxJFvYrnbUH5ivLMWNvdiuX6s36MlMUsDwJEY6bZcF Bem/CMWF1ZD8Emj5Tirobf+HZUtCliEs3a0+fMfBjpvFLHz9KiVsgPsEYQF0ovl3vImY qjKN6dVZEo9P81zeDJgGh8pwQuKZrgkYhZ1A/wt2KB7usE8SdM2PmAMK4RVATRGK86uV 7ChDQvTpaKdILFhrAdu2OkiJKGJtnLxHozalAbII0xMkcdr+sM5FAF3UfliswZbg4BK3 PH9w== X-Gm-Message-State: AOAM531aNRABpxnJqDGRKSyg890yC4TR6dLJArGBYYfvK+aZlkzNxVIy uhSIa3jMAHk32Fdb368jiGB/8nEcldfxmw== X-Google-Smtp-Source: ABdhPJwu0MYQxYIjkp+soFcKECRCy3v4MDO8oo1f95XxTG0plWj8exNHOWLYNhL1PtZELTYxwSI9OQ== X-Received: by 2002:a17:902:f686:b0:151:d866:f657 with SMTP id l6-20020a170902f68600b00151d866f657mr3009148plg.112.1647493565573; Wed, 16 Mar 2022 22:06:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 26/51] target/nios2: Prevent writes to read-only or reserved control fields Date: Wed, 16 Mar 2022 22:05:13 -0700 Message-Id: <20220317050538.924111-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496396516100001 Content-Type: text/plain; charset="utf-8" Create an array of masks which detail the writable and readonly bits for each control register. Apply them when writing to control registers, including the write to status during eret. Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 13 +++++ target/nios2/cpu.c | 100 +++++++++++++++++++++++++++++++++------ target/nios2/op_helper.c | 9 ++++ target/nios2/translate.c | 80 ++++++++++++++++++++++++------- 4 files changed, 171 insertions(+), 31 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index c925cdd8e3..410e76ccbb 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -190,6 +190,11 @@ struct CPUArchState { int error_code; }; =20 +typedef struct { + uint32_t writable; + uint32_t readonly; +} ControlRegState; + /** * Nios2CPU: * @env: #CPUNios2State @@ -213,9 +218,17 @@ struct ArchCPU { uint32_t reset_addr; uint32_t exception_addr; uint32_t fast_tlb_miss_addr; + + /* Bits within each control register which are reserved or readonly. */ + ControlRegState cr_state[NUM_CR_REGS]; }; =20 =20 +static inline bool nios2_cr_reserved(const ControlRegState *s) +{ + return (s->writable | s->readonly) =3D=3D 0; +} + void nios2_tcg_init(void); void nios2_cpu_do_interrupt(CPUState *cs); void dump_mmu(CPUNios2State *env); diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 182ddcc18f..8189937857 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -107,6 +107,64 @@ static ObjectClass *nios2_cpu_class_by_name(const char= *cpu_model) return object_class_by_name(TYPE_NIOS2_CPU); } =20 +static void realize_cr_status(CPUState *cs) +{ + Nios2CPU *cpu =3D NIOS2_CPU(cs); + + /* Begin with all fields of all registers are reserved. */ + memset(cpu->cr_state, 0, sizeof(cpu->cr_state)); + + /* + * The combination of writable and readonly is the set of all + * non-reserved fields. We apply writable as a mask to bits, + * and merge in existing readonly bits, before storing. + */ +#define WR_REG(C) cpu->cr_state[C].writable =3D -1 +#define RO_REG(C) cpu->cr_state[C].readonly =3D -1 +#define WR_FIELD(C, F) cpu->cr_state[C].writable |=3D R_##C##_##F##_MASK +#define RO_FIELD(C, F) cpu->cr_state[C].readonly |=3D R_##C##_##F##_MASK + + WR_FIELD(CR_STATUS, PIE); + WR_REG(CR_ESTATUS); + WR_REG(CR_BSTATUS); + RO_REG(CR_CPUID); + RO_REG(CR_EXCEPTION); + WR_REG(CR_BADADDR); + + /* TODO: These control registers are not present with the EIC. */ + WR_REG(CR_IENABLE); + RO_REG(CR_IPENDING); + + if (cpu->mmu_present) { + WR_FIELD(CR_STATUS, U); + WR_FIELD(CR_STATUS, EH); + + WR_FIELD(CR_PTEADDR, VPN); + WR_FIELD(CR_PTEADDR, PTBASE); + + RO_FIELD(CR_TLBMISC, D); + RO_FIELD(CR_TLBMISC, PERM); + RO_FIELD(CR_TLBMISC, BAD); + RO_FIELD(CR_TLBMISC, DBL); + WR_FIELD(CR_TLBMISC, PID); + WR_FIELD(CR_TLBMISC, WE); + WR_FIELD(CR_TLBMISC, RD); + WR_FIELD(CR_TLBMISC, WAY); + + WR_REG(CR_TLBACC); + } + + /* + * TODO: ECC (config, eccinj) and MPU (config, mpubase, mpuacc) are + * unimplemented, so their corresponding control regs remain reserved. + */ + +#undef WR_REG +#undef RO_REG +#undef WR_FIELD +#undef RO_FIELD +} + static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -119,6 +177,7 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error= **errp) return; } =20 + realize_cr_status(cs); qemu_init_vcpu(cs); cpu_reset(cs); =20 @@ -152,23 +211,26 @@ static void nios2_cpu_disas_set_info(CPUState *cpu, d= isassemble_info *info) static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, = int n) { Nios2CPU *cpu =3D NIOS2_CPU(cs); - CPUClass *cc =3D CPU_GET_CLASS(cs); CPUNios2State *env =3D &cpu->env; + uint32_t val; =20 - if (n > cc->gdb_num_core_regs) { + if (n < 32) { /* GP regs */ + val =3D env->regs[n]; + } else if (n =3D=3D 32) { /* PC */ + val =3D env->pc; + } else if (n < 49) { /* Status regs */ + unsigned cr =3D n - 33; + if (nios2_cr_reserved(&cpu->cr_state[cr])) { + val =3D 0; + } else { + val =3D env->ctrl[n - 33]; + } + } else { + /* Invalid regs */ return 0; } =20 - if (n < 32) { /* GP regs */ - return gdb_get_reg32(mem_buf, env->regs[n]); - } else if (n =3D=3D 32) { /* PC */ - return gdb_get_reg32(mem_buf, env->pc); - } else if (n < 49) { /* Status regs */ - return gdb_get_reg32(mem_buf, env->ctrl[n - 33]); - } - - /* Invalid regs */ - return 0; + return gdb_get_reg32(mem_buf, val); } =20 static int nios2_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, in= t n) @@ -176,17 +238,25 @@ static int nios2_cpu_gdb_write_register(CPUState *cs,= uint8_t *mem_buf, int n) Nios2CPU *cpu =3D NIOS2_CPU(cs); CPUClass *cc =3D CPU_GET_CLASS(cs); CPUNios2State *env =3D &cpu->env; + uint32_t val; =20 if (n > cc->gdb_num_core_regs) { return 0; } + val =3D ldl_p(mem_buf); =20 if (n < 32) { /* GP regs */ - env->regs[n] =3D ldl_p(mem_buf); + env->regs[n] =3D val; } else if (n =3D=3D 32) { /* PC */ - env->pc =3D ldl_p(mem_buf); + env->pc =3D val; } else if (n < 49) { /* Status regs */ - env->ctrl[n - 33] =3D ldl_p(mem_buf); + unsigned cr =3D n - 33; + /* ??? Maybe allow the debugger to write to readonly fields. */ + val &=3D cpu->cr_state[cr].writable; + val |=3D cpu->cr_state[cr].readonly & env->ctrl[cr]; + env->ctrl[cr] =3D val; + } else { + g_assert_not_reached(); } =20 return 4; diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index 08ed3b4598..c56fc15283 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -34,6 +34,15 @@ void helper_raise_exception(CPUNios2State *env, uint32_t= index) #ifndef CONFIG_USER_ONLY void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc) { + Nios2CPU *cpu =3D env_archcpu(env); + + /* + * Both estatus and bstatus have no constraints on write; + * do not allow reserved fields in status to be set. + */ + new_status &=3D (cpu->cr_state[CR_STATUS].writable | + cpu->cr_state[CR_STATUS].readonly); + env->ctrl[CR_STATUS] =3D new_status; env->pc =3D new_pc; cpu_loop_exit(env_cpu(env)); diff --git a/target/nios2/translate.c b/target/nios2/translate.c index cfad110186..21dc6947cf 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -102,6 +102,7 @@ typedef struct DisasContext { TCGv_i32 zero; target_ulong pc; int mem_idx; + const ControlRegState *cr_state; } DisasContext; =20 static TCGv cpu_R[NUM_GP_REGS]; @@ -471,17 +472,26 @@ static void callr(DisasContext *dc, uint32_t code, ui= nt32_t flags) /* rC <- ctlN */ static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags) { - R_TYPE(instr, code); - TCGv t1, t2; - if (!gen_check_supervisor(dc)) { return; } =20 +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + R_TYPE(instr, code); + TCGv t1, t2; + if (unlikely(instr.c =3D=3D R_ZERO)) { return; } =20 + /* Reserved registers read as zero. */ + if (nios2_cr_reserved(&dc->cr_state[instr.imm5])) { + tcg_gen_movi_tl(cpu_R[instr.c], 0); + return; + } + switch (instr.imm5) { case CR_IPENDING: /* @@ -505,6 +515,7 @@ static void rdctl(DisasContext *dc, uint32_t code, uint= 32_t flags) offsetof(CPUNios2State, ctrl[instr.imm5])); break; } +#endif } =20 /* ctlN <- rA */ @@ -519,6 +530,14 @@ static void wrctl(DisasContext *dc, uint32_t code, uin= t32_t flags) #else R_TYPE(instr, code); TCGv v =3D load_gpr(dc, instr.a); + uint32_t ofs =3D offsetof(CPUNios2State, ctrl[instr.imm5]); + uint32_t wr =3D dc->cr_state[instr.imm5].writable; + uint32_t ro =3D dc->cr_state[instr.imm5].readonly; + + /* Skip reserved or readonly registers. */ + if (wr =3D=3D 0) { + return; + } =20 switch (instr.imm5) { case CR_PTEADDR: @@ -530,17 +549,35 @@ static void wrctl(DisasContext *dc, uint32_t code, ui= nt32_t flags) case CR_TLBMISC: gen_helper_mmu_write_tlbmisc(cpu_env, v); break; - case CR_IPENDING: - /* ipending is read only, writes ignored. */ - break; case CR_STATUS: case CR_IENABLE: /* If interrupts were enabled using WRCTL, trigger them. */ dc->base.is_jmp =3D DISAS_UPDATE; /* fall through */ default: - tcg_gen_st_tl(v, cpu_env, - offsetof(CPUNios2State, ctrl[instr.imm5])); + if (wr =3D=3D -1) { + /* The register is entirely writable. */ + tcg_gen_st_tl(v, cpu_env, ofs); + } else { + /* + * The register is partially read-only or reserved: + * merge the value. + */ + TCGv n =3D tcg_temp_new(); + + tcg_gen_andi_tl(n, v, wr); + + if (ro !=3D 0) { + TCGv o =3D tcg_temp_new(); + tcg_gen_ld_tl(o, cpu_env, ofs); + tcg_gen_andi_tl(o, o, ro); + tcg_gen_or_tl(n, n, o); + tcg_temp_free(o); + } + + tcg_gen_st_tl(n, cpu_env, ofs); + tcg_temp_free(n); + } break; } #endif @@ -818,9 +855,11 @@ static void nios2_tr_init_disas_context(DisasContextBa= se *dcbase, CPUState *cs) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); CPUNios2State *env =3D cs->env_ptr; + Nios2CPU *cpu =3D env_archcpu(env); int page_insns; =20 dc->mem_idx =3D cpu_mmu_index(env, false); + dc->cr_state =3D cpu->cr_state; =20 /* Bound the number of insns to execute to those left on the page. */ page_insns =3D -(dc->base.pc_first | TARGET_PAGE_MASK) / 4; @@ -931,16 +970,25 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int = flags) } =20 #if !defined(CONFIG_USER_ONLY) - for (i =3D 0; i < NUM_CR_REGS; i++) { - qemu_fprintf(f, "%9s=3D%8.8x ", cr_regnames[i], env->ctrl[i]); - if ((i + 1) % 4 =3D=3D 0) { - qemu_fprintf(f, "\n"); + int j; + + for (i =3D j =3D 0; i < NUM_CR_REGS; i++) { + if (!nios2_cr_reserved(&cpu->cr_state[i])) { + qemu_fprintf(f, "%9s=3D%8.8x ", cr_regnames[i], env->ctrl[i]); + if (++j % 4 =3D=3D 0) { + qemu_fprintf(f, "\n"); + } } } - qemu_fprintf(f, " mmu write: VPN=3D%05X PID %02X TLBACC %08X\n", - env->mmu.pteaddr_wr & R_CR_PTEADDR_VPN_MASK, - FIELD_EX32(env->mmu.tlbmisc_wr, CR_TLBMISC, PID), - env->mmu.tlbacc_wr); + if (j % 4 !=3D 0) { + qemu_fprintf(f, "\n"); + } + if (cpu->mmu_present) { + qemu_fprintf(f, " mmu write: VPN=3D%05X PID %02X TLBACC %08X\n", + env->mmu.pteaddr_wr & R_CR_PTEADDR_VPN_MASK, + FIELD_EX32(env->mmu.tlbmisc_wr, CR_TLBMISC, PID), + env->mmu.tlbacc_wr); + } #endif qemu_fprintf(f, "\n\n"); } --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c0ckdqiNp217KypVyC9C89ZTIDY1SBdOzGHf3qGX4Fo=; b=DFbZj/n4jLXgZ+P3r44XxRgjycb041x1lFTkehE8E09OyMNH3EyxtM/BmH+wMF3El1 dogBt9fB8EDjYpAA1e10ocZxVbve610Ry1IOkcSS8sbC6zkdQaOYF97X+h/ae2KXDL3c 7KFecJQhSN5ycl6oEskD/2d6T+/r3uJFyVk53LxERRoxnbSjG3EEzy5hJc0KSnqF8TOJ A0Bug6yjQeb46d8mU2MjQbCDRJbn6S7sj4e9vvJvB8vDQkTBfPc0adrAsdBaJ+fAQvos AFVpUcP6KJn9wSJgPJAEhj1bxYk5SKHIpXQt4PBXc5p+MjefTIxC/gpS/7RwL7ihZPtJ unQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c0ckdqiNp217KypVyC9C89ZTIDY1SBdOzGHf3qGX4Fo=; b=0A6gOM/qE0VKuyQEJ6NXxMhVcL1gbSK0Hhnl7QXBwKq8sKC6oVkcEeMSWGnyspCWLs ZxFCzwuV4OT2SLBz5XrWvxgWkqLNmaqbtnV5CREd/a3XxkkXZTaOB/eErvVWVxwkdbLP nITjd0Xii9EwOXGjxFrkUaPJba3mi+WBihutMibo9PR951ZxB2gkT6I78BDmDVUqL9TY NmJu8TUsipMq7froI0RFuQLf2sP4DihSi5xj+QciVZGu7KFowCo/rQy/aIw4dhCdq9SX eESOEKwzhsqOxPfZA/pEmOEVt/91EpbWbKqUvKKOOcen0FxqHuwWHk/CcNLf2tgC2FfW itsg== X-Gm-Message-State: AOAM533PM1jOwDWtG/gVt4WNXxuvvrpwyROHam0pBPIi5m00aDNNnvL3 oahvd9rl9zj/Nvu9dQMjFWfp/gqm/7faaQ== X-Google-Smtp-Source: ABdhPJzOHD6otPM02fl2Cnth3lBM2876iEvz6la5qu2LFRzJm1ziuXaPRjg2wzcxWOtnDR+8Ds77ug== X-Received: by 2002:a17:903:2341:b0:151:d33b:90f4 with SMTP id c1-20020a170903234100b00151d33b90f4mr2863983plh.22.1647493566592; Wed, 16 Mar 2022 22:06:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 27/51] target/nios2: Implement cpuid Date: Wed, 16 Mar 2022 22:05:14 -0700 Message-Id: <20220317050538.924111-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494302721100001 Content-Type: text/plain; charset="utf-8" Copy the existing cpu_index into the space reserved for CR_CPUID. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 8189937857..2f1f5e35aa 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -168,6 +168,7 @@ static void realize_cr_status(CPUState *cs) static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); + Nios2CPU *cpu =3D NIOS2_CPU(cs); Nios2CPUClass *ncc =3D NIOS2_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 @@ -181,6 +182,9 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error= **errp) qemu_init_vcpu(cs); cpu_reset(cs); =20 + /* We have reserved storage for cpuid; might as well use it. */ + cpu->env.ctrl[CR_CPUID] =3D cs->cpu_index; + ncc->parent_realize(dev, errp); } =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494651115123.39403301180585; Wed, 16 Mar 2022 22:24:11 -0700 (PDT) Received: from localhost ([::1]:33456 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUicM-00076s-3E for importer@patchew.org; Thu, 17 Mar 2022 01:24:10 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51040) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKw-0001N2-DE for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:11 -0400 Received: from [2607:f8b0:4864:20::1033] (port=55273 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKu-0002Hn-RK for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:10 -0400 Received: by mail-pj1-x1033.google.com with SMTP id b8so3934345pjb.4 for ; Wed, 16 Mar 2022 22:06:08 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c1gnsNdU+y7p35LQc37uO6M9rdhacpyrBQDCJlMzk6g=; b=lZQiZ3t+f905hUkYZY7elr21fcBUSiKuqZpWGjHMguPQNRjRnAN5zmAOro5Q4DlJst NcQfNqulMyCP2kqKpMPoBO/qOHgTA4Puy69JpLBGX7Q5Jzk/Rh6rUqDMTgPivqGxhTNp VaiF1rpuwm2lJiZf39saCCHnsdQdbn5J0n4+h0+bAlRh70ZtgT9e+Ic/ZJgeN/00jKYu UpwChxblZ6Uj36z25RN2tAPHgUdAnyor3bvl1xRUUGdtZer0CvmIPXUbwz00Av694iN6 Q8qPC1Rz67iwPULUeeoc5TTVhXxL5uv13sHi7mKsOYvuIReztQ7jCcUwUvUv1sz0yUc8 uYlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c1gnsNdU+y7p35LQc37uO6M9rdhacpyrBQDCJlMzk6g=; b=iZS61OK/zDhGuIraKjz9J53AYfV22yrthTau8wbFge8CF5t8szRWiTQj1RncohiFiZ 4ZfHDwMcdhS9YjsUnpwxiOlT98RjX/rqk3q81sFsPyxlS3sNTOKpbw5x+IT1zP5jCGx0 KlJMZ2qtWFPmErDCz6CLZSVEZXps74QpX+465ylueIOZis75ZVjgn/JbDD3EReOPzbcP FL5AnXHz1XH1OaS3QfC3tgKMS/EZ0PiSG8UQk/YV3ituqavYazd+0usB5sbfjFQKTE0u q6EFF3SBzmvtZMfY6JfzQMwytTYQd3ElEEVC6qGkVyCpmXfPLMB7nHB+ezmoLfwfSRyW 9Ikg== X-Gm-Message-State: AOAM531jjFekkvOXSzyoleUbxvy2hjcIPTC7SUyWyGjrro93fUoPHWdd hMv4l8/xvUengj56PO21ygeA8EuzQ87hCQ== X-Google-Smtp-Source: ABdhPJzTeImC5BiGyPq062YlPfbkrWmW1qb3EgNJOxHkzgxD+UAkTjqqrmp9Hd48gyU5hzj03Lccrg== X-Received: by 2002:a17:902:8f83:b0:151:5c71:a6e6 with SMTP id z3-20020a1709028f8300b001515c71a6e6mr2885075plo.126.1647493567600; Wed, 16 Mar 2022 22:06:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 28/51] target/nios2: Implement CR_STATUS.RSIE Date: Wed, 16 Mar 2022 22:05:15 -0700 Message-Id: <20220317050538.924111-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494653280100001 Content-Type: text/plain; charset="utf-8" Without EIC, this bit is RES1. So set the bit at reset, and add it to the readonly fields of CR_STATUS. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 2f1f5e35aa..9fc4fa7725 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -59,9 +59,9 @@ static void nios2_cpu_reset(DeviceState *dev) =20 #if defined(CONFIG_USER_ONLY) /* Start in user mode with interrupts enabled. */ - env->ctrl[CR_STATUS] =3D CR_STATUS_U | CR_STATUS_PIE; + env->ctrl[CR_STATUS] =3D CR_STATUS_RSIE | CR_STATUS_U | CR_STATUS_PIE; #else - env->ctrl[CR_STATUS] =3D 0; + env->ctrl[CR_STATUS] =3D CR_STATUS_RSIE; #endif } =20 @@ -132,6 +132,7 @@ static void realize_cr_status(CPUState *cs) WR_REG(CR_BADADDR); =20 /* TODO: These control registers are not present with the EIC. */ + RO_FIELD(CR_STATUS, RSIE); WR_REG(CR_IENABLE); RO_REG(CR_IPENDING); =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494452893690.3496571774975; Wed, 16 Mar 2022 22:20:52 -0700 (PDT) Received: from localhost ([::1]:53396 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiZ9-0001Lm-S6 for importer@patchew.org; Thu, 17 Mar 2022 01:20:51 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKx-0001N5-Bt for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:11 -0400 Received: from [2607:f8b0:4864:20::435] (port=46849 helo=mail-pf1-x435.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKv-0002Hs-Rr for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:11 -0400 Received: by mail-pf1-x435.google.com with SMTP id s11so5848336pfu.13 for ; Wed, 16 Mar 2022 22:06:09 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1c7FByY8RueDOU9kVxB+CSgBA4nxhG+Xofet2o37MpM=; b=I+JIv442p5jaHL4TAGlwZlm+2mqrWXMiSqfB/uw49ArZX5+jt0OehgMMSLAnBn2LWn Op8nRfKPwXcDLfK9AKI/LuOvr7F04eZTABzEqLwyXKdCw8ElnmPT+Cro3xxcniwReuO4 Yp22YVcufsLZ6WYSIwd/Kmgu0zaUIxPAUChYynEoOGi1PdTUf4rFpFQVd4S7o+yHTted U0+6zwx8sX5+30ap5LkH1V1TQmc9PP4eM/qrUZGz/3Mb4nClCdEG1/DHuHJzUIWiP4wU wp97BC0lddj/LY9nG2VITEGG3z+77ZRH3nw/be3p744uCxj4ReiReM/bi2XRyGhvCFE2 FEMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1c7FByY8RueDOU9kVxB+CSgBA4nxhG+Xofet2o37MpM=; b=QcvyFlheV+GuX7g4PHDcYAHubI0+Z623Qv44vmTbsbb9pmtcDNI3AQ55LMLrMlZywD Htol6L79HgQ3smf1uOWHd9f5wwyPfIn25cI9ot1HT7kRWBsI2dJg8B8VoyX3bCEwaj0l ZmdEEvJ2vy5usB7YYwoL3eY+DHjnM2WncUWfMhhwZfcPNfJEYU7xYQR5df6Os+sRzYVh PhRr0ePiutRoSyYNUDpqfCaNSMrW1aqb6J+AEk/cFfR+iH1wu77+5w3owPNGcniEaWkb VqK2F3hHrOYb5WLaZVudwrQOza0WQhUmNZvA7htUt3O3nLYNiwz69cfUlO3KlRcPF99+ 9EkQ== X-Gm-Message-State: AOAM531qq1IY1a6Uc3+KvrnUEbgbC+nAQj4Mdm1RFyy0iLof/TW2hltL FDj73DSnd/UMNJeQWjcTi564t5CBKs5IYQ== X-Google-Smtp-Source: ABdhPJzCozEcK/+CHIe95Ag9QOYvOgefrxPQBoK0N2xIOtJcSb3bbKhLezkC6xT+L70CoDTtsD8Q8Q== X-Received: by 2002:a63:9307:0:b0:373:a700:beaa with SMTP id b7-20020a639307000000b00373a700beaamr2335461pge.260.1647493568617; Wed, 16 Mar 2022 22:06:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 29/51] target/nios2: Remove CPU_INTERRUPT_NMI Date: Wed, 16 Mar 2022 22:05:16 -0700 Message-Id: <20220317050538.924111-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::435 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494453914100002 Content-Type: text/plain; charset="utf-8" This interrupt bit is never set, so testing it in nios2_cpu_has_work is pointless. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 2 -- target/nios2/cpu.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 410e76ccbb..161f8efe82 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -177,8 +177,6 @@ FIELD(CR_TLBMISC, EE, 24, 1) #define EXCP_MPUI 16 #define EXCP_MPUD 17 =20 -#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 - struct CPUArchState { uint32_t regs[NUM_GP_REGS]; uint32_t ctrl[NUM_CR_REGS]; diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 9fc4fa7725..e041aa41d0 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -36,7 +36,7 @@ static void nios2_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool nios2_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI= ); + return cs->interrupt_request & CPU_INTERRUPT_HARD; } =20 static void nios2_cpu_reset(DeviceState *dev) --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494842032968.895639498991; Wed, 16 Mar 2022 22:27:22 -0700 (PDT) Received: from localhost ([::1]:38778 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUifQ-0002OO-MW for importer@patchew.org; Thu, 17 Mar 2022 01:27:20 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51084) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiKy-0001PA-Pg for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:13 -0400 Received: from [2607:f8b0:4864:20::42b] (port=46840 helo=mail-pf1-x42b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKw-0002IB-KP for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:12 -0400 Received: by mail-pf1-x42b.google.com with SMTP id s11so5848365pfu.13 for ; Wed, 16 Mar 2022 22:06:10 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wzVt0A8IleUfz6PFweqvWR5Y/gzEkWSlkCYt5DnHYks=; b=f+LHTyyADPVbozrc3hmUM6XGKu2saupoVxCpDE0QJQIz6erIyfPIwWZviR8r3eH35j OLeQLH2izuefKXQSR8Omm+xSBOXpV/d2weZraePtR45CHmk+X1Fr5EFxv/AhjZBdbDCM saHIf/DdgVq7wsCSLJecWgC69gG1hikLbmWzNMqWauRXCDHQJyKSnaPu9ibwyqraqYi2 u5Eg46VIq6kb/gAD2vHC/0RGWgLIG5yQk5/fPEGs/PSiLruwSRgFILBJlHtgYwlFyzHi ZCBZZGHI4Z1vrrGjsqjmXPCHuAXroLLD91cw8/6KUw0jiRekwkKpnzpMjoIovWI0UNvF qE3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wzVt0A8IleUfz6PFweqvWR5Y/gzEkWSlkCYt5DnHYks=; b=WUDshvYa9ugPZUectEtn65JznZNBUtYfNaloN2yYYkeBFmrIxtcWExGmGmQfjPhPvL j8StWBnzCDf9/BUvy2m7BcJkxNXznGC5tFsF12no0SEJer7NA4oIAT4aj835WJy3auIL QcCVr4UpMG10Y5N/szrvFqAWrdeEN4PCI3d10lyQW1WPm6eil+HClJj2w7m2vI5oSvyz 7ObBjggouxHn3AwGtdHsADyGR/dWiepyIVg3StuNFog9E0oJYYRb/Yz/NqvYmL4dj248 Y73hthHFNuynTPz06u4lL1slHo512Qxv8Wpv/pzF9gddKUGVffBEXSvI+qs1J22FgWW8 rhZA== X-Gm-Message-State: AOAM532MdpjuHQELYgY1UkoIKahrOWgBcFvfV0R4+2tI54324d69wzlG wib6gW/o084+8CskveUNeiHurIyzSETrcg== X-Google-Smtp-Source: ABdhPJxuM3y0r0bH6P0MRSCEpQSBMWQXNPhm5Bfus6+yE1slsJUINLsw2YHZjgExqAAssvx4LP5Liw== X-Received: by 2002:a63:af02:0:b0:375:57f0:8af1 with SMTP id w2-20020a63af02000000b0037557f08af1mr2334722pge.188.1647493569434; Wed, 16 Mar 2022 22:06:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 30/51] target/nios2: Support division error exception Date: Wed, 16 Mar 2022 22:05:17 -0700 Message-Id: <20220317050538.924111-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494843063100001 Content-Type: text/plain; charset="utf-8" Division may (optionally) raise a division exception. Since the linux kernel has been prepared for this for some time, enable it by default. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/cpu.h | 2 ++ target/nios2/helper.h | 2 ++ linux-user/nios2/cpu_loop.c | 4 +++ target/nios2/cpu.c | 1 + target/nios2/helper.c | 4 +++ target/nios2/op_helper.c | 29 ++++++++++++++++++ target/nios2/translate.c | 60 +++++++++++++------------------------ 7 files changed, 62 insertions(+), 40 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 161f8efe82..95079c186c 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -207,7 +207,9 @@ struct ArchCPU { CPUNegativeOffsetState neg; CPUNios2State env; =20 + bool diverr_present; bool mmu_present; + uint32_t pid_num_bits; uint32_t tlb_num_ways; uint32_t tlb_num_entries; diff --git a/target/nios2/helper.h b/target/nios2/helper.h index 525b6b685b..6f5ec60b0d 100644 --- a/target/nios2/helper.h +++ b/target/nios2/helper.h @@ -19,6 +19,8 @@ */ =20 DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) +DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, s32, env, s32, s32) +DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32) =20 #if !defined(CONFIG_USER_ONLY) DEF_HELPER_3(eret, noreturn, env, i32, i32) diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index fa234cb2af..ea364b7d1f 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -39,6 +39,10 @@ void cpu_loop(CPUNios2State *env) /* just indicate that signals should be handled asap */ break; =20 + case EXCP_DIV: + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); + break; + case EXCP_TRAP: switch (env->error_code) { case 0: diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index e041aa41d0..07306efc35 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -268,6 +268,7 @@ static int nios2_cpu_gdb_write_register(CPUState *cs, u= int8_t *mem_buf, int n) } =20 static Property nios2_properties[] =3D { + DEFINE_PROP_BOOL("diverr_present", Nios2CPU, diverr_present, true), DEFINE_PROP_BOOL("mmu_present", Nios2CPU, mmu_present, true), /* ALTR,pid-num-bits */ DEFINE_PROP_UINT32("mmu_pid_num_bits", Nios2CPU, pid_num_bits, 8), diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 8b69918ba3..460032adc0 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -139,6 +139,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_UNALIGND: name =3D "Misaligned (destination)"; break; + case EXCP_DIV: + name =3D "DIV error"; + break; case EXCP_TRAP: name =3D "TRAP insn"; break; @@ -210,6 +213,7 @@ void nios2_cpu_do_interrupt(CPUState *cs) =20 case EXCP_SUPERI: case EXCP_ILLEGAL: + case EXCP_DIV: case EXCP_TRAP: do_exception(cpu, cpu->exception_addr, 0, false); break; diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index c56fc15283..c93b66c9aa 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -31,6 +31,35 @@ void helper_raise_exception(CPUNios2State *env, uint32_t= index) cpu_loop_exit(cs); } =20 +static void maybe_raise_div(CPUNios2State *env, uintptr_t ra) +{ + Nios2CPU *cpu =3D env_archcpu(env); + CPUState *cs =3D env_cpu(env); + + if (cpu->diverr_present) { + cs->exception_index =3D EXCP_DIV; + cpu_loop_exit_restore(cs, ra); + } +} + +int32_t helper_divs(CPUNios2State *env, int32_t num, int32_t den) +{ + if (unlikely(den =3D=3D 0) || unlikely(den =3D=3D -1 && num =3D=3D INT= 32_MIN)) { + maybe_raise_div(env, GETPC()); + return num; /* undefined */ + } + return num / den; +} + +uint32_t helper_divu(CPUNios2State *env, uint32_t num, uint32_t den) +{ + if (unlikely(den =3D=3D 0)) { + maybe_raise_div(env, GETPC()); + return num; /* undefined */ + } + return num / den; +} + #ifndef CONFIG_USER_ONLY void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc) { diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 21dc6947cf..c8fb05a9cb 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -654,59 +654,39 @@ gen_r_shift_s(ror, rotr_tl) static void divs(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, (code)); + TCGv dest; =20 - /* Stores into R_ZERO are ignored */ - if (unlikely(instr.c =3D=3D R_ZERO)) { - return; + if (instr.c =3D=3D R_ZERO) { + dest =3D tcg_temp_new(); + } else { + dest =3D cpu_R[instr.c]; } =20 - TCGv t0 =3D tcg_temp_new(); - TCGv t1 =3D tcg_temp_new(); - TCGv t2 =3D tcg_temp_new(); - TCGv t3 =3D tcg_temp_new(); + gen_helper_divs(dest, cpu_env, + load_gpr(dc, instr.a), load_gpr(dc, instr.b)); =20 - tcg_gen_ext32s_tl(t0, load_gpr(dc, instr.a)); - tcg_gen_ext32s_tl(t1, load_gpr(dc, instr.b)); - tcg_gen_setcondi_tl(TCG_COND_EQ, t2, t0, INT_MIN); - tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); - tcg_gen_and_tl(t2, t2, t3); - tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, 0); - tcg_gen_or_tl(t2, t2, t3); - tcg_gen_movi_tl(t3, 0); - tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, t3, t2, t1); - tcg_gen_div_tl(cpu_R[instr.c], t0, t1); - tcg_gen_ext32s_tl(cpu_R[instr.c], cpu_R[instr.c]); - - tcg_temp_free(t3); - tcg_temp_free(t2); - tcg_temp_free(t1); - tcg_temp_free(t0); + if (instr.c =3D=3D R_ZERO) { + tcg_temp_free(dest); + } } =20 static void divu(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, (code)); + TCGv dest; =20 - /* Stores into R_ZERO are ignored */ - if (unlikely(instr.c =3D=3D R_ZERO)) { - return; + if (instr.c =3D=3D R_ZERO) { + dest =3D tcg_temp_new(); + } else { + dest =3D cpu_R[instr.c]; } =20 - TCGv t0 =3D tcg_temp_new(); - TCGv t1 =3D tcg_temp_new(); - TCGv t2 =3D tcg_const_tl(0); - TCGv t3 =3D tcg_const_tl(1); + gen_helper_divu(dest, cpu_env, + load_gpr(dc, instr.a), load_gpr(dc, instr.b)); =20 - tcg_gen_ext32u_tl(t0, load_gpr(dc, instr.a)); - tcg_gen_ext32u_tl(t1, load_gpr(dc, instr.b)); - tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); - tcg_gen_divu_tl(cpu_R[instr.c], t0, t1); - tcg_gen_ext32s_tl(cpu_R[instr.c], cpu_R[instr.c]); - - tcg_temp_free(t3); - tcg_temp_free(t2); - tcg_temp_free(t1); - tcg_temp_free(t0); + if (instr.c =3D=3D R_ZERO) { + tcg_temp_free(dest); + } } =20 static void trap(DisasContext *dc, uint32_t code, uint32_t flags) --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494934696429.7877298023575; Wed, 16 Mar 2022 22:28:54 -0700 (PDT) Received: from localhost ([::1]:41552 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUigv-0004NW-Nu for importer@patchew.org; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ryxSDJJrKjueVH0OEsU0bn5y9v3EMgUpEWxAYhSIfi0=; b=h0rN+dUoX4UY36TUym/+8CL6kOe6ysOPPaWRb3prqFEO0Qo9745uwLHfhSrgsywb2a sKOd0afqc8aLACaGDlrBWqMqgUyaUNGhtlQbBiiQ/DQVZcaTdxUchN9Dto+C5hA1UYYL a1aC+8n+TVutXy3DQLcWZG6aoP9h4QFy7wPAJjji9UGfomIeO5U5j7IFb0W52SfqeX2X SBon/QxWEClOTZUG68u1ij32ow4/fQTKx5q22Wfq8dEkH8BFje0e2FYwoUQ04WAaZVKf pb2BNWA4dt5GWd/8DDKKjdhcgrwezCY9MjUTuzQAsSLazdLeG/0PAWjE2c5cqUJ194Z0 s1zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ryxSDJJrKjueVH0OEsU0bn5y9v3EMgUpEWxAYhSIfi0=; b=aUOrALk0mCJ2qEvzSlp9kpPBL5eMSJtwcGkCDvQG5tpeD7DTRIQLyLzjqi+HDtQRM1 lOwvTiF5jluntOZhuWu1ZqF3qajVjXcgPO3wKL8t4QTr/7ju1jq4/B+jNW/TpShXX1L4 gLmbUyv5gYTdg8Fdyrqrmo5IFGL5XacOBTzLdz+fu6XZhzhrBj120Sme1R4xC0MYUWIB bqPOMwXej0nv1c/zM1HE811BepXsXrUVEroL1uqnQbGn94HpMv1MmwIayIfqQDW6M4TX 0I7lKXHk+pYmUjQOVnneFpyJSs1LAhQmT1H3V3zBfZBzUEdmXlo0wGKrR5jY6vbRN3na rP+A== X-Gm-Message-State: AOAM533sTeXUobTnX7cpRvlMR9lLds68ZyYNWXybuZEgapJ4UZ1nxRPX I8e+kL7JFMzncAClawQ9nqNfh+bBBYE++Q== X-Google-Smtp-Source: ABdhPJztpTWP0r5m+vo76wBLgRrb7vd8zcTAMRnAkCPZmNHl0VRbcKu8ihyL+fYwc8cpYIzXEd8kuQ== X-Received: by 2002:a63:41c5:0:b0:378:3b1e:7ac7 with SMTP id o188-20020a6341c5000000b003783b1e7ac7mr2296808pga.266.1647493570306; Wed, 16 Mar 2022 22:06:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 31/51] target/nios2: Use tcg_constant_tl Date: Wed, 16 Mar 2022 22:05:18 -0700 Message-Id: <20220317050538.924111-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::535 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494935403100003 Content-Type: text/plain; charset="utf-8" Replace current uses of tcg_const_tl, and remove the frees. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/translate.c | 30 ++++++------------------------ 1 file changed, 6 insertions(+), 24 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index c8fb05a9cb..4ad47bb966 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -99,7 +99,6 @@ =20 typedef struct DisasContext { DisasContextBase base; - TCGv_i32 zero; target_ulong pc; int mem_idx; const ControlRegState *cr_state; @@ -125,31 +124,20 @@ static uint8_t get_opxcode(uint32_t code) return instr.opx; } =20 -static TCGv load_zero(DisasContext *dc) +static TCGv load_gpr(DisasContext *dc, unsigned reg) { - if (!dc->zero) { - dc->zero =3D tcg_const_i32(0); - } - return dc->zero; -} - -static TCGv load_gpr(DisasContext *dc, uint8_t reg) -{ - if (likely(reg !=3D R_ZERO)) { - return cpu_R[reg]; - } else { - return load_zero(dc); + assert(reg < NUM_GP_REGS); + if (unlikely(reg =3D=3D R_ZERO)) { + return tcg_constant_tl(0); } + return cpu_R[reg]; } =20 static void t_gen_helper_raise_exception(DisasContext *dc, uint32_t index) { - TCGv_i32 tmp =3D tcg_const_i32(index); - tcg_gen_movi_tl(cpu_pc, dc->pc); - gen_helper_raise_exception(cpu_env, tmp); - tcg_temp_free_i32(tmp); + gen_helper_raise_exception(cpu_env, tcg_constant_i32(index)); dc->base.is_jmp =3D DISAS_NORETURN; } =20 @@ -876,14 +864,8 @@ static void nios2_tr_translate_insn(DisasContextBase *= dcbase, CPUState *cs) return; } =20 - dc->zero =3D NULL; - instr =3D &i_type_instructions[op]; instr->handler(dc, code, instr->flags); - - if (dc->zero) { - tcg_temp_free(dc->zero); - } } =20 static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647494940342752.7046213974945; Wed, 16 Mar 2022 22:29:00 -0700 (PDT) Received: from localhost ([::1]:41766 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUih1-0004Wn-16 for importer@patchew.org; Thu, 17 Mar 2022 01:28:59 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51116) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL0-0001TT-Hs for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:16 -0400 Received: from [2607:f8b0:4864:20::52a] (port=34781 helo=mail-pg1-x52a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKy-0002IV-De for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:14 -0400 Received: by mail-pg1-x52a.google.com with SMTP id t187so1805270pgb.1 for ; Wed, 16 Mar 2022 22:06:12 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rjl4pB0UOR++7sXmU/aZUMTVos+sgfIbyM2Yn1YOAwo=; b=pz+ZB/O4ottuE5nujT3PH1Erbk1t8IdittMpPb65SgmhhgHHKbQR155fNPkpVpdvGp vXQAwRHTJSHsRVOdZ4dWE09AU5/SJxJj7yqPGHaWwr74ehwoMHd/FGgVt95OaRKyQzv0 nz9R+K/WUA7BCbSmWCR6Sm+FKQ+GoytW4tVS45yepVxBi7mydFXDzh+Oc8wYMtN6L8LY pufBwsTXr9yXy/tpZ7aZ8uShdgZ+WWiO9plbQuCONzXVIAbHJ92ZsIzMA7dQCXBYs+3V 2oaoAeHgdwo7ihx6I6vDh9NkVl4Z1UeHEIDb5SlUSnEU9sdPOsX7xZPGbwKZ8DU3JMf9 iwQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rjl4pB0UOR++7sXmU/aZUMTVos+sgfIbyM2Yn1YOAwo=; b=phXmlyOeTg0gMNW4Bg5fQseG0mJXifgsWz2qQDGab9cv+vPjh5hAqwcVZZ0tiQGD/D Q/pQjmRGPTyHO2V0vgfT2k45tcPQQ7PKabpuG1h50I9h30YOQ7CKhn8cUarWKRhugB8Q +CqY8GKJkxykRSOzCZRUhntc7fMAuCyZ0Bl2N/HOjmTyuTX4Tw/PVpH0yvpfexx0xREN Yqv87KYAAwLycBy+e6BSSZ/+oQi/JUEfcvl/Gj58ukneCrnyq7NRrqUVYbSTV8EdO+BS ZNot45p8sf2Ej9tKgEW26bG3nVaofeDsDO+mXRlQXsjFO6/KVX/uVaP3JZMyNGhopzdd iikQ== X-Gm-Message-State: AOAM532VXkux3ji3HGtPM4DcvhNK+SAAlPi3hiayRUc+Ra2SAogq2yk/ UZiHjAzpCjIpuMWbWvASHlW0wXiykzbF6w== X-Google-Smtp-Source: ABdhPJwGpWQXCWqvbpsGITY3sE6+bYDh2/UA2f98TgVgDZSJz2maXSDh19Xj7fhPSB45kuN5/cSVoQ== X-Received: by 2002:a05:6a00:ad0:b0:4f7:a357:6899 with SMTP id c16-20020a056a000ad000b004f7a3576899mr2698303pfl.80.1647493571152; Wed, 16 Mar 2022 22:06:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 32/51] target/nios2: Introduce dest_gpr Date: Wed, 16 Mar 2022 22:05:19 -0700 Message-Id: <20220317050538.924111-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647494941785100001 Content-Type: text/plain; charset="utf-8" Constrain all references to cpu_R[] to load_gpr and dest_gpr. This will be required for supporting shadow register sets. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/translate.c | 153 ++++++++++++++------------------------- 1 file changed, 55 insertions(+), 98 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 4ad47bb966..d5f2e98de9 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -101,6 +101,7 @@ typedef struct DisasContext { DisasContextBase base; target_ulong pc; int mem_idx; + TCGv sink; const ControlRegState *cr_state; } DisasContext; =20 @@ -133,6 +134,18 @@ static TCGv load_gpr(DisasContext *dc, unsigned reg) return cpu_R[reg]; } =20 +static TCGv dest_gpr(DisasContext *dc, unsigned reg) +{ + assert(reg < NUM_GP_REGS); + if (unlikely(reg =3D=3D R_ZERO)) { + if (dc->sink =3D=3D NULL) { + dc->sink =3D tcg_temp_new(); + } + return dc->sink; + } + return cpu_R[reg]; +} + static void t_gen_helper_raise_exception(DisasContext *dc, uint32_t index) { @@ -191,7 +204,7 @@ static void jmpi(DisasContext *dc, uint32_t code, uint3= 2_t flags) =20 static void call(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next); + tcg_gen_movi_tl(dest_gpr(dc, R_RA), dc->base.pc_next); jmpi(dc, code, flags); } =20 @@ -204,27 +217,10 @@ static void gen_ldx(DisasContext *dc, uint32_t code, = uint32_t flags) I_TYPE(instr, code); =20 TCGv addr =3D tcg_temp_new(); - TCGv data; - - /* - * WARNING: Loads into R_ZERO are ignored, but we must generate the - * memory access itself to emulate the CPU precisely. Load - * from a protected page to R_ZERO will cause SIGSEGV on - * the Nios2 CPU. - */ - if (likely(instr.b !=3D R_ZERO)) { - data =3D cpu_R[instr.b]; - } else { - data =3D tcg_temp_new(); - } + TCGv data =3D dest_gpr(dc, instr.b); =20 tcg_gen_addi_tl(addr, load_gpr(dc, instr.a), instr.imm16.s); tcg_gen_qemu_ld_tl(data, addr, dc->mem_idx, flags); - - if (unlikely(instr.b =3D=3D R_ZERO)) { - tcg_temp_free(data); - } - tcg_temp_free(addr); } =20 @@ -254,7 +250,7 @@ static void gen_bxx(DisasContext *dc, uint32_t code, ui= nt32_t flags) I_TYPE(instr, code); =20 TCGLabel *l1 =3D gen_new_label(); - tcg_gen_brcond_tl(flags, cpu_R[instr.a], cpu_R[instr.b], l1); + tcg_gen_brcond_tl(flags, load_gpr(dc, instr.a), load_gpr(dc, instr.b),= l1); gen_goto_tb(dc, 0, dc->base.pc_next); gen_set_label(l1); gen_goto_tb(dc, 1, dc->base.pc_next + (instr.imm16.s & -4)); @@ -262,11 +258,12 @@ static void gen_bxx(DisasContext *dc, uint32_t code, = uint32_t flags) } =20 /* Comparison instructions */ -#define gen_i_cmpxx(fname, op3) = \ -static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) = \ -{ = \ - I_TYPE(instr, (code)); = \ - tcg_gen_setcondi_tl(flags, cpu_R[instr.b], cpu_R[instr.a], (op3)); = \ +#define gen_i_cmpxx(fname, op3) \ +static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ +{ \ + I_TYPE(instr, (code)); \ + tcg_gen_setcondi_tl(flags, dest_gpr(dc, instr.b), \ + load_gpr(dc, instr.a), (op3)); \ } =20 gen_i_cmpxx(gen_cmpxxsi, instr.imm16.s) @@ -277,13 +274,7 @@ gen_i_cmpxx(gen_cmpxxui, instr.imm16.u) static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) = \ { = \ I_TYPE(instr, (code)); = \ - if (unlikely(instr.b =3D=3D R_ZERO)) { /* Store to R_ZERO is ignored *= / \ - return; = \ - } else if (instr.a =3D=3D R_ZERO) { /* MOVxI optimizations */ = \ - tcg_gen_movi_tl(cpu_R[instr.b], (resimm) ? (op3) : 0); = \ - } else { = \ - tcg_gen_##insn##_tl(cpu_R[instr.b], cpu_R[instr.a], (op3)); = \ - } = \ + tcg_gen_##insn##_tl(dest_gpr(dc, instr.b), load_gpr(dc, instr.a), (op3= )); \ } =20 gen_i_math_logic(addi, addi, 1, instr.imm16.s) @@ -386,7 +377,7 @@ static void eret(DisasContext *dc, uint32_t code, uint3= 2_t flags) #else TCGv tmp =3D tcg_temp_new(); tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_ESTATUS])); - gen_helper_eret(cpu_env, tmp, cpu_R[R_EA]); + gen_helper_eret(cpu_env, tmp, load_gpr(dc, R_EA)); tcg_temp_free(tmp); =20 dc->base.is_jmp =3D DISAS_NORETURN; @@ -396,8 +387,7 @@ static void eret(DisasContext *dc, uint32_t code, uint3= 2_t flags) /* PC <- ra */ static void ret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(cpu_pc, cpu_R[R_RA]); - + tcg_gen_mov_tl(cpu_pc, load_gpr(dc, R_RA)); dc->base.is_jmp =3D DISAS_JUMP; } =20 @@ -416,7 +406,7 @@ static void bret(DisasContext *dc, uint32_t code, uint3= 2_t flags) #else TCGv tmp =3D tcg_temp_new(); tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_BSTATUS])); - gen_helper_eret(cpu_env, tmp, cpu_R[R_BA]); + gen_helper_eret(cpu_env, tmp, load_gpr(dc, R_BA)); tcg_temp_free(tmp); =20 dc->base.is_jmp =3D DISAS_NORETURN; @@ -429,7 +419,6 @@ static void jmp(DisasContext *dc, uint32_t code, uint32= _t flags) R_TYPE(instr, code); =20 tcg_gen_mov_tl(cpu_pc, load_gpr(dc, instr.a)); - dc->base.is_jmp =3D DISAS_JUMP; } =20 @@ -438,9 +427,7 @@ static void nextpc(DisasContext *dc, uint32_t code, uin= t32_t flags) { R_TYPE(instr, code); =20 - if (likely(instr.c !=3D R_ZERO)) { - tcg_gen_movi_tl(cpu_R[instr.c], dc->base.pc_next); - } + tcg_gen_movi_tl(dest_gpr(dc, instr.c), dc->base.pc_next); } =20 /* @@ -452,7 +439,7 @@ static void callr(DisasContext *dc, uint32_t code, uint= 32_t flags) R_TYPE(instr, code); =20 tcg_gen_mov_tl(cpu_pc, load_gpr(dc, instr.a)); - tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next); + tcg_gen_movi_tl(dest_gpr(dc, R_RA), dc->base.pc_next); =20 dc->base.is_jmp =3D DISAS_JUMP; } @@ -468,15 +455,11 @@ static void rdctl(DisasContext *dc, uint32_t code, ui= nt32_t flags) g_assert_not_reached(); #else R_TYPE(instr, code); - TCGv t1, t2; - - if (unlikely(instr.c =3D=3D R_ZERO)) { - return; - } + TCGv t1, t2, dest =3D dest_gpr(dc, instr.c); =20 /* Reserved registers read as zero. */ if (nios2_cr_reserved(&dc->cr_state[instr.imm5])) { - tcg_gen_movi_tl(cpu_R[instr.c], 0); + tcg_gen_movi_tl(dest, 0); return; } =20 @@ -494,12 +477,12 @@ static void rdctl(DisasContext *dc, uint32_t code, ui= nt32_t flags) t2 =3D tcg_temp_new(); tcg_gen_ld_tl(t1, cpu_env, offsetof(CPUNios2State, ctrl[CR_IPENDIN= G])); tcg_gen_ld_tl(t2, cpu_env, offsetof(CPUNios2State, ctrl[CR_IENABLE= ])); - tcg_gen_and_tl(cpu_R[instr.c], t1, t2); + tcg_gen_and_tl(dest, t1, t2); tcg_temp_free(t1); tcg_temp_free(t2); break; default: - tcg_gen_ld_tl(cpu_R[instr.c], cpu_env, + tcg_gen_ld_tl(dest, cpu_env, offsetof(CPUNios2State, ctrl[instr.imm5])); break; } @@ -575,10 +558,8 @@ static void wrctl(DisasContext *dc, uint32_t code, uin= t32_t flags) static void gen_cmpxx(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, code); - if (likely(instr.c !=3D R_ZERO)) { - tcg_gen_setcond_tl(flags, cpu_R[instr.c], cpu_R[instr.a], - cpu_R[instr.b]); - } + tcg_gen_setcond_tl(flags, dest_gpr(dc, instr.c), + load_gpr(dc, instr.a), load_gpr(dc, instr.b)); } =20 /* Math/logic instructions */ @@ -586,9 +567,7 @@ static void gen_cmpxx(DisasContext *dc, uint32_t code, = uint32_t flags) static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) = \ { = \ R_TYPE(instr, (code)); = \ - if (likely(instr.c !=3D R_ZERO)) { = \ - tcg_gen_##insn(cpu_R[instr.c], load_gpr((dc), instr.a), (op3)); = \ - } = \ + tcg_gen_##insn(dest_gpr(dc, instr.c), load_gpr(dc, instr.a), (op3)); = \ } =20 gen_r_math_logic(add, add_tl, load_gpr(dc, instr.b)) @@ -609,28 +588,24 @@ gen_r_math_logic(roli, rotli_tl, instr.imm5) static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ { \ R_TYPE(instr, (code)); \ - if (likely(instr.c !=3D R_ZERO)) { \ - TCGv t0 =3D tcg_temp_new(); \ - tcg_gen_##insn(t0, cpu_R[instr.c], \ - load_gpr(dc, instr.a), load_gpr(dc, instr.b)); \ - tcg_temp_free(t0); \ - } \ + TCGv t0 =3D tcg_temp_new(); \ + tcg_gen_##insn(t0, dest_gpr(dc, instr.c), \ + load_gpr(dc, instr.a), load_gpr(dc, instr.b)); \ + tcg_temp_free(t0); \ } =20 gen_r_mul(mulxss, muls2_tl) gen_r_mul(mulxuu, mulu2_tl) gen_r_mul(mulxsu, mulsu2_tl) =20 -#define gen_r_shift_s(fname, insn) = \ -static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) = \ -{ = \ - R_TYPE(instr, (code)); = \ - if (likely(instr.c !=3D R_ZERO)) { = \ - TCGv t0 =3D tcg_temp_new(); = \ - tcg_gen_andi_tl(t0, load_gpr((dc), instr.b), 31); = \ - tcg_gen_##insn(cpu_R[instr.c], load_gpr((dc), instr.a), t0); = \ - tcg_temp_free(t0); = \ - } = \ +#define gen_r_shift_s(fname, insn) \ +static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ +{ \ + R_TYPE(instr, (code)); \ + TCGv t0 =3D tcg_temp_new(); \ + tcg_gen_andi_tl(t0, load_gpr(dc, instr.b), 31); \ + tcg_gen_##insn(dest_gpr(dc, instr.c), load_gpr(dc, instr.a), t0); \ + tcg_temp_free(t0); \ } =20 gen_r_shift_s(sra, sar_tl) @@ -642,39 +617,15 @@ gen_r_shift_s(ror, rotr_tl) static void divs(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, (code)); - TCGv dest; - - if (instr.c =3D=3D R_ZERO) { - dest =3D tcg_temp_new(); - } else { - dest =3D cpu_R[instr.c]; - } - - gen_helper_divs(dest, cpu_env, + gen_helper_divs(dest_gpr(dc, instr.c), cpu_env, load_gpr(dc, instr.a), load_gpr(dc, instr.b)); - - if (instr.c =3D=3D R_ZERO) { - tcg_temp_free(dest); - } } =20 static void divu(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, (code)); - TCGv dest; - - if (instr.c =3D=3D R_ZERO) { - dest =3D tcg_temp_new(); - } else { - dest =3D cpu_R[instr.c]; - } - - gen_helper_divu(dest, cpu_env, + gen_helper_divu(dest_gpr(dc, instr.c), cpu_env, load_gpr(dc, instr.a), load_gpr(dc, instr.b)); - - if (instr.c =3D=3D R_ZERO) { - tcg_temp_free(dest); - } } =20 static void trap(DisasContext *dc, uint32_t code, uint32_t flags) @@ -864,8 +815,14 @@ static void nios2_tr_translate_insn(DisasContextBase *= dcbase, CPUState *cs) return; } =20 + dc->sink =3D NULL; + instr =3D &i_type_instructions[op]; instr->handler(dc, code, instr->flags); + + if (dc->sink) { + tcg_temp_free(dc->sink); + } } =20 static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495093899471.46654486025; Wed, 16 Mar 2022 22:31:33 -0700 (PDT) Received: from localhost ([::1]:49886 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUijT-0001cf-16 for importer@patchew.org; Thu, 17 Mar 2022 01:31:31 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51118) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL0-0001Tb-N2 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:16 -0400 Received: from [2607:f8b0:4864:20::1031] (port=53186 helo=mail-pj1-x1031.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiKz-0002If-AZ for qemu-devel@nongnu.org; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lGnYRwLa1Sdp2FVEXMpjEqak7lSPIuu/eJVT8HDcZLI=; b=ioBk7+ufL/oQZT/M7W3ZiNyOKznruuv2du4Kcqs7wJ2G7FMi6u8nnsjhkWyaJXJGA/ tDnam/bOZOD936wClukI92TE0Ot3MfFkZlQ5sSilTkEwcr38vXGQBQYM2kw1bnJpoZqP 0U0B/dRDuu4J9CvxH9A/lafsPH7/19JP6SpX+gGuoKRyjXVXYUzYzmrGuo6KLrer6mqx rhSXVfdX4HXz/8eF4VGE670ap2iBpIyQRjcWkH4mNWW3EkuK1gTC8gylc7W6XPtSeBQM lDcOoN/XS5WecZ9FHibmxoCcjYqUZnb+5J7pqPYO/2ZwBdoRt/0PX8exIUcSpnE2xTV+ Jvog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lGnYRwLa1Sdp2FVEXMpjEqak7lSPIuu/eJVT8HDcZLI=; b=gs7gD2FWD+UGH2FaJFeAwwqqlxGCNauMqXbZsdmTyw0v4SwKmeWQdCn/2Z4Q8euU8K /v80dc2ZlntgA/gDXStb2dZNlKzQZgypgdV7h6jPdgaCkPULEGBfzqm4COShST0AppBa PSduw0I73JTOozXI+D57INYJsfv+LOKI8jDBo/JlWcR26qU0oyE+Uu9xes5AUSYk23js QXL+M7/ljhXo+2jUplVbqIu/MCWV6aBHhhna6rV3P2XmVVh3CJOsDqSTPrkt6bxBNYgY D5+OCKIl0jVN0LRRUXqEQlCRC9tXLsXWimF0lKo3VK+a4RWlkNMN+zzWC5ytcVj6j2Ro Eibw== X-Gm-Message-State: AOAM531WXsC3s1w1pof5eFDnm0675vJ0QLSONo/aK9EQcXbfNvdMSmIz 2zl01nYDEgbPDHyG4BnCoJGb1d+YXo/4hw== X-Google-Smtp-Source: ABdhPJwb3z4IVqM6odtJue089VAkha1R6mAWqJAc4wzKnjaC2RpKX/pWWK3hhEhpgGGegVJrCEhJQg== X-Received: by 2002:a17:902:d643:b0:153:97c3:c8e5 with SMTP id y3-20020a170902d64300b0015397c3c8e5mr3301637plh.76.1647493572128; Wed, 16 Mar 2022 22:06:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 33/51] target/nios2: Drop CR_STATUS_EH from tb->flags Date: Wed, 16 Mar 2022 22:05:20 -0700 Message-Id: <20220317050538.924111-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1031 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495094958100001 Content-Type: text/plain; charset="utf-8" There's nothing about EH that affects translation, so there's no need to include it in tb->flags. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 95079c186c..d5255e9e76 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -276,7 +276,7 @@ static inline void cpu_get_tb_cpu_state(CPUNios2State *= env, target_ulong *pc, { *pc =3D env->pc; *cs_base =3D 0; - *flags =3D env->ctrl[CR_STATUS] & (CR_STATUS_EH | CR_STATUS_U); + *flags =3D env->ctrl[CR_STATUS] & CR_STATUS_U; } =20 #endif /* NIOS2_CPU_H */ --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495291250432.3529505431716; Wed, 16 Mar 2022 22:34:51 -0700 (PDT) Received: from localhost ([::1]:58024 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUimg-0007NQ-9C for importer@patchew.org; Thu, 17 Mar 2022 01:34:50 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51136) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL4-0001Uo-HN for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:19 -0400 Received: from [2607:f8b0:4864:20::42d] (port=41896 helo=mail-pf1-x42d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiL0-0002Iy-BC for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:15 -0400 Received: by mail-pf1-x42d.google.com with SMTP id p8so5885120pfh.8 for ; Wed, 16 Mar 2022 22:06:13 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5de5JN0djpoCpESfODi2INQYJ/S5KNFn/Rt19ewlkfA=; b=SGOpv71IaKANlR+ST5w88ZsiGxfarPuTYBpEO79CszyARAtHQ+aznHE/icIoGGE3VL Iro4hZrMjQDOFTRCoTempDhujfBmUVWKXcPfNOE8JkP/TXxXEt3Z0g4rQwBGxW3uBkQF +E11P64cY78YRFZGKjR2F3HS1MwAgKwvrsIJhvAnkuRCCr5HYquZKpaLasDL11Ov/aIr oEeo2IbV+g7v1+qPtj/Dw3DxKxYSzWZaGLiAJ/D66zfXiMFdEkjuSu0M9ptOZXH/z+Ad fSISgtntkQBbIoVtEKILkzm99tegdiSp7LsaWNkPXqHzLo7+BdlRgb+h2tcfg9PNRqzk K7UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5de5JN0djpoCpESfODi2INQYJ/S5KNFn/Rt19ewlkfA=; b=YUZT0yLCPXPj27WQM/2ybLDR9Fa35LWogNIgvigIryKaw69zKpUWrFcl9kiJcYWZii N63njljDsVuUiHPqJNX3a8riHzDY1Vtz1sUrpwmT5fGT6SqOXHdzaLSIQiIIu+QkTxxB VuwT6Urp0QZE30fxs7rHjI7Bv5nk/HFD6vHlh3xv8VNKUkH1Qfk7z53mcv0pwP5+Dmeq ljgw7yx/mEPee2jRI4rW72cOxrimkNeldcySPmzOwZi2HxtdLPrVCK4pC1RyM6X9uhxf 7+6CF3HaaSsI5bYMLG5rKQXL0/WAhniANH0nPN8nZZ3aL0RsWlTaiPlyKJxjr0DMYUg8 WOjQ== X-Gm-Message-State: AOAM531oIXvsYrfjo3U9hKCHdWvpqhehm62dkwycJimKy+XC7rRkwb7/ DwVn7H2dcNQeNVDvTEHd/W4yIMY15FKDUg== X-Google-Smtp-Source: ABdhPJyPyTXXVGyF7AjoogIOHUe4ip97V++EYNT8eZ82aV+hX2X3v4MxiQLKA4EIZRdMu5I0s2ATrg== X-Received: by 2002:a63:388:0:b0:37c:8577:c8f3 with SMTP id 130-20020a630388000000b0037c8577c8f3mr2369102pgd.148.1647493573102; Wed, 16 Mar 2022 22:06:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 34/51] target/nios2: Enable unaligned traps for system mode Date: Wed, 16 Mar 2022 22:05:21 -0700 Message-Id: <20220317050538.924111-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495292671100001 Content-Type: text/plain; charset="utf-8" Unaligned traps are optional, but required with an mmu. Turn them on always, because the fallback behaviour is not documented (though presumably it discards low bits). Enable alignment checks in the config file. Unwind the guest pc properly from do_unaligned_access. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/helper.c | 4 ++-- configs/targets/nios2-softmmu.mak | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 460032adc0..bf40cff779 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -264,8 +264,8 @@ void nios2_cpu_do_unaligned_access(CPUState *cs, vaddr = addr, CPUNios2State *env =3D &cpu->env; =20 env->ctrl[CR_BADADDR] =3D addr; - env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(0, CR_EXCEPTION, CAUSE, EXCP_UN= ALIGN); - helper_raise_exception(env, EXCP_UNALIGN); + cs->exception_index =3D EXCP_UNALIGN; + cpu_loop_exit_restore(cs, retaddr); } =20 bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, int size, diff --git a/configs/targets/nios2-softmmu.mak b/configs/targets/nios2-soft= mmu.mak index 9a372f0717..1e93b54cd1 100644 --- a/configs/targets/nios2-softmmu.mak +++ b/configs/targets/nios2-softmmu.mak @@ -1 +1,2 @@ TARGET_ARCH=3Dnios2 +TARGET_ALIGNED_ONLY=3Dy --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495097401304.7161632939367; Wed, 16 Mar 2022 22:31:37 -0700 (PDT) Received: from localhost ([::1]:50134 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUijY-0001nG-CX for importer@patchew.org; Thu, 17 Mar 2022 01:31:36 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51190) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL5-0001WG-Sf for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:22 -0400 Received: from [2607:f8b0:4864:20::42f] (port=40715 helo=mail-pf1-x42f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiL2-0002J7-W9 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:19 -0400 Received: by mail-pf1-x42f.google.com with SMTP id d19so5888399pfv.7 for ; Wed, 16 Mar 2022 22:06:14 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a0Y1+UOzMYE465JAg/1XZp8FHRvlzNh9RDhixInPs2c=; b=PliBKBi9/uCwVgvvd/+5zgjHzaB/qt7qKsymgp52Dgkz4IVESNJxTI+2f6JeA5Tkaf osOHn2eRILf6qL1LmQH77UJMKbZpdD/33HLByZdvmzxmfbzqU4YT8RsEOfjfHCTja7o8 +U8myTUBAlyiQziEY6p6swThFNp8K/OgiFSbiGbDATelUeGPyRlbBpKgDPf24f+Ji79L OgHUcuJZEKFRtXIl4BUjP2TgI/didMbFDFMcDzo4re5m3WWdEm2yWfdz0ULoOdwsa6tw 0/5OpjAgbS9VscqyjN0oAM8YDoCDa55CaldsNwppn+9KuU6KCdRdYqE8+CC+kaCw9922 lWXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a0Y1+UOzMYE465JAg/1XZp8FHRvlzNh9RDhixInPs2c=; b=yOTIgGOIXMV1OjmJ7o7I4xRwsVgHyv/RvG3SK6bSvo05T95xpWWaHqOhskwkevE80b vVZGJpj4p607nUOTuWy1/YfvN1Kjm+g6jiUw6o4sXsOxmFW/K/aZevdoFNf3Jzb1cSUf 1V36hlFzjH5UD9kIsRxkeFK+8ly88x/dn1mfr1jTnnnsijdtiCBUuwb2sDf5VEDtm8n2 T1aCfGLBlMqJdoLxB6f/gJ2z6Ja25pptJ0pOIEVQeepVbgFQNZAUgVS3AEkxO4ejPtgE LeEZzSTm2AeTSA3Gpm1L8oH7NzhNH3h9J3naYEYENP39rDE4kgUwsdKAeKYyrpUgLHXz hZ3Q== X-Gm-Message-State: AOAM532aOuTNjXNZU/oGR2Rh/DMyhXkd4WjBaianVqDQGsPZEx3b1+XM dFGtJKceHh6zoD04AheSGhlzpRP+79zUTQ== X-Google-Smtp-Source: ABdhPJyNawzKqURLGzo50Uw/QgeIp+fQPRuCbmztsDlAc0B0tq4c0nRjLhAwCEmK4uYEcV/lygz10w== X-Received: by 2002:a63:ea05:0:b0:381:1497:63ab with SMTP id c5-20020a63ea05000000b00381149763abmr2224150pgi.463.1647493573926; Wed, 16 Mar 2022 22:06:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 35/51] target/nios2: Create gen_jumpr Date: Wed, 16 Mar 2022 22:05:22 -0700 Message-Id: <20220317050538.924111-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495098894100001 Content-Type: text/plain; charset="utf-8" Split out a function to perform an indirect branch. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/translate.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index d5f2e98de9..f61ba92052 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -36,7 +36,6 @@ #include "semihosting/semihost.h" =20 /* is_jmp field values */ -#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ #define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically= */ =20 #define INSTRUCTION_FLG(func, flags) { (func), (flags) } @@ -168,6 +167,16 @@ static void gen_goto_tb(DisasContext *dc, int n, uint3= 2_t dest) } } =20 +static void gen_jumpr(DisasContext *dc, int regno, bool is_call) +{ + tcg_gen_mov_tl(cpu_pc, load_gpr(dc, regno)); + if (is_call) { + tcg_gen_movi_tl(dest_gpr(dc, R_RA), dc->base.pc_next); + } + tcg_gen_exit_tb(NULL, 0); + dc->base.is_jmp =3D DISAS_NORETURN; +} + static void gen_excp(DisasContext *dc, uint32_t code, uint32_t flags) { t_gen_helper_raise_exception(dc, flags); @@ -387,8 +396,7 @@ static void eret(DisasContext *dc, uint32_t code, uint3= 2_t flags) /* PC <- ra */ static void ret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(cpu_pc, load_gpr(dc, R_RA)); - dc->base.is_jmp =3D DISAS_JUMP; + gen_jumpr(dc, R_RA, false); } =20 /* @@ -418,8 +426,7 @@ static void jmp(DisasContext *dc, uint32_t code, uint32= _t flags) { R_TYPE(instr, code); =20 - tcg_gen_mov_tl(cpu_pc, load_gpr(dc, instr.a)); - dc->base.is_jmp =3D DISAS_JUMP; + gen_jumpr(dc, instr.a, false); } =20 /* rC <- PC + 4 */ @@ -438,10 +445,7 @@ static void callr(DisasContext *dc, uint32_t code, uin= t32_t flags) { R_TYPE(instr, code); =20 - tcg_gen_mov_tl(cpu_pc, load_gpr(dc, instr.a)); - tcg_gen_movi_tl(dest_gpr(dc, R_RA), dc->base.pc_next); - - dc->base.is_jmp =3D DISAS_JUMP; + gen_jumpr(dc, instr.a, true); } =20 /* rC <- ctlN */ @@ -838,11 +842,6 @@ static void nios2_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cs) tcg_gen_exit_tb(NULL, 0); break; =20 - case DISAS_JUMP: - /* The jump will already have updated the PC register */ - tcg_gen_exit_tb(NULL, 0); - break; - case DISAS_NORETURN: /* nothing more to generate */ break; --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164749547864118.771225204108532; Wed, 16 Mar 2022 22:37:58 -0700 (PDT) Received: from localhost ([::1]:38202 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiph-0004ec-GK for importer@patchew.org; Thu, 17 Mar 2022 01:37:57 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51196) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL6-0001WI-1a for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:22 -0400 Received: from [2607:f8b0:4864:20::52f] (port=33679 helo=mail-pg1-x52f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiL4-0002JN-83 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:19 -0400 Received: by mail-pg1-x52f.google.com with SMTP id 6so1808572pgg.0 for ; Wed, 16 Mar 2022 22:06:15 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PHMXz9q73HVjYaAorTgnEhJkrDs42cYUdRyVosZEm/k=; b=yjy7i+vQ8GsJrWz2poT5tUCmVCvrCQGgO/wBKjVJAObrT8qik4qGaoRHYHXiO3U1Wm rp4XtjxX+uAP3An+qV/uuUK8k9rWBy7oCwEIFZdhn9iz+p79otZvwrwsBx/TjiY3vEzh qWnQZOlP+CMCPegFky7gYKMxBXVTfZo1Nqokg9LZumtC1+19a0I6FVdjM8OfO1BjMpFl pv+VL7/6xKnmQjWRacIDTs4HPPcJWdCZeFADIcVAk8aIPdpCsLaXK0wK7mzpiYDj69tq k+1FaGAb9WkjmJuvPbpj7xaSekLh8ciokRZ+EWBTdC4xDJwrWOj6fKTGbvrll0rLUOZ6 80cQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PHMXz9q73HVjYaAorTgnEhJkrDs42cYUdRyVosZEm/k=; b=CqvSj78auT6stqlOLcAA8xde3rsgCRummsdj9P0QSg1nFbmHVASSaOdqIbn7Q2pi+D fUpd58o8pvzxG5PM08DFvcbrZi4FLglyHIWxEmU3RD/vpS1IUp9xCVejQ5TYmdRs+2vz 0p1BGlWBxnZ2QSf/LQcA0s0XxBkjp920sxxILeWveGqz4cP/cTIBDVI0/XJGRyg9lJR2 hMKZDmftcGNexhOa2z+VyZQJLUAxY4CtjhW/npaLbOhjJru1QG0o53vYTyuWWlh34v1g F2AsJ4S/uUcZk4F0+L3ydl3jdG0xasWrqP1bGYjIslNABceED5JoBsQhChLUMO/EfoNz iRLg== X-Gm-Message-State: AOAM530zwu3cs7HCowJvWoTWE0w1fh+y6jsSErzddQAnWjtzwoL8Dg9K g53QfmpL7w+GXjVFzRf7YD8nWarNSFHkuQ== X-Google-Smtp-Source: ABdhPJwlndTK4lk+vbaCeIIiRyvelQTJcUphcw4/lqu1XCaKImkdNVwqiURzpmMSTt/Xr1Si9KVyBw== X-Received: by 2002:a63:185c:0:b0:381:10:2843 with SMTP id 28-20020a63185c000000b0038100102843mr2227144pgy.433.1647493574811; Wed, 16 Mar 2022 22:06:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 36/51] target/nios2: Hoist set of is_jmp into gen_goto_tb Date: Wed, 16 Mar 2022 22:05:23 -0700 Message-Id: <20220317050538.924111-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495479377100001 Content-Type: text/plain; charset="utf-8" Rather than force all callers to set this, do it within the subroutine. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/translate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index f61ba92052..51907586ab 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -165,6 +165,7 @@ static void gen_goto_tb(DisasContext *dc, int n, uint32= _t dest) tcg_gen_movi_tl(cpu_pc, dest); tcg_gen_exit_tb(NULL, 0); } + dc->base.is_jmp =3D DISAS_NORETURN; } =20 static void gen_jumpr(DisasContext *dc, int regno, bool is_call) @@ -208,7 +209,6 @@ static void jmpi(DisasContext *dc, uint32_t code, uint3= 2_t flags) { J_TYPE(instr, code); gen_goto_tb(dc, 0, (dc->pc & 0xF0000000) | (instr.imm26 << 2)); - dc->base.is_jmp =3D DISAS_NORETURN; } =20 static void call(DisasContext *dc, uint32_t code, uint32_t flags) @@ -251,7 +251,6 @@ static void br(DisasContext *dc, uint32_t code, uint32_= t flags) I_TYPE(instr, code); =20 gen_goto_tb(dc, 0, dc->base.pc_next + (instr.imm16.s & -4)); - dc->base.is_jmp =3D DISAS_NORETURN; } =20 static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) @@ -263,7 +262,6 @@ static void gen_bxx(DisasContext *dc, uint32_t code, ui= nt32_t flags) gen_goto_tb(dc, 0, dc->base.pc_next); gen_set_label(l1); gen_goto_tb(dc, 1, dc->base.pc_next + (instr.imm16.s & -4)); - dc->base.is_jmp =3D DISAS_NORETURN; } =20 /* Comparison instructions */ --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495922373171.20774159515952; Wed, 16 Mar 2022 22:45:22 -0700 (PDT) Received: from localhost ([::1]:44448 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiwp-0000d4-KW for importer@patchew.org; Thu, 17 Mar 2022 01:45:20 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51222) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL7-0001Wa-0d for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:22 -0400 Received: from [2607:f8b0:4864:20::52f] (port=36732 helo=mail-pg1-x52f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiL4-0002JV-Kt for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:20 -0400 Received: by mail-pg1-x52f.google.com with SMTP id t14so1810367pgr.3 for ; Wed, 16 Mar 2022 22:06:16 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3YCeMoFSIPOtuFxyHW9qCFQJFQUeLRVbZvCIxi8q4XE=; b=Z3mfbAngkp6lthIsRFle+fvLdwO0oYWdwkU69JflJwXh4x2nojXHguUol/KMSZdXAA r02EnA+hVdvPi0qwl81m+Gcy7RjC7a+gN+xsTvhmxILoOA306I/c4SifBTDK/rbCDBc4 nOHGhfUfAOp6V9w29Ii/Yz0FVdH1SkGyWxd210DPbK7M0EETy08iBhNOr6QPYh8pJnC2 vX9ltqfZZI6foyPk77hrfTWcqlj84iOcah0UvFCZeo8v2KJSoikCNhm3F6lOokc1ytqX GtKbNwcy4uLu9wZNGcftxHNJEKuKOROfU9YlnDsNo0zBitDplPK3uQUU5IXCNdwdpiBx CHTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3YCeMoFSIPOtuFxyHW9qCFQJFQUeLRVbZvCIxi8q4XE=; b=YJq92nonbvhsBGcHB0JIU778NBDT/yxs6nPbPQrpVsodoe+NJI/EbUp04hGFjey6Ak N0GzgmibTWODvr9WcWxUfAZ6JZjoHu9EgWz3wcKYQScuXQyiAQZfaxmhqpygSnxubgGg Te6QeKsC+yQDwRDKRt5+x0ay0cAjkoO37dNyxLplaQCYwo0+s/sIas4xOQZzJk9E8yAt 6snJ9XowgeMD8RnBkdMC0DuvholbQyZvFSEwhuGmrPnmkCJTVw6DWGx04nan9Q4+pYbe s4Waf9pdV6eHoi5mG38wFfmCqYJ2i+UxKPf0hid/c1olKpdqJcog68iQ7VwyzrypXetV /U7Q== X-Gm-Message-State: AOAM530Q+QMiyHegUWmmlInGDkXPBMDf+Dg50pfmBt2lnKD/CcUejXm5 UzzkRht2GiLvoXB83rV5mNoy2XwKDI8wOA== X-Google-Smtp-Source: ABdhPJyGKb4RA+4xkw+3svY/J7HzzHpolGvo0USEIx1Yxm19a53bWqoc8OYzuWgIqmu3ToPH4LAB0w== X-Received: by 2002:a63:fc5a:0:b0:381:744c:9781 with SMTP id r26-20020a63fc5a000000b00381744c9781mr2321191pgk.158.1647493575764; Wed, 16 Mar 2022 22:06:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 37/51] target/nios2: Use gen_goto_tb for DISAS_TOO_MANY Date: Wed, 16 Mar 2022 22:05:24 -0700 Message-Id: <20220317050538.924111-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495924555100001 Content-Type: text/plain; charset="utf-8" Depending on the reason for ending the TB, we can chain to the next TB because the PC is constant. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/translate.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 51907586ab..6f31b6cc50 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -834,8 +834,11 @@ static void nios2_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cs) /* Indicate where the next block should start */ switch (dc->base.is_jmp) { case DISAS_TOO_MANY: + gen_goto_tb(dc, 0, dc->base.pc_next); + break; + case DISAS_UPDATE: - /* Save the current PC back into the CPU register */ + /* Save the current PC, and return to the main loop. */ tcg_gen_movi_tl(cpu_pc, dc->base.pc_next); tcg_gen_exit_tb(NULL, 0); break; --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495057716871.7391119256137; Wed, 16 Mar 2022 22:30:57 -0700 (PDT) Received: from localhost ([::1]:47082 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUiiv-0008Ao-HG for importer@patchew.org; Thu, 17 Mar 2022 01:30:57 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51228) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL7-0001Wo-4O for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:22 -0400 Received: from [2607:f8b0:4864:20::431] (port=42522 helo=mail-pf1-x431.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiL4-0002Jc-Lu for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:20 -0400 Received: by mail-pf1-x431.google.com with SMTP id g19so5880030pfc.9 for ; Wed, 16 Mar 2022 22:06:17 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QMOimEYkivNn0EOtJQFRq+oOiueoNqaCGaU7AEWQQss=; b=w8cHfXuZ59m/J9vdSO3pNTSArWiIyPaob0kRWyOu0faeophNEkWkabVs+LkY2n6Phn XLRt50mFA3Lir7Sxu/nM+Kv+PYV2LtHFoz7zO0gRzmTy9LbjY20p1xdKD/Axi2NRz3A1 MnF+SjOCCYNrH3PgrNYkQkwlL+tBslmCOSq/C+itubHlr9zi9xjyHc57uix69J5UVxkW QSYTDjCmZ5VGqWONCJ3iBneHx/Gy448CUJfqgy8frG0IpP7AKqWXCd0LgaSJ3vwRxzou B4kEy0vrv+9+7j0+vst/7YzHbXLlEDUgfNjC83cGJgoIeGMxElTUaUvvp4cIQj2C/cPa or5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QMOimEYkivNn0EOtJQFRq+oOiueoNqaCGaU7AEWQQss=; b=jOu267CptxfZR3RilyQgF8+5EfRyJpQj0bpkYnRRVtvGjKcikxJ1MxiFf1ZZxh3vFB KLI1LZFDYGSL7VK+7BIVXqtEDlw3L3NMLwE3/BDF7+4YZnz/s6k8vAQS8e+jhvqMEQD4 /fZWaQZhePx1DCrGaBIVcIsheSD33HYvflZxACo4mOZwtDJRPeDq0Rqwq7Vut/y79oS1 P1wJx3ofKae/yVYDFhPpW8hPWZd6uYzOcHqXyK8ukEA9uPd6scBsP9v2AbntDpt8c86u xTzeZnN3vKEpQ3frDBVf0AulCmN1/JV8RUQiIzZMInAG+GPaPbm/9h8qcoxYtEClXxNU gx5w== X-Gm-Message-State: AOAM533LAyJcq8G99cq96ig+v3jaeUg2NhGQoJ+0RjxKSmufr75CEkH1 BSkwBhXa2bZb91miLaNw2W9rm8wsnnlM4A== X-Google-Smtp-Source: ABdhPJy0PLP3RxWS9ML3MzhtDHERF112ZBwFE3zK/BGkJxRwfrrdD9GL2os7AQNV2Z226JraYVY8bQ== X-Received: by 2002:a63:7b49:0:b0:37f:ed43:4fc4 with SMTP id k9-20020a637b49000000b0037fed434fc4mr2266518pgn.387.1647493576538; Wed, 16 Mar 2022 22:06:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 38/51] target/nios2: Use tcg_gen_lookup_and_goto_ptr Date: Wed, 16 Mar 2022 22:05:25 -0700 Message-Id: <20220317050538.924111-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::431 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495072035100003 Content-Type: text/plain; charset="utf-8" Use lookup_and_goto_ptr for indirect chaining between TBs. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 6f31b6cc50..f7bab0908b 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -163,7 +163,7 @@ static void gen_goto_tb(DisasContext *dc, int n, uint32= _t dest) tcg_gen_exit_tb(tb, n); } else { tcg_gen_movi_tl(cpu_pc, dest); - tcg_gen_exit_tb(NULL, 0); + tcg_gen_lookup_and_goto_ptr(); } dc->base.is_jmp =3D DISAS_NORETURN; } @@ -174,7 +174,7 @@ static void gen_jumpr(DisasContext *dc, int regno, bool= is_call) if (is_call) { tcg_gen_movi_tl(dest_gpr(dc, R_RA), dc->base.pc_next); } - tcg_gen_exit_tb(NULL, 0); + tcg_gen_lookup_and_goto_ptr(); dc->base.is_jmp =3D DISAS_NORETURN; } =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495294671557.5440025166947; Wed, 16 Mar 2022 22:34:54 -0700 (PDT) Received: from localhost ([::1]:58356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUimj-0007b2-Mg for importer@patchew.org; Thu, 17 Mar 2022 01:34:53 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51230) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiL7-0001X0-Al for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:22 -0400 Received: from [2607:f8b0:4864:20::52f] (port=37416 helo=mail-pg1-x52f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiL5-0002KK-8M for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:06:21 -0400 Received: by mail-pg1-x52f.google.com with SMTP id bc27so1807560pgb.4 for ; Wed, 16 Mar 2022 22:06:18 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id h22-20020a056a001a5600b004f7c17b291asm5101357pfv.87.2022.03.16.22.06.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:06:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LTuw5YwD7AAqbGDKsXNMlzx47tIusaHPWNHDAjQuUEg=; b=NPqF158vK+0L/hv2+LevvVR3YYj+7OEu3k5hteB8CzgY6ICEz6SU2daAoCy0QmhAb3 rdw4rXrhAbQVQMDYgX20Srm12BwPpdOIdBvd5z+n14YrOZPKe+P53VF2VixxjRSGsOaM L7S1jPn+PWEg7k5v8eLpyTsjGfK6TbJ5CTV3SihNUveTgH+u0Y+tb7w/2ydQeNpnH8h+ 2fombKzE3EUBUSNj4T9oJpzF6IBLRs5h5LAspuvxzZs7HjusveHmjsZRxUJ7XaTJMCm+ Pixijz45fpl3X/Q7HRc/+9+oOHBuBxs+5oSY981M/if/1llKiJ86AH+ykqGysHaqJ99I BEzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LTuw5YwD7AAqbGDKsXNMlzx47tIusaHPWNHDAjQuUEg=; b=kX9XbB9qrsY3iDlzHy8m6/6MawP3npLxkpMTyxzmmCMY11STNxDiXx3xURcp5RxTOv qkS1DGTMtL1t/hWToDO/1eQKDOSqZLG57OfTzJgU7s8acFltF5h5hmgWtY2dLgaEp2ls /CYxhQbo1VVcOLOcPjPp6P4LUMaMQjX4svMh/lR7tcYoAsR0dppHI4tFvgM4Is5qrUcw DFcaIgyMJhoHitO60IJ8pj4WL/prHfeDdOz8EgJqM1my9Nvm2hkYssvpHaPLyGQjVE95 S78PsXKBAMIuZ2VsAuTkyuOdG1UwKQs6sFUPwOepcRUF8qI/Ps/GXeQi9I3L/djDxvNl AxaQ== X-Gm-Message-State: AOAM530NrgNbhDbCl9GTtoc2k9J/hWmiAfxbOr2rLLEMxZns0SfpvKzu Gl5NfOa2PwD2o/dXQe1KPKQmfoBnXQGbBA== X-Google-Smtp-Source: ABdhPJy7bkSabokcNJuD9r4uti2Y4acPVfv7OgIP16A+2ow7RgI9EwZ/fewqNEAqaXSw7sYsfUwB3A== X-Received: by 2002:a63:944:0:b0:374:5324:eea1 with SMTP id 65-20020a630944000000b003745324eea1mr2308753pgj.366.1647493577345; Wed, 16 Mar 2022 22:06:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 39/51] target/nios2: Implement Misaligned destination exception Date: Wed, 16 Mar 2022 22:05:26 -0700 Message-Id: <20220317050538.924111-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495296744100007 Content-Type: text/plain; charset="utf-8" Indirect branches, plus eret and bret optionally raise an exception when branching to a misaligned address. The exception is required when an mmu is enabled, but enable it always because the fallback behaviour is not documented (though presumably it discards low bits). For the purposes of the linux-user cpu loop, if EXCP_UNALIGN (misaligned data) were to arrive, it would be treated the same as EXCP_UNALIGND (misaligned destination). See the !defined(CONFIG_NIOS2_ALIGNMENT_TRAP) block in kernel/traps.c. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/nios2/cpu_loop.c | 6 ++++++ target/nios2/op_helper.c | 9 ++++++++- target/nios2/translate.c | 15 ++++++++++++++- 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index ea364b7d1f..67220128aa 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -43,6 +43,12 @@ void cpu_loop(CPUNios2State *env) force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); break; =20 + case EXCP_UNALIGN: + case EXCP_UNALIGND: + force_sig_fault(TARGET_SIGBUS, TARGET_BUS_ADRALN, + env->ctrl[CR_BADADDR]); + break; + case EXCP_TRAP: switch (env->error_code) { case 0: diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index c93b66c9aa..849867becd 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -64,6 +64,13 @@ uint32_t helper_divu(CPUNios2State *env, uint32_t num, u= int32_t den) void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc) { Nios2CPU *cpu =3D env_archcpu(env); + CPUState *cs =3D env_cpu(env); + + if (unlikely(new_pc & 3)) { + env->ctrl[CR_BADADDR] =3D new_pc; + cs->exception_index =3D EXCP_UNALIGND; + cpu_loop_exit_restore(cs, GETPC()); + } =20 /* * Both estatus and bstatus have no constraints on write; @@ -74,6 +81,6 @@ void helper_eret(CPUNios2State *env, uint32_t new_status,= uint32_t new_pc) =20 env->ctrl[CR_STATUS] =3D new_status; env->pc =3D new_pc; - cpu_loop_exit(env_cpu(env)); + cpu_loop_exit(cs); } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/nios2/translate.c b/target/nios2/translate.c index f7bab0908b..1e784c8a37 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -170,11 +170,24 @@ static void gen_goto_tb(DisasContext *dc, int n, uint= 32_t dest) =20 static void gen_jumpr(DisasContext *dc, int regno, bool is_call) { - tcg_gen_mov_tl(cpu_pc, load_gpr(dc, regno)); + TCGLabel *l =3D gen_new_label(); + TCGv test =3D tcg_temp_new(); + TCGv dest =3D load_gpr(dc, regno); + + tcg_gen_andi_tl(test, dest, 3); + tcg_gen_brcondi_tl(TCG_COND_NE, test, 0, l); + tcg_temp_free(test); + + tcg_gen_mov_tl(cpu_pc, dest); if (is_call) { tcg_gen_movi_tl(dest_gpr(dc, R_RA), dc->base.pc_next); } tcg_gen_lookup_and_goto_ptr(); + + gen_set_label(l); + tcg_gen_st_tl(dest, cpu_env, offsetof(CPUNios2State, ctrl[CR_BADADDR])= ); + t_gen_helper_raise_exception(dc, EXCP_UNALIGND); + dc->base.is_jmp =3D DISAS_NORETURN; } =20 --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164749526114962.82749128328453; Wed, 16 Mar 2022 22:34:21 -0700 (PDT) Received: from localhost ([::1]:55244 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUimC-0005Qz-4j for importer@patchew.org; Thu, 17 Mar 2022 01:34:20 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51612) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiO2-0005dN-5A for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:22 -0400 Received: from [2607:f8b0:4864:20::42d] (port=35709 helo=mail-pf1-x42d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiNz-0002dw-Un for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:21 -0400 Received: by mail-pf1-x42d.google.com with SMTP id a5so5946853pfv.2 for ; Wed, 16 Mar 2022 22:09:19 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aUIv8mPilapal9RFUm8fJDHj8xhqXeKP3105ESvQPFk=; b=MuWBDkilK6RwZrzwYnJYcvxoy0Ttys8jHxhKMwxWcc3TlNrye96rytrsInaYD41kZu 85G4FUUl7v/sCQRpES2mY/HPve2p5zBOeppRXJd6GX8/PR1BHsVVKlnIJ6g+03BS2DOq 82nKU1aaCsrFeS/cTIjbw2RIBMrdbkRYmcoe3hpZbLPLEKV0NoDXFJ0HUvYPLNqhhJ1G WZydO+DnmyuSjA/jXs4i2zHVu3fuc9klOqR7qq12I71yfWiRTMHZujm0zhGZPounIM5T /NMa4XNsWphpwKajjIF8VPi52S9pp7yFSjGRF+luLA8A/yUHx8tZ8qT+3XFFe4nZIdgS kKuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aUIv8mPilapal9RFUm8fJDHj8xhqXeKP3105ESvQPFk=; b=Ngt/8gm0CjsSDdjwV3K+UzXxpDmf8hO/fqvhoAyMfDGMZPAYVWxUwNO1UvfNXZb3vB GkU8obSpz8p6r6d8YwzjXcJrVb10HDPtg/ezS164rSdP9OlBxIjGOzy/cBk0JeUpTjzU JWk+xUuhxSr2rZI4P3tODfxvG1pmr9WBAktH0KWLvzVb9ajb9Bi3ZluL7bhBNDwiE28r wEkph+gjC7eWcPiU2Q0kd5JO/RKuUaz7FskVebVU8QcqKUa5d35BV3jTiP46FZSd/QZi AsI71Cn/v3eLcXzuJLgbdf9pEL62Szd2B9mCAcY85HwFm2usS2lF0xl61GzIxmgnGu7j pqHA== X-Gm-Message-State: AOAM533cJoVQL+4vtWQF/KzfIFzvo2kLHwVyfQRyDTyWT/JEDL3uA9PN hz9I4TdfQ6N9Y/zUKrJUUJ3lyzSZxBxQ9Q== X-Google-Smtp-Source: ABdhPJy9Mmed0eXc01SGYSuS8NtVKrvwn7FinEu26pF7VZEzhoF3Rwe9WSexegtgtUzn7kJSHSTYiA== X-Received: by 2002:a63:6843:0:b0:37c:43ce:32e8 with SMTP id d64-20020a636843000000b0037c43ce32e8mr2313511pgc.456.1647493758751; Wed, 16 Mar 2022 22:09:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 40/51] linux-user/nios2: Handle various SIGILL exceptions Date: Wed, 16 Mar 2022 22:05:27 -0700 Message-Id: <20220317050538.924111-41-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495262822100001 Content-Type: text/plain; charset="utf-8" We missed out on a couple of exception types that may legitimately be raised by a userland program. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/nios2/cpu_loop.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index 67220128aa..f223238275 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -49,6 +49,14 @@ void cpu_loop(CPUNios2State *env) env->ctrl[CR_BADADDR]); break; =20 + case EXCP_ILLEGAL: + case EXCP_UNIMPL: + force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->pc); + break; + case EXCP_SUPERI: + force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->pc); + break; + case EXCP_TRAP: switch (env->error_code) { case 0: --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495426810970.2219157486417; Wed, 16 Mar 2022 22:37:06 -0700 (PDT) Received: from localhost ([::1]:35320 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUior-0002eW-FU for importer@patchew.org; Thu, 17 Mar 2022 01:37:05 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51642) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiO3-0005h1-PI for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:23 -0400 Received: from [2607:f8b0:4864:20::62b] (port=43750 helo=mail-pl1-x62b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO1-0002e1-Se for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:23 -0400 Received: by mail-pl1-x62b.google.com with SMTP id w8so3543716pll.10 for ; Wed, 16 Mar 2022 22:09:20 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KmEvw6sHv9r/CRo1vY+We54ynBSJSjNDjmxvHPXOPAE=; b=jQC59tjg2QxqY4uaTjL6+UlDkH8h/KT6rp48pdaqZE2SCZMvnxppkr5kLK5IyGfoij xyfwOdKDet/WFmRNvZQnN8Cl7MDNmtyuj2QzOvohLLQULUBnbJRGdDkgwTiIq+Ace79n L+EhRJ/wHpUvrIpYWVb7pYSs/jpbfavQoMeg71k8rje5tkeh3wx6wM3F5j7AZymehTDE SjPP8+UdW0uO4TXjlfrP4QlRN4MX3LEHUisYuS5I7rVUQUAgMFqGiPv8wLnejBL7wdef 9IPbVi5LIX06R2kZNQRA+fjOD7XdioA/5Ey7BgGFf4mwLWzvSpEMx3PQVBrwoePu4wvJ rFeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KmEvw6sHv9r/CRo1vY+We54ynBSJSjNDjmxvHPXOPAE=; b=XLoRS+OQJbMvcD9qotzXD+GZpEITjmLQfAPV6pvtM9em4YmSh/5jnO0jYPC5HKo8o4 nh1v/gZ3dpWjPuYHMvMyIBSJUqpJT8Kctxv7N51/E/zu0p8LHGAnKLqfUhmjnq+QHuvc mAZQBA4mqHWKFINHVbmEXSLxVJUzGmOfUxwwYU7Qiv/tvVH9p95Ir+OKhENEQKU1vWH2 oabugpF7fOblYd4JIRKFjIukdkaV8jg7toIL2DiGB67nARnManGIDMh0+DrlRTqySq5p 3Y0oMLeHu1OkEvbE8ANgzpK+9gjxLAF1nzKQpTZ36GwFrJ0OJ0p3MP5FmYd5/wH4l6Zq WFJg== X-Gm-Message-State: AOAM5301HqkFyKeISvENelM3s6iUTYCjMB1gKl8y6ji8ZccbNLsyX4LY hY512GLnorwa6GIRpBVzxCzrvci6bwNHqw== X-Google-Smtp-Source: ABdhPJyTLVEicUXHRBrgbyOvdoFVpBQnJry8ADdtOfJUW/1YFmZJakdLKToEiknPUmV5P6VKlLGONQ== X-Received: by 2002:a17:903:3014:b0:153:a200:fb5 with SMTP id o20-20020a170903301400b00153a2000fb5mr2797190pla.25.1647493759773; Wed, 16 Mar 2022 22:09:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 41/51] target/nios2: Introduce shadow register sets Date: Wed, 16 Mar 2022 22:05:28 -0700 Message-Id: <20220317050538.924111-42-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495429147100001 Content-Type: text/plain; charset="utf-8" Do not actually enable them so far, but add all of the plumbing to address them. Do not enable them for user-only. Add an env->regs pointer that handles the indirection to the current register set. The naming of the pointer hides the difference between old and new, user-only and sysemu. From the notes on wrprs, which states that r0 must be initialized before use in shadow register sets, infer that R_ZERO is *not* hardwired to zero in shadow register sets. Adjust load_gpr and dest_gpr to reflect this. At the same time we might as well special case crs =3D=3D 0 to avoid the indirection through env->regs during translation as well. Given that this is intended to be the most common case for non-interrupt handlers. Init env->regs at reset. Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 24 +++++++++++++++++ target/nios2/cpu.c | 4 ++- target/nios2/translate.c | 58 +++++++++++++++++++++++++++++++--------- 3 files changed, 72 insertions(+), 14 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index d5255e9e76..e32bebe9b7 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -60,6 +60,11 @@ struct Nios2CPUClass { #define NUM_GP_REGS 32 #define NUM_CR_REGS 32 =20 +#ifndef CONFIG_USER_ONLY +/* 63 shadow register sets; index 0 is the primary register set. */ +#define NUM_REG_SETS 64 +#endif + /* General purpose register aliases */ enum { R_ZERO =3D 0, @@ -178,7 +183,13 @@ FIELD(CR_TLBMISC, EE, 24, 1) #define EXCP_MPUD 17 =20 struct CPUArchState { +#ifdef CONFIG_USER_ONLY uint32_t regs[NUM_GP_REGS]; +#else + uint32_t shadow_regs[NUM_REG_SETS][NUM_GP_REGS]; + /* Pointer into shadow_regs for the current register set. */ + uint32_t *regs; +#endif uint32_t ctrl[NUM_CR_REGS]; uint32_t pc; =20 @@ -229,6 +240,14 @@ static inline bool nios2_cr_reserved(const ControlRegS= tate *s) return (s->writable | s->readonly) =3D=3D 0; } =20 +static inline void nios2_update_crs(CPUNios2State *env) +{ +#ifndef CONFIG_USER_ONLY + unsigned crs =3D FIELD_EX32(env->ctrl[CR_STATUS], CR_STATUS, CRS); + env->regs =3D env->shadow_regs[crs]; +#endif +} + void nios2_tcg_init(void); void nios2_cpu_do_interrupt(CPUState *cs); void dump_mmu(CPUNios2State *env); @@ -271,12 +290,17 @@ typedef Nios2CPU ArchCPU; =20 #include "exec/cpu-all.h" =20 +FIELD(TBFLAGS, CRS0, 0, 1) /* Set if CRS =3D=3D 0. */ +FIELD(TBFLAGS, U, 1, 1) /* Overlaps CR_STATUS_U */ + static inline void cpu_get_tb_cpu_state(CPUNios2State *env, target_ulong *= pc, target_ulong *cs_base, uint32_t *f= lags) { *pc =3D env->pc; *cs_base =3D 0; *flags =3D env->ctrl[CR_STATUS] & CR_STATUS_U; + *flags |=3D (env->ctrl[CR_STATUS] & R_CR_STATUS_CRS_MASK + ? 0 : R_TBFLAGS_CRS0_MASK); } =20 #endif /* NIOS2_CPU_H */ diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 07306efc35..7545abc68e 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -53,15 +53,17 @@ static void nios2_cpu_reset(DeviceState *dev) =20 ncc->parent_reset(dev); =20 - memset(env->regs, 0, sizeof(env->regs)); memset(env->ctrl, 0, sizeof(env->ctrl)); env->pc =3D cpu->reset_addr; =20 #if defined(CONFIG_USER_ONLY) /* Start in user mode with interrupts enabled. */ env->ctrl[CR_STATUS] =3D CR_STATUS_RSIE | CR_STATUS_U | CR_STATUS_PIE; + memset(env->regs, 0, sizeof(env->regs)); #else env->ctrl[CR_STATUS] =3D CR_STATUS_RSIE; + nios2_update_crs(env); + memset(env->shadow_regs, 0, sizeof(env->shadow_regs)); #endif } =20 diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 1e784c8a37..525df7b023 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -100,12 +100,16 @@ typedef struct DisasContext { DisasContextBase base; target_ulong pc; int mem_idx; + bool crs0; TCGv sink; const ControlRegState *cr_state; } DisasContext; =20 static TCGv cpu_R[NUM_GP_REGS]; static TCGv cpu_pc; +#ifndef CONFIG_USER_ONLY +static TCGv cpu_crs_R[NUM_GP_REGS]; +#endif =20 typedef struct Nios2Instruction { void (*handler)(DisasContext *dc, uint32_t code, uint32_t flags); @@ -127,22 +131,36 @@ static uint8_t get_opxcode(uint32_t code) static TCGv load_gpr(DisasContext *dc, unsigned reg) { assert(reg < NUM_GP_REGS); - if (unlikely(reg =3D=3D R_ZERO)) { - return tcg_constant_tl(0); + if (dc->crs0) { + if (unlikely(reg =3D=3D R_ZERO)) { + return tcg_constant_tl(0); + } + return cpu_R[reg]; } - return cpu_R[reg]; +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + return cpu_crs_R[reg]; +#endif } =20 static TCGv dest_gpr(DisasContext *dc, unsigned reg) { assert(reg < NUM_GP_REGS); - if (unlikely(reg =3D=3D R_ZERO)) { - if (dc->sink =3D=3D NULL) { - dc->sink =3D tcg_temp_new(); + if (dc->crs0) { + if (unlikely(reg =3D=3D R_ZERO)) { + if (dc->sink =3D=3D NULL) { + dc->sink =3D tcg_temp_new(); + } + return dc->sink; } - return dc->sink; + return cpu_R[reg]; } - return cpu_R[reg]; +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + return cpu_crs_R[reg]; +#endif } =20 static void t_gen_helper_raise_exception(DisasContext *dc, @@ -198,7 +216,7 @@ static void gen_excp(DisasContext *dc, uint32_t code, u= int32_t flags) =20 static bool gen_check_supervisor(DisasContext *dc) { - if (dc->base.tb->flags & CR_STATUS_U) { + if (dc->base.tb->flags & R_TBFLAGS_U_MASK) { /* CPU in user mode, privileged instruction called, stop. */ t_gen_helper_raise_exception(dc, EXCP_SUPERI); return false; @@ -794,6 +812,7 @@ static void nios2_tr_init_disas_context(DisasContextBas= e *dcbase, CPUState *cs) =20 dc->mem_idx =3D cpu_mmu_index(env, false); dc->cr_state =3D cpu->cr_state; + dc->crs0 =3D FIELD_EX32(dc->base.tb->flags, TBFLAGS, CRS0); =20 /* Bound the number of insns to execute to those left on the page. */ page_insns =3D -(dc->base.pc_first | TARGET_PAGE_MASK) / 4; @@ -927,13 +946,26 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int = flags) =20 void nios2_tcg_init(void) { - int i; +#ifndef CONFIG_USER_ONLY + TCGv_ptr crs =3D tcg_global_mem_new_ptr(cpu_env, + offsetof(CPUNios2State, regs), "= crs"); =20 - for (i =3D 0; i < NUM_GP_REGS; i++) { - cpu_R[i] =3D tcg_global_mem_new(cpu_env, - offsetof(CPUNios2State, regs[i]), + for (int i =3D 0; i < NUM_GP_REGS; i++) { + cpu_crs_R[i] =3D tcg_global_mem_new(crs, 4 * i, gr_regnames[i]); + } + +#define offsetof_regs0(N) offsetof(CPUNios2State, shadow_regs[0][N]) +#else +#define offsetof_regs0(N) offsetof(CPUNios2State, regs[N]) +#endif + + for (int i =3D 0; i < NUM_GP_REGS; i++) { + cpu_R[i] =3D tcg_global_mem_new(cpu_env, offsetof_regs0(i), gr_regnames[i]); } + +#undef offsetof_regs0 + cpu_pc =3D tcg_global_mem_new(cpu_env, offsetof(CPUNios2State, pc), "pc"); } --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496482073436.14112325745793; Wed, 16 Mar 2022 22:54:42 -0700 (PDT) Received: from localhost ([::1]:57706 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUj5s-0001Jh-TG for importer@patchew.org; Thu, 17 Mar 2022 01:54:40 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51648) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiO3-0005hf-VW for qemu-devel@nongnu.org; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zL4ULUAZFLG4NiZ2Xxof4c8+aeBvBkKbH83Le8PjFIE=; b=c1+htk0YsKxHZrSHxZGbDGX9oChbe7ZonN2vxxSxb1CabRnAzmo8voK7XKBzhJDUnh Zq7xn3fvdWnkCFCXg2LFaiAC6y1ew6OTJvQflZGif4TjKUi7o6ky+Bfei46JJMMYEH50 lQWqIj1DL6wIOCeqRGY/FvmeRAQTmQURbuRgsf3yAe7N76XNc0nZaE74V76QOmPMGsP2 zK0z/lqMUV3P7nuplWP5rrmpPj/0SkIXDV6BXWY9jXaduHc5a6s0HXQZ37m5AIND10oa Os8ogzJ8+Fk2yu7wCTh0/MkgygSEAeOkvBmkd7mzLxrImKKX9IjXyI/b6F6yakUewYIw V4mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zL4ULUAZFLG4NiZ2Xxof4c8+aeBvBkKbH83Le8PjFIE=; b=IMsF9R4gkOqK4w+ZmNswBqQ+Y6wDedBVCZJw9bodY9A8qrYHaqHWd8YOB3ZVwtHpVK pJF5vceIUigDuiJ7JPbv1PUyZuwJZjtZEwMPTTYJAmFxaPPptzf+imMzbCPhC/Hp3F3K EsrK1L9rLZi4nhyVUv0QTmMqbyv05KV5EFqRbgaYNDGEHPf4Jawghly9VOlrAnAK5md+ VLxsDPXvQBzzx1l0nTSCRNbAqZPrJIGw0lx+Lr3FUQDn488YNxvqp/mlTHEoPvWfihfL yILUKhe6ZIO9qSTH/t5gadoS89zUidjNMicaeTc1bsWcAKauOFefP9BZF5byKg1F45HD 826g== X-Gm-Message-State: AOAM530/wjsMOsdGcJyLtGoUG4LGNuF09HWHieYIjvyjC3EnHQdBQ2pY MsWG7AmrBANqqX+uOKHuHOAwJXgYyiKA9g== X-Google-Smtp-Source: ABdhPJwjn1970aOtEXAiJOXi7eh61K2/VHCUnukAd1WlYuC85GtoM2O0zT7SQebeRbJZAhMJaAk7NA== X-Received: by 2002:a17:90b:3ece:b0:1bf:841e:930b with SMTP id rm14-20020a17090b3ece00b001bf841e930bmr13647337pjb.212.1647493760871; Wed, 16 Mar 2022 22:09:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 42/51] target/nios2: Implement rdprs, wrprs Date: Wed, 16 Mar 2022 22:05:29 -0700 Message-Id: <20220317050538.924111-43-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496483113100001 Content-Type: text/plain; charset="utf-8" Implement these out of line, so that tcg global temps (aka the architectural registers) are synced back to tcg storage as required. This makes sure that we get the proper results when status.PRS =3D=3D status.CRS. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/cpu.h | 1 + target/nios2/helper.h | 2 ++ target/nios2/op_helper.c | 12 ++++++++++ target/nios2/translate.c | 47 ++++++++++++++++++++++++++++++++++++++-- 4 files changed, 60 insertions(+), 2 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index e32bebe9b7..26d4dcfe12 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -220,6 +220,7 @@ struct ArchCPU { =20 bool diverr_present; bool mmu_present; + bool eic_present; =20 uint32_t pid_num_bits; uint32_t tlb_num_ways; diff --git a/target/nios2/helper.h b/target/nios2/helper.h index 6f5ec60b0d..1648d76ade 100644 --- a/target/nios2/helper.h +++ b/target/nios2/helper.h @@ -24,6 +24,8 @@ DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i= 32) =20 #if !defined(CONFIG_USER_ONLY) DEF_HELPER_3(eret, noreturn, env, i32, i32) +DEF_HELPER_FLAGS_2(rdprs, TCG_CALL_NO_WG, i32, env, i32) +DEF_HELPER_3(wrprs, void, env, i32, i32) DEF_HELPER_2(mmu_write_tlbacc, void, env, i32) DEF_HELPER_2(mmu_write_tlbmisc, void, env, i32) DEF_HELPER_2(mmu_write_pteaddr, void, env, i32) diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index 849867becd..e5e70268da 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -83,4 +83,16 @@ void helper_eret(CPUNios2State *env, uint32_t new_status= , uint32_t new_pc) env->pc =3D new_pc; cpu_loop_exit(cs); } + +uint32_t helper_rdprs(CPUNios2State *env, uint32_t regno) +{ + unsigned prs =3D FIELD_EX32(env->ctrl[CR_STATUS], CR_STATUS, PRS); + return env->shadow_regs[prs][regno]; +} + +void helper_wrprs(CPUNios2State *env, uint32_t regno, uint32_t val) +{ + unsigned prs =3D FIELD_EX32(env->ctrl[CR_STATUS], CR_STATUS, PRS); + env->shadow_regs[prs][regno] =3D val; +} #endif /* !CONFIG_USER_ONLY */ diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 525df7b023..2b2f528e00 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -103,6 +103,7 @@ typedef struct DisasContext { bool crs0; TCGv sink; const ControlRegState *cr_state; + bool eic_present; } DisasContext; =20 static TCGv cpu_R[NUM_GP_REGS]; @@ -326,6 +327,27 @@ gen_i_math_logic(andhi, andi, 0, instr.imm16.u << 16) gen_i_math_logic(orhi , ori, 1, instr.imm16.u << 16) gen_i_math_logic(xorhi, xori, 1, instr.imm16.u << 16) =20 +/* rB <- prs.rA + sigma(IMM16) */ +static void rdprs(DisasContext *dc, uint32_t code, uint32_t flags) +{ + if (!dc->eic_present) { + t_gen_helper_raise_exception(dc, EXCP_ILLEGAL); + return; + } + if (!gen_check_supervisor(dc)) { + return; + } + +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + I_TYPE(instr, code); + TCGv dest =3D dest_gpr(dc, instr.b); + gen_helper_rdprs(dest, cpu_env, tcg_constant_i32(instr.a)); + tcg_gen_addi_tl(dest, dest, instr.imm16.s); +#endif +} + /* Prototype only, defined below */ static void handle_r_type_instr(DisasContext *dc, uint32_t code, uint32_t flags); @@ -387,7 +409,7 @@ static const Nios2Instruction i_type_instructions[] =3D= { INSTRUCTION_FLG(gen_stx, MO_SL), /* stwio */ INSTRUCTION_FLG(gen_bxx, TCG_COND_LTU), /* bltu */ INSTRUCTION_FLG(gen_ldx, MO_UL), /* ldwio */ - INSTRUCTION_UNIMPLEMENTED(), /* rdprs */ + INSTRUCTION(rdprs), /* rdprs */ INSTRUCTION_ILLEGAL(), INSTRUCTION_FLG(handle_r_type_instr, 0), /* R-Type */ INSTRUCTION_NOP(), /* flushd */ @@ -587,6 +609,26 @@ static void wrctl(DisasContext *dc, uint32_t code, uin= t32_t flags) #endif } =20 +/* prs.rC <- rA */ +static void wrprs(DisasContext *dc, uint32_t code, uint32_t flags) +{ + if (!dc->eic_present) { + t_gen_helper_raise_exception(dc, EXCP_ILLEGAL); + return; + } + if (!gen_check_supervisor(dc)) { + return; + } + +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + R_TYPE(instr, code); + gen_helper_wrprs(cpu_env, tcg_constant_i32(instr.c), + load_gpr(dc, instr.a)); +#endif +} + /* Comparison instructions */ static void gen_cmpxx(DisasContext *dc, uint32_t code, uint32_t flags) { @@ -711,7 +753,7 @@ static const Nios2Instruction r_type_instructions[] =3D= { INSTRUCTION_ILLEGAL(), INSTRUCTION(slli), /* slli */ INSTRUCTION(sll), /* sll */ - INSTRUCTION_UNIMPLEMENTED(), /* wrprs */ + INSTRUCTION(wrprs), /* wrprs */ INSTRUCTION_ILLEGAL(), INSTRUCTION(or), /* or */ INSTRUCTION(mulxsu), /* mulxsu */ @@ -812,6 +854,7 @@ static void nios2_tr_init_disas_context(DisasContextBas= e *dcbase, CPUState *cs) =20 dc->mem_idx =3D cpu_mmu_index(env, false); dc->cr_state =3D cpu->cr_state; + dc->eic_present =3D cpu->eic_present; dc->crs0 =3D FIELD_EX32(dc->base.tb->flags, TBFLAGS, CRS0); =20 /* Bound the number of insns to execute to those left on the page. */ --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MVyC4ASoKbDoWqWtQ6it33/tXOmFXiabY9tyAWzkgHg=; b=rICzg+fm/Vsn8gQXcUwkFgAvnX0pemgFd4bl0tsVeIYj0KuYqOOrgMxBpsu0YQUzv1 bFO4CNj/uaf8DGLatneK7sWyUKs8tQxQoGqqmOKIrl1zg8SWQa+0BMouYVh5HFNLl2Xa TlnKbeEHR2Rc7MCCs/17sJxEt9M7Jluch+K9ZlKchRGXQHgxR2kxQ0jnAFh7nZhlAkk/ IvFywEBoXPa3iQkwLlCydeWHqU8IRg2tmtz4AAIm+lLt/rC+W0Wd2r3Ei6OongjxdoK2 nuW3PntcfQz7wkpYzIm7iuZ/NedpFCr3k+ftH8T4Pzh9xeiZhA35FwPSop9b9323sAcW TLxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MVyC4ASoKbDoWqWtQ6it33/tXOmFXiabY9tyAWzkgHg=; b=LYmpGWNwKcOt3WL9DsKTi2UAESnDys2VREIu9WRZpP5Sw/no/OpovGgp9U7HJtlgNh AddnOyJ/BTrzr0kb2VspHoRijygsvHnsxlQ1khf9oqp7KwUCaWkmxxTblJJEVYhjwVUi fJ/Z5+0w9UeC7UzMxGF8SQpTyBSP6Xyum8cOecXQvHVqDKBjpj7jGiR+n9Qx0U3shs2C 9J/ZeCacBz/9L3m0ifUcnlhNRL5xJUpEUpcErfwU3s3mzGZyNVslN6Pyvnxq22pV6q2N 0Mdmr0ArPFlNFFggz5znlbGZBcOdXsF4anj+WgCVWlP9UYojEKtKCgwev+emgxpV3Nqq 0x0w== X-Gm-Message-State: AOAM530k+eKCziY0iJ1D8/AheObuaIx02omP8RIJLV4oULGpAZYkD20Z SV5FWhaEjpCDZN8cKjkkizKNpD8JMXcmXg== X-Google-Smtp-Source: ABdhPJwbTIwji3SDTI1NlRbaVA7hhb0b00PqzBoLHWlJUTdQc9Cofj0OSX11yAHyPsDktemMPslgPg== X-Received: by 2002:a17:90b:314e:b0:1bf:38a0:8e6b with SMTP id ip14-20020a17090b314e00b001bf38a08e6bmr14037319pjb.22.1647493761877; Wed, 16 Mar 2022 22:09:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 43/51] target/nios2: Update helper_eret for shadow registers Date: Wed, 16 Mar 2022 22:05:30 -0700 Message-Id: <20220317050538.924111-44-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::636 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496607215100001 Content-Type: text/plain; charset="utf-8" When CRS =3D 0, we restore from estatus; otherwise from sstatus. Update for the new CRS. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/nios2/cpu.h | 1 + target/nios2/op_helper.c | 3 ++- target/nios2/translate.c | 13 ++++++++----- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 26d4dcfe12..62a73c7b32 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -82,6 +82,7 @@ enum { R_FP =3D 28, R_EA =3D 29, R_BA =3D 30, + R_SSTATUS =3D 30, R_RA =3D 31, }; =20 diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index e5e70268da..2eac957f68 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -73,7 +73,7 @@ void helper_eret(CPUNios2State *env, uint32_t new_status,= uint32_t new_pc) } =20 /* - * Both estatus and bstatus have no constraints on write; + * None of estatus, bstatus, or sstatus have constraints on write; * do not allow reserved fields in status to be set. */ new_status &=3D (cpu->cr_state[CR_STATUS].writable | @@ -81,6 +81,7 @@ void helper_eret(CPUNios2State *env, uint32_t new_status,= uint32_t new_pc) =20 env->ctrl[CR_STATUS] =3D new_status; env->pc =3D new_pc; + nios2_update_crs(env); cpu_loop_exit(cs); } =20 diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 2b2f528e00..7a25c864e2 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -435,11 +435,14 @@ static void eret(DisasContext *dc, uint32_t code, uin= t32_t flags) #ifdef CONFIG_USER_ONLY g_assert_not_reached(); #else - TCGv tmp =3D tcg_temp_new(); - tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_ESTATUS])); - gen_helper_eret(cpu_env, tmp, load_gpr(dc, R_EA)); - tcg_temp_free(tmp); - + if (dc->crs0) { + TCGv tmp =3D tcg_temp_new(); + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_ESTATU= S])); + gen_helper_eret(cpu_env, tmp, load_gpr(dc, R_EA)); + tcg_temp_free(tmp); + } else { + gen_helper_eret(cpu_env, load_gpr(dc, R_SSTATUS), load_gpr(dc, R_E= A)); + } dc->base.is_jmp =3D DISAS_NORETURN; #endif } --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496277793500.449628282704; Wed, 16 Mar 2022 22:51:17 -0700 (PDT) Received: from localhost ([::1]:48910 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUj2a-0003oo-2t for importer@patchew.org; Thu, 17 Mar 2022 01:51:16 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51698) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiO8-0005mA-SM for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:28 -0400 Received: from [2607:f8b0:4864:20::432] (port=46034 helo=mail-pf1-x432.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO4-0002eO-4j for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:25 -0400 Received: by mail-pf1-x432.google.com with SMTP id s8so5859413pfk.12 for ; Wed, 16 Mar 2022 22:09:23 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5oLnRnm4EXgcmf7Z/uhBKSqjfHRtAYxv5izl3E4FWUM=; b=dzxVhNzQuTwBVRSaNX8Vx52vaDnLvVw4U8h02+K8xCel7Hq/CjbZ9tDDkuqDPb1TeY 8Vj7Xt7TXcExO5HZ+zenS9yFlYzozFs1GwLcxUooO9LgNcDOd07W3FJIaiYxypUSJQ6T eteIJAvJbqeN5rFGYSHKOK9IEPndwVrpckFUbfr7i8bLYp6EgNHvum3KPJWQmvZEZGbo +mJovmc7WrfGnxD/9ioUoZLDYRvruQjh3jCje8bFK0XoME4JuZZu7ueubR1zGSayMEHi toRNaDH7Obnpl3ZQ7LErWN2YNpWV9YnYhFEqsubpNLwo1JTNMN1MEamQC1+DU/1CZg9V 9vVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5oLnRnm4EXgcmf7Z/uhBKSqjfHRtAYxv5izl3E4FWUM=; b=1AItgMm8c1+BpsS68cFMOqunZ2r4nJxqYJq9DSxG+aYumTjqTe/yuEt+sDcDAJHsIW 4YfVjzg7YiS9x1Ge4JZUiPq/qhgQTpvXyEL8fOtGFtik/WS7vtRWijJvO8stlm/09H9S FqnTM54lsP2fDZlqdd/Sv7d2roUc+Ie+m7aSx5ZN45bpHNAi24NmGcZ7djyXmxjJdDPF wp2c7nS5LiLXxe3i/vhSwfYFOK45sYuMzTtoapRI+riDXaWOftNvunF5b/dOw/+tQ3qi zFTHgXEcKXYKle1HoRhy/sfUMaI/pbExCiX9MMMSIZjik5wk7Wm11x3jChYuZwEUvQzi oM9A== X-Gm-Message-State: AOAM532eIQMHuWnnwZ+Oym9ZFqb+u7Z/Mtx9Pxi+8I4OIdruH65eOqHy YwiAVj10tUY7sFVcRwL7B8ClFR54hRK2hw== X-Google-Smtp-Source: ABdhPJzCTRb/9LVmqRe00k0LHF/FZgXU4M1zrXmg3kDEJdLwd1zHdaD+mxzHStXYcfKnfq4QkF/e4g== X-Received: by 2002:a63:6a49:0:b0:37c:7a6e:e7a6 with SMTP id f70-20020a636a49000000b0037c7a6ee7a6mr2258804pgc.545.1647493762762; Wed, 16 Mar 2022 22:09:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 44/51] target/nios2: Implement EIC interrupt processing Date: Wed, 16 Mar 2022 22:05:31 -0700 Message-Id: <20220317050538.924111-45-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::432 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496280511100003 Content-Type: text/plain; charset="utf-8" This is the cpu side of the operation. Register one irq line, called EIC. Split out the rather different processing to a separate function. Delay initialization of gpio irqs until realize. We need to provide a window after init in which the board can set eic_present. Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 8 ++++ target/nios2/cpu.c | 92 +++++++++++++++++++++++++++++++++---------- target/nios2/helper.c | 47 ++++++++++++++++++++-- 3 files changed, 123 insertions(+), 24 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 62a73c7b32..c9356416e2 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -114,6 +114,7 @@ FIELD(CR_STATUS, CRS, 10, 6) FIELD(CR_STATUS, PRS, 16, 6) FIELD(CR_STATUS, NMI, 22, 1) FIELD(CR_STATUS, RSIE, 23, 1) +FIELD(CR_STATUS, SRS, 31, 1) /* only in sstatus */ =20 #define CR_STATUS_PIE R_CR_STATUS_PIE_MASK #define CR_STATUS_U R_CR_STATUS_U_MASK @@ -121,6 +122,7 @@ FIELD(CR_STATUS, RSIE, 23, 1) #define CR_STATUS_IH R_CR_STATUS_IH_MASK #define CR_STATUS_NMI R_CR_STATUS_NMI_MASK #define CR_STATUS_RSIE R_CR_STATUS_RSIE_MASK +#define CR_STATUS_SRS R_CR_STATUS_SRS_MASK =20 FIELD(CR_EXCEPTION, CAUSE, 2, 5) FIELD(CR_EXCEPTION, ECCFTL, 31, 1) @@ -234,6 +236,12 @@ struct ArchCPU { =20 /* Bits within each control register which are reserved or readonly. */ ControlRegState cr_state[NUM_CR_REGS]; + + /* External Interrupt Controller Interface */ + uint32_t rha; /* Requested handler address */ + uint32_t ril; /* Requested interrupt level */ + uint32_t rrs; /* Requested register set */ + bool rnmi; /* Requested nonmaskable interrupt */ }; =20 =20 diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 7545abc68e..ed1e842269 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -68,7 +68,19 @@ static void nios2_cpu_reset(DeviceState *dev) } =20 #ifndef CONFIG_USER_ONLY -static void nios2_cpu_set_irq(void *opaque, int irq, int level) +static void eic_set_irq(void *opaque, int irq, int level) +{ + Nios2CPU *cpu =3D opaque; + CPUState *cs =3D CPU(cpu); + + if (level) { + cpu_interrupt(cs, CPU_INTERRUPT_HARD); + } else { + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); + } +} + +static void iic_set_irq(void *opaque, int irq, int level) { Nios2CPU *cpu =3D opaque; CPUNios2State *env =3D &cpu->env; @@ -92,15 +104,6 @@ static void nios2_cpu_initfn(Object *obj) =20 #if !defined(CONFIG_USER_ONLY) mmu_init(&cpu->env); - - /* - * These interrupt lines model the IIC (internal interrupt - * controller). QEMU does not currently support the EIC - * (external interrupt controller) -- if we did it would be - * a separate device in hw/intc with a custom interface to - * the CPU, and boards using it would not wire up these IRQ lines. - */ - qdev_init_gpio_in_named(DEVICE(cpu), nios2_cpu_set_irq, "IRQ", 32); #endif } =20 @@ -133,10 +136,18 @@ static void realize_cr_status(CPUState *cs) RO_REG(CR_EXCEPTION); WR_REG(CR_BADADDR); =20 - /* TODO: These control registers are not present with the EIC. */ - RO_FIELD(CR_STATUS, RSIE); - WR_REG(CR_IENABLE); - RO_REG(CR_IPENDING); + if (cpu->eic_present) { + WR_FIELD(CR_STATUS, RSIE); + RO_FIELD(CR_STATUS, NMI); + WR_FIELD(CR_STATUS, PRS); + RO_FIELD(CR_STATUS, CRS); + WR_FIELD(CR_STATUS, IL); + WR_FIELD(CR_STATUS, IH); + } else { + RO_FIELD(CR_STATUS, RSIE); + WR_REG(CR_IENABLE); + RO_REG(CR_IPENDING); + } =20 if (cpu->mmu_present) { WR_FIELD(CR_STATUS, U); @@ -175,6 +186,14 @@ static void nios2_cpu_realizefn(DeviceState *dev, Erro= r **errp) Nios2CPUClass *ncc =3D NIOS2_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 +#ifndef CONFIG_USER_ONLY + if (cpu->eic_present) { + qdev_init_gpio_in_named(DEVICE(cpu), eic_set_irq, "EIC", 1); + } else { + qdev_init_gpio_in_named(DEVICE(cpu), iic_set_irq, "IRQ", 32); + } +#endif + cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); @@ -192,17 +211,48 @@ static void nios2_cpu_realizefn(DeviceState *dev, Err= or **errp) } =20 #ifndef CONFIG_USER_ONLY +static bool eic_take_interrupt(Nios2CPU *cpu) +{ + CPUNios2State *env =3D &cpu->env; + const uint32_t status =3D env->ctrl[CR_STATUS]; + + if (cpu->rnmi) { + return !(status & CR_STATUS_NMI); + } + if (!(status & CR_STATUS_PIE)) { + return false; + } + if (cpu->ril <=3D FIELD_EX32(status, CR_STATUS, IL)) { + return false; + } + if (cpu->rrs !=3D FIELD_EX32(status, CR_STATUS, CRS)) { + return true; + } + return status & CR_STATUS_RSIE; +} + +static bool iic_take_interrupt(Nios2CPU *cpu) +{ + CPUNios2State *env =3D &cpu->env; + + if (!(env->ctrl[CR_STATUS] & CR_STATUS_PIE)) { + return false; + } + return env->ctrl[CR_IPENDING] & env->ctrl[CR_IENABLE]; +} + static bool nios2_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { Nios2CPU *cpu =3D NIOS2_CPU(cs); - CPUNios2State *env =3D &cpu->env; =20 - if ((interrupt_request & CPU_INTERRUPT_HARD) && - (env->ctrl[CR_STATUS] & CR_STATUS_PIE) && - (env->ctrl[CR_IPENDING] & env->ctrl[CR_IENABLE])) { - cs->exception_index =3D EXCP_IRQ; - nios2_cpu_do_interrupt(cs); - return true; + if (interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu->eic_present + ? eic_take_interrupt(cpu) + : iic_take_interrupt(cpu)) { + cs->exception_index =3D EXCP_IRQ; + nios2_cpu_do_interrupt(cs); + return true; + } } return false; } diff --git a/target/nios2/helper.c b/target/nios2/helper.c index bf40cff779..00f27165d9 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -57,6 +57,9 @@ static void do_exception(Nios2CPU *cpu, uint32_t exceptio= n_addr, uint32_t old_status =3D env->ctrl[CR_STATUS]; uint32_t new_status =3D old_status; =20 + /* With shadow regs, exceptions are always taken into CRS 0. */ + new_status &=3D ~R_CR_STATUS_CRS_MASK; + if ((old_status & CR_STATUS_EH) =3D=3D 0) { int r_ea =3D R_EA, cr_es =3D CR_ESTATUS; =20 @@ -65,7 +68,7 @@ static void do_exception(Nios2CPU *cpu, uint32_t exceptio= n_addr, cr_es =3D CR_BSTATUS; } env->ctrl[cr_es] =3D old_status; - env->regs[r_ea] =3D env->pc + 4; + env->shadow_regs[0][r_ea] =3D env->pc + 4; =20 if (cpu->mmu_present) { new_status |=3D CR_STATUS_EH; @@ -83,8 +86,9 @@ static void do_exception(Nios2CPU *cpu, uint32_t exceptio= n_addr, } =20 new_status &=3D ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_STATUS] =3D new_status; + nios2_update_crs(env); + if (!is_break) { env->ctrl[CR_EXCEPTION] =3D FIELD_DP32(0, CR_EXCEPTION, CAUSE, cs->exception_index); @@ -97,6 +101,39 @@ static void do_iic_irq(Nios2CPU *cpu) do_exception(cpu, cpu->exception_addr, 0, false); } =20 +static void do_eic_irq(Nios2CPU *cpu) +{ + CPUNios2State *env =3D &cpu->env; + uint32_t old_status =3D env->ctrl[CR_STATUS]; + uint32_t new_status =3D old_status; + uint32_t old_rs =3D FIELD_EX32(old_status, CR_STATUS, CRS); + uint32_t new_rs =3D cpu->rrs; + + new_status =3D FIELD_DP32(new_status, CR_STATUS, CRS, new_rs); + new_status =3D FIELD_DP32(new_status, CR_STATUS, IL, cpu->ril); + new_status =3D FIELD_DP32(new_status, CR_STATUS, NMI, cpu->rnmi); + new_status &=3D ~(CR_STATUS_RSIE | CR_STATUS_U); + new_status |=3D CR_STATUS_IH; + + if (!(new_status & CR_STATUS_EH)) { + new_status =3D FIELD_DP32(new_status, CR_STATUS, PRS, old_rs); + if (new_rs =3D=3D 0) { + env->ctrl[CR_ESTATUS] =3D old_status; + } else { + if (new_rs !=3D old_rs) { + old_status |=3D CR_STATUS_SRS; + } + env->shadow_regs[new_rs][R_SSTATUS] =3D old_status; + } + env->shadow_regs[new_rs][R_EA] =3D env->pc + 4; + } + + env->ctrl[CR_STATUS] =3D new_status; + nios2_update_crs(env); + + env->pc =3D cpu->rha; +} + void nios2_cpu_do_interrupt(CPUState *cs) { Nios2CPU *cpu =3D NIOS2_CPU(cs); @@ -162,7 +199,11 @@ void nios2_cpu_do_interrupt(CPUState *cs) =20 switch (cs->exception_index) { case EXCP_IRQ: - do_iic_irq(cpu); + if (cpu->eic_present) { + do_eic_irq(cpu); + } else { + do_iic_irq(cpu); + } break; =20 case EXCP_TLB_D: --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647495484232328.5703599749172; Wed, 16 Mar 2022 22:38:04 -0700 (PDT) Received: from localhost ([::1]:38606 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUipm-0004va-Uq for importer@patchew.org; Thu, 17 Mar 2022 01:38:03 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51782) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiOM-0005tk-Vm for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:43 -0400 Received: from [2607:f8b0:4864:20::633] (port=44561 helo=mail-pl1-x633.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO8-0002ee-JD for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:30 -0400 Received: by mail-pl1-x633.google.com with SMTP id q11so3539948pln.11 for ; Wed, 16 Mar 2022 22:09:24 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Oq3+WovLC1U0SsWCHamcVpyHHoEeCG/N4mUqpqq0Etc=; b=gRlO9TWSjaO05wf1ApSxTGIn2qucWy1c0oHK2Z2ZchYDTEWqs8+kVG9dwxn7zk38uV S3yET09MDPyGTdBHMU1Cln7a/NGcHDUzo5gmakEzpGNCZV6L4UQpvDKYO2Ofglj+hf7b 44lo4O6lD129ihbyxsSJc/NZ4YuqDMSO3iizWWE1i4y8pfvKGBr0GTWPERcprX6XUQ3o BhoNdKOxyyJIWmIkIJClZ6SaACm6tHsiE0IYcBTyHG0VEYIN08mgmEOx/M5FaenTGx42 0gafH0MnOHJI2hI5QJEblSXPM/0L2AtvjAWJ1KKJpFMgo2+jnerAKMTew8KJSlsa3uKW gkIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Oq3+WovLC1U0SsWCHamcVpyHHoEeCG/N4mUqpqq0Etc=; b=qTmvI500GyqYjtQhQT6cSFBOTYIOzkidyk0Pui4oS7ouLDLcG68J0VfQqLSbuzM4CV 25gMRo2pZ3OWDlSOoz1p0jQs/d9mjNl+TnuTIbVKPKxDNqVYhqwGfLs55AcrlAerQ1xy gQR95KIWt7wh5LFloiFQfFtlHoMy3Jw49PXqA7hYproW1M8RI/aEddGPhsU7ivuW+Csf CHfgC2+GSc5mb+93YoPkov753k1trW0xZFdRWqZvTBaX+baArwmIMxZQV6ip/BDr5NWi JNEGYkj/ypHG6JrsEaWl5xtp1Nu9ZC10LYeJi5hIiF90V/gg9LokyDOKRAbq+O8V4lYl JkKA== X-Gm-Message-State: AOAM5306dOpWsfWnTuMkNqM0KDDH8Gkjj+/9ORK1GiZMeoMrhAqZzgo6 HsUmiW+BrNorl0Vpl6uErQFORIS+b99ZxA== X-Google-Smtp-Source: ABdhPJyWAt94MubQbWs8dotv7WEEhWgeQ2B+66PKy+RpngbEgSua/Um51eIO7I6G8woTK/l1Q1g77A== X-Received: by 2002:a17:90b:4a92:b0:1bf:2a03:987c with SMTP id lp18-20020a17090b4a9200b001bf2a03987cmr3283812pjb.186.1647493763740; Wed, 16 Mar 2022 22:09:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 45/51] hw/intc: Vectored Interrupt Controller (VIC) Date: Wed, 16 Mar 2022 22:05:32 -0700 Message-Id: <20220317050538.924111-46-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::633 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Peter Maydell , amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647495485467100001 From: Amir Gonnen Implement nios2 Vectored Interrupt Controller (VIC). VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi fields on Nios2CPU before raising an IRQ. For that purpose, VIC has a "cpu" property which should refer to the nios2 cpu and set by the board that connects VIC. Reviewed-by: Peter Maydell Signed-off-by: Amir Gonnen Message-Id: <20220303153906.2024748-5-amir.gonnen@neuroblade.ai> [rth: Split out nios2_vic.h] Signed-off-by: Richard Henderson --- include/hw/intc/nios2_vic.h | 64 ++++++++ hw/intc/nios2_vic.c | 313 ++++++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 3 + hw/intc/meson.build | 1 + 4 files changed, 381 insertions(+) create mode 100644 include/hw/intc/nios2_vic.h create mode 100644 hw/intc/nios2_vic.c diff --git a/include/hw/intc/nios2_vic.h b/include/hw/intc/nios2_vic.h new file mode 100644 index 0000000000..af1517a967 --- /dev/null +++ b/include/hw/intc/nios2_vic.h @@ -0,0 +1,64 @@ +/* + * Vectored Interrupt Controller for nios2 processor + * + * Copyright (c) 2022 Neuroblade + * + * Interface: + * QOM property "cpu": link to the Nios2 CPU (must be set) + * Unnamed GPIO inputs 0..NIOS2_VIC_MAX_IRQ-1: input IRQ lines + * IRQ should be connected to nios2 IRQ0. + * + * Reference: "Embedded Peripherals IP User Guide + * for Intel=C2=AE Quartus=C2=AE Prime Design Suite: 21.4" + * Chapter 38 "Vectored Interrupt Controller Core" + * See: https://www.intel.com/content/www/us/en/docs/programmable/683130/2= 1-4/vectored-interrupt-controller-core.html + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#ifndef HW_INTC_NIOS2_VIC +#define HW_INTC_NIOS2_VIC + +#define TYPE_NIOS2_VIC "nios2-vic" +OBJECT_DECLARE_SIMPLE_TYPE(Nios2VIC, NIOS2_VIC) + +#define NIOS2_VIC_MAX_IRQ 32 + +struct Nios2VIC { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + qemu_irq output_int; + + /* properties */ + CPUState *cpu; + MemoryRegion csr; + + uint32_t int_config[NIOS2_VIC_MAX_IRQ]; + uint32_t vic_config; + uint32_t int_raw_status; + uint32_t int_enable; + uint32_t sw_int; + uint32_t vic_status; + uint32_t vec_tbl_base; + uint32_t vec_tbl_addr; +}; + +#endif /* HW_INTC_NIOS2_VIC */ diff --git a/hw/intc/nios2_vic.c b/hw/intc/nios2_vic.c new file mode 100644 index 0000000000..cf63212a88 --- /dev/null +++ b/hw/intc/nios2_vic.c @@ -0,0 +1,313 @@ +/* + * Vectored Interrupt Controller for nios2 processor + * + * Copyright (c) 2022 Neuroblade + * + * Interface: + * QOM property "cpu": link to the Nios2 CPU (must be set) + * Unnamed GPIO inputs 0..NIOS2_VIC_MAX_IRQ-1: input IRQ lines + * IRQ should be connected to nios2 IRQ0. + * + * Reference: "Embedded Peripherals IP User Guide + * for Intel=C2=AE Quartus=C2=AE Prime Design Suite: 21.4" + * Chapter 38 "Vectored Interrupt Controller Core" + * See: https://www.intel.com/content/www/us/en/docs/programmable/683130/2= 1-4/vectored-interrupt-controller-core.html + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" + +#include "hw/irq.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "migration/vmstate.h" +#include "qapi/error.h" +#include "qemu/bitops.h" +#include "qemu/log.h" +#include "qom/object.h" +#include "hw/intc/nios2_vic.h" +#include "cpu.h" + + +enum { + INT_CONFIG0 =3D 0, + INT_CONFIG31 =3D 31, + INT_ENABLE =3D 32, + INT_ENABLE_SET =3D 33, + INT_ENABLE_CLR =3D 34, + INT_PENDING =3D 35, + INT_RAW_STATUS =3D 36, + SW_INTERRUPT =3D 37, + SW_INTERRUPT_SET =3D 38, + SW_INTERRUPT_CLR =3D 39, + VIC_CONFIG =3D 40, + VIC_STATUS =3D 41, + VEC_TBL_BASE =3D 42, + VEC_TBL_ADDR =3D 43, + CSR_COUNT /* Last! */ +}; + +/* Requested interrupt level (INT_CONFIG[0:5]) */ +static inline uint32_t vic_int_config_ril(const Nios2VIC *vic, int irq_num) +{ + return extract32(vic->int_config[irq_num], 0, 6); +} + +/* Requested NMI (INT_CONFIG[6]) */ +static inline uint32_t vic_int_config_rnmi(const Nios2VIC *vic, int irq_nu= m) +{ + return extract32(vic->int_config[irq_num], 6, 1); +} + +/* Requested register set (INT_CONFIG[7:12]) */ +static inline uint32_t vic_int_config_rrs(const Nios2VIC *vic, int irq_num) +{ + return extract32(vic->int_config[irq_num], 7, 6); +} + +static inline uint32_t vic_config_vec_size(const Nios2VIC *vic) +{ + return 1 << (2 + extract32(vic->vic_config, 0, 3)); +} + +static inline uint32_t vic_int_pending(const Nios2VIC *vic) +{ + return (vic->int_raw_status | vic->sw_int) & vic->int_enable; +} + +static void vic_update_irq(Nios2VIC *vic) +{ + Nios2CPU *cpu =3D NIOS2_CPU(vic->cpu); + uint32_t pending =3D vic_int_pending(vic); + int irq =3D -1; + int max_ril =3D 0; + /* Note that if RIL is 0 for an interrupt it is effectively disabled */ + + vic->vec_tbl_addr =3D 0; + vic->vic_status =3D 0; + + if (pending =3D=3D 0) { + qemu_irq_lower(vic->output_int); + return; + } + + for (int i =3D 0; i < NIOS2_VIC_MAX_IRQ; i++) { + if (pending & BIT(i)) { + int ril =3D vic_int_config_ril(vic, i); + if (ril > max_ril) { + irq =3D i; + max_ril =3D ril; + } + } + } + + if (irq < 0) { + qemu_irq_lower(vic->output_int); + return; + } + + vic->vec_tbl_addr =3D irq * vic_config_vec_size(vic) + vic->vec_tbl_ba= se; + vic->vic_status =3D irq | BIT(31); + + /* + * In hardware, the interface between the VIC and the CPU is via the + * External Interrupt Controller interface, where the interrupt contro= ller + * presents the CPU with a packet of data containing: + * - Requested Handler Address (RHA): 32 bits + * - Requested Register Set (RRS) : 6 bits + * - Requested Interrupt Level (RIL) : 6 bits + * - Requested NMI flag (RNMI) : 1 bit + * In our emulation, we implement this by writing the data directly to + * fields in the CPU object and then raising the IRQ line to tell + * the CPU that we've done so. + */ + + cpu->rha =3D vic->vec_tbl_addr; + cpu->ril =3D max_ril; + cpu->rrs =3D vic_int_config_rrs(vic, irq); + cpu->rnmi =3D vic_int_config_rnmi(vic, irq); + + qemu_irq_raise(vic->output_int); +} + +static void vic_set_irq(void *opaque, int irq_num, int level) +{ + Nios2VIC *vic =3D opaque; + + vic->int_raw_status =3D deposit32(vic->int_raw_status, irq_num, 1, !!l= evel); + vic_update_irq(vic); +} + +static void nios2_vic_reset(DeviceState *dev) +{ + Nios2VIC *vic =3D NIOS2_VIC(dev); + + memset(&vic->int_config, 0, sizeof(vic->int_config)); + vic->vic_config =3D 0; + vic->int_raw_status =3D 0; + vic->int_enable =3D 0; + vic->sw_int =3D 0; + vic->vic_status =3D 0; + vic->vec_tbl_base =3D 0; + vic->vec_tbl_addr =3D 0; +} + +static uint64_t nios2_vic_csr_read(void *opaque, hwaddr offset, unsigned s= ize) +{ + Nios2VIC *vic =3D opaque; + int index =3D offset / 4; + + switch (index) { + case INT_CONFIG0 ... INT_CONFIG31: + return vic->int_config[index - INT_CONFIG0]; + case INT_ENABLE: + return vic->int_enable; + case INT_PENDING: + return vic_int_pending(vic); + case INT_RAW_STATUS: + return vic->int_raw_status; + case SW_INTERRUPT: + return vic->sw_int; + case VIC_CONFIG: + return vic->vic_config; + case VIC_STATUS: + return vic->vic_status; + case VEC_TBL_BASE: + return vic->vec_tbl_base; + case VEC_TBL_ADDR: + return vic->vec_tbl_addr; + default: + return 0; + } +} + +static void nios2_vic_csr_write(void *opaque, hwaddr offset, uint64_t valu= e, + unsigned size) +{ + Nios2VIC *vic =3D opaque; + int index =3D offset / 4; + + switch (index) { + case INT_CONFIG0 ... INT_CONFIG31: + vic->int_config[index - INT_CONFIG0] =3D value; + break; + case INT_ENABLE: + vic->int_enable =3D value; + break; + case INT_ENABLE_SET: + vic->int_enable |=3D value; + break; + case INT_ENABLE_CLR: + vic->int_enable &=3D ~value; + break; + case SW_INTERRUPT: + vic->sw_int =3D value; + break; + case SW_INTERRUPT_SET: + vic->sw_int |=3D value; + break; + case SW_INTERRUPT_CLR: + vic->sw_int &=3D ~value; + break; + case VIC_CONFIG: + vic->vic_config =3D value; + break; + case VEC_TBL_BASE: + vic->vec_tbl_base =3D value; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "nios2-vic: write to invalid CSR address %#" + HWADDR_PRIx "\n", offset); + } + + vic_update_irq(vic); +} + +static const MemoryRegionOps nios2_vic_csr_ops =3D { + .read =3D nios2_vic_csr_read, + .write =3D nios2_vic_csr_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { .min_access_size =3D 4, .max_access_size =3D 4 } +}; + +static void nios2_vic_realize(DeviceState *dev, Error **errp) +{ + Nios2VIC *vic =3D NIOS2_VIC(dev); + + if (!vic->cpu) { + /* This is a programming error in the code using this device */ + error_setg(errp, "nios2-vic 'cpu' link property was not set"); + return; + } + + sysbus_init_irq(SYS_BUS_DEVICE(dev), &vic->output_int); + qdev_init_gpio_in(dev, vic_set_irq, NIOS2_VIC_MAX_IRQ); + + memory_region_init_io(&vic->csr, OBJECT(dev), &nios2_vic_csr_ops, vic, + "nios2.vic.csr", CSR_COUNT * sizeof(uint32_t)); + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &vic->csr); +} + +static Property nios2_vic_properties[] =3D { + DEFINE_PROP_LINK("cpu", Nios2VIC, cpu, TYPE_CPU, CPUState *), + DEFINE_PROP_END_OF_LIST() +}; + +static const VMStateDescription nios2_vic_vmstate =3D { + .name =3D "nios2-vic", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]){ + VMSTATE_UINT32_ARRAY(int_config, Nios2VIC, 32), + VMSTATE_UINT32(vic_config, Nios2VIC), + VMSTATE_UINT32(int_raw_status, Nios2VIC), + VMSTATE_UINT32(int_enable, Nios2VIC), + VMSTATE_UINT32(sw_int, Nios2VIC), + VMSTATE_UINT32(vic_status, Nios2VIC), + VMSTATE_UINT32(vec_tbl_base, Nios2VIC), + VMSTATE_UINT32(vec_tbl_addr, Nios2VIC), + VMSTATE_END_OF_LIST() + }, +}; + +static void nios2_vic_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D nios2_vic_reset; + dc->realize =3D nios2_vic_realize; + dc->vmsd =3D &nios2_vic_vmstate; + device_class_set_props(dc, nios2_vic_properties); +} + +static const TypeInfo nios2_vic_info =3D { + .name =3D TYPE_NIOS2_VIC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(Nios2VIC), + .class_init =3D nios2_vic_class_init, +}; + +static void nios2_vic_register_types(void) +{ + type_register_static(&nios2_vic_info); +} + +type_init(nios2_vic_register_types); diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index ec8d4cec29..eeb2d6f428 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -84,3 +84,6 @@ config GOLDFISH_PIC =20 config M68K_IRQC bool + +config NIOS2_VIC + bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 81ccdb0d78..167755ac64 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -62,3 +62,4 @@ specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.= c')) specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) +specific_ss.add(when: 'CONFIG_NIOS2_VIC', if_true: files('nios2_vic.c')) --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496673185377.6239609363587; Wed, 16 Mar 2022 22:57:53 -0700 (PDT) Received: from localhost ([::1]:34090 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUj8y-0004TR-7w for importer@patchew.org; Thu, 17 Mar 2022 01:57:52 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiOA-0005oR-4W for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:32 -0400 Received: from [2607:f8b0:4864:20::635] (port=44563 helo=mail-pl1-x635.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO8-0002el-Me for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:29 -0400 Received: by mail-pl1-x635.google.com with SMTP id q11so3539969pln.11 for ; Wed, 16 Mar 2022 22:09:25 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gbz23MwsSOjvrGQ78PxYHanfS3o+COJmYNaivXWFkEM=; b=zEZr1ixSIpyPpUwhSP6o0OoOgSk5zKEijlLEgkCy0SNa/5nB2CWvBESNp39NrJUoEA gt2ddTjDXPbTsEQUETEEl2gya8YGDAsH+R4e8nFKbxC/Hd516Hjd8baB4/CPGAi0HZ0J QVezBF1nkj0blSZtk0X+ClWATqNmKaEqjdoljzjlxXJBtkND7J9G1yHL3YF+hJGe9Rpd /WQ0TDbbzAfQn4DJMxSkGT8uZ4Ydtvuy5bjUhT4kh5Ky0OhJXjlM9JpYfjQlqEOaSVMq tNPH0MeESGWVQqgJb9wkLO3fD8m1XqY1af4dYmW9tT6rEBfn3ZKfEB2NrvGqrqKZN7VA hnHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gbz23MwsSOjvrGQ78PxYHanfS3o+COJmYNaivXWFkEM=; b=Gw8azmRWj+BBZDlupI0+eDsn7V/9urdhp5JSlCcAJ3cAKjQPvnuEoTLfC7wyOmk4Jx WdiJIEp6Vu8HqWblneUK4jrSYoXv/RmZc8VIMQgNbtI+K19m/1M6XTLPP8oI9jxYeFYb nVDvNQs30Nq5+V132zuDluybPlUvsSWuFAMHXj8B+iQHOBb+bC97Pi5mjbwu2SuzU1lT Xo+cgc3Yu7/VZxvXpIDkl/XSkKh3DHH7IvJg0eRWGsO+/9d6UuFOEpigBYC/xfGQHrg5 PTyyH7UwFq/I1w+W11Zdv8a/i5XdkmJ7r3eaVJe1Vv0RDrcpKn20NTD0qB1cIECnQHek OsjA== X-Gm-Message-State: AOAM532/dkf3BYs0xb8g54A1nUucngN3iXhnDsdpI7Qpgs78Ae6ohvSe xx9OiPKtbBg0DmctZ6PeqQ0mcPWs6KlahA== X-Google-Smtp-Source: ABdhPJzt2R536efs8Xy46UmunMFFFetaFiOv5D2dQJ4R9YTjOFxqjyI74JPAGcRuZVKBSPvXWj/eqg== X-Received: by 2002:a17:902:a614:b0:153:196d:634f with SMTP id u20-20020a170902a61400b00153196d634fmr3278062plq.39.1647493764589; Wed, 16 Mar 2022 22:09:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 46/51] hw/nios2: Introduce Nios2MachineState Date: Wed, 16 Mar 2022 22:05:33 -0700 Message-Id: <20220317050538.924111-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::635 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai, Mark Cave-Ayland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496674385100001 Content-Type: text/plain; charset="utf-8" We want to move data from the heap into Nios2MachineState, which is not possible with DEFINE_MACHINE. Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- hw/nios2/10m50_devboard.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 3d1205b8bd..bdc3ffd50d 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -36,6 +36,13 @@ =20 #include "boot.h" =20 +struct Nios2MachineState { + MachineState parent_obj; +}; + +#define TYPE_NIOS2_MACHINE MACHINE_TYPE_NAME("10m50-ghrd") +OBJECT_DECLARE_TYPE(Nios2MachineState, MachineClass, NIOS2_MACHINE) + #define BINARY_DEVICE_TREE_FILE "10m50-devboard.dtb" =20 static void nios2_10m50_ghrd_init(MachineState *machine) @@ -105,11 +112,24 @@ static void nios2_10m50_ghrd_init(MachineState *machi= ne) BINARY_DEVICE_TREE_FILE, NULL); } =20 -static void nios2_10m50_ghrd_machine_init(struct MachineClass *mc) +static void nios2_10m50_ghrd_class_init(ObjectClass *oc, void *data) { + MachineClass *mc =3D MACHINE_CLASS(oc); + mc->desc =3D "Altera 10M50 GHRD Nios II design"; mc->init =3D nios2_10m50_ghrd_init; mc->is_default =3D true; } =20 -DEFINE_MACHINE("10m50-ghrd", nios2_10m50_ghrd_machine_init); +static const TypeInfo nios2_10m50_ghrd_type_info =3D { + .name =3D TYPE_NIOS2_MACHINE, + .parent =3D TYPE_MACHINE, + .instance_size =3D sizeof(Nios2MachineState), + .class_init =3D nios2_10m50_ghrd_class_init, +}; + +static void nios2_10m50_ghrd_type_init(void) +{ + type_register_static(&nios2_10m50_ghrd_type_info); +} +type_init(nios2_10m50_ghrd_type_init); --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496750751759.5393160011275; Wed, 16 Mar 2022 22:59:10 -0700 (PDT) Received: from localhost ([::1]:36358 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUjAD-000612-ND for importer@patchew.org; Thu, 17 Mar 2022 01:59:09 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51780) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiOM-0005tj-VR for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:43 -0400 Received: from [2607:f8b0:4864:20::62f] (port=33486 helo=mail-pl1-x62f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO8-0002er-Os for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:31 -0400 Received: by mail-pl1-x62f.google.com with SMTP id t22so3598428plo.0 for ; Wed, 16 Mar 2022 22:09:26 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k4ozRW6iziM8OJ2TKPPCOH7wy/AQ7zg7VeU+iBKaQYA=; b=NnwZotdGoUpFCuwRS3GBLhhCyxU/RJLZq9MoP2ihDSMhhMI9kQiQw/QjmgIUYhLlcH BP90d6mN+j08L/XSDXiDx5IqMb9esUZhgZm7/pARO0JEE8xvEDYr6ETFzL7RsSHCXcfI zJSGVgoMy/CCwZBU4OkWB0bRssKK0I93VFO+7hnUxbUrfKHTrKNlr5UHDsSqs9LdQvKq T9L913hS+/XcJe9tGYtuHcEAv8NOn0gKxWvo17qPV3uWzE+C1inCMA/rS3hEHsswYwmQ JbXNixYjegXkWhsYiSYtbBBMLDanQnIXl/ozVeBI8tXa3wguuXL8YCoRrnpKgFGT0iV/ Fhig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=k4ozRW6iziM8OJ2TKPPCOH7wy/AQ7zg7VeU+iBKaQYA=; b=b+/k24nqRADAjSMKDbtOAYr5wd26UXlDyJFU7KXxzBxtVtqR4dRz8oALmxYgtnQrfr dqTeUq/f3nnsSUkw9lS3ZIsCXFSY1N9qtPXctEl/LNv/yUKNR34jTxi9h0AKcGfY0/Fn 1SLA65xgBdmHR/u3xUHPf1Ypdcos5Bbp59GTciG1CVJFrgjePNaD1ib5W6l1Q7FDKB0n tucpteqJp/5Ia3yobkrhvZPnaEj5wlfiJmYDhns2Xc6WGmNcih47rQjwAfqEPwzC3bT3 0S89FR91ItiEB1Q2tSUjDrIKWfqbJZ/SP4bTruP20qWBWcqlNIfCSg1gFg4B1PE+wWgT lJ0w== X-Gm-Message-State: AOAM530ygLLT5wNSaaIQEb2KKXGd+nvLLl+osmVQBzRqL5edh5Yp1F78 h2hb6kZdv8sUpgF6BiOakE7hfHYoGgac8Q== X-Google-Smtp-Source: ABdhPJynlEHX288c+pEsteKOdWHzR8ji55B2o3qWn/qTpvE2AnGPqV+bB13MQQZBFu4Kx26ePr73sg== X-Received: by 2002:a17:90b:4b4b:b0:1be:fd9a:c279 with SMTP id mi11-20020a17090b4b4b00b001befd9ac279mr13873307pjb.83.1647493765507; Wed, 16 Mar 2022 22:09:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 47/51] hw/nios2: Move memory regions into Nios2Machine Date: Wed, 16 Mar 2022 22:05:34 -0700 Message-Id: <20220317050538.924111-48-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai, Mark Cave-Ayland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496752990100001 Content-Type: text/plain; charset="utf-8" Convert to contiguous allocation, as much as possible so far. The two timer objects are not exposed for subobject allocation. Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- hw/nios2/10m50_devboard.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index bdc3ffd50d..dda4ab2bf5 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -38,6 +38,11 @@ =20 struct Nios2MachineState { MachineState parent_obj; + + MemoryRegion phys_tcm; + MemoryRegion phys_tcm_alias; + MemoryRegion phys_ram; + MemoryRegion phys_ram_alias; }; =20 #define TYPE_NIOS2_MACHINE MACHINE_TYPE_NAME("10m50-ghrd") @@ -47,13 +52,10 @@ OBJECT_DECLARE_TYPE(Nios2MachineState, MachineClass, NI= OS2_MACHINE) =20 static void nios2_10m50_ghrd_init(MachineState *machine) { + Nios2MachineState *nms =3D NIOS2_MACHINE(machine); Nios2CPU *cpu; DeviceState *dev; MemoryRegion *address_space_mem =3D get_system_memory(); - MemoryRegion *phys_tcm =3D g_new(MemoryRegion, 1); - MemoryRegion *phys_tcm_alias =3D g_new(MemoryRegion, 1); - MemoryRegion *phys_ram =3D g_new(MemoryRegion, 1); - MemoryRegion *phys_ram_alias =3D g_new(MemoryRegion, 1); ram_addr_t tcm_base =3D 0x0; ram_addr_t tcm_size =3D 0x1000; /* 1 kiB, but QEMU limit is 4 kiB */ ram_addr_t ram_base =3D 0x08000000; @@ -62,22 +64,22 @@ static void nios2_10m50_ghrd_init(MachineState *machine) int i; =20 /* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */ - memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size, + memory_region_init_ram(&nms->phys_tcm, NULL, "nios2.tcm", tcm_size, &error_abort); - memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias", - phys_tcm, 0, tcm_size); - memory_region_add_subregion(address_space_mem, tcm_base, phys_tcm); + memory_region_init_alias(&nms->phys_tcm_alias, NULL, "nios2.tcm.alias", + &nms->phys_tcm, 0, tcm_size); + memory_region_add_subregion(address_space_mem, tcm_base, &nms->phys_tc= m); memory_region_add_subregion(address_space_mem, 0xc0000000 + tcm_base, - phys_tcm_alias); + &nms->phys_tcm_alias); =20 /* Physical DRAM with alias at 0xc0000000 */ - memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size, + memory_region_init_ram(&nms->phys_ram, NULL, "nios2.ram", ram_size, &error_abort); - memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias", - phys_ram, 0, ram_size); - memory_region_add_subregion(address_space_mem, ram_base, phys_ram); + memory_region_init_alias(&nms->phys_ram_alias, NULL, "nios2.ram.alias", + &nms->phys_ram, 0, ram_size); + memory_region_add_subregion(address_space_mem, ram_base, &nms->phys_ra= m); memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base, - phys_ram_alias); + &nms->phys_ram_alias); =20 /* Create CPU -- FIXME */ cpu =3D NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU)); --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496818901375.47316963086587; Wed, 16 Mar 2022 23:00:18 -0700 (PDT) Received: from localhost ([::1]:38516 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUjBI-0007TP-9L for importer@patchew.org; Thu, 17 Mar 2022 02:00:16 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51786) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiON-0005tm-10 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:43 -0400 Received: from [2607:f8b0:4864:20::1030] (port=56259 helo=mail-pj1-x1030.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO8-0002ex-Me for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:31 -0400 Received: by mail-pj1-x1030.google.com with SMTP id e3so3938419pjm.5 for ; Wed, 16 Mar 2022 22:09:27 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hj1caAJ4c5FzLlx3YortGoGnXhKcBtSkJDGfqHCCy98=; b=uTUkKmda+jlDhYzgmm7pq+0AS5DT8aSU/wQ8MK1JlBIpdRukXG9d7dsAknlEe1j3uO zKeOmNBjuYkvxcsHfRQBtJIBZ6DhEtyUJwYCEljx5XBLzIYXcGtHUu65fSjyJHG8c/x/ 1aw/XrLDomO33WpelipkDHtTlpfby+TKBQDCZE3O5tiIbvvskektsnydwcz9hewdMmqm j9/jg0t1rxr8oBlGrzAKCxHl+MpiekmTgzxKdm/DCy5v1bmJ4YmhDYTV1hmqgKXwYo81 vWJ/PFWFT3t+aHAKWfbEYptQZReXRg+GaMVh7O+y5u+uD92TFPgsk1OqCbjploaqgiff iuKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hj1caAJ4c5FzLlx3YortGoGnXhKcBtSkJDGfqHCCy98=; b=MHhwfyHxT/8VS3n2cojeC1YeMwbcEkUUGHJs4S56YiVTuUNjRqk/lJOv/ONz2+0jqK k4okBEwJTWK+Ba/qXj5Ybf/R1hVcYgyg2vIiGCTEEWXzUO13APeMPOPDqtS2NAJbd3DG YnngVCNatRL4EXA8OfhA2FvmbRWXXFvOLCpEUV1skP5SqlK9eE+FmaP4VGFOuyXUibXC 4wrd3LOIG72ZON+T/2n4k2qZvwg5cczalQSFuiSNiryZDJtlSVj6JbDtF8metbeHaFL5 +VZyFeI3szB0ps1tfQdfz7m762Oq3DE51W+7CIZZ6YEVPSmR2/mP0z2BatIQqFNZyjTK rV7g== X-Gm-Message-State: AOAM533ZNGBZuOMNyctYaaSmgU92+1OI3NPOjzR4cgIwsDcbk7UbeLDb fXRu+/ujMzRUfba/PwaXoJvea5ToCFZ3og== X-Google-Smtp-Source: ABdhPJwWzQQPOUbU52J8wE+8MR1je8LRzkZ3z9l97St4xh46H42WBFmXcwqVYMDscVYuTTvKfxa4jg== X-Received: by 2002:a17:90a:6508:b0:1be:d59c:1f10 with SMTP id i8-20020a17090a650800b001bed59c1f10mr3264074pjj.229.1647493766506; Wed, 16 Mar 2022 22:09:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 48/51] hw/nios2: Machine with a Vectored Interrupt Controller Date: Wed, 16 Mar 2022 22:05:35 -0700 Message-Id: <20220317050538.924111-49-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1030 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai, Mark Cave-Ayland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496821327100001 Content-Type: text/plain; charset="utf-8" From: Amir Gonnen Demonstrate how to use nios2 VIC on a machine. Introduce a new machine property to attach a VIC. When VIC is present, let the CPU know that it should use the External Interrupt Interface instead of the Internal Interrupt Interface. The devices on the machine are attached to the VIC and not directly to cpu. To allow VIC update EIC fields, we set the "cpu" property of the VIC with a reference to the nios2 cpu. Reviewed-by: Mark Cave-Ayland Signed-off-by: Amir Gonnen Message-Id: <20220303153906.2024748-6-amir.gonnen@neuroblade.ai> [rth: Put a property on the 10m50-ghrd machine, rather than create a new machine class.] Signed-off-by: Richard Henderson --- hw/nios2/10m50_devboard.c | 61 +++++++++++++++++++++++++++++++++------ hw/nios2/Kconfig | 1 + 2 files changed, 53 insertions(+), 9 deletions(-) diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index dda4ab2bf5..91383fb097 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -27,6 +27,7 @@ =20 #include "hw/sysbus.h" #include "hw/char/serial.h" +#include "hw/intc/nios2_vic.h" #include "hw/qdev-properties.h" #include "sysemu/sysemu.h" #include "hw/boards.h" @@ -43,6 +44,8 @@ struct Nios2MachineState { MemoryRegion phys_tcm_alias; MemoryRegion phys_ram; MemoryRegion phys_ram_alias; + + bool vic; }; =20 #define TYPE_NIOS2_MACHINE MACHINE_TYPE_NAME("10m50-ghrd") @@ -81,10 +84,39 @@ static void nios2_10m50_ghrd_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base, &nms->phys_ram_alias); =20 - /* Create CPU -- FIXME */ - cpu =3D NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU)); - for (i =3D 0; i < 32; i++) { - irq[i] =3D qdev_get_gpio_in_named(DEVICE(cpu), "IRQ", i); + /* Create CPU. We need to set eic_present between init and realize. */ + cpu =3D NIOS2_CPU(object_new(TYPE_NIOS2_CPU)); + + /* Enable the External Interrupt Controller within the CPU. */ + cpu->eic_present =3D nms->vic; + + /* Configure new exception vectors. */ + cpu->reset_addr =3D 0xd4000000; + cpu->exception_addr =3D 0xc8000120; + cpu->fast_tlb_miss_addr =3D 0xc0000100; + + qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal); + + if (nms->vic) { + DeviceState *dev =3D qdev_new(TYPE_NIOS2_VIC); + MemoryRegion *dev_mr; + qemu_irq cpu_irq; + + object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_f= atal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + + cpu_irq =3D qdev_get_gpio_in_named(DEVICE(cpu), "EIC", 0); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq); + for (int i =3D 0; i < 32; i++) { + irq[i] =3D qdev_get_gpio_in(dev, i); + } + + dev_mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); + memory_region_add_subregion(address_space_mem, 0x18002000, dev_mr); + } else { + for (i =3D 0; i < 32; i++) { + irq[i] =3D qdev_get_gpio_in_named(DEVICE(cpu), "IRQ", i); + } } =20 /* Register: Altera 16550 UART */ @@ -105,15 +137,22 @@ static void nios2_10m50_ghrd_init(MachineState *machi= ne) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xe0000880); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[5]); =20 - /* Configure new exception vectors and reset CPU for it to take effect= . */ - cpu->reset_addr =3D 0xd4000000; - cpu->exception_addr =3D 0xc8000120; - cpu->fast_tlb_miss_addr =3D 0xc0000100; - nios2_load_kernel(cpu, ram_base, ram_size, machine->initrd_filename, BINARY_DEVICE_TREE_FILE, NULL); } =20 +static bool get_vic(Object *obj, Error **errp) +{ + Nios2MachineState *nms =3D NIOS2_MACHINE(obj); + return nms->vic; +} + +static void set_vic(Object *obj, bool value, Error **errp) +{ + Nios2MachineState *nms =3D NIOS2_MACHINE(obj); + nms->vic =3D value; +} + static void nios2_10m50_ghrd_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -121,6 +160,10 @@ static void nios2_10m50_ghrd_class_init(ObjectClass *o= c, void *data) mc->desc =3D "Altera 10M50 GHRD Nios II design"; mc->init =3D nios2_10m50_ghrd_init; mc->is_default =3D true; + + object_class_property_add_bool(oc, "vic", get_vic, set_vic); + object_class_property_set_description(oc, "vic", + "Set on/off to enable/disable the Vectored Interrupt Controller"); } =20 static const TypeInfo nios2_10m50_ghrd_type_info =3D { diff --git a/hw/nios2/Kconfig b/hw/nios2/Kconfig index b10ea640da..4748ae27b6 100644 --- a/hw/nios2/Kconfig +++ b/hw/nios2/Kconfig @@ -3,6 +3,7 @@ config NIOS2_10M50 select NIOS2 select SERIAL select ALTERA_TIMER + select NIOS2_VIC =20 config NIOS2_GENERIC_NOMMU bool --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496920879528.7519284519185; Wed, 16 Mar 2022 23:02:00 -0700 (PDT) Received: from localhost ([::1]:40696 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUjCx-0000eI-Dl for importer@patchew.org; Thu, 17 Mar 2022 02:01:59 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51788) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiON-0005tn-12 for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:43 -0400 Received: from [2607:f8b0:4864:20::62c] (port=45604 helo=mail-pl1-x62c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO8-0002g2-Ob for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:31 -0400 Received: by mail-pl1-x62c.google.com with SMTP id q13so3536739plk.12 for ; Wed, 16 Mar 2022 22:09:28 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7rlZYzlv15UW77j9fostPaSd5V7tg5ruWK95qVptaMo=; b=dsN2bSRz9sIrDJ2swMHz+WWKNLlfNQ5C+BIL0G1NLRVvuyIHKvLT6ug0+5MvJWp6iJ WsOxbb6NCPyK2nEd2BAXuv1HgfF6XnT7Sj0NBeQwuqUXVbLtfL4Bix/CzWx1HpLBmoIK VMBfxr9PPp4rOX1SwdjdvwSwroMVqDi7Mr7tJ8dMybHi0G/+3hg7HpF9kVDGOonNa5Jn Yn3bfyOKl/9u9sr+xRgnXoG3EBKBNihWc1F2vI+UjybU34Fesj9mK1HqulgIM1TDjvkv R9OqOPOO94ZzjWHCXoDm+i/wWZeetyh6U1uHrXXJwPDOqZ0IvTZ9UhlXqGm+dDgn96Ds dIyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7rlZYzlv15UW77j9fostPaSd5V7tg5ruWK95qVptaMo=; b=sbNVNmpbukva1vYsR/IVdc+ykzd4D20EkkWEF656Nt3s3YhDSdz7tDXBwwUTL3W2+5 JXJ4GXE+MQyV722Dr5OP0/j2AM4OWCXlDNORuuYGItLoRx7YCYG9sVvz7a3tCqYBpUlv FC+e7W9QCRO/tnkmxzdeI4HKs6kU5dbZnIqj1RexJjyOQ6aLsFCatfMioJK46q8R7KBv G98vYA3DCEDMpEf1pGAMapYXc+TXcb+qNmlYP5tr7ANrEFyg8+5Dezkh0P6p6ALuX0Y5 a45U3gHEB37pJMxz4J3Km2pfs5pB+5qpRECXieyYIMIBdOYVMPRV9K44J2odFh2m2KKf Ogeg== X-Gm-Message-State: AOAM532886YAppopSjwFp09XiK2r0kLxgKDMPo1B3eI19NB9joSIrVq+ kW+U69jSXvgIcpdmg0FsodTgBUayle35Kg== X-Google-Smtp-Source: ABdhPJzHc7kA17PycUoGiui4H6/8R2UwI1qPcGNjCWU77VCyLivL5UhdoEmnXkPaQwrZw0k6P9gfwA== X-Received: by 2002:a17:90b:3881:b0:1bf:86ea:a5e5 with SMTP id mu1-20020a17090b388100b001bf86eaa5e5mr3332341pjb.11.1647493767290; Wed, 16 Mar 2022 22:09:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 49/51] tests/tcg: Expose AR to test build environment if needed Date: Wed, 16 Mar 2022 22:05:36 -0700 Message-Id: <20220317050538.924111-50-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496922783100001 The runtime we build for Nios2 requires building a static archive, so supply the ar tool for that case. Cc: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- tests/tcg/Makefile.qemu | 7 +++++++ tests/tcg/configure.sh | 14 ++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/tests/tcg/Makefile.qemu b/tests/tcg/Makefile.qemu index 84c8543878..00b043c702 100644 --- a/tests/tcg/Makefile.qemu +++ b/tests/tcg/Makefile.qemu @@ -24,6 +24,7 @@ quiet-command =3D $(quiet-@)$(call quiet-command-run,$1,$= 2,$3) CROSS_CC_GUEST:=3D CROSS_AS_GUEST:=3D CROSS_LD_GUEST:=3D +CROSS_AR_GUEST:=3D DOCKER_IMAGE:=3D =20 -include tests/tcg/config-$(TARGET).mak @@ -46,6 +47,7 @@ cross-build-guest-tests: $(MAKE) -f $(TCG_MAKE) TARGET=3D"$(TARGET)" CC=3D"$(CROSS_CC_GUEST)" \ $(if $(CROSS_AS_GUEST),AS=3D"$(CROSS_AS_GUEST)") \ $(if $(CROSS_LD_GUEST),LD=3D"$(CROSS_LD_GUEST)") \ + $(if $(CROSS_AR_GUEST),AR=3D"$(CROSS_AR_GUEST)") \ SRC_PATH=3D"$(SRC_PATH)" BUILD_STATIC=3D$(CROSS_CC_GUEST_STATIC) \ EXTRA_CFLAGS=3D"$(CROSS_CC_GUEST_CFLAGS)"), \ "BUILD","$(TARGET) guest-tests with $(CROSS_CC_GUEST)") @@ -73,6 +75,10 @@ DOCKER_LD_CMD=3D$(if $(DOCKER_CROSS_LD_GUEST),"$(DOCKER_= SCRIPT) cc \ -i qemu/$(DOCKER_IMAGE) \ -s $(SRC_PATH) -- ") =20 +DOCKER_AR_CMD=3D$(if $(DOCKER_CROSS_AR_GUEST),"$(DOCKER_SCRIPT) cc \ + --cc $(DOCKER_CROSS_AR_GUEST) \ + -i qemu/$(DOCKER_IMAGE) \ + -s $(SRC_PATH) -- ") =20 .PHONY: docker-build-guest-tests docker-build-guest-tests: docker-image-$(DOCKER_IMAGE) @@ -81,6 +87,7 @@ docker-build-guest-tests: docker-image-$(DOCKER_IMAGE) $(MAKE) -f $(TCG_MAKE) TARGET=3D"$(TARGET)" CC=3D$(DOCKER_COMPILE_CMD)= \ $(if $(DOCKER_AS_CMD),AS=3D$(DOCKER_AS_CMD)) \ $(if $(DOCKER_LD_CMD),LD=3D$(DOCKER_LD_CMD)) \ + $(if $(DOCKER_AR_CMD),AR=3D$(DOCKER_AR_CMD)) \ SRC_PATH=3D"$(SRC_PATH)" BUILD_STATIC=3Dy \ EXTRA_CFLAGS=3D"$(CROSS_CC_GUEST_CFLAGS)"), \ "BUILD","$(TARGET) guest-tests with docker qemu/$(DOCKER_IMAGE)") diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh index ed4b5ccb1f..0b829f4f05 100755 --- a/tests/tcg/configure.sh +++ b/tests/tcg/configure.sh @@ -80,6 +80,9 @@ fi : ${cross_as_tricore=3D"tricore-as"} : ${cross_ld_tricore=3D"tricore-ld"} =20 +# nios2 is special as it requires ar +: ${cross_ar_nios2=3D"nios2-linux-gnu-ar"} + for target in $target_list; do arch=3D${target%%-*} =20 @@ -89,6 +92,7 @@ for target in $target_list; do container_cross_cc=3D container_cross_as=3D container_cross_ld=3D + container_cross_ar=3D =20 # suppress clang supress_clang=3D @@ -166,6 +170,7 @@ for target in $target_list; do container_hosts=3Dx86_64 container_image=3Ddebian-nios2-cross container_cross_cc=3Dnios2-linux-gnu-gcc + container_cross_ar=3Dnios2-linux-gnu-ar ;; ppc-*) container_hosts=3Dx86_64 @@ -285,6 +290,11 @@ for target in $target_list; do ;; esac fi + + eval "target_ar=3D\"\${cross_ar_$arch}\"" + if has $target_ar; then + echo "CROSS_AR_GUEST=3D$target_ar" >> $config_target_mak + fi fi =20 if test $got_cross_cc =3D yes; then @@ -344,6 +354,10 @@ for target in $target_list; do echo "DOCKER_CROSS_LD_GUEST=3D$container_cross_ld" >> \ $config_target_mak fi + if test -n "$container_cross_ar"; then + echo "DOCKER_CROSS_AR_GUEST=3D$container_cross_ar" >> \ + $config_target_mak + fi fi done fi --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496379652574.731768230744; Wed, 16 Mar 2022 22:52:59 -0700 (PDT) Received: from localhost ([::1]:53378 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUj4F-0006ra-VU for importer@patchew.org; Thu, 17 Mar 2022 01:52:59 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51784) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiON-0005tl-0M for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:43 -0400 Received: from [2607:f8b0:4864:20::1033] (port=40564 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiO9-0002gO-KR for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:31 -0400 Received: by mail-pj1-x1033.google.com with SMTP id mp6-20020a17090b190600b001c6841b8a52so622883pjb.5 for ; Wed, 16 Mar 2022 22:09:29 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OypOZjm97nIervrNwFNfORUwhAUM3Oj2hEMCC5WyHN8=; b=kz2hkfO8HjPC8FeDLDDZp7RggteJ0OEOb0VdY7bpjbk/2y6uVPUwhL8/Bx9tXrSp5S i1AZS8dkhLXPRYMiUcwlRQEOhNrq4v6wNGOvQPuJIFsHg/iHqOcEAMPZuOyUPCJCOF9i 5UApkQq5NGh2Qpskxh5/GRPfs7hhxydLtVus+fFYBEbZoJopp6Kv/4zvHhuSat+mNFS7 YAEM6EzUlcIO7L67E4YJIQZQ+bWVj434AwFxznMS6W8axZMAG3vX0eFcLbVZvThiLzab nW9PQeIN5ZNBpJDtMOCjtk7cklLAdLOaGPYaVOa3EQlqX0KsEMswlMJoezBpYgSKiRe1 Pb1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OypOZjm97nIervrNwFNfORUwhAUM3Oj2hEMCC5WyHN8=; b=bGL60U2qWnVRopZgJPcWHOnBwIJKEkVCib42GOM2zXjDnS4MQmIc+D2158F16lqSjj fZaPCaGFIe5DC2kI4/Be4lfmrx39pyoJs+C7KVo844tQLdQlJ4OyE1ZlOSdn3QkslDr9 7x2y9viWrsQDDKIg/v2mAG1nDgKoTZsQCHQkrfaRuxeKl+qPt5kDtEPpyrKE5jcAVNOz gRVfnzYnmAYI0GgMSHns1N86WvX2Qm1jo2TNvynTHwazqjF8dStBQzBRj+pcD57iEz4J +rJtBFFCtLQZouJfXcdDQXytHy4ns0X6iGttC3uYekprH1JvJhsy0pqBL0wa8uWMDcWA IxEw== X-Gm-Message-State: AOAM533J6/GHCGcKa/+TRkk0al4Zjwj9AF/JXGoF6ITOhV5M/eNl/LRq sceVT3Dlsky5mBuuJkSRtZq70PTd0e+HrQ== X-Google-Smtp-Source: ABdhPJzTt+shRcoJzf6uSmKXkV+tGBmJfXFtMwFZqz5wEc0rWMhPk9fAWbYpx9BaKwsvaFi2r0Z7nw== X-Received: by 2002:a17:90b:1a8b:b0:1c6:3c6e:3b99 with SMTP id ng11-20020a17090b1a8b00b001c63c6e3b99mr12049861pjb.82.1647493768311; Wed, 16 Mar 2022 22:09:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 50/51] test/tcg/nios2: Add semihosting multiarch tests Date: Wed, 16 Mar 2022 22:05:37 -0700 Message-Id: <20220317050538.924111-51-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496381517100001 Add runtime supporting the nios2-semi.c interface. Execute the hello and memory multiarch tests. Cc: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- tests/tcg/nios2/semicall.h | 25 +++++++ tests/tcg/nios2/10m50-ghrd.ld | 59 +++++++++++++++++ tests/tcg/nios2/Makefile.softmmu-target | 32 +++++++++ tests/tcg/nios2/ml-ftm.S | 20 ++++++ tests/tcg/nios2/ml-intr.S | 21 ++++++ tests/tcg/nios2/ml-memcpy.S | 68 +++++++++++++++++++ tests/tcg/nios2/ml-memset.S | 88 +++++++++++++++++++++++++ tests/tcg/nios2/ml-outc.S | 31 +++++++++ tests/tcg/nios2/ml-start.S | 46 +++++++++++++ 9 files changed, 390 insertions(+) create mode 100644 tests/tcg/nios2/semicall.h create mode 100644 tests/tcg/nios2/10m50-ghrd.ld create mode 100644 tests/tcg/nios2/Makefile.softmmu-target create mode 100644 tests/tcg/nios2/ml-ftm.S create mode 100644 tests/tcg/nios2/ml-intr.S create mode 100644 tests/tcg/nios2/ml-memcpy.S create mode 100644 tests/tcg/nios2/ml-memset.S create mode 100644 tests/tcg/nios2/ml-outc.S create mode 100644 tests/tcg/nios2/ml-start.S diff --git a/tests/tcg/nios2/semicall.h b/tests/tcg/nios2/semicall.h new file mode 100644 index 0000000000..d7acf665e1 --- /dev/null +++ b/tests/tcg/nios2/semicall.h @@ -0,0 +1,25 @@ +/* + * Nios2 semihosting interface. + */ + +#ifndef SEMICALL_H +#define SEMICALL_H + +#define HOSTED_EXIT 0 +#define HOSTED_INIT_SIM 1 +#define HOSTED_OPEN 2 +#define HOSTED_CLOSE 3 +#define HOSTED_READ 4 +#define HOSTED_WRITE 5 +#define HOSTED_LSEEK 6 +#define HOSTED_RENAME 7 +#define HOSTED_UNLINK 8 +#define HOSTED_STAT 9 +#define HOSTED_FSTAT 10 +#define HOSTED_GETTIMEOFDAY 11 +#define HOSTED_ISATTY 12 +#define HOSTED_SYSTEM 13 + +#define semihosting_call break 1 + +#endif /* SEMICALL_H */ diff --git a/tests/tcg/nios2/10m50-ghrd.ld b/tests/tcg/nios2/10m50-ghrd.ld new file mode 100644 index 0000000000..d83e136267 --- /dev/null +++ b/tests/tcg/nios2/10m50-ghrd.ld @@ -0,0 +1,59 @@ +MEMORY +{ + tpf (rx) : ORIGIN =3D 0xc0000000, LENGTH =3D 1K + ram (rwx) : ORIGIN =3D 0xc8000000, LENGTH =3D 128M +} + +PHDRS +{ + RAM PT_LOAD; +} + +ENTRY(_start) +EXTERN(_start) +EXTERN(_interrupt) +EXTERN(_fast_tlb_miss) + +SECTIONS +{ + /* Begin at the (hardcoded) _interrupt entry point. */ + .text 0xc8000120 : { + *(.text.intr) + *(.text .text.* .gnu.linkonce.t.*) + } >ram :RAM + + .rodata : ALIGN(4) { + *(.rodata .rodata.* .gnu.linkonce.r.*) + } > ram :RAM + + .eh_frame_hdr : ALIGN (4) { + KEEP (*(.eh_frame_hdr)) + *(.eh_frame_entry .eh_frame_entry.*) + } >ram :RAM + .eh_frame : ALIGN (4) { + KEEP (*(.eh_frame)) *(.eh_frame.*) + } >ram :RAM + + .data : ALIGN(4) { + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + . =3D ALIGN(4); + _gp =3D ABSOLUTE(. + 0x8000); + *(.got.plt) *(.got) + *(.lit8) + *(.lit4) + *(.sdata .sdata.* .gnu.linkonce.s.*) + } >ram :RAM + + .bss : ALIGN(4) { + __bss_start =3D ABSOLUTE(.); + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + . =3D ALIGN(4); + __bss_end =3D ABSOLUTE(.); + } >ram :RAM + + __stack =3D ORIGIN(ram) + LENGTH(ram); +} diff --git a/tests/tcg/nios2/Makefile.softmmu-target b/tests/tcg/nios2/Make= file.softmmu-target new file mode 100644 index 0000000000..20d8d143c6 --- /dev/null +++ b/tests/tcg/nios2/Makefile.softmmu-target @@ -0,0 +1,32 @@ +# +# Nios2 system tests +# + +NIOS2_SYSTEM_SRC =3D $(SRC_PATH)/tests/tcg/nios2 +VPATH +=3D $(NIOS2_SYSTEM_SRC) + +# These objects provide the basic boot code and helper functions for all t= ests +CRT_OBJS =3D minilib.a +LINK_SCRIPT =3D $(NIOS2_SYSTEM_SRC)/10m50-ghrd.ld + +CFLAGS +=3D -nostdlib -g -O0 $(MINILIB_INC) +LDFLAGS +=3D -Wl,-T$(LINK_SCRIPT) -static -nostdlib $(CRT_OBJS) -lgcc + +%.o: %.S + $(call quiet-command, $(CC) $(CFLAGS) $(EXTRA_CFLAGS) -x assembler-with-c= pp -c $< -o $@, AS, $@) + +%.o: %.c + $(call quiet-command, $(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@, CC, $@) + +minilib.a: ml-intr.o ml-start.o ml-ftm.o ml-outc.o ml-memcpy.o ml-memset.o= $(MINILIB_OBJS) + $(call quiet-command, $(AR) cqs $@ $^, AR, $@) + +# Build and link the tests +%: %.o $(LINK_SCRIPT) $(CRT_OBJS) + $(call quiet-command, $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)= , LD, $@) + +# FIXME: nios2 semihosting writes to stdout, not a chardev +QEMU_OPTS =3D -M 10m50-ghrd,vic=3Don -semihosting >$@.out -kernel + +memory: CFLAGS+=3D-DCHECK_UNALIGNED=3D0 +TESTS +=3D $(MULTIARCH_TESTS) diff --git a/tests/tcg/nios2/ml-ftm.S b/tests/tcg/nios2/ml-ftm.S new file mode 100644 index 0000000000..e21da45be5 --- /dev/null +++ b/tests/tcg/nios2/ml-ftm.S @@ -0,0 +1,20 @@ +/* + * Minimal Nios2 system boot code. + * + * Copyright Linaro Ltd 2022 + * + * Using semihosting for serial output and exit functions. + */ + +#include "semicall.h" + + .text + .global _fast_tlb_miss + .type _fast_tlb_miss, @function + +_fast_tlb_miss: + movi r5, 32 + movi r4, HOSTED_EXIT + semihosting_call + + .size _fast_tlb_miss, . - _fast_tlb_miss diff --git a/tests/tcg/nios2/ml-intr.S b/tests/tcg/nios2/ml-intr.S new file mode 100644 index 0000000000..b5a56c686c --- /dev/null +++ b/tests/tcg/nios2/ml-intr.S @@ -0,0 +1,21 @@ +/* + * Minimal Nios2 system boot code. + * + * Copyright Linaro Ltd 2022 + * + * Using semihosting for serial output and exit functions. + */ + +#include "semicall.h" + + .section .text.intr, "ax" + .global _interrupt + .type _interrupt, @function + +_interrupt: + rdctl r5, exception /* extract exception.CAUSE */ + srli r5, r5, 2 + movi r4, HOSTED_EXIT + semihosting_call + + .size _interrupt, . - _interrupt diff --git a/tests/tcg/nios2/ml-memcpy.S b/tests/tcg/nios2/ml-memcpy.S new file mode 100644 index 0000000000..8bdd934503 --- /dev/null +++ b/tests/tcg/nios2/ml-memcpy.S @@ -0,0 +1,68 @@ +/* + * Minimal Nios2 system minilib code: memcpy + * Copyright Linaro Ltd 2022 + */ + + .set noat + + .text + .global memcpy + .type memcpy, @function + +#define dst r4 +#define src r5 +#define len r6 + +memcpy: + /* Store return value right away, per API */ + mov r2, dst + + /* Check for both dst and src aligned. */ + or at, dst, src + andi at, at, 3 + bne at, zero, .L_test1 + + /* Copy blocks of 8. */ + + movi at, 8 + bltu len, at, .L_test4 + +.L_loop8: + ldw r8, 0(src) + ldw r9, 4(src) + addi src, src, 8 + addi dst, dst, 8 + subi len, len, 8 + stw r8, -8(dst) + stw r9, -4(dst) + bgeu len, at, .L_loop8 + + /* Copy final aligned block of 4. */ + +.L_test4: + movi at, 4 + bltu len, at, .L_test1 + + ldw r8, 0(src) + addi src, src, 4 + addi dst, dst, 4 + subi len, len, 4 + stw r8, -4(dst) + + /* Copy single bytes to finish. */ + +.L_test1: + beq len, zero, .L_done + +.L_loop1: + ldb r8, 0(src) + addi src, src, 1 + addi dst, dst, 1 + subi len, len, 1 + stb r8, -1(dst) + bne len, zero, .L_loop1 + +.L_done: + ret + + .size memcpy, . - memcpy diff --git a/tests/tcg/nios2/ml-memset.S b/tests/tcg/nios2/ml-memset.S new file mode 100644 index 0000000000..5c9bdde3e0 --- /dev/null +++ b/tests/tcg/nios2/ml-memset.S @@ -0,0 +1,88 @@ +/* + * Minimal Nios2 system minilib code: memset + * Copyright Linaro Ltd 2022 + */ + + .set noat + + .text + .global memset + .type memset, @function + +#define dst r4 +#define val r5 +#define len r6 + +memset: + /* Store return value right away, per API */ + mov r2, dst + + /* Check for small blocks; fall back to bytewise. */ + movi r3, 8 + bltu len, r3, .L_test1 + + /* Replicate the byte across the word. */ + andi val, val, 0xff + slli at, val, 8 + or val, val, at + slli at, val, 16 + or val, val, at + + /* Check for destination alignment; realign if needed. */ + andi at, dst, 3 + bne at, zero, .L_align + + /* Set blocks of 8. */ + +.L_loop8: + stw val, 0(dst) + stw val, 4(dst) + addi dst, dst, 8 + subi len, len, 8 + bgeu len, r3, .L_loop8 + + /* Set final aligned block of 4. */ + +.L_test4: + movi at, 4 + bltu len, at, .L_test1 + + stw r8, 0(dst) + addi dst, dst, 4 + subi len, len, 4 + stw r8, -4(dst) + + /* Set single bytes to finish. */ + +.L_test1: + beq len, zero, .L_done + +.L_loop1: + stb r8, 0(dst) + addi dst, dst, 1 + subi len, len, 1 + bne len, zero, .L_loop1 + +.L_done: + ret + + /* Realign for a large block, len >=3D 8. */ +.L_align: + andi at, dst, 1 + beq at, zero, 2f + + stb val, 0(dst) + addi dst, dst, 1 + subi len, len, 1 + +2: andi at, dst, 2 + beq at, zero, 4f + + sth val, 0(dst) + addi dst, dst, 2 + subi len, len, 2 + +4: bgeu len, r3, .L_loop8 + br .L_test4 + + .size memset, . - memset diff --git a/tests/tcg/nios2/ml-outc.S b/tests/tcg/nios2/ml-outc.S new file mode 100644 index 0000000000..e13f0f2581 --- /dev/null +++ b/tests/tcg/nios2/ml-outc.S @@ -0,0 +1,31 @@ +/* + * Minimal Nios2 system minilib code: __sys_outc + * Copyright Linaro Ltd 2022 + */ + +#include "semicall.h" + + .text + .global __sys_outc + .type __sys_outc, @function + .set noat + +/* + * void __sys_outc(char c); + */ +__sys_outc: + subi sp, sp, 16 + stb r4, 0(sp) /* buffer[0] =3D c */ + movi at, 1 + stw at, 4(sp) /* STDOUT_FILENO */ + stw sp, 8(sp) /* buffer */ + stw at, 12(sp) /* len */ + + movi r4, HOSTED_WRITE + addi r5, sp, 4 + semihosting_call + + addi sp, sp, 16 + ret + + .size __sys_outc, . - __sys_outc diff --git a/tests/tcg/nios2/ml-start.S b/tests/tcg/nios2/ml-start.S new file mode 100644 index 0000000000..68b612d70b --- /dev/null +++ b/tests/tcg/nios2/ml-start.S @@ -0,0 +1,46 @@ +/* + * Minimal Nios2 system boot code. + * Copyright Linaro Ltd 2022 + */ + +#include "semicall.h" + + .text + .set noat + +_start: + /* Linker script defines stack at end of ram. */ + movia sp, __stack + + /* Install trampoline to _fast_tlb_miss at hardcoded vector. */ + movia r4, 0xc0000100 + movia r5, _ftm_tramp + movi r6, .L__ftm_end - _ftm_tramp + call memcpy + + /* Zero the bss to satisfy C. */ + movia r4, __bss_start + movia r6, __bss_end + sub r6, r6, r4 + movi r5, 0 + call memset + + /* Test! */ + call main + + /* Exit with main's return value. */ + movi r4, HOSTED_EXIT + mov r5, r2 + semihosting_call + + .globl _start + .type _start, @function + .size _start, . - _start + +_ftm_tramp: + movia et, _fast_tlb_miss + jmp et +.L__ftm_end: + + .type _ftm_tramp, @function + .size _ftm_tramp, . - _ftm_tramp --=20 2.25.1 From nobody Tue May 14 19:13:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1647496984414165.21971647545024; Wed, 16 Mar 2022 23:03:04 -0700 (PDT) Received: from localhost ([::1]:42826 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nUjE0-00025o-PB for importer@patchew.org; Thu, 17 Mar 2022 02:03:04 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51816) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nUiOO-0005xf-9N for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:44 -0400 Received: from [2607:f8b0:4864:20::52d] (port=39444 helo=mail-pg1-x52d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nUiOL-0002gX-Dm for qemu-devel@nongnu.org; Thu, 17 Mar 2022 01:09:43 -0400 Received: by mail-pg1-x52d.google.com with SMTP id q19so1813039pgm.6 for ; Wed, 16 Mar 2022 22:09:30 -0700 (PDT) Received: from localhost.localdomain (174-21-142-130.tukw.qwest.net. [174.21.142.130]) by smtp.gmail.com with ESMTPSA id d10-20020a63360a000000b0037947abe4bbsm4217493pga.34.2022.03.16.22.09.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:09:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IvBEhqppOoPljEvawEk60xBsH14k/3nhv0YU5DA6zfM=; b=VIXuo5Vn2DynCae9PPVpCUYAuRklbhoyvqcsAIeDc8A5uybJC+CslX01qBvSjCnYQ0 o0Yn3GAievKV+CrzRqSbV5LPOoHoF178Njqrb58KBGe2N6eXvKjNSHaFNR43GBQ5WmHk e81wD1cOMjn4o9Hsw3fH2yN2EYnDsTynQHYts1xepZgU8yVJrPCsetR10qopl4dCDxrj m7AiywsHu2ttd8dH3HSScUOY9fBacrmqZP3TMXhjx7a0jsTbsxDCjdOk17FYFvaYmMKB 5Lif+H4C9s4KTGcBx/gWdn/vmp5N9t8LwJPQ8yW+RZp/JZmRM7jVk5q0mTO3eiHHChpE knTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IvBEhqppOoPljEvawEk60xBsH14k/3nhv0YU5DA6zfM=; b=RLaHVAW9B59S7jLkVFT6vcQDw1J3FwIrC6A1VwARBmUnmVkkwvFxrQTdOkMjA3rmNg yYbqUanmO9kMxHUJ38c+DnncoQzkefZabbfncnOIWd3pfr7ePtBKpRmzd//wpvfWF2Nx R826M1kxwS3df4iKkwGl3wLFo5LzgxpbsZq+5DuEv/uuOZFNRzgDhm0lYm7b+dvYFh1j sptp/V3DTQulrfQmuweU6X7C9wcxzCwU7fDZ13t5wz7vawEakcu+BclCvOrm4xg+6qJz NuuDYEZpvaT8SLzNvXmzJz9rK+3KRbtgNXBmeNn/pg5uOwQsjRT1Y2E51ZvbivWfWwj/ 5DCg== X-Gm-Message-State: AOAM531hdBak7YxgkNnI4vvR7cSwm7O8in+PzqyDGFDzI+tii9331Jhr pOZ+Ud+TYlxFmMZhwFgsQQvkXty3PwEGRw== X-Google-Smtp-Source: ABdhPJyGDn2jTTnn3qs2eghAZtJ4rPlxhsTiiw0oUcBltvYlnFV05NnnG2fY5Jg9PiY8JbfLxgkk8Q== X-Received: by 2002:a05:6a00:16c7:b0:4f7:e497:69b8 with SMTP id l7-20020a056a0016c700b004f7e49769b8mr3311703pfc.6.1647493769380; Wed, 16 Mar 2022 22:09:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 51/51] tests/tcg/nios2: Add test-shadow-1 Date: Wed, 16 Mar 2022 22:05:38 -0700 Message-Id: <20220317050538.924111-52-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, amir.gonnen@neuroblade.ai, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1647496986710100001 Add a regression test for tcg indirect global lowering. This appeared with nios2, with cps !=3D 0, so that we use indirection into the shadow register set. An indirect call verifies alignment of rA. The use of rA was live across the brcond leading to a tcg_debug_assert failure. Cc: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- tests/tcg/nios2/Makefile.softmmu-target | 1 + tests/tcg/nios2/test-shadow-1.S | 37 +++++++++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 tests/tcg/nios2/test-shadow-1.S diff --git a/tests/tcg/nios2/Makefile.softmmu-target b/tests/tcg/nios2/Make= file.softmmu-target index 20d8d143c6..48863549c9 100644 --- a/tests/tcg/nios2/Makefile.softmmu-target +++ b/tests/tcg/nios2/Makefile.softmmu-target @@ -30,3 +30,4 @@ QEMU_OPTS =3D -M 10m50-ghrd,vic=3Don -semihosting >$@.out= -kernel =20 memory: CFLAGS+=3D-DCHECK_UNALIGNED=3D0 TESTS +=3D $(MULTIARCH_TESTS) +TESTS +=3D test-shadow-1 diff --git a/tests/tcg/nios2/test-shadow-1.S b/tests/tcg/nios2/test-shadow-= 1.S new file mode 100644 index 0000000000..33076ddf59 --- /dev/null +++ b/tests/tcg/nios2/test-shadow-1.S @@ -0,0 +1,37 @@ +/* + * Regresion test for TCG indirect global lowering. + */ + +#include "semicall.h" + + .text + .set noat + .align 2 + .globl main + .type main, @function + +main: + /* Initialize r0 in shadow register set 1. */ + movhi at, 1 /* PRS=3D1, CRS=3D0, RSIE=3D0, PIE=3D0 */ + wrctl status, at + wrprs zero, zero + + /* Change current register set to 1. */ + movi at, 1 << 10 /* PRS=3D0, CRS=3D1, RSIE=3D0, PIE=3D0 */ + wrctl estatus, at + movia ea, 1f + eret + + /* Load address for callr, then end TB. */ +1: movia at, 3f + br 2f + + /* Test case! TCG abort on indirect lowering across brcond. */ +2: callr at + + /* exit(0) */ +3: movi r4, HOSTED_EXIT + movi r5, 0 + semihosting_call + + .size main, . - main --=20 2.25.1