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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646706047122100001 Content-Type: text/plain; charset="utf-8" From: David Miller * tests/tcg/s390x/vxeh2_vcvt.c : vector convert * tests/tcg/s390x/vxeh2_vs.c : vector shift * tests/tcg/s390x/vxeh2_vlstr.c : vector load/store reversed Signed-off-by: David Miller Message-Id: <20220307020327.3003-8-dmiller423@gmail.com> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- tests/tcg/s390x/vxeh2_vcvt.c | 97 +++++++++++++++++++++ tests/tcg/s390x/vxeh2_vlstr.c | 146 ++++++++++++++++++++++++++++++++ tests/tcg/s390x/vxeh2_vs.c | 91 ++++++++++++++++++++ tests/tcg/s390x/Makefile.target | 8 ++ 4 files changed, 342 insertions(+) create mode 100644 tests/tcg/s390x/vxeh2_vcvt.c create mode 100644 tests/tcg/s390x/vxeh2_vlstr.c create mode 100644 tests/tcg/s390x/vxeh2_vs.c diff --git a/tests/tcg/s390x/vxeh2_vcvt.c b/tests/tcg/s390x/vxeh2_vcvt.c new file mode 100644 index 0000000000..71ecbd77b0 --- /dev/null +++ b/tests/tcg/s390x/vxeh2_vcvt.c @@ -0,0 +1,97 @@ +/* + * vxeh2_vcvt: vector-enhancements facility 2 vector convert * + */ +#include + +typedef union S390Vector { + uint64_t d[2]; /* doubleword */ + uint32_t w[4]; /* word */ + uint16_t h[8]; /* halfword */ + uint8_t b[16]; /* byte */ + float f[4]; + double fd[2]; + __uint128_t v; +} S390Vector; + +#define M_S 8 +#define M4_XxC 4 +#define M4_def M4_XxC + +static inline void vcfps(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vcfps %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +static inline void vcfpl(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vcfpl %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +static inline void vcsfp(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vcsfp %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +static inline void vclfp(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vclfp %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +int main(int argc, char *argv[]) +{ + S390Vector vd; + S390Vector vs_i32 =3D { .w[0] =3D 1, .w[1] =3D 64, .w[2] =3D 1024, .w[= 3] =3D -10 }; + S390Vector vs_u32 =3D { .w[0] =3D 2, .w[1] =3D 32, .w[2] =3D 4096, .w[= 3] =3D 8888 }; + S390Vector vs_f32 =3D { .f[0] =3D 3.987, .f[1] =3D 5.123, + .f[2] =3D 4.499, .f[3] =3D 0.512 }; + + vd.d[0] =3D vd.d[1] =3D 0; + vcfps(&vd, &vs_i32, 2, M4_def, 0); + if (1 !=3D vd.f[0] || 1024 !=3D vd.f[2] || 64 !=3D vd.f[1] || -10 !=3D= vd.f[3]) { + return 1; + } + + vd.d[0] =3D vd.d[1] =3D 0; + vcfpl(&vd, &vs_u32, 2, M4_def, 0); + if (2 !=3D vd.f[0] || 4096 !=3D vd.f[2] || 32 !=3D vd.f[1] || 8888 != =3D vd.f[3]) { + return 1; + } + + vd.d[0] =3D vd.d[1] =3D 0; + vcsfp(&vd, &vs_f32, 2, M4_def, 0); + if (4 !=3D vd.w[0] || 4 !=3D vd.w[2] || 5 !=3D vd.w[1] || 1 !=3D vd.w[= 3]) { + return 1; + } + + vd.d[0] =3D vd.d[1] =3D 0; + vclfp(&vd, &vs_f32, 2, M4_def, 0); + if (4 !=3D vd.w[0] || 4 !=3D vd.w[2] || 5 !=3D vd.w[1] || 1 !=3D vd.w[= 3]) { + return 1; + } + + return 0; +} diff --git a/tests/tcg/s390x/vxeh2_vlstr.c b/tests/tcg/s390x/vxeh2_vlstr.c new file mode 100644 index 0000000000..bf2954e86d --- /dev/null +++ b/tests/tcg/s390x/vxeh2_vlstr.c @@ -0,0 +1,146 @@ +/* + * vxeh2_vlstr: vector-enhancements facility 2 vector load/store reversed * + */ +#include + +typedef union S390Vector { + uint64_t d[2]; /* doubleword */ + uint32_t w[4]; /* word */ + uint16_t h[8]; /* halfword */ + uint8_t b[16]; /* byte */ + __uint128_t v; +} S390Vector; + +#define ES8 0 +#define ES16 1 +#define ES32 2 +#define ES64 3 + +#define vtst(v1, v2) \ + if (v1.d[0] !=3D v2.d[0] || v1.d[1] !=3D v2.d[1]) { \ + return 1; \ + } + +static inline void vler(S390Vector *v1, const void *va, uint8_t m3) +{ + asm volatile("vler %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vster(S390Vector *v1, const void *va, uint8_t m3) +{ + asm volatile("vster %[v1], 0(%[va]), %[m3]\n" + : [va] "+d" (va) + : [v1] "v" (v1->v) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vlbr(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vlbr %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vstbr(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vstbr %[v1], 0(%[va]), %[m3]\n" + : [va] "+d" (va) + : [v1] "v" (v1->v) + , [m3] "i" (m3) + : "memory"); +} + + +static inline void vlebrh(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vlebrh %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vstebrh(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vstebrh %[v1], 0(%[va]), %[m3]\n" + : [va] "+d" (va) + : [v1] "v" (v1->v) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vllebrz(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vllebrz %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vlbrrep(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vlbrrep %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + + +int main(int argc, char *argv[]) +{ + S390Vector vd =3D { .d[0] =3D 0, .d[1] =3D 0 }; + S390Vector vs =3D { .d[0] =3D 0x8FEEDDCCBBAA9988ull, + .d[1] =3D 0x7766554433221107ull }; + + const S390Vector vt_v_er16 =3D { + .h[0] =3D 0x1107, .h[1] =3D 0x3322, .h[2] =3D 0x5544, .h[3] =3D 0x= 7766, + .h[4] =3D 0x9988, .h[5] =3D 0xBBAA, .h[6] =3D 0xDDCC, .h[7] =3D 0x= 8FEE }; + + const S390Vector vt_v_br16 =3D { + .h[0] =3D 0xEE8F, .h[1] =3D 0xCCDD, .h[2] =3D 0xAABB, .h[3] =3D 0x= 8899, + .h[4] =3D 0x6677, .h[5] =3D 0x4455, .h[6] =3D 0x2233, .h[7] =3D 0x= 0711 }; + + int ix; + uint64_t ss64 =3D 0xFEEDFACE0BADBEEFull, sd64 =3D 0; + + vler (&vd, &vs, ES16); vtst(vd, vt_v_er16); + vster(&vs, &vd, ES16); vtst(vd, vt_v_er16); + + vlbr (&vd, &vs, ES16); vtst(vd, vt_v_br16); + vstbr(&vs, &vd, ES16); vtst(vd, vt_v_br16); + + vlebrh(&vd, &ss64, 5); + if (0xEDFE !=3D vd.h[5]) { + return 1; + } + + vstebrh(&vs, (uint8_t *)&sd64 + 4, 7); + if (0x0000000007110000ull !=3D sd64) { + return 1; + } + + vllebrz(&vd, (uint8_t *)&ss64 + 3, 2); + for (ix =3D 0; ix < 4; ix++) { + if (vd.w[ix] !=3D (ix !=3D 1 ? 0 : 0xBEAD0BCE)) { + return 1; + } + } + + vlbrrep(&vd, (uint8_t *)&ss64 + 4, 1); + for (ix =3D 0; ix < 8; ix++) { + if (0xAD0B !=3D vd.h[ix]) { + return 1; + } + } + + return 0; +} diff --git a/tests/tcg/s390x/vxeh2_vs.c b/tests/tcg/s390x/vxeh2_vs.c new file mode 100644 index 0000000000..04a3d4d7bb --- /dev/null +++ b/tests/tcg/s390x/vxeh2_vs.c @@ -0,0 +1,91 @@ +/* + * vxeh2_vs: vector-enhancements facility 2 vector shift + */ +#include + +typedef union S390Vector { + uint64_t d[2]; /* doubleword */ + uint32_t w[4]; /* word */ + uint16_t h[8]; /* halfword */ + uint8_t b[16]; /* byte */ + __uint128_t v; +} S390Vector; + +#define vtst(v1, v2) \ + if (v1.d[0] !=3D v2.d[0] || v1.d[1] !=3D v2.d[1]) { \ + return 1; \ + } + +static inline void vsl(S390Vector *v1, S390Vector *v2, S390Vector *v3) +{ + asm volatile("vsl %[v1], %[v2], %[v3]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v)); +} + +static inline void vsra(S390Vector *v1, S390Vector *v2, S390Vector *v3) +{ + asm volatile("vsra %[v1], %[v2], %[v3]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v)); +} + +static inline void vsrl(S390Vector *v1, S390Vector *v2, S390Vector *v3) +{ + asm volatile("vsrl %[v1], %[v2], %[v3]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v)); +} + +static inline void vsld(S390Vector *v1, S390Vector *v2, + S390Vector *v3, const uint8_t I) +{ + asm volatile("vsld %[v1], %[v2], %[v3], %[I]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v) + , [I] "i" (I & 7)); +} + +static inline void vsrd(S390Vector *v1, S390Vector *v2, + S390Vector *v3, const uint8_t I) +{ + asm volatile("vsrd %[v1], %[v2], %[v3], %[I]\n" + : [v1] "=3Dv" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v) + , [I] "i" (I & 7)); +} + +int main(int argc, char *argv[]) +{ + const S390Vector vt_vsl =3D { .d[0] =3D 0x7FEDBB32D5AA311Dull, + .d[1] =3D 0xBB65AA10912220C0ull }; + const S390Vector vt_vsra =3D { .d[0] =3D 0xF1FE6E7399AA5466ull, + .d[1] =3D 0x0E762A5188221044ull }; + const S390Vector vt_vsrl =3D { .d[0] =3D 0x11FE6E7399AA5466ull, + .d[1] =3D 0x0E762A5188221044ull }; + const S390Vector vt_vsld =3D { .d[0] =3D 0x7F76EE65DD54CC43ull, + .d[1] =3D 0xBB32AA2199108838ull }; + const S390Vector vt_vsrd =3D { .d[0] =3D 0x0E060802040E000Aull, + .d[1] =3D 0x0C060802040E000Aull }; + S390Vector vs =3D { .d[0] =3D 0x8FEEDDCCBBAA9988ull, + .d[1] =3D 0x7766554433221107ull }; + S390Vector vd =3D { .d[0] =3D 0, .d[1] =3D 0 }; + S390Vector vsi =3D { .d[0] =3D 0, .d[1] =3D 0 }; + + for (int ix =3D 0; ix < 16; ix++) { + vsi.b[ix] =3D (1 + (5 ^ ~ix)) & 7; + } + + vsl (&vd, &vs, &vsi); vtst(vd, vt_vsl); + vsra(&vd, &vs, &vsi); vtst(vd, vt_vsra); + vsrl(&vd, &vs, &vsi); vtst(vd, vt_vsrl); + vsld(&vd, &vs, &vsi, 3); vtst(vd, vt_vsld); + vsrd(&vd, &vs, &vsi, 15); vtst(vd, vt_vsrd); + + return 0; +} diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.tar= get index 257c568c58..badb7b16fe 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -16,6 +16,14 @@ TESTS+=3Dshift TESTS+=3Dtrap TESTS+=3Dsignals-s390x =20 +VECTOR_TESTS=3Dvxeh2_vs +VECTOR_TESTS+=3Dvxeh2_vcvt +VECTOR_TESTS+=3Dvxeh2_vlstr + +TESTS+=3D$(VECTOR_TESTS) + +$(VECTOR_TESTS): CFLAGS+=3D-march=3Dz15 -O2 + ifneq ($(HAVE_GDB_BIN),) GDB_SCRIPT=3D$(SRC_PATH)/tests/guest-debug/run-test.py =20 --=20 2.25.1