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Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v7 4/4] hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present Date: Fri, 4 Mar 2022 21:10:32 +0530 Message-Id: <20220304154032.2071585-5-ani@anisinha.ca> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220304154032.2071585-1-ani@anisinha.ca> References: <20220304154032.2071585-1-ani@anisinha.ca> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2607:f8b0:4864:20::62b; envelope-from=ani@anisinha.ca; helo=mail-pl1-x62b.google.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ani Sinha , imammedo@redhat.com, liavalb@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646409396533100001 Content-Type: text/plain; charset="utf-8" The second bit of IAPC_BOOT_ARCH in FADT table indicates the presence of keyboard controller implemented as 8042 or equivalent micro controller. This change enables this flag for microvms if such a device exists (for example, when added explicitly from the QEMU commandline). Change 654701e292d98b308b0 ("hw/acpi: add indication for i8042 in IA-PC boot flags= of the FADT table") enabled this flag for i386 q35 based machines. The reason for doing the same for micro-vms is to make sure we provide the correct tables to the guest OS uniformly in all cases when an i8042 device is present. When this bit is not enabled, guest OSes has to find other indirect methods to detect the device which we would like to avoid. Signed-off-by: Ani Sinha --- hw/i386/acpi-microvm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c index 68ca7e7fc2..fb09185cbd 100644 --- a/hw/i386/acpi-microvm.c +++ b/hw/i386/acpi-microvm.c @@ -37,6 +37,7 @@ #include "hw/pci/pcie_host.h" #include "hw/usb/xhci.h" #include "hw/virtio/virtio-mmio.h" +#include "hw/input/i8042.h" =20 #include "acpi-common.h" #include "acpi-microvm.h" @@ -187,6 +188,11 @@ static void acpi_build_microvm(AcpiBuildTables *tables, .address =3D GED_MMIO_BASE_REGS + ACPI_GED_REG_RESET, }, .reset_val =3D ACPI_GED_RESET_VALUE, + /* + * ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Archite= cture + * Flags, bit offset 1 - 8042. + */ + .iapc_boot_arch =3D iapc_boot_arch_8042(), }; =20 table_offsets =3D g_array_new(false, true /* clear */, --=20 2.25.1