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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t5-20020adff045000000b001f0684c3404sm517060wro.11.2022.03.03.12.23.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 12:23:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=29b8lo8/2aDtc19BPdL0SPSbYLySMtmUOuWMoFbG/ns=; b=FvZhtGVer27dTJubJdUK4af2xjGTJfVuowUcpZS94HUS1nV8nO7QN1+HaS+qKU6FA+ ArCinFc1JY/PHXoXmEyvahtirOr6ZP2W0THT63dt3DGSL16iZps2aKzBpC8xpbeP2Alu kpO8jfcFHfmfIuI5yVE23AsfyMm4DgPrQe6bmnenEQi03euZJYebXkEdXbQjOQ5Rs447 oflJH+WeHusjde9I0JKq8AQyN19b5jLZQ2nEFg9xaLjdCyBBogjH2Q8t8SlNQY/9PX8h r5AjNN5D8jiOk/aBr9eGi/ttnDeFrmvBIGBJeo/5x+3kmPdWrVTRsCwBReUnwvN5C38K wioQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=29b8lo8/2aDtc19BPdL0SPSbYLySMtmUOuWMoFbG/ns=; b=AVCpR4Gbcp/aqwfDa/sZVDUKoxdqTZ2KiBi8J5t1dkPBycIp5paEHVVFvkiVqMMUf0 kRLntA2f74swj5/I0JjngOjrZCaH3P9/4ZYqbCL6NuppAJVS4MsfksxPDYVXbnoMWET8 viWaYLG9dg/O6m6rTxNJy/06KD25o4YTdPsRbQm4hzUDWHy4ywQEUA6BntTQW7jzKPGx oNSPnuYESThQQdlBI3ZbBLAHf1NDrNCEaZDRkmIDYnNTJt7H1qK1mvAaY9bJcJhzxSQB jgZIJ/4OtnuhFKn6jM25YKtCYVSdEILvywi4GdiPnAnwiTmmge1Sr04dvLFv3QX7YC0o 3tbg== X-Gm-Message-State: AOAM530BOiJfwM96bsUTEqPy3BRmtgMQHrgBQvcwXxuwOETpUQAfRTXs kbJmcMoEJW8IH9rs8pYjcsw6DQ== X-Google-Smtp-Source: ABdhPJx+HrN9qThkWWQ4SI7ZLeyjLu8c9YPIxz5PYd8myyVgVsVgft21VX2awbbPoxEGoA4bFwssWg== X-Received: by 2002:a5d:648d:0:b0:1ef:d62a:8414 with SMTP id o13-20020a5d648d000000b001efd62a8414mr15184822wri.99.1646339025232; Thu, 03 Mar 2022 12:23:45 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/5] hw/intc/arm_gicv3_its: Add trace events for commands Date: Thu, 3 Mar 2022 20:23:37 +0000 Message-Id: <20220303202341.2232284-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303202341.2232284-1-peter.maydell@linaro.org> References: <20220303202341.2232284-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::434 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1646339240049100001 Content-Type: text/plain; charset="utf-8" When debugging code that's using the ITS, it's helpful to see tracing of the ITS commands that the guest executes. Add suitable trace events. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 28 ++++++++++++++++++++++++++-- hw/intc/trace-events | 12 ++++++++++++ 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 4f598d3c14f..77dc702734b 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -366,6 +366,19 @@ static ItsCmdResult process_its_cmd(GICv3ITSState *s, = const uint64_t *cmdpkt, =20 devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; eventid =3D cmdpkt[1] & EVENTID_MASK; + switch (cmd) { + case INTERRUPT: + trace_gicv3_its_cmd_int(devid, eventid); + break; + case CLEAR: + trace_gicv3_its_cmd_clear(devid, eventid); + break; + case DISCARD: + trace_gicv3_its_cmd_discard(devid, eventid); + break; + default: + g_assert_not_reached(); + } return do_process_its_cmd(s, devid, eventid, cmd); } =20 @@ -382,15 +395,16 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, c= onst uint64_t *cmdpkt, =20 devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; eventid =3D cmdpkt[1] & EVENTID_MASK; + icid =3D cmdpkt[2] & ICID_MASK; =20 if (ignore_pInt) { pIntid =3D eventid; + trace_gicv3_its_cmd_mapi(devid, eventid, icid); } else { pIntid =3D (cmdpkt[1] & pINTID_MASK) >> pINTID_SHIFT; + trace_gicv3_its_cmd_mapti(devid, eventid, icid, pIntid); } =20 - icid =3D cmdpkt[2] & ICID_MASK; - if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: devid %d>=3D%d", @@ -484,6 +498,7 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, cons= t uint64_t *cmdpkt) } else { cte.rdbase =3D 0; } + trace_gicv3_its_cmd_mapc(icid, cte.rdbase, cte.valid); =20 if (icid >=3D s->ct.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%d", icid= ); @@ -539,6 +554,8 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, cons= t uint64_t *cmdpkt) dte.ittaddr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT; dte.valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; =20 + trace_gicv3_its_cmd_mapd(devid, dte.size, dte.ittaddr, dte.valid); + if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPD: invalid device ID field 0x%x >=3D 0x%x\n", @@ -562,6 +579,8 @@ static ItsCmdResult process_movall(GICv3ITSState *s, co= nst uint64_t *cmdpkt) rd1 =3D FIELD_EX64(cmdpkt[2], MOVALL_2, RDBASE1); rd2 =3D FIELD_EX64(cmdpkt[3], MOVALL_3, RDBASE2); =20 + trace_gicv3_its_cmd_movall(rd1, rd2); + if (rd1 >=3D s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, "%s: RDBASE1 %" PRId64 @@ -601,6 +620,8 @@ static ItsCmdResult process_movi(GICv3ITSState *s, cons= t uint64_t *cmdpkt) eventid =3D FIELD_EX64(cmdpkt[1], MOVI_1, EVENTID); new_icid =3D FIELD_EX64(cmdpkt[2], MOVI_2, ICID); =20 + trace_gicv3_its_cmd_movi(devid, eventid, new_icid); + if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: devid %d>=3D%d", @@ -779,6 +800,7 @@ static void process_cmdq(GICv3ITSState *s) * is already consistent by the time SYNC command is executed. * Hence no further processing is required for SYNC command. */ + trace_gicv3_its_cmd_sync(); break; case GITS_CMD_MAPD: result =3D process_mapd(s, cmdpkt); @@ -803,6 +825,7 @@ static void process_cmdq(GICv3ITSState *s) * need to trigger lpi priority re-calculation to be in * sync with LPI config table or pending table changes. */ + trace_gicv3_its_cmd_inv(); for (i =3D 0; i < s->gicv3->num_cpu; i++) { gicv3_redist_update_lpi(&s->gicv3->cpu[i]); } @@ -814,6 +837,7 @@ static void process_cmdq(GICv3ITSState *s) result =3D process_movall(s, cmdpkt); break; default: + trace_gicv3_its_cmd_unknown(cmd); break; } if (result =3D=3D CMD_CONTINUE) { diff --git a/hw/intc/trace-events b/hw/intc/trace-events index b28cda4e08e..e92662b405c 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -176,6 +176,18 @@ gicv3_its_write(uint64_t offset, uint64_t data, unsign= ed size) "GICv3 ITS write: gicv3_its_badwrite(uint64_t offset, uint64_t data, unsigned size) "GICv3 I= TS write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u: error" gicv3_its_translation_write(uint64_t offset, uint64_t data, unsigned size,= uint32_t requester_id) "GICv3 ITS TRANSLATER write: offset 0x%" PRIx64 " d= ata 0x%" PRIx64 " size %u requester_id 0x%x" gicv3_its_process_command(uint32_t rd_offset, uint8_t cmd) "GICv3 ITS: pro= cessing command at offset 0x%x: 0x%x" +gicv3_its_cmd_int(uint32_t devid, uint32_t eventid) "GICv3 ITS: command IN= T DeviceID 0x%x EventID 0x%x" +gicv3_its_cmd_clear(uint32_t devid, uint32_t eventid) "GICv3 ITS: command = CLEAR DeviceID 0x%x EventID 0x%x" +gicv3_its_cmd_discard(uint32_t devid, uint32_t eventid) "GICv3 ITS: comman= d DISCARD DeviceID 0x%x EventID 0x%x" +gicv3_its_cmd_sync(void) "GICv3 ITS: command SYNC" +gicv3_its_cmd_mapd(uint32_t devid, uint32_t size, uint64_t ittaddr, int va= lid) "GICv3 ITS: command MAPD DeviceID 0x%x Size 0x%x ITT_addr 0x%" PRIx64 = " V %d" +gicv3_its_cmd_mapc(uint32_t icid, uint64_t rdbase, int valid) "GICv3 ITS: = command MAPC ICID 0x%x RDbase 0x%" PRIx64 " V %d" +gicv3_its_cmd_mapi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MAPI DeviceID 0x%x EventID 0x%x ICID 0x%x" +gicv3_its_cmd_mapti(uint32_t devid, uint32_t eventid, uint32_t icid, uint3= 2_t intid) "GICv3 ITS: command MAPTI DeviceID 0x%x EventID 0x%x ICID 0x%x p= INTID 0x%x" +gicv3_its_cmd_inv(void) "GICv3 ITS: command INV or INVALL" +gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) "GICv3 ITS: command MOVAL= L RDbase1 0x%" PRIx64 " RDbase2 0x%" PRIx64 +gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x" +gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" =20 # armv7m_nvic.c nvic_recompute_state(int vectpending, int vectpending_prio, int exception_= prio) "NVIC state recomputed: vectpending %d vectpending_prio %d exception_= prio %d" --=20 2.25.1 From nobody Mon May 13 23:48:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t5-20020adff045000000b001f0684c3404sm517060wro.11.2022.03.03.12.23.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 12:23:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=cuehPBnSig6Jq64CPU+VvGsY4ITWKqf7FpYjraZi08c=; b=lh2DXkHpu6gA7JtD0EIV9dIIJ5LkgmiGkyMK+H1hF33HZpC+Z0TgjMe7lDUijwCjiW rqjh2K/6f4DC/jYVS+dXQvXtdhQiPYELPmqEV5U40b+lwhCU6MJUG5ndq2+S2k/EXbAp qEgfuWJr9PFMwygugz65LxWJgEaGqG3rpoDB5L2XsHeYwQf3PqVW4tfmDYKqDr/+/YJp JS96ZM/Ho9HXowBrQxzpa3cNb3JVV0kyvc6o9rWUdO5qgnOF34jD2qkCzEqkaPuEFw6x rHv9NY0ovvYhcJL4qPR8yO0vW/idiKXJzYNwWAizO5P0Kvj2hpbf8fTTTg9sykD9dyeb tuyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cuehPBnSig6Jq64CPU+VvGsY4ITWKqf7FpYjraZi08c=; b=B2RGmdursagLNYpJAylSGsZzl+XPVYe7wefFOCeC8VodB0T/Wc3ybA/UQkSqNrkOIE oV22Tlh6esIMBtYCVA4Z96rHp7eVT8pmfFg9olPmhe+UFDQiEuJ77uBQbrjZTZrXr9oH g+Xmr52brgOaYKpEySC35M7Ek4Tt8EgZfoyu4iO68rObuEK3lV4WB20jhLI6Ux7bYU/d 1K5RXZum8cpAS3wPiVvKchSVUD3lAGuu4hjuDu5pGd8zgMPG2UuOUjTVcw/0hgC++SlO K8M1mEKImJU6ii9qTXjTZR/NSly7IseAp0F9ZYQ+JOQgNEfb8mdzsfCTFOLlH/otwlK9 YCHQ== X-Gm-Message-State: AOAM532VKj3zmvTyyhrghNp5xtxwgsA+Lvuq/Bhr1tCnl48O8BqUxnty /O3FRxDuy94Q7v5pdmGsPCVwaA== X-Google-Smtp-Source: ABdhPJyW3smwq8KiBRmuBIFnImLQ1DDIW5+8EvsF1pAU8oLMA3bInN20UC3bk1MHuh47sr0qKVIWVA== X-Received: by 2002:adf:d089:0:b0:1ed:9e86:2144 with SMTP id y9-20020adfd089000000b001ed9e862144mr27167687wrh.363.1646339026067; Thu, 03 Mar 2022 12:23:46 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/5] hw/intc/arm_gicv3_its: Add trace events for table reads and writes Date: Thu, 3 Mar 2022 20:23:38 +0000 Message-Id: <20220303202341.2232284-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303202341.2232284-1-peter.maydell@linaro.org> References: <20220303202341.2232284-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::436 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1646339143398100002 Content-Type: text/plain; charset="utf-8" For debugging guest use of the ITS, it can be helpful to trace when the ITS reads and writes the in-memory tables. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 37 +++++++++++++++++++++++++++++++------ hw/intc/trace-events | 9 +++++++++ 2 files changed, 40 insertions(+), 6 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 77dc702734b..9f4df6a8cbb 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -161,16 +161,22 @@ static MemTxResult get_cte(GICv3ITSState *s, uint16_t= icid, CTEntry *cte) if (entry_addr =3D=3D -1) { /* No L2 table entry, i.e. no valid CTE, or a memory error */ cte->valid =3D false; - return res; + goto out; } =20 cteval =3D address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED= , &res); if (res !=3D MEMTX_OK) { - return res; + goto out; } cte->valid =3D FIELD_EX64(cteval, CTE, VALID); cte->rdbase =3D FIELD_EX64(cteval, CTE, RDBASE); - return MEMTX_OK; +out: + if (res !=3D MEMTX_OK) { + trace_gicv3_its_cte_read_fault(icid); + } else { + trace_gicv3_its_cte_read(icid, cte->valid, cte->rdbase); + } + return res; } =20 /* @@ -187,6 +193,10 @@ static bool update_ite(GICv3ITSState *s, uint32_t even= tid, const DTEntry *dte, uint64_t itel =3D 0; uint32_t iteh =3D 0; =20 + trace_gicv3_its_ite_write(dte->ittaddr, eventid, ite->valid, + ite->inttype, ite->intid, ite->icid, + ite->vpeid, ite->doorbell); + if (ite->valid) { itel =3D FIELD_DP64(itel, ITE_L, VALID, 1); itel =3D FIELD_DP64(itel, ITE_L, INTTYPE, ite->inttype); @@ -221,11 +231,13 @@ static MemTxResult get_ite(GICv3ITSState *s, uint32_t= eventid, =20 itel =3D address_space_ldq_le(as, iteaddr, MEMTXATTRS_UNSPECIFIED, &re= s); if (res !=3D MEMTX_OK) { + trace_gicv3_its_ite_read_fault(dte->ittaddr, eventid); return res; } =20 iteh =3D address_space_ldl_le(as, iteaddr + 8, MEMTXATTRS_UNSPECIFIED,= &res); if (res !=3D MEMTX_OK) { + trace_gicv3_its_ite_read_fault(dte->ittaddr, eventid); return res; } =20 @@ -235,6 +247,9 @@ static MemTxResult get_ite(GICv3ITSState *s, uint32_t e= ventid, ite->icid =3D FIELD_EX64(itel, ITE_L, ICID); ite->vpeid =3D FIELD_EX64(itel, ITE_L, VPEID); ite->doorbell =3D FIELD_EX64(iteh, ITE_H, DOORBELL); + trace_gicv3_its_ite_read(dte->ittaddr, eventid, ite->valid, + ite->inttype, ite->intid, ite->icid, + ite->vpeid, ite->doorbell); return MEMTX_OK; } =20 @@ -254,17 +269,23 @@ static MemTxResult get_dte(GICv3ITSState *s, uint32_t= devid, DTEntry *dte) if (entry_addr =3D=3D -1) { /* No L2 table entry, i.e. no valid DTE, or a memory error */ dte->valid =3D false; - return res; + goto out; } dteval =3D address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED= , &res); if (res !=3D MEMTX_OK) { - return res; + goto out; } dte->valid =3D FIELD_EX64(dteval, DTE, VALID); dte->size =3D FIELD_EX64(dteval, DTE, SIZE); /* DTE word field stores bits [51:8] of the ITT address */ dte->ittaddr =3D FIELD_EX64(dteval, DTE, ITTADDR) << ITTADDR_SHIFT; - return MEMTX_OK; +out: + if (res !=3D MEMTX_OK) { + trace_gicv3_its_dte_read_fault(devid); + } else { + trace_gicv3_its_dte_read(devid, dte->valid, dte->size, dte->ittadd= r); + } + return res; } =20 /* @@ -465,6 +486,8 @@ static bool update_cte(GICv3ITSState *s, uint16_t icid,= const CTEntry *cte) uint64_t cteval =3D 0; MemTxResult res =3D MEMTX_OK; =20 + trace_gicv3_its_cte_write(icid, cte->valid, cte->rdbase); + if (cte->valid) { /* add mapping entry to collection table */ cteval =3D FIELD_DP64(cteval, CTE, VALID, 1); @@ -524,6 +547,8 @@ static bool update_dte(GICv3ITSState *s, uint32_t devid= , const DTEntry *dte) uint64_t dteval =3D 0; MemTxResult res =3D MEMTX_OK; =20 + trace_gicv3_its_dte_write(devid, dte->valid, dte->size, dte->ittaddr); + if (dte->valid) { /* add mapping entry to device table */ dteval =3D FIELD_DP64(dteval, DTE, VALID, 1); diff --git a/hw/intc/trace-events b/hw/intc/trace-events index e92662b405c..53414aa1979 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -188,6 +188,15 @@ gicv3_its_cmd_inv(void) "GICv3 ITS: command INV or INV= ALL" gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) "GICv3 ITS: command MOVAL= L RDbase1 0x%" PRIx64 " RDbase2 0x%" PRIx64 gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x" gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" +gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" +gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" +gicv3_its_cte_read_fault(uint32_t icid) "GICv3 ITS: Collection Table read = for ICID 0x%x: faulted" +gicv3_its_ite_read(uint64_t ittaddr, uint32_t eventid, int valid, int intt= ype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) "GIC= v3 ITS: Interrupt Table read for ITTaddr 0x%" PRIx64 " EventID 0x%x: valid = %d inttype %d intid 0x%x ICID 0x%x vPEID 0x%x doorbell 0x%x" +gicv3_its_ite_read_fault(uint64_t ittaddr, uint32_t eventid) "GICv3 ITS: I= nterrupt Table read for ITTaddr 0x%" PRIx64 " EventID 0x%x: faulted" +gicv3_its_ite_write(uint64_t ittaddr, uint32_t eventid, int valid, int int= type, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) "GI= Cv3 ITS: Interrupt Table write for ITTaddr 0x%" PRIx64 " EventID 0x%x: vali= d %d inttype %d intid 0x%x ICID 0x%x vPEID 0x%x doorbell 0x%x" +gicv3_its_dte_read(uint32_t devid, int valid, uint32_t size, uint64_t itta= ddr) "GICv3 ITS: Device Table read for DeviceID 0x%x: valid %d size 0x%x IT= Taddr 0x%" PRIx64 +gicv3_its_dte_write(uint32_t devid, int valid, uint32_t size, uint64_t itt= addr) "GICv3 ITS: Device Table write for DeviceID 0x%x: valid %d size 0x%x = ITTaddr 0x%" PRIx64 +gicv3_its_dte_read_fault(uint32_t devid) "GICv3 ITS: Device Table read for= DeviceID 0x%x: faulted" =20 # armv7m_nvic.c nvic_recompute_state(int vectpending, int vectpending_prio, int exception_= prio) "NVIC state recomputed: vectpending %d vectpending_prio %d exception_= prio %d" --=20 2.25.1 From nobody Mon May 13 23:48:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t5-20020adff045000000b001f0684c3404sm517060wro.11.2022.03.03.12.23.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 12:23:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=BwQur4NZBGGWfHrVPMLWwKCyDvLwx3c9PUY0EKxgx9k=; b=dnTyXeu1Yaiit8GnHMv0BTLnhMuUWGKjNnwyZ6lmKiSXTrd+TuVV72sNBvqSS0Ag2A FpRdeJ8+7KgV5TH1M+5jE3/WhiWhRkN6Z0eS5SMiq7U7HC6uI7qA0Tnia6vZjdYYD/ug m2o+ls1iCbirTUg2um/VeaHHHRsySaA0pjQLLgXpWLtO/lAYbHKpq1dbt9hi1mtHSXRW vwm2Xy32mAsNEY92jj66Op34Ml06WTblylElZNSXPYGwQ8q8Rkom21gNc30fTkt/sdBV QKViKUiamVLpiHg5ViTa3hY7QYuTho/Esctg/cDBGPZBYu4FdDK4FwEFV/QjApQw4n1c RERw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BwQur4NZBGGWfHrVPMLWwKCyDvLwx3c9PUY0EKxgx9k=; b=MMbYm85Jp5FMKtGKLxsg+1naAPtxcyt7k476+mkyx3MQeQ2+pYGHA+uHmKf5af7OPD 5mh4PgrAneBmpPZI6orqEm2FR5/UDxzyUWvP3qaa6lmNzFXDNsgoyRdRJMRzc624qfsY 9exoPoNL2mmZo0Tx+iFMd2i2vZQvQ1yj+y4Tx4XALGhT77X2Mi07g/tO/gc7fRYosJvC lpsP/bcx/Ca9jxzTPpTYFubbmFpstzUrpBZdadMbYfEtxAe79afybJzoULMWPn3YUJN1 H3mIfxqJKi/rBRxtwZ8VIGM9nztFcX/8NJJrmLNxrnCgJmjnn5+a9X93wiylWJKgBa4z YqHQ== X-Gm-Message-State: AOAM533Vrx8SfFAznoTblvpX60S77EGAugPZP6cQP/j4eh8eQ3IUJ5zd GWkk+0IQ5sbw9s7Cd9BOXxYTyA== X-Google-Smtp-Source: ABdhPJyIFJEbFCXFrAXAG1V1cE8DNT7nazsjswnKzudAkRbKp1jRdK2zDTzw8dyoRDzIgjoihXVvbg== X-Received: by 2002:a05:600c:3d0b:b0:382:aa17:8f16 with SMTP id bh11-20020a05600c3d0b00b00382aa178f16mr5025218wmb.82.1646339027128; Thu, 03 Mar 2022 12:23:47 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/5] hw/intc/arm_gicv3: Specify valid and impl in MemoryRegionOps Date: Thu, 3 Mar 2022 20:23:39 +0000 Message-Id: <20220303202341.2232284-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303202341.2232284-1-peter.maydell@linaro.org> References: <20220303202341.2232284-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::32e (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1646339143396100001 Content-Type: text/plain; charset="utf-8" The GICv3 has some registers that support byte accesses, and some that support 8-byte accesses. Our TCG implementation implements all of this, switching on the 'size' argument and handling the registers that must support reads of that size while logging an error for attempted accesses to registers that do not support that size access. However we forgot to tell the core memory subsystem about this by specifying the .impl and .valid fields in the MemoryRegionOps struct, so the core was happily simulating 8 byte accesses by combining two 4 byte accesses. This doesn't have much guest-visible effect, since there aren't many 8 byte registers and they all support being written in two 4 byte parts. Set the .impl and .valid fields to say that all sizes from 1 to 8 bytes are both valid and implemented by the device. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c index 6d3c8ee231c..0b8f79a1227 100644 --- a/hw/intc/arm_gicv3.c +++ b/hw/intc/arm_gicv3.c @@ -369,11 +369,19 @@ static const MemoryRegionOps gic_ops[] =3D { .read_with_attrs =3D gicv3_dist_read, .write_with_attrs =3D gicv3_dist_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 8, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 8, }, { .read_with_attrs =3D gicv3_redist_read, .write_with_attrs =3D gicv3_redist_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 8, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 8, } }; =20 --=20 2.25.1 From nobody Mon May 13 23:48:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1646339253; cv=none; d=zohomail.com; s=zohoarc; b=NpixZKfyHaxMWt5es6Bq8qFKR5ObRzROkItoKbbtuz35aeF6IJzxjmZv1ttB5LvYZH8RuLI+TQGOq9fBMIwNyt94ke3zi7M4HZFbh83YJIf5nBLcCudGzzXTU0eMZMMotuxkUnBFwgKjyQOtZaMZLS8aPJiKmVMTxq2YBRyiOYQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1646339253; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uXh/JEg5Ojwyym5i/HIshpVVO/CoNEWjAFuxDcAMKaM=; b=merCpglmZ+P75iIhb3UmmNk2Pu5HdX5J8q0zX6lun8rvRBNWJXdNh3igdGaVlg1DdzmyjBwlYs/c1JzLh1i8NPOrd+pSyT0v/1BIhn4LalPitWzhSNGZ0AujzxJR3stG5ianW2iKRtplNZ4Zuhz2XpXMdVcKB5bRKIGFvYlwoI8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646339253636185.58772161790284; Thu, 3 Mar 2022 12:27:33 -0800 (PST) Received: from localhost ([::1]:42768 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPs2u-0000rl-LB for importer@patchew.org; Thu, 03 Mar 2022 15:27:32 -0500 Received: from eggs.gnu.org ([209.51.188.92]:49316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPrzL-0001wV-WE for qemu-devel@nongnu.org; Thu, 03 Mar 2022 15:23:52 -0500 Received: from [2a00:1450:4864:20::32b] (port=38868 helo=mail-wm1-x32b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPrzK-0001aF-97 for qemu-devel@nongnu.org; Thu, 03 Mar 2022 15:23:51 -0500 Received: by mail-wm1-x32b.google.com with SMTP id m42-20020a05600c3b2a00b00382ab337e14so4821838wms.3 for ; Thu, 03 Mar 2022 12:23:48 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t5-20020adff045000000b001f0684c3404sm517060wro.11.2022.03.03.12.23.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 12:23:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=uXh/JEg5Ojwyym5i/HIshpVVO/CoNEWjAFuxDcAMKaM=; b=t0kvC9pLVwUMkJQ4I3iU4/DxiKZBqLj20I4aoau3o5xkZgwlCdfX2ZlTIRvHvQwfRF tEXJNPIWlWRJcBMltI6ueZSYuuCT7tVlUjbP3SlIa9GujD92TkSOqPa7v5Tm5/MBSgVY DGksTdMhOuabrknUVRT9F83S3AkafioBQ5FrGy0ntl7myl/8+ossWuhBMkygXHGeOO70 NCEcExPJsnysQrkDrn2zAiAYyPF3w4vih+wWdCWsCB/CeC2EvvU9TfNXh0dRWuuccbwD 5By4sgoegm2ZepJ6fO1e6Stf9H225tjpqPqIESF7nAJ73CAvYhgzSC1K/KEI8pvlkg1Q cqWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uXh/JEg5Ojwyym5i/HIshpVVO/CoNEWjAFuxDcAMKaM=; b=mPnpumG5JlbfBE/F/v/M8JybwnX47+RhKl0BVy8LyCcBqWThFyuqKzzELzhfgY3VOe U/QHohWWqav1EjMy0hktk0r1u36MsK+/4qs+/9bsvvMxFw/7gjpM55phlTZje4HsnT4Z o7DrXT8o0V5nvFHyPfM1YnJ/KAj31M5jWJPAI6Q/+l25sKEtWHr95S1Efm9B2EIr6Kqm 40Wc9+VhgzNw3QCyA8JN3KWhxo37yXzhd47OtGc7Djjt3+cDNVmBLHKXmt2aZMQJl/wO kO45wCENRdO4YFcYOKF5fu9T9q818zRFlXlzgHUoHEfpAoIvyBX4xtCSi/1iOc7QtCe+ 4vGw== X-Gm-Message-State: AOAM533x463fi4uC8LiL5D3FlXsfQm2bRF/7lNRa2D424cWTHDw2vggw Se0xn7cEO+R3uaKr6dKlpNlsjwKN1LbAiw== X-Google-Smtp-Source: ABdhPJw1hDvsWIdNpZlB2zaI0HTZKKFVPKjfbn6B6fawSKBkqqAN1+WWDKS3Dq100jUAX7fqK69XbA== X-Received: by 2002:a7b:c347:0:b0:37e:68e6:d85c with SMTP id l7-20020a7bc347000000b0037e68e6d85cmr5022675wmj.176.1646339027932; Thu, 03 Mar 2022 12:23:47 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 4/5] hw/intc/arm_gicv3: Fix missing spaces in error log messages Date: Thu, 3 Mar 2022 20:23:40 +0000 Message-Id: <20220303202341.2232284-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303202341.2232284-1-peter.maydell@linaro.org> References: <20220303202341.2232284-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::32b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1646339256013100001 Content-Type: text/plain; charset="utf-8" We forgot a space in some log messages, so the output ended up looking like gicv3_dist_write: invalid guest write at offset 0000000000008000size 8 with a missing space before "size". Add the missing spaces. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_dist.c | 4 ++-- hw/intc/arm_gicv3_its.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index 4164500ea96..28d913b2114 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -838,7 +838,7 @@ MemTxResult gicv3_dist_read(void *opaque, hwaddr offset= , uint64_t *data, if (!r) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest read at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_dist_badread(offset, size, attrs.secure); /* The spec requires that reserved registers are RAZ/WI; * so use MEMTX_ERROR returns from leaf functions as a way to @@ -879,7 +879,7 @@ MemTxResult gicv3_dist_write(void *opaque, hwaddr offse= t, uint64_t data, if (!r) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest write at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_dist_badwrite(offset, data, size, attrs.secure); /* The spec requires that reserved registers are RAZ/WI; * so use MEMTX_ERROR returns from leaf functions as a way to diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 9f4df6a8cbb..b96b874afdf 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1313,7 +1313,7 @@ static MemTxResult gicv3_its_read(void *opaque, hwadd= r offset, uint64_t *data, if (!result) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest read at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_its_badread(offset, size); /* * The spec requires that reserved registers are RAZ/WI; @@ -1349,7 +1349,7 @@ static MemTxResult gicv3_its_write(void *opaque, hwad= dr offset, uint64_t data, if (!result) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest write at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_its_badwrite(offset, data, size); /* * The spec requires that reserved registers are RAZ/WI; --=20 2.25.1 From nobody Mon May 13 23:48:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1646339344; cv=none; d=zohomail.com; s=zohoarc; b=AqW6fIyR+y+SNLMhLE/Cac+Cb+F3qPiIGGyXCF4vnQNujMDJMwkShubnd+ZTu23/jCwKC+BsW5S9iE2GrVVbS3JuPKqCHImF9dnD9HdGv/LTCEOQtX6MwYX0BCdSYND2ZPyZOVHErYL4FWyGENyzO/8gl0EkRlvyVx711QhMsrc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1646339344; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xKReK7BLUtScKzpLEmLwjn4Pt9dG6hDPDWKrdARJTHU=; b=NGIoW4yHy2kJdgDC+MtXGlIZxi89tq3WDLZjy0Y0QqNFzA5hpJq91fBIWUx7vHXWDqRVK/i4AUAXa3AU4D7CVpCzJ0ByTKadQjIkFxqhv9ppJrdm5WBIWR9CB7lMRgwxI0UGhedBGJccT4+E1fApB5eamnXIM6NFrLtNxRpnAGQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646339344324377.61922013039566; Thu, 3 Mar 2022 12:29:04 -0800 (PST) Received: from localhost ([::1]:46444 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPs4N-0003hQ-4m for importer@patchew.org; Thu, 03 Mar 2022 15:29:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:49310) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPrzL-0001wT-Mk for qemu-devel@nongnu.org; Thu, 03 Mar 2022 15:23:52 -0500 Received: from [2a00:1450:4864:20::330] (port=33255 helo=mail-wm1-x330.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPrzK-0001ab-9T for qemu-devel@nongnu.org; Thu, 03 Mar 2022 15:23:51 -0500 Received: by mail-wm1-x330.google.com with SMTP id n33-20020a05600c3ba100b003832caf7f3aso3129603wms.0 for ; Thu, 03 Mar 2022 12:23:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t5-20020adff045000000b001f0684c3404sm517060wro.11.2022.03.03.12.23.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 12:23:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=xKReK7BLUtScKzpLEmLwjn4Pt9dG6hDPDWKrdARJTHU=; b=FxxjCgcDHZwQsUyp6QeRLD3H+nQyw1V2wfkP202duNc+5jC56dwCux1o2tsoyHqFP7 oDtQa3GuiUhQsR8HGGmH5ZJkcGDegzl2LQPOzpiPU99FFJUVUtlSGtks+ojYWlwkEmt0 VUZLf9veJ4sWobkZp44Vv0Lg+w3j2+fDpRLgLrwtfti2f+oW1HNYV+x4YS48fUL33hA3 D5lc1Xt7jZdtsBFfBU0X7vzjlHekIlOmRB+ozOduLBZmWPvPKtgZmGObMCveGqUUgROL yqje+Qe35Oh37tEi7nYGVY3cHAvsuNmDRx+bpptrF17XLSzpfl4OUGFYAZspTK1+QPoO t6TQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xKReK7BLUtScKzpLEmLwjn4Pt9dG6hDPDWKrdARJTHU=; b=cWrfwgPSd847A1cTffQpPcjZn9DRvRbQbYuxAPbARj6Gc2d6Hh1HBNE3khdEjBU1Eb Fcywj9C2LlpOQJ5qHGj9B+BKEZIUI1LUCLqHMTN0NjHOikH2fjt/5utWI0jDXPOEy95A 2jk2ETjA+kkB90F49h6Do+xBOC4lr5NIN5b4a7nIdbIBbW3jgqhQzkFVS5j85WUFUa59 sYfPbDsRnOy+ZnCxpSwgc5KiardYNoeoRjXSDdjNXynIbFPAvNF0hdGEYbX6FLhFghHb 8BkrfChem5fwhG7pchjPE+/nMl6ehRubQTOKteghLRAa1d4GVATeoMK88T+wsjOm4VmL HRSw== X-Gm-Message-State: AOAM531WJLY+wa7tsD7HTxqOIK/6sBOfKl98tnAhi2enHD/8avuz2CQp hEKP4mhUkxLzdNdT7cPU+t6xRFim3Imvvw== X-Google-Smtp-Source: ABdhPJwm65ESyJkwnPPNttg1N8klhQnPFvAi2Dm4IxOtVdewuf408aSCIAZ0AOkKx0cT3v26ZqluCg== X-Received: by 2002:a05:600c:3c98:b0:37f:2f14:7be7 with SMTP id bg24-20020a05600c3c9800b0037f2f147be7mr5143205wmb.180.1646339028719; Thu, 03 Mar 2022 12:23:48 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 5/5] hw/intc/arm_gicv3_cpuif: Fix register names in ICV_HPPIR read trace event Date: Thu, 3 Mar 2022 20:23:41 +0000 Message-Id: <20220303202341.2232284-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303202341.2232284-1-peter.maydell@linaro.org> References: <20220303202341.2232284-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::330 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1646339346792100001 Content-Type: text/plain; charset="utf-8" The trace_gicv3_icv_hppir_read trace event takes an integer value which it uses to form the register name, which should be either ICV_HPPIR0 or ICV_HPPIR1. We were passing in the 'grp' variable for this, but that is either GICV3_G0 or GICV3_G1NS, which happen to be 0 and 2, which meant that tracing for the ICV_HPPIR1 register was incorrectly printed as ICV_HPPIR2. Use the same approach we do for all the other similar trace events, and pass in 'ri->crm =3D=3D 8 ? 0 : 1', deriving the index value directly from the ARMCPRegInfo struct. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_cpuif.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index d7e03d0cab8..1a3d440a54b 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -612,7 +612,8 @@ static uint64_t icv_hppir_read(CPUARMState *env, const = ARMCPRegInfo *ri) } } =20 - trace_gicv3_icv_hppir_read(grp, gicv3_redist_affid(cs), value); + trace_gicv3_icv_hppir_read(ri->crm =3D=3D 8 ? 0 : 1, + gicv3_redist_affid(cs), value); return value; } =20 --=20 2.25.1