From nobody Thu May 16 00:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16462776897791020.666463920337; Wed, 2 Mar 2022 19:21:29 -0800 (PST) Received: from localhost ([::1]:51304 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPc1w-0002K4-K3 for importer@patchew.org; Wed, 02 Mar 2022 22:21:28 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43648) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPbtG-0007Us-5t for qemu-devel@nongnu.org; Wed, 02 Mar 2022 22:12:31 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]:54309) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPbtC-0003e2-4P for qemu-devel@nongnu.org; Wed, 02 Mar 2022 22:12:27 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-203-cODvVe9-NN-47vSVGZY6cQ-1; Wed, 02 Mar 2022 22:12:22 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 52D55801DDC; Thu, 3 Mar 2022 03:12:21 +0000 (UTC) Received: from gshan.redhat.com (ovpn-13-119.pek2.redhat.com [10.72.13.119]) by smtp.corp.redhat.com (Postfix) with ESMTP id 564131006854; Thu, 3 Mar 2022 03:12:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1646277145; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=L83Yt3EYQS48tkinW/PCOkmtE089EAs2S2lFeAasuZA=; b=Q2i74tAMQxzUYOWxGHfy6ZXC7VONKcy/75ewpAbWs7HM8EdmKI4qGvnfgiTo3UF3UR7fhw RWkEkGWtU79tSQNYCnBM2NqH8sWVkqkZiYH5ouFhUZDB5/tBIJ+PHLTk9CVqH6RfEzTuxA OhEfDTb9hhW6BFbXkk3GLMuBnOYIUNo= X-MC-Unique: cODvVe9-NN-47vSVGZY6cQ-1 From: Gavin Shan To: qemu-arm@nongnu.org Subject: [PATCH v2 1/3] hw/arm/virt: Fix CPU's default NUMA node ID Date: Thu, 3 Mar 2022 11:11:50 +0800 Message-Id: <20220303031152.145960-2-gshan@redhat.com> In-Reply-To: <20220303031152.145960-1-gshan@redhat.com> References: <20220303031152.145960-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=gshan@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, zhenyzha@redhat.com, wangyanan55@huawei.com, shan.gavin@gmail.com, imammedo@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646277691844100001 Content-Type: text/plain; charset="utf-8" The default CPU-to-NUMA association is given by mc->get_default_cpu_node_id= () when it isn't provided explicitly. However, the CPU topology isn't fully considered in the default association and it causes CPU topology broken warnings on booting Linux guest. For example, the following warning messages are observed when the Linux gue= st is booted with the following command lines. /home/gavin/sandbox/qemu.main/build/qemu-system-aarch64 \ -accel kvm -machine virt,gic-version=3Dhost \ -cpu host \ -smp 6,sockets=3D2,cores=3D3,threads=3D1 \ -m 1024M,slots=3D16,maxmem=3D64G \ -object memory-backend-ram,id=3Dmem0,size=3D128M \ -object memory-backend-ram,id=3Dmem1,size=3D128M \ -object memory-backend-ram,id=3Dmem2,size=3D128M \ -object memory-backend-ram,id=3Dmem3,size=3D128M \ -object memory-backend-ram,id=3Dmem4,size=3D128M \ -object memory-backend-ram,id=3Dmem4,size=3D384M \ -numa node,nodeid=3D0,memdev=3Dmem0 \ -numa node,nodeid=3D1,memdev=3Dmem1 \ -numa node,nodeid=3D2,memdev=3Dmem2 \ -numa node,nodeid=3D3,memdev=3Dmem3 \ -numa node,nodeid=3D4,memdev=3Dmem4 \ -numa node,nodeid=3D5,memdev=3Dmem5 : alternatives: patching kernel code BUG: arch topology borken the CLS domain not a subset of the MC domain BUG: arch topology borken the DIE domain not a subset of the NODE domain With current implementation of mc->get_default_cpu_node_id(), CPU#0 to CPU#5 are associated with NODE#0 to NODE#5 separately. That's incorrect because CPU#0/1/2 should be associated with same NUMA node because they're seated in same socket. This fixes the issue by populating the CPU topology in virt_possible_cpu_ar= ch_ids() and considering the socket index when default CPU-to-NUMA association is gi= ven in virt_possible_cpu_arch_ids(). With this applied, no more CPU topology br= oken warnings are seen from the Linux guest. The 6 CPUs are associated with NODE= #0/1, but there are no CPUs associated with NODE#2/3/4/5. Signed-off-by: Gavin Shan --- hw/arm/virt.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 46bf7ceddf..dee02b60fc 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2488,7 +2488,9 @@ virt_cpu_index_to_props(MachineState *ms, unsigned cp= u_index) =20 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int id= x) { - return idx % ms->numa_state->num_nodes; + int64_t socket_id =3D ms->possible_cpus->cpus[idx].props.socket_id; + + return socket_id % ms->numa_state->num_nodes; } =20 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) @@ -2496,6 +2498,7 @@ static const CPUArchIdList *virt_possible_cpu_arch_id= s(MachineState *ms) int n; unsigned int max_cpus =3D ms->smp.max_cpus; VirtMachineState *vms =3D VIRT_MACHINE(ms); + MachineClass *mc =3D MACHINE_GET_CLASS(vms); =20 if (ms->possible_cpus) { assert(ms->possible_cpus->len =3D=3D max_cpus); @@ -2509,6 +2512,18 @@ static const CPUArchIdList *virt_possible_cpu_arch_i= ds(MachineState *ms) ms->possible_cpus->cpus[n].type =3D ms->cpu_type; ms->possible_cpus->cpus[n].arch_id =3D virt_cpu_mp_affinity(vms, n); + + ms->possible_cpus->cpus[n].props.has_socket_id =3D true; + ms->possible_cpus->cpus[n].props.socket_id =3D + n / (ms->smp.dies * ms->smp.clusters * + ms->smp.cores * ms->smp.threads); + if (mc->smp_props.dies_supported) { + ms->possible_cpus->cpus[n].props.has_die_id =3D true; + ms->possible_cpus->cpus[n].props.die_id =3D + n / (ms->smp.clusters * ms->smp.cores * ms->smp.threads); + } + ms->possible_cpus->cpus[n].props.has_core_id =3D true; + ms->possible_cpus->cpus[n].props.core_id =3D n / ms->smp.threads; ms->possible_cpus->cpus[n].props.has_thread_id =3D true; ms->possible_cpus->cpus[n].props.thread_id =3D n; } --=20 2.23.0 From nobody Thu May 16 00:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646277565414429.6112388012507; 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Thu, 3 Mar 2022 03:12:25 +0000 (UTC) Received: from gshan.redhat.com (ovpn-13-119.pek2.redhat.com [10.72.13.119]) by smtp.corp.redhat.com (Postfix) with ESMTP id E3BC91006856; Thu, 3 Mar 2022 03:12:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1646277149; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vRhaIRgCbGADfRTaEO4Z3ZTmpreYWc5KRSfB2lRcngM=; b=Oobq1F+YBSnS//MzxdNXNOfb8jL/+LFHGCeGddOTaMaClkD1oAJH2H8T/B5irCohEYNgB/ IF89rua73uboZsCuVQDvsyRb0BFl1reYycb4qcnWYSDl0rNjG17az2jy2Y0UuzXEr2hdBo liXLG9KRfeGQdNUpf/0AqtOqisiLYkk= X-MC-Unique: iZy3Pq3ZOlON4mqN63280w-1 From: Gavin Shan To: qemu-arm@nongnu.org Subject: [PATCH v2 2/3] hw/acpi/aml-build: Use existing CPU topology to build PPTT table Date: Thu, 3 Mar 2022 11:11:51 +0800 Message-Id: <20220303031152.145960-3-gshan@redhat.com> In-Reply-To: <20220303031152.145960-1-gshan@redhat.com> References: <20220303031152.145960-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; 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charset="utf-8" When the PPTT table is built, the CPU topology is re-calculated, but it's unecessary because the CPU topology, except the cluster IDs, has been populated in virt_possible_cpu_arch_ids() on arm/virt machine. This avoids to re-calculate the CPU topology by reusing the existing one in ms->possible_cpus. However, the cluster ID for the CPU instance has to be calculated dynamically because there is no corresponding field in struct CpuInstanceProperties. Currently, the only user of build_pptt() is arm/virt machine. Signed-off-by: Gavin Shan --- hw/acpi/aml-build.c | 106 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 82 insertions(+), 24 deletions(-) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 8966e16320..572cf5fc00 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -2002,18 +2002,27 @@ void build_pptt(GArray *table_data, BIOSLinker *lin= ker, MachineState *ms, const char *oem_id, const char *oem_table_id) { MachineClass *mc =3D MACHINE_GET_CLASS(ms); + CPUArchIdList *cpus =3D ms->possible_cpus; + GQueue *socket_list =3D g_queue_new(); + GQueue *cluster_list =3D g_queue_new(); + GQueue *core_list =3D g_queue_new(); GQueue *list =3D g_queue_new(); guint pptt_start =3D table_data->len; guint parent_offset; guint length, i; - int uid =3D 0; - int socket; + int n, id, socket_id, cluster_id, core_id, thread_id; AcpiTable table =3D { .sig =3D "PPTT", .rev =3D 2, .oem_id =3D oem_id, .oem_table_id =3D oem_table_id= }; =20 acpi_table_begin(&table, table_data); =20 - for (socket =3D 0; socket < ms->smp.sockets; socket++) { + for (n =3D 0; n < cpus->len; n++) { + socket_id =3D cpus->cpus[n].props.socket_id; + if (g_queue_find(socket_list, GUINT_TO_POINTER(socket_id))) { + continue; + } + + g_queue_push_tail(socket_list, GUINT_TO_POINTER(socket_id)); g_queue_push_tail(list, GUINT_TO_POINTER(table_data->len - pptt_start)); build_processor_hierarchy_node( @@ -2023,65 +2032,114 @@ void build_pptt(GArray *table_data, BIOSLinker *li= nker, MachineState *ms, * of a physical package */ (1 << 0), - 0, socket, NULL, 0); + 0, socket_id, NULL, 0); } =20 if (mc->smp_props.clusters_supported) { length =3D g_queue_get_length(list); for (i =3D 0; i < length; i++) { - int cluster; - parent_offset =3D GPOINTER_TO_UINT(g_queue_pop_head(list)); - for (cluster =3D 0; cluster < ms->smp.clusters; cluster++) { + socket_id =3D GPOINTER_TO_UINT(g_queue_pop_head(socket_list)); + + for (n =3D 0; n < cpus->len; n++) { + if (cpus->cpus[n].props.socket_id !=3D socket_id) { + continue; + } + + /* + * We have to calculate the cluster ID because it isn't + * available in the CPU instance properties. + */ + cluster_id =3D cpus->cpus[n].props.thread_id / + (ms->smp.cores * ms->smp.threads); + if (g_queue_find(cluster_list, GUINT_TO_POINTER(cluster_id= ))) { + continue; + } + + g_queue_push_tail(cluster_list, GUINT_TO_POINTER(cluster_i= d)); g_queue_push_tail(list, GUINT_TO_POINTER(table_data->len - pptt_start)); build_processor_hierarchy_node( table_data, (0 << 0), /* not a physical package */ - parent_offset, cluster, NULL, 0); + parent_offset, cluster_id, NULL, 0); } } } =20 length =3D g_queue_get_length(list); for (i =3D 0; i < length; i++) { - int core; - parent_offset =3D GPOINTER_TO_UINT(g_queue_pop_head(list)); - for (core =3D 0; core < ms->smp.cores; core++) { - if (ms->smp.threads > 1) { - g_queue_push_tail(list, - GUINT_TO_POINTER(table_data->len - pptt_start)); - build_processor_hierarchy_node( - table_data, - (0 << 0), /* not a physical package */ - parent_offset, core, NULL, 0); - } else { + if (!mc->smp_props.clusters_supported) { + socket_id =3D GPOINTER_TO_UINT(g_queue_pop_head(socket_list)); + } else { + cluster_id =3D GPOINTER_TO_UINT(g_queue_pop_head(cluster_list)= ); + } + + for (n =3D 0; n < cpus->len; n++) { + if (!mc->smp_props.clusters_supported && + cpus->cpus[n].props.socket_id !=3D socket_id) { + continue; + } + + /* + * We have to calculate the cluster ID because it isn't + * available in the CPU instance properties. + */ + id =3D cpus->cpus[n].props.thread_id / + (ms->smp.cores * ms->smp.threads); + if (mc->smp_props.clusters_supported && id !=3D cluster_id) { + continue; + } + + core_id =3D cpus->cpus[n].props.core_id; + if (ms->smp.threads <=3D 1) { build_processor_hierarchy_node( table_data, (1 << 1) | /* ACPI Processor ID valid */ (1 << 3), /* Node is a Leaf */ - parent_offset, uid++, NULL, 0); + parent_offset, core_id, NULL, 0); + continue; } + + if (g_queue_find(core_list, GUINT_TO_POINTER(core_id))) { + continue; + } + + g_queue_push_tail(core_list, GUINT_TO_POINTER(core_id)); + g_queue_push_tail(list, + GUINT_TO_POINTER(table_data->len - pptt_start)); + build_processor_hierarchy_node( + table_data, + (0 << 0), /* not a physical package */ + parent_offset, core_id, NULL, 0); } } =20 length =3D g_queue_get_length(list); for (i =3D 0; i < length; i++) { - int thread; - parent_offset =3D GPOINTER_TO_UINT(g_queue_pop_head(list)); - for (thread =3D 0; thread < ms->smp.threads; thread++) { + core_id =3D GPOINTER_TO_UINT(g_queue_pop_head(core_list)); + + for (n =3D 0; n < cpus->len; n++) { + if (cpus->cpus[n].props.core_id !=3D core_id) { + continue; + } + + thread_id =3D cpus->cpus[n].props.thread_id; build_processor_hierarchy_node( table_data, (1 << 1) | /* ACPI Processor ID valid */ (1 << 2) | /* Processor is a Thread */ (1 << 3), /* Node is a Leaf */ - parent_offset, uid++, NULL, 0); + parent_offset, thread_id, NULL, 0); } } =20 g_queue_free(list); + g_queue_free(core_list); + g_queue_free(cluster_list); + g_queue_free(socket_list); acpi_table_end(linker, &table); } =20 --=20 2.23.0 From nobody Thu May 16 00:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 02 Mar 2022 22:12:31 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 46D521091DA1; Thu, 3 Mar 2022 03:12:30 +0000 (UTC) Received: from gshan.redhat.com (ovpn-13-119.pek2.redhat.com [10.72.13.119]) by smtp.corp.redhat.com (Postfix) with ESMTP id E96D91078675; Thu, 3 Mar 2022 03:12:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1646277154; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5Ul8oWuvUeDzNfHlnwEYmiKJujaeZ1hRs0XrndxwX2o=; b=dNlSRrfXJCYvQX7+Y2xc4cAFChs9yRFiQl63tVyom5ppFhARuHGYk4iFtLlb0BNiyF6/Jn iuuf1qbQNYMO+gPDcAnnWBcBf7o/CZuz2KSG8FPndhhclfSVdS3LoOMeax04kCE3ylpIkT 2yb4KZzGm3TIOYtP0mGEinm333os6ac= X-MC-Unique: mpRQKxuVODixC-1zIZnKYQ-1 From: Gavin Shan To: qemu-arm@nongnu.org Subject: [PATCH v2 3/3] hw/arm/virt: Unify ACPI processor ID in MADT and SRAT table Date: Thu, 3 Mar 2022 11:11:52 +0800 Message-Id: <20220303031152.145960-4-gshan@redhat.com> In-Reply-To: <20220303031152.145960-1-gshan@redhat.com> References: <20220303031152.145960-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; 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charset="utf-8" The value of the following field has been used in ACPI PPTT table to identify the corresponding processor. This takes the same field as the ACPI processor ID in MADT and SRAT tables. ms->possible_cpus->cpus[i].props.thread_id Signed-off-by: Gavin Shan --- hw/arm/virt-acpi-build.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 449fab0080..7fedb56eea 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -534,13 +534,16 @@ build_srat(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) =20 for (i =3D 0; i < cpu_list->len; ++i) { uint32_t nodeid =3D cpu_list->cpus[i].props.node_id; + uint32_t thread_id =3D cpu_list->cpus[i].props.thread_id; + /* * 5.2.16.4 GICC Affinity Structure */ build_append_int_noprefix(table_data, 3, 1); /* Type */ build_append_int_noprefix(table_data, 18, 1); /* Length */ build_append_int_noprefix(table_data, nodeid, 4); /* Proximity Dom= ain */ - build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID= */ + build_append_int_noprefix(table_data, + thread_id, 4); /* ACPI Processor UID */ /* Flags, Table 5-76 */ build_append_int_noprefix(table_data, 1 /* Enabled */, 4); build_append_int_noprefix(table_data, 0, 4); /* Clock Domain */ @@ -704,6 +707,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) { int i; VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); + MachineState *ms =3D MACHINE(vms); const MemMapEntry *memmap =3D vms->memmap; AcpiTable table =3D { .sig =3D "APIC", .rev =3D 3, .oem_id =3D vms->oe= m_id, .oem_table_id =3D vms->oem_table_id }; @@ -725,8 +729,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) build_append_int_noprefix(table_data, vms->gic_version, 1); build_append_int_noprefix(table_data, 0, 3); /* Reserved */ =20 - for (i =3D 0; i < MACHINE(vms)->smp.cpus; i++) { + for (i =3D 0; i < ms->smp.cpus; i++) { ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(i)); + uint32_t thread_id =3D ms->possible_cpus->cpus[i].props.thread_id; uint64_t physical_base_address =3D 0, gich =3D 0, gicv =3D 0; uint32_t vgic_interrupt =3D vms->virt ? PPI(ARCH_GIC_MAINT_IRQ) : = 0; uint32_t pmu_interrupt =3D arm_feature(&armcpu->env, ARM_FEATURE_P= MU) ? @@ -743,7 +748,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) build_append_int_noprefix(table_data, 76, 1); /* Length */ build_append_int_noprefix(table_data, 0, 2); /* Reserved */ build_append_int_noprefix(table_data, i, 4); /* GIC ID */ - build_append_int_noprefix(table_data, i, 4); /* ACPI Processor = UID */ + build_append_int_noprefix(table_data, + thread_id, 4); /* ACPI Processor = UID */ /* Flags */ build_append_int_noprefix(table_data, 1, 4); /* Enabled */ /* Parking Protocol Version */ --=20 2.23.0