From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172226709557.2386309348726; Tue, 1 Mar 2022 14:03:46 -0800 (PST) Received: from localhost ([::1]:36380 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAav-0005xk-KZ for importer@patchew.org; Tue, 01 Mar 2022 17:03:45 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58376) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXX-0001Ft-8d for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:15 -0500 Received: from [2607:f8b0:4864:20::62c] (port=42879 helo=mail-pl1-x62c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXT-0004w7-QT for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:14 -0500 Received: by mail-pl1-x62c.google.com with SMTP id p17so14573226plo.9 for ; Tue, 01 Mar 2022 14:00:07 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zkNbMXCqLzhadKWhMyb5sf6Jtr4mvpt/QguB9jnfEUo=; b=EJ3kfT/32tEKtDZICqVQu68dz5nljHJIm3YDkO+5ks9AmTzxfmJReyqASVaKT+8Qpz nxwQXSOy7O9F7cfbFdQsp1wRKvu6tYO5oD1OZtsoQOE+oEPj7og8AgR8FNBS9ejJpSRY IWy2999/H3a/0lqvCGcv0cDJG5455rydiXFFMatmHva88ZGk04DoIr44ipfvWLlItTY/ mF8zjRryf5kmC6tQWOJ5+zbqz1FUrbCkKoCecdJR4gRZi3LgmoTDtmSvwT4LC4xBbA2T NPZcMA/T0u5G3QLMeBukX63SBklCRvWxYGYfVgmYFlwX8aPIIXSn7mT/YPVH5fJlcWl3 Dkng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zkNbMXCqLzhadKWhMyb5sf6Jtr4mvpt/QguB9jnfEUo=; b=8CeNWTsYfEoi98F1rG1zSHGd7Z3hWbO/19zVMKjcbJL0ugsdoSiv0KlHNZ9g+d+vkK WXzil64w81Y9GLp9nJ1PdstdQ0K8ybtzpyM6y5mkg9tkyiXyqVPIvAUtxTXJYvcDyU9u eTFpoQGPzKODoCO1d2PKSPS7swOAtghTe/NKBqKs+oz4c7aBwOQ4XgMsS1n+CaPtBnRV MCZQZyfZJlspJuAbwc8Ln4zXv3gUBIqsYDOh3dMsspMDC7ab8lAqVuF3CB60FW321LFd BDtPkjBNEUO1a1jR8utoWJgZ/KnFpL5DruceJ/kTp4BMBlZgHRYbB1eMILEbZLFTvyZG akXg== X-Gm-Message-State: AOAM533vUztyp4Vt41JhCohYBU1RoQYti/WLk+99zHL59OZYo+rS18GK 0QoXiuC381upjvtsBR+SOxFDNGe1TvTf7w== X-Google-Smtp-Source: ABdhPJz2wKAGz/T57HGhB6mMVZ1gddczIcicqGCN085OKWyf/Pl47Sd1hAoIGeQTYe1zA1GeBPtZCg== X-Received: by 2002:a17:902:9045:b0:14f:14e7:f3aa with SMTP id w5-20020a170902904500b0014f14e7f3aamr26471266plz.69.1646172004414; Tue, 01 Mar 2022 14:00:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 01/18] hw/registerfields: Add FIELD_SEX and FIELD_SDP Date: Tue, 1 Mar 2022 11:59:41 -1000 Message-Id: <20220301215958.157011-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172228669100001 Add new macros to manipulate signed fields within the register. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Suggested-by: Peter Maydell Signed-off-by: Richard Henderson --- include/hw/registerfields.h | 48 ++++++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h index f2a3c9c41f..3a88e135d0 100644 --- a/include/hw/registerfields.h +++ b/include/hw/registerfields.h @@ -59,6 +59,19 @@ extract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \ R_ ## reg ## _ ## field ## _LENGTH) =20 +#define FIELD_SEX8(storage, reg, field) \ + sextract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_SEX16(storage, reg, field) \ + sextract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_SEX32(storage, reg, field) \ + sextract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_SEX64(storage, reg, field) \ + sextract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) + /* Extract a field from an array of registers */ #define ARRAY_FIELD_EX32(regs, reg, field) \ FIELD_EX32((regs)[R_ ## reg], reg, field) @@ -95,7 +108,40 @@ _d; }) #define FIELD_DP64(storage, reg, field, val) ({ \ struct { \ - uint64_t v:R_ ## reg ## _ ## field ## _LENGTH; \ + uint64_t v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint64_t _d; \ + _d =3D deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) + +#define FIELD_SDP8(storage, reg, field, val) ({ \ + struct { \ + signed int v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint8_t _d; \ + _d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) +#define FIELD_SDP16(storage, reg, field, val) ({ \ + struct { \ + signed int v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint16_t _d; \ + _d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) +#define FIELD_SDP32(storage, reg, field, val) ({ \ + struct { \ + signed int v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint32_t _d; \ + _d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) +#define FIELD_SDP64(storage, reg, field, val) ({ \ + struct { \ + int64_t v:R_ ## reg ## _ ## field ## _LENGTH; \ } _v =3D { .v =3D val }; = \ uint64_t _d; \ _d =3D deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172175293622.5132319588723; Tue, 1 Mar 2022 14:02:55 -0800 (PST) Received: from localhost ([::1]:34032 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAa5-0004No-As for importer@patchew.org; Tue, 01 Mar 2022 17:02:53 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58238) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXU-0001F9-Qv for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:13 -0500 Received: from [2607:f8b0:4864:20::62a] (port=44926 helo=mail-pl1-x62a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXT-0004wB-6B for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:12 -0500 Received: by mail-pl1-x62a.google.com with SMTP id q11so14577561pln.11 for ; Tue, 01 Mar 2022 14:00:07 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E1rlJYYazfRdVeynNKa6RTb/vpD+L0sCNF3QpW/Zvp8=; b=iWENCHPYZqKwbsB8w9uYNeYg9InVg6/l1aX3WDGZzSjCc5EK9ycc/+CwlktONCfPCa hPfYWpllMJqmgylTcktcbf6FC69B6wjIEoksowCHtRFj3XF6SZrz/NPJNE52UlaBnBdg D9VChukulTP79+uRMGFmtMKrKaopmQ0qUoobCkqFrrX3yjv4t1BLy12aBqpOQC4pH25U mcm6yfXmIVA7nkJpdKuFUfK/ZTg+wNWvqKMFMQPUsaqHAcbj7mneiZ+K/b/grOyIJ0te +/Q861Vlr3WcEEQPVRvCEtq9vh9bKisEEUQaFhTzN1j+yGLIYjNI9gZPBuC1aZeAuPKq qLIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E1rlJYYazfRdVeynNKa6RTb/vpD+L0sCNF3QpW/Zvp8=; b=5+tBV/QEn+BoTCVr4JXmtT+lSkYXmDweS87Fm0WzClpnm8CkyqlhUGGfzxz4YlmwRq AOHO4ieCsOFmQAEaTq0Lj81KfUN/SlDU2D464vP2ylvfwZ4BVHjSEho/f2/J8PuUEuHL eGRsJbqA76NO6Q/ecVv07xFUcZBcnH9TAUChbtb86tp2pPa5NqD+DzRgbVj7Uf0EnU0x UUYr2kaHc1ijhh4EvDIyn4l5T6GOJcUvxmHBhkBEIuuq/Y+xBWqU27PPmr0Yt/yJXqae WMIjVqtd5Mcm9LyQKv0OJkHWATIm+d+v3dQayHjflF3oU+5rA9H0CSk8e14BWxmu66xd uYnA== X-Gm-Message-State: AOAM532C4dQ9dFHYKeN+l3gIFxm7bMNMf6E7Fegf9tJtrkeQmPcsPklJ ExxopxuPhRUExeG9TY+1dkASk0n494/GnQ== X-Google-Smtp-Source: ABdhPJxsLWUEHCSRx5y6+idMrcUWQioEy8o+e4wivRjqPDiY4+t5NktOzFpUTisz2QcYRZhmg8a/Ug== X-Received: by 2002:a17:902:bd04:b0:151:6cec:4b3 with SMTP id p4-20020a170902bd0400b001516cec04b3mr11176922pls.106.1646172006144; Tue, 01 Mar 2022 14:00:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 02/18] target/arm: Set TCR_EL1.TSZ for user-only Date: Tue, 1 Mar 2022 11:59:42 -1000 Message-Id: <20220301215958.157011-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172176476100001 Content-Type: text/plain; charset="utf-8" Set this as the kernel would, to 48 bits, to keep the computation of the address space correct for PAuth. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index c085dc10ee..e251f0df4b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -206,10 +206,11 @@ static void arm_cpu_reset(DeviceState *dev) aarch64_sve_zcr_get_valid_len(cpu, cpu->sve_default_vq - 1= ); } /* + * Enable 48-bit address space (TODO: take reserved_va into accoun= t). * Enable TBI0 but not TBI1. * Note that this must match useronly_clean_ptr. */ - env->cp15.tcr_el[1].raw_tcr =3D (1ULL << 37); + env->cp15.tcr_el[1].raw_tcr =3D 5 | (1ULL << 37); =20 /* Enable MTE */ if (cpu_isar_feature(aa64_mte, cpu)) { --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172835765857.1288501907355; Tue, 1 Mar 2022 14:13:55 -0800 (PST) Received: from localhost ([::1]:32842 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAkk-0005sE-08 for importer@patchew.org; Tue, 01 Mar 2022 17:13:54 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58454) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXY-0001Hb-Sy for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:16 -0500 Received: from [2607:f8b0:4864:20::102f] (port=38906 helo=mail-pj1-x102f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXW-0004xE-B8 for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:16 -0500 Received: by mail-pj1-x102f.google.com with SMTP id ge19-20020a17090b0e1300b001bcca16e2e7so3041953pjb.3 for ; Tue, 01 Mar 2022 14:00:13 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=xH/MpwwsEx7tCCiXBux6CW1bncqLIT+/ndlXh6/VUdnO9JDYCi49WGBcxCb4Ff9cg9 cGQVTbgkSMc0iGGhcaS67Z9aFwS049ZkYHV00jdjYMFHGgM3QSQRhWEGsWlYWvg/MIcj 4KMNYt0VjSomcKespNRQxGPBwMdYR0veGZsk9DhkvLyigPTL3HRLVJDwt7uAIT6Axb9C VHg/4VbbbjKV+oEDi22MbAYs7hB4ND1bf82TXZtVPzOB8WRen0bdEEHJWKdAo65tQvcD IVNaNOlXPn9UUza3tSVBfiwaTgLDqty63Dg5D1oz/n/ecayciiC7eztu7JTiDrOpLQ/k I2KQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=VMhMjvpvq4sMwS1h709vSMcOMGgm6LC+95rtp3rmQKtnInfkVmzquxRkvpWZo0wqUf Kbtu0oBzUkwfhENjJfpa1sLVMagSBMxw4mQtgM84uDTUUVR9Ydsn2aiRjFlUw3KPWQgG x26R91AM0gYR3xEV5rcnRzPS4BKSYaoclRCKKk4xnidtmcKCXpI5GLqCGHw+Bi2k8uMY 1mGXrSERLsACHCNo6Igs7jDo8lHDCr0DKMcvq0IT2j33z+9uh9UeFNcd0wQUuAq+KbYI FgyF7vNhS6I+0XoiyJ0U6AZnj5VIHmerVTF7EvTnJB36mifrBREcE3ESJEGgqF/LnS2p xxgw== X-Gm-Message-State: AOAM532skKqvaC+9tsZwJYMm4mbyENTT5zaAQvvAepaj97/zYiZoJuxs QNHgJ/GV4SWHW9VPF1vZ7U1exKOAdy+hzQ== X-Google-Smtp-Source: ABdhPJz1hB3YNJDKth1KuNTqtMV+kDRRoc9OVW6y+XDQNOPf/xXqE7rjPLWiYrT5ekrgRLO3vvv8QQ== X-Received: by 2002:a17:903:24f:b0:14f:73fa:2b30 with SMTP id j15-20020a170903024f00b0014f73fa2b30mr27698588plh.174.1646172007947; Tue, 01 Mar 2022 14:00:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 03/18] target/arm: Fault on invalid TCR_ELx.TxSZ Date: Tue, 1 Mar 2022 11:59:43 -1000 Message-Id: <20220301215958.157011-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172837468100001 Content-Type: text/plain; charset="utf-8" Without FEAT_LVA, the behaviour of programming an invalid value is IMPLEMENTATION DEFINED. With FEAT_LVA, programming an invalid minimum value requires a Translation fault. It is most self-consistent to choose to generate the fault always. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Continue to bound in aa64_va_parameters, so that PAuth gets something it can use, but provide a flag for get_phys_addr_lpae to raise a fault. --- target/arm/internals.h | 1 + target/arm/helper.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3f05748ea4..ef6c25d8cb 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1055,6 +1055,7 @@ typedef struct ARMVAParameters { bool hpd : 1; bool using16k : 1; bool using64k : 1; + bool tsz_oob : 1; /* tsz has been clamped to legal range */ } ARMVAParameters; =20 ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, diff --git a/target/arm/helper.c b/target/arm/helper.c index 7bf50fdd76..dd4d95bda2 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11190,8 +11190,8 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, ARMMMUIdx mmu_idx, bool data) { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; - bool epd, hpd, using16k, using64k; - int select, tsz, tbi, max_tsz; + bool epd, hpd, using16k, using64k, tsz_oob; + int select, tsz, tbi, max_tsz, min_tsz; =20 if (!regime_has_2_ranges(mmu_idx)) { select =3D 0; @@ -11232,9 +11232,17 @@ ARMVAParameters aa64_va_parameters(CPUARMState *en= v, uint64_t va, } else { max_tsz =3D 39; } + min_tsz =3D 16; /* TODO: ARMv8.2-LVA */ =20 - tsz =3D MIN(tsz, max_tsz); - tsz =3D MAX(tsz, 16); /* TODO: ARMv8.2-LVA */ + if (tsz > max_tsz) { + tsz =3D max_tsz; + tsz_oob =3D true; + } else if (tsz < min_tsz) { + tsz =3D min_tsz; + tsz_oob =3D true; + } else { + tsz_oob =3D false; + } =20 /* Present TBI as a composite with TBID. */ tbi =3D aa64_va_parameter_tbi(tcr, mmu_idx); @@ -11251,6 +11259,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, .hpd =3D hpd, .using16k =3D using16k, .using64k =3D using64k, + .tsz_oob =3D tsz_oob, }; } =20 @@ -11374,6 +11383,21 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, param =3D aa64_va_parameters(env, address, mmu_idx, access_type !=3D MMU_INST_FETCH); level =3D 0; + + /* + * If TxSZ is programmed to a value larger than the maximum, + * or smaller than the effective minimum, it is IMPLEMENTATION + * DEFINED whether we behave as if the field were programmed + * within bounds, or if a level 0 Translation fault is generated. + * + * With FEAT_LVA, fault on less than minimum becomes required, + * so our choice is to always raise the fault. + */ + if (param.tsz_oob) { + fault_type =3D ARMFault_Translation; + goto do_fault; + } + addrsize =3D 64 - 8 * param.tbi; inputsize =3D 64 - param.tsz; } else { --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172658340641.9971874977239; Tue, 1 Mar 2022 14:10:58 -0800 (PST) Received: from localhost ([::1]:52488 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAhs-0008Q2-Or for importer@patchew.org; Tue, 01 Mar 2022 17:10:57 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58380) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXX-0001Fv-9A for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:15 -0500 Received: from [2607:f8b0:4864:20::434] (port=43728 helo=mail-pf1-x434.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXT-0004wg-Qu for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:15 -0500 Received: by mail-pf1-x434.google.com with SMTP id d187so46239pfa.10 for ; Tue, 01 Mar 2022 14:00:10 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+DAMlpqsE9DmBwY1s+cP0r+gi8rLuchADVNtgdDMW7U=; b=mq2ltQuvsaGII0nw21LCdZQ9vRhu+28qEW5tjEtWd8kZKUrGy9SKf9m7hDdbGyU/py WVbzzG7efFmDHTqilAKCt5F773MS4MiGulnOX/29f8woFmOx8WsUT6MGpFrYeLSlR1yM I0qYQtmfcy6GY4X8U1yKCXzS2o38Jy03HBkzo5/xkI1qXqYAXmDRZK29hEcQ8iWEOzuR bus8SOvOtG25OzocVXY/94RKHNZZWNsjWDCZyhEK3rTGmwi/pfBOsDLVCUKoxr3rqtFe bgbHU027H9GdDmx65hLDgqAo8bITJedZYib/G4aO3sBKT1VOUZRH1S67tc5E4vdQBBNx 1bRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+DAMlpqsE9DmBwY1s+cP0r+gi8rLuchADVNtgdDMW7U=; b=xIZ3iHKiUdsW7gSCsBmHHBmaS9SHOkBwE2DCfQTL2tFA4RgngLMpcp9wNtirYN3UzI PJrLZEjRazRAmFohlf7c3Jvyf9rxmdNerkLwtu6n7IK+Tqcbg/Qkg7yQxA8Hg9loX0vR aZp78AObCGOygcLHd+ZNmzKP+Lf4FgaV3PTLvnGfHme+1SwQVYhUTIakrvnWqN0dvTtp /HT5oU+SXrCwobQ/JuXlOC10Mnc0lTdAivgMbu1dWhx9Zi+yQCgYXG5a7KXNQXRqfuSA QXB1w9fXaIwdZ+C0S2UBfmx9EVy1dvRPkONrcj7jPkdt6vNlzW3pr4p4ouzqsATi11Dy 9NMA== X-Gm-Message-State: AOAM531OQrlX6QRkJg2+AxG7nFnSeqsmbTs+I9Qnq8xywZK8CSwAi9+/ ubm1EO6xTUUx1pf1nyGY/o6VBljXpoYnGQ== X-Google-Smtp-Source: ABdhPJxjvJKUJ+gOLQNlE8UvJ++/e3NjvvE9mSqCFx/G8Z24shQmr/GiejIN7xvL9WxkTeYsa8wjFw== X-Received: by 2002:a65:4d0c:0:b0:379:3df:eac8 with SMTP id i12-20020a654d0c000000b0037903dfeac8mr1793340pgt.166.1646172009529; Tue, 01 Mar 2022 14:00:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 04/18] target/arm: Move arm_pamax out of line Date: Tue, 1 Mar 2022 11:59:44 -1000 Message-Id: <20220301215958.157011-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::434 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172660007100001 We will shortly share parts of this function with other portions of address translation. Reviewed-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/arm/internals.h | 19 +------------------ target/arm/helper.c | 22 ++++++++++++++++++++++ 2 files changed, 23 insertions(+), 18 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index ef6c25d8cb..fefd1fb8d8 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -243,24 +243,7 @@ static inline void update_spsel(CPUARMState *env, uint= 32_t imm) * Returns the implementation defined bit-width of physical addresses. * The ARMv8 reference manuals refer to this as PAMax(). */ -static inline unsigned int arm_pamax(ARMCPU *cpu) -{ - static const unsigned int pamax_map[] =3D { - [0] =3D 32, - [1] =3D 36, - [2] =3D 40, - [3] =3D 42, - [4] =3D 44, - [5] =3D 48, - }; - unsigned int parange =3D - FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); - - /* id_aa64mmfr0 is a read-only register so values outside of the - * supported mappings can be considered an implementation error. */ - assert(parange < ARRAY_SIZE(pamax_map)); - return pamax_map[parange]; -} +unsigned int arm_pamax(ARMCPU *cpu); =20 /* Return true if extended addresses are enabled. * This is always the case if our translation regime is 64 bit, diff --git a/target/arm/helper.c b/target/arm/helper.c index dd4d95bda2..71e575f352 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11152,6 +11152,28 @@ static uint8_t convert_stage2_attrs(CPUARMState *e= nv, uint8_t s2attrs) } #endif /* !CONFIG_USER_ONLY */ =20 +/* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ +unsigned int arm_pamax(ARMCPU *cpu) +{ + static const unsigned int pamax_map[] =3D { + [0] =3D 32, + [1] =3D 36, + [2] =3D 40, + [3] =3D 42, + [4] =3D 44, + [5] =3D 48, + }; + unsigned int parange =3D + FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); + + /* + * id_aa64mmfr0 is a read-only register so values outside of the + * supported mappings can be considered an implementation error. + */ + assert(parange < ARRAY_SIZE(pamax_map)); + return pamax_map[parange]; +} + static int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx) { if (regime_has_2_ranges(mmu_idx)) { --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172272548712.9679198564668; Tue, 1 Mar 2022 14:04:32 -0800 (PST) Received: from localhost ([::1]:37710 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAbf-0006qw-Ug for importer@patchew.org; Tue, 01 Mar 2022 17:04:31 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58452) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXY-0001HF-KU for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:16 -0500 Received: from [2607:f8b0:4864:20::435] (port=36659 helo=mail-pf1-x435.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXV-0004wr-3c for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:16 -0500 Received: by mail-pf1-x435.google.com with SMTP id z16so77534pfh.3 for ; Tue, 01 Mar 2022 14:00:12 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TAU62jUEHWqZmP/omH+DP65D27WXovgj7reF6QpCfzg=; b=lx/zx7CQmy7S+laRnK1Ai9SXcDDOkBCpkt2dczgZncBdqZ8lXGbfpdGWs31V1X8yhG HclFvpk0Ug62EJjCY0ghcLZjHEhn6BXaNy8/kvFnsueZANzfl3nSXkPvA68mwGWrerQz ktk6iw5s7bn83YEOC0y8LK6wljjLWdFcr2X4SgkSnmBjH3zdVJLqdL0Eda8hnJ4fXkia gaEbT/+jERDSi0nEKZSaCLb2ZADCDgNYNnNfRsBzufQiDRduaHrfJkEdeVt8ajfUKmOg dWm3Tbyfp4xgU6Q89PT+L92eD57PnpWdpk/hXKuRpOeM/P7j6ATwF7TIktxUQ+gzKZDm Ef3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TAU62jUEHWqZmP/omH+DP65D27WXovgj7reF6QpCfzg=; b=C0vgEFtyMJhEzU/vzrCr2nCBhoGFKwym64+rixRwjR5vc6rtmO9yUvItKWHx120fwn gm2wxbrF5pirFshCo1KJxXc7dd/qglsYifg0MRGNkS5UNwzaVhSRD+95tMCe/iti8KtU St4EGOGYa09abh7bXUQRMeIiVxoXXLNyapX84immnJ1liQwtZ+Dx4RLs/ZMzdaBCu3DW 7lNgAb8aX00N+kLSfe1fxAuTUnIdEH2+aUWKXOFgu1v9lpxSdMjUaRaSGkXKZJ7EVY7j zyfctsxGXjVSkBTURqnm1bRf/Vsr+cQayO1d4FkiWywZbk30CHdec+kOig9WTQU0eIJD G1RQ== X-Gm-Message-State: AOAM5338CH1jH3FXYItt/Mq9zW9Uzz32BnBC3d0iI667+hlzmIPmejyT 46KKhiBmjzZmrXiHKwMjxPn+AC79npYRMA== X-Google-Smtp-Source: ABdhPJwK0vGv5f4s3xA2uSrWs43eUyFt+yvSf7JTEiAnizyYMy9tCvouJHferqBSVV1X978KmdJePg== X-Received: by 2002:a65:6d0a:0:b0:373:9242:3a13 with SMTP id bf10-20020a656d0a000000b0037392423a13mr23744681pgb.452.1646172011103; Tue, 01 Mar 2022 14:00:11 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 05/18] target/arm: Pass outputsize down to check_s2_mmu_setup Date: Tue, 1 Mar 2022 11:59:45 -1000 Message-Id: <20220301215958.157011-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::435 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172274980100001 Content-Type: text/plain; charset="utf-8" Pass down the width of the output address from translation. For now this is still just PAMax, but a subsequent patch will compute the correct value from TCR_ELx.{I}PS. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 71e575f352..431b0c1405 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11065,7 +11065,7 @@ do_fault: * false otherwise. */ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level, - int inputsize, int stride) + int inputsize, int stride, int outputsize) { const int grainsize =3D stride + 3; int startsizecheck; @@ -11081,22 +11081,19 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool = is_aa64, int level, } =20 if (is_aa64) { - CPUARMState *env =3D &cpu->env; - unsigned int pamax =3D arm_pamax(cpu); - switch (stride) { case 13: /* 64KB Pages. */ - if (level =3D=3D 0 || (level =3D=3D 1 && pamax <=3D 42)) { + if (level =3D=3D 0 || (level =3D=3D 1 && outputsize <=3D 42)) { return false; } break; case 11: /* 16KB Pages. */ - if (level =3D=3D 0 || (level =3D=3D 1 && pamax <=3D 40)) { + if (level =3D=3D 0 || (level =3D=3D 1 && outputsize <=3D 40)) { return false; } break; case 9: /* 4KB Pages. */ - if (level =3D=3D 0 && pamax <=3D 42) { + if (level =3D=3D 0 && outputsize <=3D 42) { return false; } break; @@ -11105,8 +11102,8 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is= _aa64, int level, } =20 /* Inputsize checks. */ - if (inputsize > pamax && - (arm_el_is_aa64(env, 1) || inputsize > 40)) { + if (inputsize > outputsize && + (arm_el_is_aa64(&cpu->env, 1) || inputsize > 40)) { /* This is CONSTRAINED UNPREDICTABLE and we choose to fault. = */ return false; } @@ -11392,7 +11389,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, target_ulong page_size; uint32_t attrs; int32_t stride; - int addrsize, inputsize; + int addrsize, inputsize, outputsize; TCR *tcr =3D regime_tcr(env, mmu_idx); int ap, ns, xn, pxn; uint32_t el =3D regime_el(env, mmu_idx); @@ -11422,11 +11419,13 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, =20 addrsize =3D 64 - 8 * param.tbi; inputsize =3D 64 - param.tsz; + outputsize =3D arm_pamax(cpu); } else { param =3D aa32_va_parameters(env, address, mmu_idx); level =3D 1; addrsize =3D (mmu_idx =3D=3D ARMMMUIdx_Stage2 ? 40 : 32); inputsize =3D addrsize - param.tsz; + outputsize =3D 40; } =20 /* @@ -11511,7 +11510,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, =20 /* Check that the starting level is valid. */ ok =3D check_s2_mmu_setup(cpu, aarch64, startlevel, - inputsize, stride); + inputsize, stride, outputsize); if (!ok) { fault_type =3D ARMFault_Translation; goto do_fault; --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172419276875.3918175146538; Tue, 1 Mar 2022 14:06:59 -0800 (PST) Received: from localhost ([::1]:42390 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAe2-0001Yp-J8 for importer@patchew.org; Tue, 01 Mar 2022 17:06:58 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58460) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXY-0001Hd-Tn for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:16 -0500 Received: from [2607:f8b0:4864:20::42b] (port=36650 helo=mail-pf1-x42b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXW-0004xH-BK for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:16 -0500 Received: by mail-pf1-x42b.google.com with SMTP id z16so77613pfh.3 for ; Tue, 01 Mar 2022 14:00:13 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gIGj1SBy99bk76FDyotKqntArH5MW9KjKA2GprTkmIQ=; b=ufj/OzUbqqQUDuTaXi3d9MgYlKLV9cHEpkT37DK9zFn+XCtbqYVLdyNow4JjEbF3Qq QvI5lk8sM5Gkg1wnVXxNS2KAa+rFlcrCR0x1Qr/AgFjfmwJ5k3qQ8xBtSF8TDNlDdtN8 yxXl+BTunQiP+U0vrBVX3CUyhPGITo8PaWJxSiPQp3Lt5E19VyyZs/pBLAQgRKLYmv46 nFjtKrh1ynLQAgmNyk3xNpKTZ4Rk9WM+644t00CrAiswWsU7YKLTiaE5LvFAe4lVK4Lr FKRZJEFhNhZNTSBrDg83ZycGZ00yB/5FSoStrNLXbRdsH2XBlKhSx6roiHSO3GPRW/fM RQfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gIGj1SBy99bk76FDyotKqntArH5MW9KjKA2GprTkmIQ=; b=ylJ1Xpp0GJT/3Q8L3QX5G0fSKNSjJTmQ28gC+bleXdWgyvNy9gp/QfUtgVO4bBDucD tEnDEMX8ddue4Iu0ClNV+oe914PQA4sASydOdBGGDqjcTYWyYk3cEtFaUGbOsM9JZzHX McXR2E2CbeJAUBafZciUfTHdIHqoD5BxecNECQoFnnxyOiE50pA4LTe97gg+ldo9CLXX htwYRYd1XLRKdZ688iIXzoZcE6ZAOp0KKkVUWhI4DkcO3XozChiAIDWJbRCLsv6RDSfl YHAK+S5OdvwP/feqr4VPr9FDipMgp3+ZRQ11LoQ/jbdeb8du02Wlt/MEBqUa7+ASUHbK 6+gA== X-Gm-Message-State: AOAM533P6sq0o23BpYB4W4z4FdH1mKbXwFu7rIiivFa4NiFosw5PvQlK 0PsO8e6n4q6rgxTJxsiuoL2gQjTjU2JRsw== X-Google-Smtp-Source: ABdhPJx+/TTro2gia4SBDzgt3CLjBM2Oz0FOLhj0Dj5OMoAs5Cmz0cFRO9RGOW1v5n8ZxuLeLtuoGA== X-Received: by 2002:a63:2c14:0:b0:373:7200:d07d with SMTP id s20-20020a632c14000000b003737200d07dmr23393129pgs.617.1646172012700; Tue, 01 Mar 2022 14:00:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 06/18] target/arm: Use MAKE_64BIT_MASK to compute indexmask Date: Tue, 1 Mar 2022 11:59:46 -1000 Message-Id: <20220301215958.157011-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42b (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172420273100001 The macro is a bit more readable than the inlined computation. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 431b0c1405..675aec4bf3 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11518,8 +11518,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, level =3D startlevel; } =20 - indexmask_grainsize =3D (1ULL << (stride + 3)) - 1; - indexmask =3D (1ULL << (inputsize - (stride * (4 - level)))) - 1; + indexmask_grainsize =3D MAKE_64BIT_MASK(0, stride + 3); + indexmask =3D MAKE_64BIT_MASK(0, inputsize - (stride * (4 - level))); =20 /* Now we can extract the actual base address from the TTBR */ descaddr =3D extract64(ttbr, 0, 48); --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172604969254.21688099043047; Tue, 1 Mar 2022 14:10:04 -0800 (PST) Received: from localhost ([::1]:51198 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAh1-0007XO-UT for importer@patchew.org; Tue, 01 Mar 2022 17:10:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXa-0001J0-EY for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:20 -0500 Received: from [2607:f8b0:4864:20::1035] (port=53203 helo=mail-pj1-x1035.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXX-0004y1-No for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:18 -0500 Received: by mail-pj1-x1035.google.com with SMTP id v4so67694pjh.2 for ; Tue, 01 Mar 2022 14:00:15 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4y89pQ0OdmVIqwd6NdNcqx8YrKd1GuWayeQiD4wW2NU=; b=Wmy5RugO15iYoda6BPxEg0B8IO+i0Cq/TAILoJDnOKz63NyH4Ih2f3B/2Rc+7avbLd HW0UyyTRSseFRzGKaRf8Ep8bmht6vWXk8FU0bs0VWzlZAjFtjo+GbSy8L11N2ax3hKgo AQiGRTDzzd6vXb9E+V8y4czopyFkPZ0PUo4J8ASQsy24xec61rNZ0k1irkGLbi/wRtOD VDZvKTZKbSspIww69iWLaFMEizbmalize+nE4iCCpTU+zo5x43cz5DUQRBwaDKFol5ce j5F1KvWhYJjmus18aHAA+S2dMOU1R1VsRHdk9GDAVI8zcK2J2RmVkceYzIAJgfjC+EC7 ru0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4y89pQ0OdmVIqwd6NdNcqx8YrKd1GuWayeQiD4wW2NU=; b=RvOV4/VFRb4ZqarOiZP7D2PJhEYSZHE1yowPaTwswKfE5uRCRqqLJbX1PVt+uLxrQk iTfBqplFeX8Rr2bg1oRQbksRilKYlsmXNEpMSyLoNq3Hb5vtaAQ6fTzwctc1euFctghd QSJP4WVphR1Bz7darPW3mLXF+rg1q6n2yxN+QcmHI9L1eY4XlPif9uw8EXlSVlYbjQRB NAx56D8+7OMuKN5fZHz85O0Z005exNzNIwxREoL+q9V1U7hqjJIWzwLl/1hRWJpRZDYF Wd50JDzbnEn2HhRlXk4gqqUDnp6U2RBSXn6cR15BXmbAVu8uESD7Hf4BQejWHLqZpc/R 9pZA== X-Gm-Message-State: AOAM531SRWVnES7GWnNLKudCEfeAnOpNnKdqMleEgikpOa80XjA+yF4v vo4g0F8XEiRL/ABr4IqnvV82nsnL32HHiA== X-Google-Smtp-Source: ABdhPJznX60q7l8+36HYaGBopmOaWch1jFLEuor7SDqcpxv+4r/GHQNq/NJ85znJOEgD2juT7OCF0A== X-Received: by 2002:a17:902:ab4c:b0:14f:bb61:ef0a with SMTP id ij12-20020a170902ab4c00b0014fbb61ef0amr27572532plb.84.1646172014254; Tue, 01 Mar 2022 14:00:14 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 07/18] target/arm: Honor TCR_ELx.{I}PS Date: Tue, 1 Mar 2022 11:59:47 -1000 Message-Id: <20220301215958.157011-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1035 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172605636100001 This field controls the output (intermediate) physical address size of the translation process. V8 requires to raise an AddressSize fault if the page tables are programmed incorrectly, such that any intermediate descriptor address, or the final translated address, is out of range. Add a PS field to ARMVAParameters, and properly compute outputsize in get_phys_addr_lpae. Test the descaddr as extracted from TTBR and from page table entries. Restrict descaddrmask so that we won't raise the fault for v7. Reviewed-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/internals.h | 1 + target/arm/helper.c | 72 ++++++++++++++++++++++++++++++++---------- 2 files changed, 57 insertions(+), 16 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index fefd1fb8d8..3d3d41ba2b 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1032,6 +1032,7 @@ static inline uint32_t aarch64_pstate_valid_mask(cons= t ARMISARegisters *id) */ typedef struct ARMVAParameters { unsigned tsz : 8; + unsigned ps : 3; unsigned select : 1; bool tbi : 1; bool epd : 1; diff --git a/target/arm/helper.c b/target/arm/helper.c index 675aec4bf3..c002100979 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11149,17 +11149,19 @@ static uint8_t convert_stage2_attrs(CPUARMState *= env, uint8_t s2attrs) } #endif /* !CONFIG_USER_ONLY */ =20 +/* This mapping is common between ID_AA64MMFR0.PARANGE and TCR_ELx.{I}PS. = */ +static const uint8_t pamax_map[] =3D { + [0] =3D 32, + [1] =3D 36, + [2] =3D 40, + [3] =3D 42, + [4] =3D 44, + [5] =3D 48, +}; + /* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ unsigned int arm_pamax(ARMCPU *cpu) { - static const unsigned int pamax_map[] =3D { - [0] =3D 32, - [1] =3D 36, - [2] =3D 40, - [3] =3D 42, - [4] =3D 44, - [5] =3D 48, - }; unsigned int parange =3D FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); =20 @@ -11210,7 +11212,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; bool epd, hpd, using16k, using64k, tsz_oob; - int select, tsz, tbi, max_tsz, min_tsz; + int select, tsz, tbi, max_tsz, min_tsz, ps; =20 if (!regime_has_2_ranges(mmu_idx)) { select =3D 0; @@ -11224,6 +11226,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, hpd =3D extract32(tcr, 24, 1); } epd =3D false; + ps =3D extract32(tcr, 16, 3); } else { /* * Bit 55 is always between the two regions, and is canonical for @@ -11244,6 +11247,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, epd =3D extract32(tcr, 23, 1); hpd =3D extract64(tcr, 42, 1); } + ps =3D extract64(tcr, 32, 3); } =20 if (cpu_isar_feature(aa64_st, env_archcpu(env))) { @@ -11272,6 +11276,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, =20 return (ARMVAParameters) { .tsz =3D tsz, + .ps =3D ps, .select =3D select, .tbi =3D tbi, .epd =3D epd, @@ -11399,6 +11404,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, =20 /* TODO: This code does not support shareability levels. */ if (aarch64) { + int ps; + param =3D aa64_va_parameters(env, address, mmu_idx, access_type !=3D MMU_INST_FETCH); level =3D 0; @@ -11419,7 +11426,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, =20 addrsize =3D 64 - 8 * param.tbi; inputsize =3D 64 - param.tsz; - outputsize =3D arm_pamax(cpu); + + /* + * Bound PS by PARANGE to find the effective output address size. + * ID_AA64MMFR0 is a read-only register so values outside of the + * supported mappings can be considered an implementation error. + */ + ps =3D FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); + ps =3D MIN(ps, param.ps); + assert(ps < ARRAY_SIZE(pamax_map)); + outputsize =3D pamax_map[ps]; } else { param =3D aa32_va_parameters(env, address, mmu_idx); level =3D 1; @@ -11523,19 +11539,38 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, =20 /* Now we can extract the actual base address from the TTBR */ descaddr =3D extract64(ttbr, 0, 48); + + /* + * If the base address is out of range, raise AddressSizeFault. + * In the pseudocode, this is !IsZero(baseregister<47:outputsize>), + * but we've just cleared the bits above 47, so simplify the test. + */ + if (descaddr >> outputsize) { + level =3D 0; + fault_type =3D ARMFault_AddressSize; + goto do_fault; + } + /* * We rely on this masking to clear the RES0 bits at the bottom of the= TTBR * and also to mask out CnP (bit 0) which could validly be non-zero. */ descaddr &=3D ~indexmask; =20 - /* The address field in the descriptor goes up to bit 39 for ARMv7 - * but up to bit 47 for ARMv8, but we use the descaddrmask - * up to bit 39 for AArch32, because we don't need other bits in that = case - * to construct next descriptor address (anyway they should be all zer= oes). + /* + * For AArch32, the address field in the descriptor goes up to bit 39 + * for both v7 and v8. However, for v8 the SBZ bits [47:40] must be 0 + * or an AddressSize fault is raised. So for v8 we extract those SBZ + * bits as part of the address, which will be checked via outputsize. + * For AArch64, the address field always goes up to bit 47 (with extra + * bits for FEAT_LPA placed elsewhere). AArch64 implies v8. */ - descaddrmask =3D ((1ull << (aarch64 ? 48 : 40)) - 1) & - ~indexmask_grainsize; + if (arm_feature(env, ARM_FEATURE_V8)) { + descaddrmask =3D MAKE_64BIT_MASK(0, 48); + } else { + descaddrmask =3D MAKE_64BIT_MASK(0, 40); + } + descaddrmask &=3D ~indexmask_grainsize; =20 /* Secure accesses start with the page table in secure memory and * can be downgraded to non-secure at any step. Non-secure accesses @@ -11560,7 +11595,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, /* Invalid, or the Reserved level 3 encoding */ goto do_fault; } + descaddr =3D descriptor & descaddrmask; + if (descaddr >> outputsize) { + fault_type =3D ARMFault_AddressSize; + goto do_fault; + } =20 if ((descriptor & 2) && (level < 3)) { /* Table entry. The top five bits are attributes which may --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646173034413743.4490317949984; Tue, 1 Mar 2022 14:17:14 -0800 (PST) Received: from localhost ([::1]:39734 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAnw-0002JA-8G for importer@patchew.org; Tue, 01 Mar 2022 17:17:13 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXc-0001JG-DA for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:20 -0500 Received: from [2607:f8b0:4864:20::102d] (port=51158 helo=mail-pj1-x102d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXZ-0004yq-AY for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:19 -0500 Received: by mail-pj1-x102d.google.com with SMTP id m22so97653pja.0 for ; Tue, 01 Mar 2022 14:00:16 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TmxawEn4TT//u8dncYbu6ycL9fZfNNpmMP+qU1HcQZ0=; b=sBO36gXviA0Dkd1Weoc5SQH5qIidteDHrXdZvzNSh04ezoQXqD3irIVtzPo0aiDabp Zqcl6sdxJrcV6Zia6zLj7h4AyxU4p35rGc6UgJZ/6MecQgHArxvLhX4MeH6tekIZxzsM AmdAeeRJNJdHdDqtjUfg+MHgbiVaITH1X+Ta6DJJq/saUj08WLcxFBNj2bDFdb8l66H4 jHd+0z3RVeO+hgd1i0cnj/ROz365/Aj001f8RVNYC8UfbGXDhJI/1O+X+Ohe2GCV/Sjo PyouSQUCjy+CjzDTwTfeXNuVpB90pSJxRUgOT3Jc1NPaa6VDXBL5+JAAnjswxZ+kJQFj kinA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TmxawEn4TT//u8dncYbu6ycL9fZfNNpmMP+qU1HcQZ0=; b=E670566mrefUCDFYe3AN6yNh1KfbNIsVzb1sqp9uJFJi9rMk3csf9nz17RJR2sjJj0 jVFsg8jLTsai0lITajKzyaAkE3ylGpBgX8dMLoWG+2tivCkMpzEjhphSNYH8ntlMTYV7 gi/ZxOQVRIG0qA1/7NcHO5JKKUPWk7mRdMRn6pIjncqBZMKfsH+oMfVPwc/HW83+YgQp EZuKriyLH1URTcrQCsUOd1zsou3n1P8xlQuecgrucVay7cVbLMmOAlR656RzSB25nxjQ mNrWrcOj95RL6klax5A3KbMqWTSNrqZBLpvZsAIqShZ+qwVaGv8XS/Xa7G8x89oGuThf xysQ== X-Gm-Message-State: AOAM53393WaNNIEdgGHCWjP7H9aaeAWZLdMfNwJtK5NGNyN/DBstQptO lzydgrao2Rcr+1d4lhyBTvun6GxR/xWUig== X-Google-Smtp-Source: ABdhPJzl+Xfe3pUBDjpVmZd+C+BA1tI2FPwW4ojS6nrsqJPaGXzyQE6J+SM1oK2oReCv0dPo0RhKzw== X-Received: by 2002:a17:90b:3503:b0:1bc:5d68:e7a2 with SMTP id ls3-20020a17090b350300b001bc5d68e7a2mr24014517pjb.29.1646172015667; Tue, 01 Mar 2022 14:00:15 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 08/18] target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA Date: Tue, 1 Mar 2022 11:59:48 -1000 Message-Id: <20220301215958.157011-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646173036780100001 Content-Type: text/plain; charset="utf-8" The original A.a revision of the AArch64 ARM required that we force-extend the addresses in these registers from 49 bits. This language has been loosened via a combination of IMPLEMENTATION DEFINED and CONSTRAINTED UNPREDICTABLE to allow consideration of the entire aligned address. This means that we do not have to consider whether or not FEAT_LVA is enabled, and decide from which bit an address might need to be extended. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index c002100979..2eff30d18c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6423,11 +6423,18 @@ static void dbgwvr_write(CPUARMState *env, const AR= MCPRegInfo *ri, ARMCPU *cpu =3D env_archcpu(env); int i =3D ri->crm; =20 - /* Bits [63:49] are hardwired to the value of bit [48]; that is, the - * register reads and behaves as if values written are sign extended. + /* * Bits [1:0] are RES0. + * + * It is IMPLEMENTATION DEFINED whether [63:49] ([63:53] with FEAT_LVA) + * are hardwired to the value of bit [48] ([52] with FEAT_LVA), or if + * they contain the value written. It is CONSTRAINED UNPREDICTABLE + * whether the RESS bits are ignored when comparing an address. + * + * Therefore we are allowed to compare the entire register, which lets + * us avoid considering whether or not FEAT_LVA is actually enabled. */ - value =3D sextract64(value, 0, 49) & ~3ULL; + value &=3D ~3ULL; =20 raw_write(env, ri, value); hw_watchpoint_update(cpu, i); @@ -6473,10 +6480,19 @@ void hw_breakpoint_update(ARMCPU *cpu, int n) case 0: /* unlinked address match */ case 1: /* linked address match */ { - /* Bits [63:49] are hardwired to the value of bit [48]; that is, - * we behave as if the register was sign extended. Bits [1:0] are - * RES0. The BAS field is used to allow setting breakpoints on 16 - * bit wide instructions; it is CONSTRAINED UNPREDICTABLE whether + /* + * Bits [1:0] are RES0. + * + * It is IMPLEMENTATION DEFINED whether bits [63:49] + * ([63:53] for FEAT_LVA) are hardwired to a copy of the sign bit + * of the VA field ([48] or [52] for FEAT_LVA), or whether the + * value is read as written. It is CONSTRAINED UNPREDICTABLE + * whether the RESS bits are ignored when comparing an address. + * Therefore we are allowed to compare the entire register, which + * lets us avoid considering whether FEAT_LVA is actually enabled. + * + * The BAS field is used to allow setting breakpoints on 16-bit + * wide instructions; it is CONSTRAINED UNPREDICTABLE whether * a bp will fire if the addresses covered by the bp and the addre= sses * covered by the insn overlap but the insn doesn't start at the * start of the bp address range. We choose to require the insn and @@ -6489,7 +6505,7 @@ void hw_breakpoint_update(ARMCPU *cpu, int n) * See also figure D2-3 in the v8 ARM ARM (DDI0487A.c). */ int bas =3D extract64(bcr, 5, 4); - addr =3D sextract64(bvr, 0, 49) & ~3ULL; + addr =3D bvr & ~3ULL; if (bas =3D=3D 0) { return; } --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172793997401.71195468729775; Tue, 1 Mar 2022 14:13:13 -0800 (PST) Received: from localhost ([::1]:59726 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAk4-0004xv-Oe for importer@patchew.org; Tue, 01 Mar 2022 17:13:12 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58588) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXc-0001JI-Ed for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:20 -0500 Received: from [2607:f8b0:4864:20::1032] (port=45900 helo=mail-pj1-x1032.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXa-000510-Ks for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:20 -0500 Received: by mail-pj1-x1032.google.com with SMTP id m11-20020a17090a7f8b00b001beef6143a8so47698pjl.4 for ; Tue, 01 Mar 2022 14:00:18 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rots8gM6WyEhatQucngAjy7J8H2b6HMDpJoYQByRIgE=; b=H6bhpnqaEQrN0iJkzFoNsIoXJR2PxZ70ger9l7nmlhzPe19dgaGKmf2V1Tmn7ARzvC 0cNhjKjY0xVPFxhCROAET7rz+OutjtjzmH9TsVuqzKjyExDB3OydCLxj+bIvOrtPIhQc RHgFLhF28i8O59NfDrxzxYBnO77gY32CP0HxNJ6hV8t/U+vf98Bps92gczM02CglzhfZ wGSqnhQtAS40stdF1D/GLOw+odRYCRjM8OjXVhpuVoglA1hJh/3cd1ME784xXxBrp51a V2dV9wq2uBALgV45TR+oGfjREhC1sRuqO7XQXR2c1e5qAXQg9s4cbysXPoYxUBqJ0K1O QpZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rots8gM6WyEhatQucngAjy7J8H2b6HMDpJoYQByRIgE=; b=3H9vKpmsTmWpJnqJOwpqdhnuULv3se98+xbMQP+FzP0vrsCZ4L4zORT+74eFETVFDM aa6nuDTmzqQmXgpNJQLPbQIFucv4AZupvbyh0d+5RljnO3d7FnVvoWvnv0N+Y+s3QzLL mBRntljkA/+Y7RyjLjiczrohzv2WlPeP7FUkYFGUMxDRpTlTFrYRl17jlnXv+q25vev6 LliEvaidmp3azzKkJXW4iQuABWZYh5oI7ZRpOEw33dQC670YhnNf047mALqsv/SGJK/F fDlMzFc3U2xQtNKEpvuIcvsX+hY5brWqjLLxqQN4Heds/6kI6LwG44MFnz2eIDWKaQQd aXDA== X-Gm-Message-State: AOAM532Wo+fLouKRtwPvQ4zE4e+0V9QzZlPXtfCyWsPVSfb1qooEkzMG Ba/G8PcYhLTBI/Cnt1Joh/XzMM9FsjL/zw== X-Google-Smtp-Source: ABdhPJx+P7b2o82qLqbvjjjZJQGUPp5b+DkgkKsJaPZLteP3W3OlVrNy8YuYzuTLJWS+ybHa3coeFw== X-Received: by 2002:a17:90a:8d82:b0:1bc:6b54:e798 with SMTP id d2-20020a17090a8d8200b001bc6b54e798mr23979221pjo.77.1646172017192; Tue, 01 Mar 2022 14:00:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 09/18] target/arm: Implement FEAT_LVA Date: Tue, 1 Mar 2022 11:59:49 -1000 Message-Id: <20220301215958.157011-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1032 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172794962100001 Content-Type: text/plain; charset="utf-8" This feature is relatively small, as it applies only to 64k pages and thus requires no additional changes to the table descriptor walking algorithm, only a change to the minimum TSZ (which is the inverse of the maximum virtual address space size). Note that this feature widens VBAR_ELx, but we already treat the register as being 64 bits wide. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- docs/system/arm/emulation.rst | 1 + target/arm/cpu-param.h | 2 +- target/arm/cpu.h | 5 +++++ target/arm/cpu64.c | 1 + target/arm/helper.c | 9 ++++++++- 5 files changed, 16 insertions(+), 2 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 144dc491d9..f3eabddfb5 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -27,6 +27,7 @@ the following architecture extensions: - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) +- FEAT_LVA (Large Virtual Address space) - FEAT_MTE (Memory Tagging Extension) - FEAT_MTE2 (Memory Tagging Extension) - FEAT_MTE3 (MTE Asymmetric Fault Handling) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 7f38d33b8e..5f9c288b1a 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -11,7 +11,7 @@ #ifdef TARGET_AARCH64 # define TARGET_LONG_BITS 64 # define TARGET_PHYS_ADDR_SPACE_BITS 48 -# define TARGET_VIRT_ADDR_SPACE_BITS 48 +# define TARGET_VIRT_ADDR_SPACE_BITS 52 #else # define TARGET_LONG_BITS 32 # define TARGET_PHYS_ADDR_SPACE_BITS 40 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c6a4d50e82..c52d56f669 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -4289,6 +4289,11 @@ static inline bool isar_feature_aa64_ccidx(const ARM= ISARegisters *id) return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, CCIDX) !=3D 0; } =20 +static inline bool isar_feature_aa64_lva(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, VARANGE) !=3D 0; +} + static inline bool isar_feature_aa64_tts2uxn(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, XNX) !=3D 0; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1171ab16b9..1de31ffb40 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -811,6 +811,7 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); t =3D FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* TTCNP */ t =3D FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* TTST */ + t =3D FIELD_DP64(t, ID_AA64MMFR2, VARANGE, 1); /* FEAT_LVA */ cpu->isar.id_aa64mmfr2 =3D t; =20 t =3D cpu->isar.id_aa64zfr0; diff --git a/target/arm/helper.c b/target/arm/helper.c index 2eff30d18c..28b4347213 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11271,7 +11271,14 @@ ARMVAParameters aa64_va_parameters(CPUARMState *en= v, uint64_t va, } else { max_tsz =3D 39; } - min_tsz =3D 16; /* TODO: ARMv8.2-LVA */ + + min_tsz =3D 16; + if (using64k) { + if (cpu_isar_feature(aa64_lva, env_archcpu(env))) { + min_tsz =3D 12; + } + } + /* TODO: FEAT_LPA2 */ =20 if (tsz > max_tsz) { tsz =3D max_tsz; --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164617259212468.81192331316879; Tue, 1 Mar 2022 14:09:52 -0800 (PST) Received: from localhost ([::1]:50508 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAgo-00074q-JR for importer@patchew.org; Tue, 01 Mar 2022 17:09:50 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXf-0001L2-G2 for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:24 -0500 Received: from [2607:f8b0:4864:20::1035] (port=41898 helo=mail-pj1-x1035.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXc-00052q-4Q for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:21 -0500 Received: by mail-pj1-x1035.google.com with SMTP id ev16-20020a17090aead000b001bc3835fea8so95823pjb.0 for ; Tue, 01 Mar 2022 14:00:19 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DRWkLoJkIekxooE0yM1xnliLnzzt/ozTUB9sEE/E5Ow=; b=IryxSYgzvytR7FRsQVNzuNYlY/deavUtGw1IYXrAIs20xnEu3XANK+/DImGGSb8W3b 5O8+e0c38RaC/Z7gkYERy5kO90B3bmgp6SE2NlFttHkF8sD9w2tabO6EJW4Fa6FZvkJg CDl/nPR4KmNCoCKIrEPlBodxlrJ6lf2e9l74gGFoilatyqYraLMbJxmO6XG/f0Ecv65a JSJYOWhGePz9g6JN4bRGdmqMGysSNCLUx/OxDhmFczyw8NMF1DKAAd0ho33sY2nsxbHa dWzTA42YCknlw3/Py1kVV5zbhffpl+ZrX/YMP0ikNFnU4BFuCS8+eNos0+qktwqf31AT RU9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DRWkLoJkIekxooE0yM1xnliLnzzt/ozTUB9sEE/E5Ow=; b=gd1a1oyFcTpU+krqHQoYxVvw1wA8otDNhlb6eHWO6nh3vFXsGlJOfyUOy4ys9nOxxU i2K3rxqBqkgrN5ffZCTQzuu+Czia68vzjOptFfGOK4j8uKln3X5OEtOpQAk/lCG4znV1 Ff0vZ2zkUuCIVOGJIGmSMbjBhJ3zKSmr9WoB7FDWw3AdkurteY2aqaz6oKM0eN9syAfm Qcl9icYFXtrZhJihvcfdTBKKd/qCmE2yiP5n2WEugohW/tEqVF6RtSRD4CKduYwjMs6J VINW3b8Asv20YUICykPfwRTlVxr5apWU7wAa4CVd6AkFzaM3B76DrkBAq6G9fPYz4gqV o29Q== X-Gm-Message-State: AOAM5308xcuMX0lQSxZMsu47800M1X2RK1wdVhBb+H0Q5qJtYZZUZJ57 HKHjl2/krbm9fC5TrnmjeHaFXCTWRsPqKw== X-Google-Smtp-Source: ABdhPJwUF0u8CwMIDf7E4gEL+acX5Ww/fu7EsQuetQQ1iTTTUordjRBKChjcrU6aQiSy0W/HtyOuPQ== X-Received: by 2002:a17:90a:de96:b0:1be:e427:8745 with SMTP id n22-20020a17090ade9600b001bee4278745mr3782373pjv.175.1646172018732; Tue, 01 Mar 2022 14:00:18 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 10/18] target/arm: Implement FEAT_LPA Date: Tue, 1 Mar 2022 11:59:50 -1000 Message-Id: <20220301215958.157011-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1035 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172593864100001 Content-Type: text/plain; charset="utf-8" This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 64k pages. The only thing left at this point is to handle the extra bits in the TTBR and in the table descriptors. Note that PAR_EL1 and HPFAR_EL2 are nominally extended, but we don't mask out the high bits when writing to those registers, so no changes are required there. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- docs/system/arm/emulation.rst | 1 + target/arm/cpu-param.h | 2 +- target/arm/cpu64.c | 2 +- target/arm/helper.c | 19 ++++++++++++++++--- 4 files changed, 19 insertions(+), 5 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index f3eabddfb5..0053ddce20 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -24,6 +24,7 @@ the following architecture extensions: - FEAT_I8MM (AArch64 Int8 matrix multiplication instructions) - FEAT_JSCVT (JavaScript conversion instructions) - FEAT_LOR (Limited ordering regions) +- FEAT_LPA (Large Physical Address space) - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 5f9c288b1a..b59d505761 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -10,7 +10,7 @@ =20 #ifdef TARGET_AARCH64 # define TARGET_LONG_BITS 64 -# define TARGET_PHYS_ADDR_SPACE_BITS 48 +# define TARGET_PHYS_ADDR_SPACE_BITS 52 # define TARGET_VIRT_ADDR_SPACE_BITS 52 #else # define TARGET_LONG_BITS 32 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1de31ffb40..d88662cef6 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -795,7 +795,7 @@ static void aarch64_max_initfn(Object *obj) cpu->isar.id_aa64pfr1 =3D t; =20 t =3D cpu->isar.id_aa64mmfr0; - t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 5); /* PARange: 48 bits */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */ cpu->isar.id_aa64mmfr0 =3D t; =20 t =3D cpu->isar.id_aa64mmfr1; diff --git a/target/arm/helper.c b/target/arm/helper.c index 28b4347213..950f56599e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11173,6 +11173,7 @@ static const uint8_t pamax_map[] =3D { [3] =3D 42, [4] =3D 44, [5] =3D 48, + [6] =3D 52, }; =20 /* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ @@ -11564,11 +11565,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, descaddr =3D extract64(ttbr, 0, 48); =20 /* - * If the base address is out of range, raise AddressSizeFault. + * For FEAT_LPA and PS=3D6, bits [51:48] of descaddr are in [5:2] of T= TBR. + * + * Otherwise, if the base address is out of range, raise AddressSizeFa= ult. * In the pseudocode, this is !IsZero(baseregister<47:outputsize>), * but we've just cleared the bits above 47, so simplify the test. */ - if (descaddr >> outputsize) { + if (outputsize > 48) { + descaddr |=3D extract64(ttbr, 2, 4) << 48; + } else if (descaddr >> outputsize) { level =3D 0; fault_type =3D ARMFault_AddressSize; goto do_fault; @@ -11620,7 +11625,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, } =20 descaddr =3D descriptor & descaddrmask; - if (descaddr >> outputsize) { + + /* + * For FEAT_LPA and PS=3D6, bits [51:48] of descaddr are in [15:12] + * of descriptor. Otherwise, if descaddr is out of range, raise + * AddressSizeFault. + */ + if (outputsize > 48) { + descaddr |=3D extract64(descriptor, 12, 4) << 48; + } else if (descaddr >> outputsize) { fault_type =3D ARMFault_AddressSize; goto do_fault; } --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172502903899.2022548440992; Tue, 1 Mar 2022 14:08:22 -0800 (PST) Received: from localhost ([::1]:46484 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAfN-0004NI-Gw for importer@patchew.org; Tue, 01 Mar 2022 17:08:21 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58682) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXh-0001Lz-6F for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:25 -0500 Received: from [2607:f8b0:4864:20::429] (port=41596 helo=mail-pf1-x429.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXf-00053n-4v for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:24 -0500 Received: by mail-pf1-x429.google.com with SMTP id p8so55332pfh.8 for ; Tue, 01 Mar 2022 14:00:20 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LEHpSJT8J9ebqqTQjfyKLCxLV+2FFN9FnOSHNM/yVQA=; b=eae7XyHXBL9mKPwMEeDJvp2ibsiKf2ZNiUp90oXmnM4cwMTIo8y6XgGqjz+TsXrIym zlLeh5/D7eVCXXHYhL70zq5126nT/rQdpXoRazhAa2YxjDniT/0LOSQ6lQk+jtNOvb2t 7yGSVPwc9ebB3oKqEMGpUXAhFIyaIbWeLhVpoGxDjx8TjowyK/eeZ93h7YGi3GtnIZP1 D8WZmsXhgnFROtPO1vHOPdKeD5XJc+ClOuedH0wpV+MRchzaiGZfmBgUCF9/2NhmrSBR iTHJOQ6dtE+3jLK5276NHpS9d/Pv+PcinCtQcUDpAFSeD4I/xm40azQjq1UbmwjXpQLR 9b5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LEHpSJT8J9ebqqTQjfyKLCxLV+2FFN9FnOSHNM/yVQA=; b=NbyyB+swsbQauZ78ZRHV/npXhQg5ewjaMBOTXf31RSRP0fiAMcPoKvwVLaUm83EbOq Scs218JnvPM2dp57Oo0YKGJMgQt7DKhKDmgpFLaXz9Gf6FSkBimK7/bLAnVk+LAuzgvq 7RmbjQM23gbzDtmaMqi32CkUmwmVEjqwrgpelh7qh1PzzRYHz1USsfsTCmiJ0dH4lO3Z ECAnPVsDJyBLG06jSEKIKBT0HnkIiHz2WFNeS1+9yOVLC10Q63XCpSH/am30XQd4BT2+ uq/8c5og3YhwQj29H8OT81rVJAdWY8qHBcGncnSNchA0hlruZdiLhWj59vkpekymuQ9q AApA== X-Gm-Message-State: AOAM531+YUhVuMBGPJDhFjfd3KTDgfsjf5dCGkdz8jDppimSaSpHtJvz wek2+vTB/wKiyueVMn51gUJMmwVw+K4DHw== X-Google-Smtp-Source: ABdhPJwLniKbATL9r/QdTvrer38MfKczOjcSqJqAE2eJ6RSxsq9pMj1nEJ6w+Sp9gMX/myTT5xpBtA== X-Received: by 2002:a05:6a00:1354:b0:4c9:1e96:d15c with SMTP id k20-20020a056a00135400b004c91e96d15cmr29714068pfu.30.1646172020158; Tue, 01 Mar 2022 14:00:20 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 11/18] target/arm: Extend arm_fi_to_lfsc to level -1 Date: Tue, 1 Mar 2022 11:59:51 -1000 Message-Id: <20220301215958.157011-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::429 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172505322100001 Content-Type: text/plain; charset="utf-8" With FEAT_LPA2, rather than introducing translation level 4, we introduce level -1, below the current level 0. Extend arm_fi_to_lfsc to handle these faults. Assert that this new translation level does not leak into fault types for which it is not defined, which allows some masking of fi->level to be removed. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/internals.h | 35 +++++++++++++++++++++++++++++------ 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3d3d41ba2b..00af41d792 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -462,28 +462,51 @@ static inline uint32_t arm_fi_to_lfsc(ARMMMUFaultInfo= *fi) case ARMFault_None: return 0; case ARMFault_AddressSize: - fsc =3D fi->level & 3; + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b101001; + } else { + fsc =3D fi->level; + } break; case ARMFault_AccessFlag: - fsc =3D (fi->level & 3) | (0x2 << 2); + assert(fi->level >=3D 0 && fi->level <=3D 3); + fsc =3D 0b001000 | fi->level; break; case ARMFault_Permission: - fsc =3D (fi->level & 3) | (0x3 << 2); + assert(fi->level >=3D 0 && fi->level <=3D 3); + fsc =3D 0b001100 | fi->level; break; case ARMFault_Translation: - fsc =3D (fi->level & 3) | (0x1 << 2); + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b101011; + } else { + fsc =3D 0b000100 | fi->level; + } break; case ARMFault_SyncExternal: fsc =3D 0x10 | (fi->ea << 12); break; case ARMFault_SyncExternalOnWalk: - fsc =3D (fi->level & 3) | (0x5 << 2) | (fi->ea << 12); + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b010011; + } else { + fsc =3D 0b010100 | fi->level; + } + fsc |=3D fi->ea << 12; break; case ARMFault_SyncParity: fsc =3D 0x18; break; case ARMFault_SyncParityOnWalk: - fsc =3D (fi->level & 3) | (0x7 << 2); + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b011011; + } else { + fsc =3D 0b011100 | fi->level; + } break; case ARMFault_AsyncParity: fsc =3D 0x19; --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164617302970018.42188402041529; Tue, 1 Mar 2022 14:17:09 -0800 (PST) Received: from localhost ([::1]:39546 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAns-0002Bs-J3 for importer@patchew.org; Tue, 01 Mar 2022 17:17:08 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58714) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXi-0001Ma-3u for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:26 -0500 Received: from [2607:f8b0:4864:20::634] (port=40787 helo=mail-pl1-x634.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXf-00054l-7Q for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:25 -0500 Received: by mail-pl1-x634.google.com with SMTP id z11so6188308pla.7 for ; Tue, 01 Mar 2022 14:00:22 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Uavi3yQmU7TEij7jJpcySVBC3+TVvlm3sHX3b1s1W6c=; b=x9Hpxm+yOZ3n2zpMptbltLZJ/Fj3t8u0ktCJjHkh1yz48YGRmn+IzwbD+One+J9O1n ifkP8awY/S0F8l4MIIMPZjMkI5pBI9ms4qsAeh53k6p5iyv4ESSMv3BB7AHwb1bVokzU 0pm6UKg/qHQubrQJes8VV5Qrn6V9StWJTbaKoZzZDqQhei/xjyjjxOTJRMoolwqWjBCj te2oV5UEbJ0LuQ1a5hq9k6j4mJttybImuAvHH3jUvZLLRdjy/7su454Yz/oztvNkr7R2 ggEUhCUUIgqARkIiiN0KQlPULLnP06B7POqONcLzRfkHRB5wbZVB1Tecr59KOQpb+3V/ DvPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Uavi3yQmU7TEij7jJpcySVBC3+TVvlm3sHX3b1s1W6c=; b=10L5BbjHwQ4GFM71AsEOnPQqMKdPulka4RKr6I74F/A245dzqeAK04Ju28yxoOrqI2 EuxCAwWcBwmoyVRA6RoTkEji3J8qb4smdI2eaRULzBpNlEdPLS4FHl8G04ERNrvcd0so IVLOR5yVz6uiYE5eFmYRpLDbj6KoaEiV3T+Nukmi3oNGEl+HmyNvLkdS1WFRA5QVbgYJ RrxBBZA4ACNiMqp7OqFs2iXIUxzO6rskL6nUCm5A11XaqAfGN3niUEyFXLgf9BTIBQ04 HCnbvEThkyj7g+y/havjJBAASdfMYEEvct7ZNXAI6GbQkKPH4brWIUyFLpGiCYnGygbF L0fQ== X-Gm-Message-State: AOAM533jIMNlG3m/9zAACHCaDipwvO0j6tUIWyiMWLOYlO5h8mKiruw5 LMRF8nv966JMVqwLhXDix5/NcR4tpbQXXw== X-Google-Smtp-Source: ABdhPJzD5lxtdEJWSt10NkmYV/WVY44tL7ywINneeaWrGxaGsEq1GveFXMfWvzLVvxPMWf+79OcIjA== X-Received: by 2002:a17:90a:cb95:b0:1be:f05c:d7a5 with SMTP id a21-20020a17090acb9500b001bef05cd7a5mr1491061pju.140.1646172021666; Tue, 01 Mar 2022 14:00:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 12/18] target/arm: Introduce tlbi_aa64_get_range Date: Tue, 1 Mar 2022 11:59:52 -1000 Message-Id: <20220301215958.157011-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::634 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646173031072100001 Content-Type: text/plain; charset="utf-8" Merge tlbi_aa64_range_get_length and tlbi_aa64_range_get_base, returning a structure containing both results. Pass in the ARMMMUIdx, rather than the digested two_ranges boolean. This is in preparation for FEAT_LPA2, where the interpretation of 'value' depends on the effective value of DS for the regime. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 58 +++++++++++++++++++-------------------------- 1 file changed, 24 insertions(+), 34 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 950f56599e..31c2a716f2 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4511,70 +4511,60 @@ static void tlbi_aa64_vae3is_write(CPUARMState *env= , const ARMCPRegInfo *ri, } =20 #ifdef TARGET_AARCH64 -static uint64_t tlbi_aa64_range_get_length(CPUARMState *env, - uint64_t value) -{ - unsigned int page_shift; - unsigned int page_size_granule; - uint64_t num; - uint64_t scale; - uint64_t exponent; +typedef struct { + uint64_t base; uint64_t length; +} TLBIRange; + +static TLBIRange tlbi_aa64_get_range(CPUARMState *env, ARMMMUIdx mmuidx, + uint64_t value) +{ + unsigned int page_size_granule, page_shift, num, scale, exponent; + TLBIRange ret =3D { }; =20 - num =3D extract64(value, 39, 5); - scale =3D extract64(value, 44, 2); page_size_granule =3D extract64(value, 46, 2); =20 if (page_size_granule =3D=3D 0) { qemu_log_mask(LOG_GUEST_ERROR, "Invalid page size granule %d\n", page_size_granule); - return 0; + return ret; } =20 page_shift =3D (page_size_granule - 1) * 2 + 12; - + num =3D extract64(value, 39, 5); + scale =3D extract64(value, 44, 2); exponent =3D (5 * scale) + 1; - length =3D (num + 1) << (exponent + page_shift); =20 - return length; -} + ret.length =3D (num + 1) << (exponent + page_shift); =20 -static uint64_t tlbi_aa64_range_get_base(CPUARMState *env, uint64_t value, - bool two_ranges) -{ - /* TODO: ARMv8.7 FEAT_LPA2 */ - uint64_t pageaddr; - - if (two_ranges) { - pageaddr =3D sextract64(value, 0, 37) << TARGET_PAGE_BITS; + if (regime_has_2_ranges(mmuidx)) { + ret.base =3D sextract64(value, 0, 37) << TARGET_PAGE_BITS; } else { - pageaddr =3D extract64(value, 0, 37) << TARGET_PAGE_BITS; + ret.base =3D extract64(value, 0, 37) << TARGET_PAGE_BITS; } =20 - return pageaddr; + return ret; } =20 static void do_rvae_write(CPUARMState *env, uint64_t value, int idxmap, bool synced) { ARMMMUIdx one_idx =3D ARM_MMU_IDX_A | ctz32(idxmap); - bool two_ranges =3D regime_has_2_ranges(one_idx); - uint64_t baseaddr, length; + TLBIRange range; int bits; =20 - baseaddr =3D tlbi_aa64_range_get_base(env, value, two_ranges); - length =3D tlbi_aa64_range_get_length(env, value); - bits =3D tlbbits_for_regime(env, one_idx, baseaddr); + range =3D tlbi_aa64_get_range(env, one_idx, value); + bits =3D tlbbits_for_regime(env, one_idx, range.base); =20 if (synced) { tlb_flush_range_by_mmuidx_all_cpus_synced(env_cpu(env), - baseaddr, - length, + range.base, + range.length, idxmap, bits); } else { - tlb_flush_range_by_mmuidx(env_cpu(env), baseaddr, - length, idxmap, bits); + tlb_flush_range_by_mmuidx(env_cpu(env), range.base, + range.length, idxmap, bits); } } =20 --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172785933208.3943191362547; Tue, 1 Mar 2022 14:13:05 -0800 (PST) Received: from localhost ([::1]:59316 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAjw-0004h6-I6 for importer@patchew.org; Tue, 01 Mar 2022 17:13:04 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58712) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXi-0001MT-1K for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:26 -0500 Received: from [2607:f8b0:4864:20::1029] (port=45892 helo=mail-pj1-x1029.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXg-00055C-9x for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:25 -0500 Received: by mail-pj1-x1029.google.com with SMTP id m11-20020a17090a7f8b00b001beef6143a8so47918pjl.4 for ; Tue, 01 Mar 2022 14:00:23 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iuG8ohkKwqyyIJ7svsXNRHI3s70BPYfliw43HdSQEsk=; b=v6vhctFGtQ9+UuTVknMXPWTTC4GFlxgV3M6vlHVEU/BYRvyePLI+kh8gjOG3ssREou xGKIwLKegECDh3fqaNNJ9iNWIchFv9H5qJtgE82VNlL9UsBRp867UZGfb8aarEz1hDbs 2nWXGx43oqz53sQdyrF/AX9Ar66/YUvRcDTxGzZjcOK0fL/ij/iiT5aLL605pK98RQ8Q bJL1Snj0/4hkQRAiW0U+CS0cK7Cl6I7TmttvfkxzR1MTH3rcsykpWlIw7yhIf0z9KGqt HhRahD9ThmgunpeEXKtV6vaL+j0JlSgfslCeasi9GjAfLAOPH6NuMVWE/9TE01GN1j4K COWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iuG8ohkKwqyyIJ7svsXNRHI3s70BPYfliw43HdSQEsk=; b=4sebbOTtnVkDY8perr9VIz3c0JasYTJn/EtPTCph31Zju7r8HMQfKR16KCJIWc4fdP iWRnsIp3ALLEtl+7cdww5UCMm5DVpE70gXbI8HnQNXE9xBFMjTlcFVK1gPGONpq2JXeG 74PUNjqS7MwnHGmnfu1Q4qnsjDq8pP6TCiim8eTnsdBDFX856OCsmu+Nsjs9uWMGD2TJ /GbEkZzzzVbHuyrHlAqk4L/Rd05umgrlr2BLyA/VJ9+SgYhfqfMhay0twALrKahdx5RR 9QnnJMbnsbXA2V76xCScJnnD4eLH8nUcm+ijjoEciWLo2LNQGz7KEapMvGOt9xLBDaoY Me7w== X-Gm-Message-State: AOAM532KFL820gU3HD6eVBsCO2auqTDIfzRWUry2/rJjfzNJuyZmInep lYirpJN6IMVGO0Qdol4ZDJCk/LiX9+vSXQ== X-Google-Smtp-Source: ABdhPJx63VH1HkkCCGZSNnq+d5LdDpI55pWB7Us0oU6YEXNa7dgpWE8Q68A0y4b/I61qb2cfHoG4CA== X-Received: by 2002:a17:902:cacb:b0:14f:ef7f:b0c4 with SMTP id y11-20020a170902cacb00b0014fef7fb0c4mr26480658pld.135.1646172023148; Tue, 01 Mar 2022 14:00:23 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 13/18] target/arm: Fix TLBIRange.base for 16k and 64k pages Date: Tue, 1 Mar 2022 11:59:53 -1000 Message-Id: <20220301215958.157011-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1029 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172786931100001 Content-Type: text/plain; charset="utf-8" The shift of the BaseADDR field depends on the translation granule in use. Fixes: 84940ed8255 ("target/arm: Add support for FEAT_TLBIRANGE") Reported-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 31c2a716f2..e455397fb5 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4538,10 +4538,11 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *e= nv, ARMMMUIdx mmuidx, ret.length =3D (num + 1) << (exponent + page_shift); =20 if (regime_has_2_ranges(mmuidx)) { - ret.base =3D sextract64(value, 0, 37) << TARGET_PAGE_BITS; + ret.base =3D sextract64(value, 0, 37); } else { - ret.base =3D extract64(value, 0, 37) << TARGET_PAGE_BITS; + ret.base =3D extract64(value, 0, 37); } + ret.base <<=3D page_shift; =20 return ret; } --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646173289448286.26610387484277; Tue, 1 Mar 2022 14:21:29 -0800 (PST) Received: from localhost ([::1]:49560 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAs4-0000ik-Dj for importer@patchew.org; Tue, 01 Mar 2022 17:21:28 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58770) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXk-0001Pl-AR for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:28 -0500 Received: from [2607:f8b0:4864:20::436] (port=36661 helo=mail-pf1-x436.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXi-00055s-L3 for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:27 -0500 Received: by mail-pf1-x436.google.com with SMTP id z16so78132pfh.3 for ; Tue, 01 Mar 2022 14:00:25 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WFTKQrLiJ3VwSgvkt/IhaEgBVQ3+b8tLX7nUBsUG9rM=; b=P9uQd+BdqGTZoNjJTkEoT791LDyZo+Oj0K1NYCqCUgd+0+XDDTII2RZ8AVqLUe0ZRo 8At3d44SYIuYRD8xuNIUBi6SJeJHz8ndIIZKu3IBPCLn5MLA6oJk0BrlUXyLQggC2UYm NEEflUTNywky58oWCAA+XQ+cUjUvexun1gwvaN9xonC7n2A7GUPGBgbFJYMPKWm+blS4 oc1XOsfbotBpBjNIFhV/Hjb9gH2g/q/tmCBuNnzIpnyQy+3dDp4SXpOuJhMXGDuTJurQ ZerktgMKgfG3sy1oAexIdoZwlQNAgAK/o6lJjCOtbB233Ym/PUzHQXTv9W7MAn23xGd/ 3Djg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WFTKQrLiJ3VwSgvkt/IhaEgBVQ3+b8tLX7nUBsUG9rM=; b=Epti4JH+2TrfKBmnHmp4WGHmUkgh1/tgQLRv86GQEEhdn3IJNa4D4zhWxsHLX6mudl A2CyIeSl9sxJpBqUBqEeDqFn50jqR/nx/mt2pHPemS/UFmPmr/Rh/7woLBBDyEOoNPAL jlbO+StMZRm9D/ufDUqdAi59JEpUPyBRBUilErNVKDFdxL62rOQBJq2LQDwJTA0qP4fG /nAlu9Q2tKjE9z1tEr0jUR7+mhreKyJGJT3Ngy0yyUDjofTJGJjHIykM/ox7e7t1L+We ZTHokWUr0uQq7RaKuKJyvDyv13hCDEkjYcCSfNxAAHgwzskS1b1wNdKllZYjedEu7GVz wCOw== X-Gm-Message-State: AOAM530SuEEdi9o3j9cxDUBvQ05mme0vEpYCwa5jvRvU2UIHr96oIICm LEXDYK6Onw7w3QVF5lhg8/C9VJUegJqO7w== X-Google-Smtp-Source: ABdhPJyRcISYU/7qW1rlLZsHyaEDMprDLPFsHy5nt+k1QyBfkho6CL1xoCjZCmonLmizjG/lLNjUoQ== X-Received: by 2002:a63:114:0:b0:34d:efd0:762a with SMTP id 20-20020a630114000000b0034defd0762amr23191092pgb.71.1646172024683; Tue, 01 Mar 2022 14:00:24 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 14/18] target/arm: Validate tlbi TG matches translation granule in use Date: Tue, 1 Mar 2022 11:59:54 -1000 Message-Id: <20220301215958.157011-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::436 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646173290395100001 Content-Type: text/plain; charset="utf-8" For FEAT_LPA2, we will need other ARMVAParameters, which themselves depend on the translation granule in use. We might as well validate that the given TG matches; the architecture "does not require that the instruction invalidates any entries" if this is not true. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index e455397fb5..3a7f5cf6f0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4520,12 +4520,16 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *e= nv, ARMMMUIdx mmuidx, uint64_t value) { unsigned int page_size_granule, page_shift, num, scale, exponent; + /* Extract one bit to represent the va selector in use. */ + uint64_t select =3D sextract64(value, 36, 1); + ARMVAParameters param =3D aa64_va_parameters(env, select, mmuidx, true= ); TLBIRange ret =3D { }; =20 page_size_granule =3D extract64(value, 46, 2); =20 - if (page_size_granule =3D=3D 0) { - qemu_log_mask(LOG_GUEST_ERROR, "Invalid page size granule %d\n", + /* The granule encoded in value must match the granule in use. */ + if (page_size_granule !=3D (param.using64k ? 3 : param.using16k ? 2 : = 1)) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid tlbi page size granule %d\= n", page_size_granule); return ret; } @@ -4537,7 +4541,7 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *env= , ARMMMUIdx mmuidx, =20 ret.length =3D (num + 1) << (exponent + page_shift); =20 - if (regime_has_2_ranges(mmuidx)) { + if (param.select) { ret.base =3D sextract64(value, 0, 37); } else { ret.base =3D extract64(value, 0, 37); --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646173230091328.9719992531926; Tue, 1 Mar 2022 14:20:30 -0800 (PST) Received: from localhost ([::1]:47540 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAr6-0007ih-VQ for importer@patchew.org; Tue, 01 Mar 2022 17:20:29 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58804) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXl-0001SS-Iw for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:29 -0500 Received: from [2607:f8b0:4864:20::1036] (port=43898 helo=mail-pj1-x1036.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXj-000576-Jt for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:29 -0500 Received: by mail-pj1-x1036.google.com with SMTP id iq13-20020a17090afb4d00b001bc4437df2cso66538pjb.2 for ; Tue, 01 Mar 2022 14:00:27 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/ncep1+pfaj4VrhFhzBJtvktsI7eesl8NO/EGk2kyoM=; b=U77H2tZWwh5cJRW1Wpb4uwaA3RLNMtAJF+LLSgoaYC3NKL5ZbSUUPZKRMK83mzHkgA EwfhF8EhRPwlYzTKtfX7hQftMqLJvQkXT7L1A9ravjK1SUzJLu4GeK8Fg46sCMiZO2uI WmWgkkePaXBbkCeaCXOey3JkfDIs3g6L2BxlbUIAeXa+JHuDYJZScFNd2nGIdhBOBdm0 UjOhS8FNMPfbKGHwQMiniFpcJEXP5u4jgS4oiXpM+uW7XwJi4E0XjUxfwbp+mSu1TEuM EAiy3eI6UAxlI+Np9vscUD8nmI7ZjKy9m+PAbv4MAS7mw8GT2QS7Rixsv74oRg2wlXi+ ytbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/ncep1+pfaj4VrhFhzBJtvktsI7eesl8NO/EGk2kyoM=; b=W1vsVOOcYWt7VTFGGoukFR7U240gD1MXpymYrxerj/5Py5wKvtqbEFoxUrOreLksTW trxAnUNqqDko8qRHa0mMsuxRq8ghYHsJ32FAhzy5n5OjA2ApHPQMnDOuImRSBJulHvnj y4IFRXgZPZS0EofE4Ciy8kZGNHABkVLXMEgx3T+/ZJJUzbSe7qnQvOs3uN/C+OAec5nD wmjjuIThbnuij/S1eU3NPc8Ejqeh9zT51QUkjxKs9pEoCweAlgTmJh1kamZ5edmi4po9 hixakVjhkj/qsRQxd/LMcUISkhJCyHLdjwD2ez8mQB5XCw/+BDgmmptTh/bq/ysaRzlU NwVw== X-Gm-Message-State: AOAM531DwfMvMO/RZ6G9ekPTJnXPKbxbKnmOEgJYfb7rEsCYuOIHWcGs J5XH9ZMUxwHd39BrNdp0788XvqtC/I61Kw== X-Google-Smtp-Source: ABdhPJwu4NrQ3hWhhFdKlGLBU+fCPoPmbcieKMlEw7RsuTpzzsnAnuogtQ0nl1I/EUnL23IjOCvyOA== X-Received: by 2002:a17:902:8b87:b0:14d:7920:e54a with SMTP id ay7-20020a1709028b8700b0014d7920e54amr27533190plb.140.1646172026329; Tue, 01 Mar 2022 14:00:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 15/18] target/arm: Advertise all page sizes for -cpu max Date: Tue, 1 Mar 2022 11:59:55 -1000 Message-Id: <20220301215958.157011-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1036 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646173232225100001 Content-Type: text/plain; charset="utf-8" We support 16k pages, but do not advertize that in ID_AA64MMFR0. The value 0 in the TGRAN*_2 fields indicates that stage2 lookups defer to the same support as stage1 lookups. This setting is deprecated, so indicate support for all stage2 page sizes directly. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/cpu64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index d88662cef6..2fdc16bf18 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -796,6 +796,10 @@ static void aarch64_max_initfn(Object *obj) =20 t =3D cpu->isar.id_aa64mmfr0; t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supporte= d */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16_2, 2); /* 16k stage2 support= ed */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN64_2, 2); /* 64k stage2 support= ed */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 2); /* 4k stage2 support= ed */ cpu->isar.id_aa64mmfr0 =3D t; =20 t =3D cpu->isar.id_aa64mmfr1; --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646172760292384.9313710702419; Tue, 1 Mar 2022 14:12:40 -0800 (PST) Received: from localhost ([::1]:57518 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAjX-0003Sj-6D for importer@patchew.org; Tue, 01 Mar 2022 17:12:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58856) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXn-0001Ws-G8 for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:31 -0500 Received: from [2607:f8b0:4864:20::633] (port=42888 helo=mail-pl1-x633.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXl-00058D-9j for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:31 -0500 Received: by mail-pl1-x633.google.com with SMTP id p17so14573983plo.9 for ; Tue, 01 Mar 2022 14:00:28 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CqWbvRTBAjyoO5+H2KGfyQ/yLbqHW7L7/zJop3eBZiU=; b=P6tHwF2vCGgnCi7lGTV9pMrRViWdXTKfVkldxD6QdF0F3J2FK8wjn8hfwBNP0dU9DQ 8l0Se+tcH/P2siFNOIb676b/KuZmV/wppPp9TrhNBFUl8tRdqadvON4SaZoxYGcHjOlx SYcDPHBy7SAssxfWx8p+hLHq4Q22bEPUSZ5wNeRHvFLmx4nI7PImeKgwMPalPufRX9xf Ua/7fBf3RgQo+1VsnQcuzjc7zvB86/ga6ZMwMKQMoL78Ipxa0cCzAy2mtkNeSfdcmED6 vsH7K9s5Cy6K4Lb+c/RYaq8rcCJYtclSGAlJCgApXktWPWrIs/PQA8RJnuapVkctwDR3 k1Aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CqWbvRTBAjyoO5+H2KGfyQ/yLbqHW7L7/zJop3eBZiU=; b=C9/T4Fh5ah/gF5uFWcLKYdzoUelb4BqAMm1tU5U7Z2Y79oGqkf+1YZ8IXRsNlRCInU kUnnewxcySPP6QfYntdA4r3WRSpuFouUaSSZBU73ZEnOMjBMPNSWVjG9qictEruDtFnJ SmC2bigBrhxlt0XwCDZ9iC8sWxAg1H1XeNcyyGHc2f9YpNykvgQA/aunWNMObKn4OAIr WVdpUkQah2+NtJswQEKgFKZyZp040fOmSBbLdk6OrNst7f6VBEftVywUjpUq+BurGILc 6eh88Q7bl7aO/HCGMiwG27KNEJHtL1YGmxdY5r+ofIggGm2iIBaAweCNO1ZhrW6ugkjx TL3A== X-Gm-Message-State: AOAM530sjIYNzhGsk351SKOPTzfVfA10qvdNvePJcP7dXBsIy9a6iUor Mgg8ykb5Zm8mSUVyq1Kw299RoBQE2xHbvA== X-Google-Smtp-Source: ABdhPJy22u83AbdnlKUpKGw9oeMll0lfirmY2wz615lBp85fuwuxl5TWMbbXFAQwzqsg59LBqjGJzQ== X-Received: by 2002:a17:902:cec7:b0:151:9615:5ab0 with SMTP id d7-20020a170902cec700b0015196155ab0mr217949plg.145.1646172027892; Tue, 01 Mar 2022 14:00:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 16/18] target/arm: Implement FEAT_LPA2 Date: Tue, 1 Mar 2022 11:59:56 -1000 Message-Id: <20220301215958.157011-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::633 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646172760885100001 Content-Type: text/plain; charset="utf-8" This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 4k or 16k pages. This introduces the DS bit to TCR_ELx, which is RES0 unless the page size is enabled and supports LPA2, resulting in the effective value of DS for a given table walk. The DS bit changes the format of the page table descriptor slightly, moving the PS field out to TCR so that all pages have the same sharability and repurposing those bits of the page table descriptor for the highest bits of the output address. Do not yet enable FEAT_LPA2; we need extra plumbing to avoid tickling an old kernel bug. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Check DS in tlbi_aa64_get_range. Check TGRAN4_2 and TGRAN16_2. v4: Do not enable the feature yet. --- docs/system/arm/emulation.rst | 1 + target/arm/cpu.h | 22 ++++++++ target/arm/internals.h | 2 + target/arm/helper.c | 102 +++++++++++++++++++++++++++++----- 4 files changed, 112 insertions(+), 15 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 0053ddce20..520fd39071 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -25,6 +25,7 @@ the following architecture extensions: - FEAT_JSCVT (JavaScript conversion instructions) - FEAT_LOR (Limited ordering regions) - FEAT_LPA (Large Physical Address space) +- FEAT_LPA2 (Large Physical and virtual Address space v2) - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c52d56f669..24d9fff170 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -4284,6 +4284,28 @@ static inline bool isar_feature_aa64_i8mm(const ARMI= SARegisters *id) return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, I8MM) !=3D 0; } =20 +static inline bool isar_feature_aa64_tgran4_lpa2(const ARMISARegisters *id) +{ + return FIELD_SEX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN4) >=3D 1; +} + +static inline bool isar_feature_aa64_tgran4_2_lpa2(const ARMISARegisters *= id) +{ + unsigned t =3D FIELD_EX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN4_2); + return t >=3D 3 || (t =3D=3D 0 && isar_feature_aa64_tgran4_lpa2(id)); +} + +static inline bool isar_feature_aa64_tgran16_lpa2(const ARMISARegisters *i= d) +{ + return FIELD_EX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN16) >=3D 2; +} + +static inline bool isar_feature_aa64_tgran16_2_lpa2(const ARMISARegisters = *id) +{ + unsigned t =3D FIELD_EX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN16_2); + return t >=3D 3 || (t =3D=3D 0 && isar_feature_aa64_tgran16_lpa2(id)); +} + static inline bool isar_feature_aa64_ccidx(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, CCIDX) !=3D 0; diff --git a/target/arm/internals.h b/target/arm/internals.h index 00af41d792..a34be2e459 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1056,6 +1056,7 @@ static inline uint32_t aarch64_pstate_valid_mask(cons= t ARMISARegisters *id) typedef struct ARMVAParameters { unsigned tsz : 8; unsigned ps : 3; + unsigned sh : 2; unsigned select : 1; bool tbi : 1; bool epd : 1; @@ -1063,6 +1064,7 @@ typedef struct ARMVAParameters { bool using16k : 1; bool using64k : 1; bool tsz_oob : 1; /* tsz has been clamped to legal range */ + bool ds : 1; } ARMVAParameters; =20 ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, diff --git a/target/arm/helper.c b/target/arm/helper.c index 3a7f5cf6f0..088956eecf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4546,6 +4546,14 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *en= v, ARMMMUIdx mmuidx, } else { ret.base =3D extract64(value, 0, 37); } + if (param.ds) { + /* + * With DS=3D1, BaseADDR is always shifted 16 so that it is able + * to address all 52 va bits. The input address is perforce + * aligned on a 64k boundary regardless of translation granule. + */ + page_shift =3D 16; + } ret.base <<=3D page_shift; =20 return ret; @@ -11081,8 +11089,13 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool i= s_aa64, int level, const int grainsize =3D stride + 3; int startsizecheck; =20 - /* Negative levels are never allowed. */ - if (level < 0) { + /* + * Negative levels are usually not allowed... + * Except for FEAT_LPA2, 4k page table, 52-bit address space, which + * begins with level -1. Note that previous feature tests will have + * eliminated this combination if it is not enabled. + */ + if (level < (inputsize =3D=3D 52 && stride =3D=3D 9 ? -1 : 0)) { return false; } =20 @@ -11223,8 +11236,9 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, ARMMMUIdx mmu_idx, bool data) { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; - bool epd, hpd, using16k, using64k, tsz_oob; - int select, tsz, tbi, max_tsz, min_tsz, ps; + bool epd, hpd, using16k, using64k, tsz_oob, ds; + int select, tsz, tbi, max_tsz, min_tsz, ps, sh; + ARMCPU *cpu =3D env_archcpu(env); =20 if (!regime_has_2_ranges(mmu_idx)) { select =3D 0; @@ -11238,7 +11252,9 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, hpd =3D extract32(tcr, 24, 1); } epd =3D false; + sh =3D extract32(tcr, 12, 2); ps =3D extract32(tcr, 16, 3); + ds =3D extract64(tcr, 32, 1); } else { /* * Bit 55 is always between the two regions, and is canonical for @@ -11248,6 +11264,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, if (!select) { tsz =3D extract32(tcr, 0, 6); epd =3D extract32(tcr, 7, 1); + sh =3D extract32(tcr, 12, 2); using64k =3D extract32(tcr, 14, 1); using16k =3D extract32(tcr, 15, 1); hpd =3D extract64(tcr, 41, 1); @@ -11257,24 +11274,51 @@ ARMVAParameters aa64_va_parameters(CPUARMState *e= nv, uint64_t va, using64k =3D tg =3D=3D 3; tsz =3D extract32(tcr, 16, 6); epd =3D extract32(tcr, 23, 1); + sh =3D extract32(tcr, 28, 2); hpd =3D extract64(tcr, 42, 1); } ps =3D extract64(tcr, 32, 3); + ds =3D extract64(tcr, 59, 1); } =20 - if (cpu_isar_feature(aa64_st, env_archcpu(env))) { + if (cpu_isar_feature(aa64_st, cpu)) { max_tsz =3D 48 - using64k; } else { max_tsz =3D 39; } =20 + /* + * DS is RES0 unless FEAT_LPA2 is supported for the given page size; + * adjust the effective value of DS, as documented. + */ min_tsz =3D 16; if (using64k) { - if (cpu_isar_feature(aa64_lva, env_archcpu(env))) { + if (cpu_isar_feature(aa64_lva, cpu)) { + min_tsz =3D 12; + } + ds =3D false; + } else if (ds) { + switch (mmu_idx) { + case ARMMMUIdx_Stage2: + case ARMMMUIdx_Stage2_S: + if (using16k) { + ds =3D cpu_isar_feature(aa64_tgran16_2_lpa2, cpu); + } else { + ds =3D cpu_isar_feature(aa64_tgran4_2_lpa2, cpu); + } + break; + default: + if (using16k) { + ds =3D cpu_isar_feature(aa64_tgran16_lpa2, cpu); + } else { + ds =3D cpu_isar_feature(aa64_tgran4_lpa2, cpu); + } + break; + } + if (ds) { min_tsz =3D 12; } } - /* TODO: FEAT_LPA2 */ =20 if (tsz > max_tsz) { tsz =3D max_tsz; @@ -11296,6 +11340,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, return (ARMVAParameters) { .tsz =3D tsz, .ps =3D ps, + .sh =3D sh, .select =3D select, .tbi =3D tbi, .epd =3D epd, @@ -11303,6 +11348,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, .using16k =3D using16k, .using64k =3D using64k, .tsz_oob =3D tsz_oob, + .ds =3D ds, }; } =20 @@ -11528,10 +11574,19 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, * VTCR_EL2.SL0 field (whose interpretation depends on the page si= ze) */ uint32_t sl0 =3D extract32(tcr->raw_tcr, 6, 2); + uint32_t sl2 =3D extract64(tcr->raw_tcr, 33, 1); uint32_t startlevel; bool ok; =20 - if (!aarch64 || stride =3D=3D 9) { + /* SL2 is RES0 unless DS=3D1 & 4kb granule. */ + if (param.ds && stride =3D=3D 9 && sl2) { + if (sl0 !=3D 0) { + level =3D 0; + fault_type =3D ARMFault_Translation; + goto do_fault; + } + startlevel =3D -1; + } else if (!aarch64 || stride =3D=3D 9) { /* AArch32 or 4KB pages */ startlevel =3D 2 - sl0; =20 @@ -11585,10 +11640,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, * for both v7 and v8. However, for v8 the SBZ bits [47:40] must be 0 * or an AddressSize fault is raised. So for v8 we extract those SBZ * bits as part of the address, which will be checked via outputsize. - * For AArch64, the address field always goes up to bit 47 (with extra - * bits for FEAT_LPA placed elsewhere). AArch64 implies v8. + * For AArch64, the address field goes up to bit 47, or 49 with FEAT_L= PA2; + * the highest bits of a 52-bit output are placed elsewhere. */ - if (arm_feature(env, ARM_FEATURE_V8)) { + if (param.ds) { + descaddrmask =3D MAKE_64BIT_MASK(0, 50); + } else if (arm_feature(env, ARM_FEATURE_V8)) { descaddrmask =3D MAKE_64BIT_MASK(0, 48); } else { descaddrmask =3D MAKE_64BIT_MASK(0, 40); @@ -11623,11 +11680,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, =20 /* * For FEAT_LPA and PS=3D6, bits [51:48] of descaddr are in [15:12] - * of descriptor. Otherwise, if descaddr is out of range, raise - * AddressSizeFault. + * of descriptor. For FEAT_LPA2 and effective DS, bits [51:50] of + * descaddr are in [9:8]. Otherwise, if descaddr is out of range, + * raise AddressSizeFault. */ if (outputsize > 48) { - descaddr |=3D extract64(descriptor, 12, 4) << 48; + if (param.ds) { + descaddr |=3D extract64(descriptor, 8, 2) << 50; + } else { + descaddr |=3D extract64(descriptor, 12, 4) << 48; + } } else if (descaddr >> outputsize) { fault_type =3D ARMFault_AddressSize; goto do_fault; @@ -11721,7 +11783,17 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, assert(attrindx <=3D 7); cacheattrs->attrs =3D extract64(mair, attrindx * 8, 8); } - cacheattrs->shareability =3D extract32(attrs, 6, 2); + + /* + * For FEAT_LPA2 and effective DS, the SH field in the attributes + * was re-purposed for output address bits. The SH attribute in + * that case comes from TCR_ELx, which we extracted earlier. + */ + if (param.ds) { + cacheattrs->shareability =3D param.sh; + } else { + cacheattrs->shareability =3D extract32(attrs, 6, 2); + } =20 *phys_ptr =3D descaddr; *page_size_ptr =3D page_size; --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1646173663548847.2849262041581; Tue, 1 Mar 2022 14:27:43 -0800 (PST) Received: from localhost ([::1]:57358 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPAy5-0006Er-5B for importer@patchew.org; Tue, 01 Mar 2022 17:27:42 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58882) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPAXo-0001af-TH for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:32 -0500 Received: from [2607:f8b0:4864:20::1030] (port=51162 helo=mail-pj1-x1030.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPAXm-00058e-Li for qemu-devel@nongnu.org; Tue, 01 Mar 2022 17:00:32 -0500 Received: by mail-pj1-x1030.google.com with SMTP id m22so98184pja.0 for ; Tue, 01 Mar 2022 14:00:30 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9XzP0Qdi4Dwon2uYf1rT0B5JmvyAHM7fMnwSPwWhfEg=; b=TVgPdqVnswIrr+3Oh4dzWDjU73hk9Cntt8I038CtNvhinGqnrIGJJnAkPM6hyCYJ0J CKnsH9cB3yaZSGdavfqbnegpaHteBtDECRuNpVvHydCResx76O2GJU04s4dGuMOmDUoA 7roIXEHkhHc397/azXchYoQ84X6TZ2sNFiFEXbyzUyMj7OgWz4KoTkOln5aUiWDbTfmO VJ8ovXxD2cP4W7PXaKh7pjJzzjuCcZMXTL4YaK9fVArYrNdl+MP9HjIOSKBJntgxKUZ2 /zleOYoF8Zal6hq0oYwHp4AtWpzoxmU/EFFzy2qWbZtlx9ce+ACUfTYKF1t9vA4B4IOl Apng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9XzP0Qdi4Dwon2uYf1rT0B5JmvyAHM7fMnwSPwWhfEg=; b=x8ivIf/K/w5eSI3inrzxmKHeX4AtjXTbGS3MRhSUiKkGEVvkWXVagqBm6j857KewiQ wDM189tCUoe9NZg7xM1vUgNYvIppYurIBHIZntXcO/wuuBQjh+20vgnl5nXYqecnrKIg lPg/z9HbWGyHEQ1SB7artkCQ80zng5n6a+duznM9qpIUmQHws4rCacu+XAdhv2km3d2V 4c2Vkpm5AAABSibSDILpAmYcsunGnxnqQlz3NrBNri7lozynKNU9HZGFLFyTHP6MMVx0 3uJ2RL2j0K6TejTgu1ajxVt1fGNBKvB3HW691Wzeqo78sfvl1lsIlllUhhPu9ZnLvn5l Pp1g== X-Gm-Message-State: AOAM531LuulZXD8OxXkZ11zRPeMTzI/638P4cO4xEAD2e8+0or5ne6u6 dHd0uAT8vmgRFUg34k8XgA/whSRiBvyrgA== X-Google-Smtp-Source: ABdhPJxyjagQLMI/MNqdlmS+2O5CP6/OBHBHGEEabdpE8VcyABDicVIiRgOsGWdGDB/8ZdHNndVdNg== X-Received: by 2002:a17:90a:a892:b0:1be:f420:bd1e with SMTP id h18-20020a17090aa89200b001bef420bd1emr894449pjq.58.1646172029383; Tue, 01 Mar 2022 14:00:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 17/18] target/arm: Provide cpu property for controling FEAT_LPA2 Date: Tue, 1 Mar 2022 11:59:57 -1000 Message-Id: <20220301215958.157011-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1030 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646173665720100001 Content-Type: text/plain; charset="utf-8" There is a Linux kernel bug present until v5.12 that prevents booting with FEAT_LPA2 enabled. As a workaround for TCG, allow the feature to be disabled from -cpu max. Since this kernel bug is present in the Fedora 31 image that we test in avocado, disable lpa2 on the command-line. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/cpu.h | 5 ++++- target/arm/cpu.c | 6 ++++++ target/arm/cpu64.c | 24 ++++++++++++++++++++++++ tests/avocado/boot_linux.py | 2 ++ 4 files changed, 36 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 24d9fff170..4aa70ceca1 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -204,10 +204,12 @@ typedef struct { # define ARM_MAX_VQ 16 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp); void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp); +void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp); #else # define ARM_MAX_VQ 1 static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { } static inline void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { } +static inline void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) { } #endif =20 typedef struct ARMVectorReg { @@ -975,10 +977,11 @@ struct ARMCPU { =20 /* * Intermediate values used during property parsing. - * Once finalized, the values should be read from ID_AA64ISAR1. + * Once finalized, the values should be read from ID_AA64*. */ bool prop_pauth; bool prop_pauth_impdef; + bool prop_lpa2; =20 /* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */ uint32_t dcz_blocksize; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e251f0df4b..e2747e7d86 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1391,6 +1391,12 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **= errp) error_propagate(errp, local_err); return; } + + arm_cpu_lpa2_finalize(cpu, &local_err); + if (local_err !=3D NULL) { + error_propagate(errp, local_err); + return; + } } =20 if (kvm_enabled()) { diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 2fdc16bf18..eb44c05822 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -688,6 +688,29 @@ void aarch64_add_pauth_properties(Object *obj) } } =20 +static Property arm_cpu_lpa2_property =3D + DEFINE_PROP_BOOL("lpa2", ARMCPU, prop_lpa2, true); + +void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) +{ + uint64_t t; + + /* + * We only install the property for tcg -cpu max; this is the + * only situation in which the cpu field can be true. + */ + if (!cpu->prop_lpa2) { + return; + } + + t =3D cpu->isar.id_aa64mmfr0; + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 2); /* 16k pages w/ LPA2 = */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4, 1); /* 4k pages w/ LPA2 = */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16_2, 3); /* 16k stage2 w/ LPA2= */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 3); /* 4k stage2 w/ LPA2= */ + cpu->isar.id_aa64mmfr0 =3D t; +} + static void aarch64_host_initfn(Object *obj) { #if defined(CONFIG_KVM) @@ -897,6 +920,7 @@ static void aarch64_max_initfn(Object *obj) aarch64_add_sve_properties(obj); object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_v= q, cpu_max_set_sve_max_vq, NULL, NULL); + qdev_property_add_static(DEVICE(obj), &arm_cpu_lpa2_property); } =20 static void aarch64_a64fx_initfn(Object *obj) diff --git a/tests/avocado/boot_linux.py b/tests/avocado/boot_linux.py index ab19146d1e..ee584d2fdf 100644 --- a/tests/avocado/boot_linux.py +++ b/tests/avocado/boot_linux.py @@ -79,6 +79,7 @@ def test_virt_tcg_gicv2(self): """ self.require_accelerator("tcg") self.vm.add_args("-accel", "tcg") + self.vm.add_args("-cpu", "max,lpa2=3Doff") self.vm.add_args("-machine", "virt,gic-version=3D2") self.add_common_args() self.launch_and_wait(set_up_ssh_connection=3DFalse) @@ -91,6 +92,7 @@ def test_virt_tcg_gicv3(self): """ self.require_accelerator("tcg") self.vm.add_args("-accel", "tcg") + self.vm.add_args("-cpu", "max,lpa2=3Doff") self.vm.add_args("-machine", "virt,gic-version=3D3") self.add_common_args() self.launch_and_wait(set_up_ssh_connection=3DFalse) --=20 2.25.1 From nobody Tue May 14 12:00:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[50.113.46.110]) by smtp.gmail.com with ESMTPSA id m4-20020a17090a7f8400b001bef3fc3938sm284392pjl.49.2022.03.01.14.00.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 14:00:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iLI26UK0ClZ5ceLdr/V+YxsQZY+vXN5fVFJqBZWb1js=; b=GfFDE2bFDZ+5PPhFBgKKvyFW2AVfDfF5JcHtKMFiV2VTtvKhIC9AcyMWZQf1ubJnVK TOYfmT954iUkgtYMP2oDkexrhe+lVgu9nttCCNB5evxfWm/4kiBaGu0cvpowwMiKXfQy FJbIvZirlcjatMpvCRwYDWy29Yrl0canwp9rQ2H6EcNXtdr15bWBhvq8I+D5N2ZwjZVb hIIYYv4vV/yu5EfXyLjgV+gMN5SsCMTMvnzOkrWYY3PPVaWRzBAm8bEPCGj7LyT/hS4s yG2p5g/gSp6oYsuPRq8ebLkgCy43k+/PZ6CS15Vgz0rzDXagSesqvFP2xdnJV7hiShmK 9Ojw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iLI26UK0ClZ5ceLdr/V+YxsQZY+vXN5fVFJqBZWb1js=; b=yc4FQqojpMQapoYVWhFY3Jw5/6tFKKHogebOafBTXHljF+b1EfG/Vpnv7tUaudjiuv GCGiCPYXbBLuP155KzUfSJ6egrlGZuR/PyGZ279kocr0QHhhI1UERDr3MP2hkIxe4Pdx 5i8mAsKf5QERFtliUgGoQexWLnrvdxsiY/DVkdMlatb/qK4CfRLhvLvJUxZ+zyrs+J15 3t+C0zPEDKmjH5S2EB2R/Q3Fx55E4A1HyxOvCX77OcZc4sgWpYw8PLQcEW/IoBaCZSoJ xAJvgYxTN1MErxi60geWz0vELzCdiscVsrh1c19cs2iFjKIq6rnhzeKCDVBiOwi9Ozkx oMdg== X-Gm-Message-State: AOAM533xJEl47BtFQ1b4dIy8BogL9THXAL4N4yUYSKSWfB7TU5fHbc+y kaYmpE48Ys6sQVOufyfx8iBCGV+dSqMyVA== X-Google-Smtp-Source: ABdhPJygwAFOEOCRH+heEJWiAr3FTKgqIS8lf27Ehxa4julYAdm0dNBwHw1PCfAby02wmqOOISTeaQ== X-Received: by 2002:a17:902:ea05:b0:150:1294:cd91 with SMTP id s5-20020a170902ea0500b001501294cd91mr28201707plg.112.1646172031520; Tue, 01 Mar 2022 14:00:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 18/18] hw/arm/virt: Disable LPA2 for -machine virt-6.2 Date: Tue, 1 Mar 2022 11:59:58 -1000 Message-Id: <20220301215958.157011-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org> References: <20220301215958.157011-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646173677809100001 There is a Linux kernel bug present until v5.12 that prevents booting with FEAT_LPA2 enabled. As a workaround for TCG, disable this feature for machine versions prior to 7.0. Cc: Daniel P. Berrang=C3=A9 Signed-off-by: Richard Henderson --- include/hw/arm/virt.h | 1 + hw/arm/virt.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index c1ea17d0de..7e76ee2619 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -132,6 +132,7 @@ struct VirtMachineClass { bool no_secure_gpio; /* Machines < 6.2 have no support for describing cpu topology to guest= */ bool no_cpu_topology; + bool no_tcg_lpa2; }; =20 struct VirtMachineState { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 46bf7ceddf..46a42502bc 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2102,6 +2102,10 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, "pmu", false, NULL); } =20 + if (vmc->no_tcg_lpa2 && object_property_find(cpuobj, "lpa2")) { + object_property_set_bool(cpuobj, "lpa2", false, NULL); + } + if (object_property_find(cpuobj, "reset-cbar")) { object_property_set_int(cpuobj, "reset-cbar", vms->memmap[VIRT_CPUPERIPHS].base, @@ -3020,8 +3024,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(7, 0) =20 static void virt_machine_6_2_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_7_0_options(mc); compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len); + vmc->no_tcg_lpa2 =3D true; } DEFINE_VIRT_MACHINE(6, 2) =20 --=20 2.25.1