From nobody Sat May 18 03:46:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164571359055321.579769832149736; Thu, 24 Feb 2022 06:39:50 -0800 (PST) Received: from localhost ([::1]:47500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nNFHX-0005ay-IX for importer@patchew.org; Thu, 24 Feb 2022 09:39:47 -0500 Received: from eggs.gnu.org ([209.51.188.92]:51708) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nNFFO-0004ZV-LN; Thu, 24 Feb 2022 09:37:34 -0500 Received: from [2607:f8b0:4864:20::1036] (port=36854 helo=mail-pj1-x1036.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nNFFF-000502-NO; Thu, 24 Feb 2022 09:37:34 -0500 Received: by mail-pj1-x1036.google.com with SMTP id g7-20020a17090a708700b001bb78857ccdso5886700pjk.1; Thu, 24 Feb 2022 06:37:24 -0800 (PST) Received: from localhost.localdomain ([2400:4050:c360:8200:4544:3648:f893:1e45]) by smtp.gmail.com with ESMTPSA id 19sm3721882pfz.153.2022.02.24.06.37.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 24 Feb 2022 06:37:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=poAZtHyLvs6wdh05wh10xP5cMccFcvYZDzxd4P/umwQ=; b=WgyQRQSotkNEBJy5EQiuCugh7EDBW4AbeheFmDhVdLtcQfD5mPwihE9UC5tFco02+k mH3TbfNW1Ubw0aOjmESks4XumAprgpK8iS5wleJqzHltXQHgMd9SMxL53Wx7PsWyTx4r ppsvk1ecMWkjhZ7EX82pPuTuYdJJAm0k/OIDJVeOY+KzP/oSeQT0IqCodf+o9YWZ0ODU Ao++JVYXWx4hkpXXTYbld4FWhT9FSZFVr1MFCqHJdadt9244qoguqwAf7tO0NXa5zgnN 6K5PWXW0uuXRfmQNOLki1e5OoIactRToLslEjkARwJI3WNNlaENTBuO/ucs5uKSo7I2H NCag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=poAZtHyLvs6wdh05wh10xP5cMccFcvYZDzxd4P/umwQ=; b=RkJNPbCjbT31Fj2HLPCeIht5Zl+xoX0n3ucepWjyT7OxysSOVIzOUeVc5VZkASokTM xUy21AFpUtXVCw0jPODhLW5v3RYZp/+Vda1sjdwBL6LsNh8Or1UC+vTn6BTMVFAE7URW bw3k/Sq2MKBFIsZggEM3MDYVV/Su6Z8vGiDzYfndpt1IbBm/hipH9Y++bT9kUnKhqZAf qI/cRJt8fiDpOqr2+pQ3+MG4wLrK97zPvDHF+d5VLL8eRnK7a5I4PChbATpnOll6XUc3 llnSRt/D6xBfF/50f1VRYDabg/gndjY4plVgN+NYUZFWVc7oGXbnkuEOabJe0/tEnV8W owYA== X-Gm-Message-State: AOAM531pkqDn80xdAaRZn+XECVD8ju0BQbcez8aHWV1CVMM44Rl0G9hP 3Z5VXJ00yFjpQ1Clrqgm4fwO1s+G0YE= X-Google-Smtp-Source: ABdhPJyTLwBuPSewGO61RWbN1hDGtQKEEgPeoLjdg+nedQwMkbrkpse98FbseRVOIi9YUgPHOGjrVQ== X-Received: by 2002:a17:902:ea86:b0:14f:b4be:6f83 with SMTP id x6-20020a170902ea8600b0014fb4be6f83mr2772830plb.99.1645713443203; Thu, 24 Feb 2022 06:37:23 -0800 (PST) From: Akihiko Odaki To: Subject: [PATCH v2] target/arm: Support PSCI 1.1 and SMCCC 1.0 Date: Thu, 24 Feb 2022 23:37:16 +0900 Message-Id: <20220224143716.14576-1-akihiko.odaki@gmail.com> X-Mailer: git-send-email 2.32.0 (Apple Git-132) MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1036 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=akihiko.odaki@gmail.com; helo=mail-pj1-x1036.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Akihiko Odaki , kvm@vger.kernel.org, qemu-devel@nongnu.org, Alexander Graf , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645713593291100001 Content-Type: text/plain; charset="utf-8" Support the latest PSCI on TCG and HVF. A 64-bit function called from AArch32 now returns NOT_SUPPORTED, which is necessary to adhere to SMC Calling Convention 1.0. It is still not compliant with SMCCC 1.3 since they do not implement mandatory functions. Signed-off-by: Akihiko Odaki --- hw/arm/boot.c | 12 +++++++++--- target/arm/cpu.c | 5 +++-- target/arm/hvf/hvf.c | 27 ++++++++++++++++++++++++++- target/arm/kvm-consts.h | 13 +++++++++---- target/arm/kvm64.c | 2 +- target/arm/psci.c | 35 ++++++++++++++++++++++++++++++++--- 6 files changed, 80 insertions(+), 14 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index b1e95978f26..0eeef94ceb5 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -488,9 +488,15 @@ static void fdt_add_psci_node(void *fdt) } =20 qemu_fdt_add_subnode(fdt, "/psci"); - if (armcpu->psci_version =3D=3D 2) { - const char comp[] =3D "arm,psci-0.2\0arm,psci"; - qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp)); + if (armcpu->psci_version =3D=3D QEMU_PSCI_VERSION_0_2 || + armcpu->psci_version =3D=3D QEMU_PSCI_VERSION_1_1) { + if (armcpu->psci_version =3D=3D QEMU_PSCI_VERSION_0_2) { + const char comp[] =3D "arm,psci-0.2\0arm,psci"; + qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp= )); + } else { + const char comp[] =3D "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; + qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp= )); + } =20 cpu_off_fn =3D QEMU_PSCI_0_2_FN_CPU_OFF; if (arm_feature(&armcpu->env, ARM_FEATURE_AARCH64)) { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5a9c02a2561..307a83a7bb6 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1110,11 +1110,12 @@ static void arm_cpu_initfn(Object *obj) * picky DTB consumer will also provide a helpful error message. */ cpu->dtb_compatible =3D "qemu,unknown"; - cpu->psci_version =3D 1; /* By default assume PSCI v0.1 */ + cpu->psci_version =3D QEMU_PSCI_VERSION_0_1; /* By default assume PSCI= v0.1 */ cpu->kvm_target =3D QEMU_KVM_ARM_TARGET_NONE; =20 if (tcg_enabled() || hvf_enabled()) { - cpu->psci_version =3D 2; /* TCG and HVF implement PSCI 0.2 */ + /* TCG and HVF implement PSCI 1.1 */ + cpu->psci_version =3D QEMU_PSCI_VERSION_1_1; } } =20 diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 0dc96560d34..1701fb8bbdb 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -653,7 +653,7 @@ static bool hvf_handle_psci_call(CPUState *cpu) =20 switch (param[0]) { case QEMU_PSCI_0_2_FN_PSCI_VERSION: - ret =3D QEMU_PSCI_0_2_RET_VERSION_0_2; + ret =3D QEMU_PSCI_VERSION_1_1; break; case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE: ret =3D QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED; /* No truste= d OS */ @@ -721,6 +721,31 @@ static bool hvf_handle_psci_call(CPUState *cpu) case QEMU_PSCI_0_2_FN_MIGRATE: ret =3D QEMU_PSCI_RET_NOT_SUPPORTED; break; + case QEMU_PSCI_1_0_FN_PSCI_FEATURES: + switch (param[1]) { + case QEMU_PSCI_0_2_FN_PSCI_VERSION: + case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case QEMU_PSCI_0_2_FN_AFFINITY_INFO: + case QEMU_PSCI_0_2_FN64_AFFINITY_INFO: + case QEMU_PSCI_0_2_FN_SYSTEM_RESET: + case QEMU_PSCI_0_2_FN_SYSTEM_OFF: + case QEMU_PSCI_0_1_FN_CPU_ON: + case QEMU_PSCI_0_2_FN_CPU_ON: + case QEMU_PSCI_0_2_FN64_CPU_ON: + case QEMU_PSCI_0_1_FN_CPU_OFF: + case QEMU_PSCI_0_2_FN_CPU_OFF: + case QEMU_PSCI_0_1_FN_CPU_SUSPEND: + case QEMU_PSCI_0_2_FN_CPU_SUSPEND: + case QEMU_PSCI_0_2_FN64_CPU_SUSPEND: + case QEMU_PSCI_1_0_FN_PSCI_FEATURES: + ret =3D 0; + break; + case QEMU_PSCI_0_1_FN_MIGRATE: + case QEMU_PSCI_0_2_FN_MIGRATE: + default: + ret =3D QEMU_PSCI_RET_NOT_SUPPORTED; + } + break; default: return false; } diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h index 580f1c1fee0..241e02562e1 100644 --- a/target/arm/kvm-consts.h +++ b/target/arm/kvm-consts.h @@ -77,6 +77,8 @@ MISMATCH_CHECK(QEMU_PSCI_0_1_FN_MIGRATE, KVM_PSCI_FN_MIGR= ATE); #define QEMU_PSCI_0_2_FN64_AFFINITY_INFO QEMU_PSCI_0_2_FN64(4) #define QEMU_PSCI_0_2_FN64_MIGRATE QEMU_PSCI_0_2_FN64(5) =20 +#define QEMU_PSCI_1_0_FN_PSCI_FEATURES QEMU_PSCI_0_2_FN(10) + MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_SUSPEND, PSCI_0_2_FN_CPU_SUSPEND); MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_OFF, PSCI_0_2_FN_CPU_OFF); MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_ON, PSCI_0_2_FN_CPU_ON); @@ -84,18 +86,21 @@ MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE, PSCI_0_2_FN_MI= GRATE); MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_SUSPEND, PSCI_0_2_FN64_CPU_SUSPEND); MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_ON, PSCI_0_2_FN64_CPU_ON); MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE, PSCI_0_2_FN64_MIGRATE); +MISMATCH_CHECK(QEMU_PSCI_1_0_FN_PSCI_FEATURES, PSCI_1_0_FN_PSCI_FEATURES); =20 /* PSCI v0.2 return values used by TCG emulation of PSCI */ =20 /* No Trusted OS migration to worry about when offlining CPUs */ #define QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED 2 =20 -/* We implement version 0.2 only */ -#define QEMU_PSCI_0_2_RET_VERSION_0_2 2 +#define QEMU_PSCI_VERSION_0_1 0x00001 +#define QEMU_PSCI_VERSION_0_2 0x00002 +#define QEMU_PSCI_VERSION_1_1 0x10001 =20 MISMATCH_CHECK(QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED, PSCI_0_2_TOS_= MP); -MISMATCH_CHECK(QEMU_PSCI_0_2_RET_VERSION_0_2, - (PSCI_VERSION_MAJOR(0) | PSCI_VERSION_MINOR(2))); +MISMATCH_CHECK(QEMU_PSCI_VERSION_0_1, PSCI_VERSION(0, 1)); +MISMATCH_CHECK(QEMU_PSCI_VERSION_0_2, PSCI_VERSION(0, 2)); +MISMATCH_CHECK(QEMU_PSCI_VERSION_1_1, PSCI_VERSION(1, 1)); =20 /* PSCI return values (inclusive of all PSCI versions) */ #define QEMU_PSCI_RET_SUCCESS 0 diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 71c3ca69717..64d48bfb19d 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -864,7 +864,7 @@ int kvm_arch_init_vcpu(CPUState *cs) cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_POWER_OFF; } if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) { - cpu->psci_version =3D 2; + cpu->psci_version =3D QEMU_PSCI_VERSION_0_2; cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_PSCI_0_2; } if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { diff --git a/target/arm/psci.c b/target/arm/psci.c index b279c0b9a45..6c1239bb968 100644 --- a/target/arm/psci.c +++ b/target/arm/psci.c @@ -57,7 +57,7 @@ void arm_handle_psci_call(ARMCPU *cpu) { /* * This function partially implements the logic for dispatching Power = State - * Coordination Interface (PSCI) calls (as described in ARM DEN 0022B.= b), + * Coordination Interface (PSCI) calls (as described in ARM DEN 0022D.= b), * to the extent required for bringing up and taking down secondary co= res, * and for handling reset and poweroff requests. * Additional information about the calling convention used is availab= le in @@ -80,7 +80,7 @@ void arm_handle_psci_call(ARMCPU *cpu) } =20 if ((param[0] & QEMU_PSCI_0_2_64BIT) && !is_a64(env)) { - ret =3D QEMU_PSCI_RET_INVALID_PARAMS; + ret =3D QEMU_PSCI_RET_NOT_SUPPORTED; goto err; } =20 @@ -89,7 +89,7 @@ void arm_handle_psci_call(ARMCPU *cpu) ARMCPU *target_cpu; =20 case QEMU_PSCI_0_2_FN_PSCI_VERSION: - ret =3D QEMU_PSCI_0_2_RET_VERSION_0_2; + ret =3D QEMU_PSCI_VERSION_1_1; break; case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE: ret =3D QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED; /* No truste= d OS */ @@ -170,6 +170,35 @@ void arm_handle_psci_call(ARMCPU *cpu) } helper_wfi(env, 4); break; + case QEMU_PSCI_1_0_FN_PSCI_FEATURES: + switch (param[1]) { + case QEMU_PSCI_0_2_FN_PSCI_VERSION: + case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case QEMU_PSCI_0_2_FN_AFFINITY_INFO: + case QEMU_PSCI_0_2_FN64_AFFINITY_INFO: + case QEMU_PSCI_0_2_FN_SYSTEM_RESET: + case QEMU_PSCI_0_2_FN_SYSTEM_OFF: + case QEMU_PSCI_0_1_FN_CPU_ON: + case QEMU_PSCI_0_2_FN_CPU_ON: + case QEMU_PSCI_0_2_FN64_CPU_ON: + case QEMU_PSCI_0_1_FN_CPU_OFF: + case QEMU_PSCI_0_2_FN_CPU_OFF: + case QEMU_PSCI_0_1_FN_CPU_SUSPEND: + case QEMU_PSCI_0_2_FN_CPU_SUSPEND: + case QEMU_PSCI_0_2_FN64_CPU_SUSPEND: + case QEMU_PSCI_1_0_FN_PSCI_FEATURES: + if (!(param[1] & QEMU_PSCI_0_2_64BIT) || is_a64(env)) { + ret =3D 0; + break; + } + /* fallthrough */ + case QEMU_PSCI_0_1_FN_MIGRATE: + case QEMU_PSCI_0_2_FN_MIGRATE: + default: + ret =3D QEMU_PSCI_RET_NOT_SUPPORTED; + break; + } + break; case QEMU_PSCI_0_1_FN_MIGRATE: case QEMU_PSCI_0_2_FN_MIGRATE: default: --=20 2.32.0 (Apple Git-132)