From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645655663613916.9523338657859; Wed, 23 Feb 2022 14:34:23 -0800 (PST) Received: from localhost ([::1]:35826 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0DG-000278-IO for importer@patchew.org; Wed, 23 Feb 2022 17:34:22 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59106) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Aj-0006OZ-Sf for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:45 -0500 Received: from [2607:f8b0:4864:20::430] (port=35509 helo=mail-pf1-x430.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Ah-0001Bf-CY for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:45 -0500 Received: by mail-pf1-x430.google.com with SMTP id l19so216891pfu.2 for ; Wed, 23 Feb 2022 14:31:42 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zkNbMXCqLzhadKWhMyb5sf6Jtr4mvpt/QguB9jnfEUo=; b=GS/BLDrj8tq/Y/FvD6oIutunQTHV7Aq4Yq5oZ8yBsyY8Ao3Fs0T1bNcdVSpuIFrmCd rildfh9CGSnMx7gJCN8Y0ieS6GI3OvwFDB7+dRkZQeWbHj8Ye5a+AfeV2eqXFRMT0tZS EDzYTc1oT+odORAUJQJKIN/tfGlTji5+FiFN6kV3+NIa7bAvM07m5Xt/6SpvyBj2AH2y nmBo7peAfdLqUkWekemf5rr0asnaoGIpzsTxWD3B7e68P/yEsq0QzYLSqZ1M3EtTNroA 4oe8WR1TeARGvvy5buXDyKZJ9FaiiKzTA6V9WI74o6dcg3SgtTCc13UaFJBqC3/lNQmB ELiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zkNbMXCqLzhadKWhMyb5sf6Jtr4mvpt/QguB9jnfEUo=; b=2RgIhFxCJEgVD3/QCJhastEKsE24sc116GZuWS0C66e04wgiRmSkDejgk1Ospo2+J+ U01itxh8GJROnFCa8fgT+doQfiSDP5/5juwYwDjBVrnY4Nb8gx1s4JjHQg6sozlZcDxz CcKj6M+iM/WJB2xvLr+SIKj7FTi2vnRuLsz9EmihB+BPZ+ikLVos22cwT9DPaQeJ64Jw 8dJe1FYytMQnswv4mpPC6rSxiG9Q9P9ZYxErzBLetR2o53HAsvXxDOSRnDet5dOSX2Va ZCijDgStxiImaytMU7gx1PueaQpuunuZTHmBqPMkGtcUserTNOZlXCobGnvJpAKPRIxS 1CHg== X-Gm-Message-State: AOAM531/+Znoer0lnz0aCb1Y0tpx58dcLaGCcg/wlpO+zXBwPWAhCQiq RyBxT1rYlM0o8O77HCcNiVGvOgzjeUlKHg== X-Google-Smtp-Source: ABdhPJyhdBZ2JUwklUGo4Rmwi8cTu0S+gCWIVK4fVMOcy1nIuCgEQu16rPdnUjkp1dAqOzsO2pU+YQ== X-Received: by 2002:a65:57c9:0:b0:375:7489:1bac with SMTP id q9-20020a6557c9000000b0037574891bacmr1354243pgr.349.1645655502045; Wed, 23 Feb 2022 14:31:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/17] hw/registerfields: Add FIELD_SEX and FIELD_SDP Date: Wed, 23 Feb 2022 12:31:21 -1000 Message-Id: <20220223223137.114264-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::430 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645655665429100001 Add new macros to manipulate signed fields within the register. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Suggested-by: Peter Maydell Signed-off-by: Richard Henderson --- include/hw/registerfields.h | 48 ++++++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h index f2a3c9c41f..3a88e135d0 100644 --- a/include/hw/registerfields.h +++ b/include/hw/registerfields.h @@ -59,6 +59,19 @@ extract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \ R_ ## reg ## _ ## field ## _LENGTH) =20 +#define FIELD_SEX8(storage, reg, field) \ + sextract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_SEX16(storage, reg, field) \ + sextract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_SEX32(storage, reg, field) \ + sextract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_SEX64(storage, reg, field) \ + sextract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \ + R_ ## reg ## _ ## field ## _LENGTH) + /* Extract a field from an array of registers */ #define ARRAY_FIELD_EX32(regs, reg, field) \ FIELD_EX32((regs)[R_ ## reg], reg, field) @@ -95,7 +108,40 @@ _d; }) #define FIELD_DP64(storage, reg, field, val) ({ \ struct { \ - uint64_t v:R_ ## reg ## _ ## field ## _LENGTH; \ + uint64_t v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint64_t _d; \ + _d =3D deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) + +#define FIELD_SDP8(storage, reg, field, val) ({ \ + struct { \ + signed int v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint8_t _d; \ + _d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) +#define FIELD_SDP16(storage, reg, field, val) ({ \ + struct { \ + signed int v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint16_t _d; \ + _d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) +#define FIELD_SDP32(storage, reg, field, val) ({ \ + struct { \ + signed int v:R_ ## reg ## _ ## field ## _LENGTH; \ + } _v =3D { .v =3D val }; = \ + uint32_t _d; \ + _d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, _v.v); \ + _d; }) +#define FIELD_SDP64(storage, reg, field, val) ({ \ + struct { \ + int64_t v:R_ ## reg ## _ ## field ## _LENGTH; \ } _v =3D { .v =3D val }; = \ uint64_t _d; \ _d =3D deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645655824709263.61440310637977; Wed, 23 Feb 2022 14:37:04 -0800 (PST) Received: from localhost ([::1]:42980 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Fr-0006on-HE for importer@patchew.org; Wed, 23 Feb 2022 17:37:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59136) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Al-0006TP-Pz for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:47 -0500 Received: from [2607:f8b0:4864:20::1032] (port=41617 helo=mail-pj1-x1032.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Ai-0001C4-Oh for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:47 -0500 Received: by mail-pj1-x1032.google.com with SMTP id ev16-20020a17090aead000b001bc3835fea8so387082pjb.0 for ; Wed, 23 Feb 2022 14:31:44 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E1rlJYYazfRdVeynNKa6RTb/vpD+L0sCNF3QpW/Zvp8=; b=Jb8iHIsIPgJb0kC0LfCP9SJnJck4aqWMbmw/XpGeid3EnFq4BbyLek50qTwCz4jzsL MbLEYLA9kl71q2MqYL45ut7A977P1YFzlla+viEkLLGv53epD6EbGxqsR5YlLaOzc5Y0 2aiQAkjaUCgPaCIW/GMSfoI4py9OvHalkO2IQbrfzYd8jyGH4/qeXzLb4wlJSBkcIwhX s3HY8pubrIuFbaKlMonhNG7e+5DB0eClggee4SrKDdIkXjlLJLpshZj2CvwLMJQ1YcU1 yMv4tTvk90wGhhqvx7765UA1NM1EF3NPU4qRSP2hw6E2eeDUQtDQiGdGY3xvCEYAd20+ XTdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E1rlJYYazfRdVeynNKa6RTb/vpD+L0sCNF3QpW/Zvp8=; b=SFPp39gXT5OS/GtkTtX/0JsqRXr8QuQfwosv+E3neg6NBl9flsnP5npNim4b+97Mhi u6hQEbIaH/Sr5acALBoFVKkLKxTX2QlsO33whx+5wVbqeHg2CgRdyGHIutvHC3rf8SyC rSxILgAm4ne+f3pvx4TpyXiY5Y7XwniI8Mqdaw01IffZYac0Z+UQXibpA+XDj8gwMauA Tmnx3sJ2yT/6Gx+Wbr6J4j4AyUIYa161RieKKodBdMzwPpCNxWaaYnmY3bWtNudl2WgH f4UngNooIVj3C+fFge+ZxQqkmeB2w5Ne8Mz0qN/yuzAw2h5g1wvrrWc/rT+bdtdT8HpM Z/wg== X-Gm-Message-State: AOAM531CK4DtQeUgtGagmnBWLMVuKSYD5RvNHrMJ3nl5tABTAb+aVE93 4SoKk9Wr+HkoSQos6SuvihdRP6X5EZaaWw== X-Google-Smtp-Source: ABdhPJyQT2mwJELw7spYq2ce9Y8IPCO1lNtgttw5A6uBgkG+gRYRwzkvrSpqwV+7z/E3M3nuHZv17w== X-Received: by 2002:a17:903:11cc:b0:14d:a0d5:76f with SMTP id q12-20020a17090311cc00b0014da0d5076fmr1687482plh.109.1645655503471; Wed, 23 Feb 2022 14:31:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/17] target/arm: Set TCR_EL1.TSZ for user-only Date: Wed, 23 Feb 2022 12:31:22 -1000 Message-Id: <20220223223137.114264-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1032 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645655826739100001 Content-Type: text/plain; charset="utf-8" Set this as the kernel would, to 48 bits, to keep the computation of the address space correct for PAuth. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index c085dc10ee..e251f0df4b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -206,10 +206,11 @@ static void arm_cpu_reset(DeviceState *dev) aarch64_sve_zcr_get_valid_len(cpu, cpu->sve_default_vq - 1= ); } /* + * Enable 48-bit address space (TODO: take reserved_va into accoun= t). * Enable TBI0 but not TBI1. * Note that this must match useronly_clean_ptr. */ - env->cp15.tcr_el[1].raw_tcr =3D (1ULL << 37); + env->cp15.tcr_el[1].raw_tcr =3D 5 | (1ULL << 37); =20 /* Enable MTE */ if (cpu_isar_feature(aa64_mte, cpu)) { --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164565598248492.78795780775363; Wed, 23 Feb 2022 14:39:42 -0800 (PST) Received: from localhost ([::1]:51360 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0IP-00045O-I8 for importer@patchew.org; Wed, 23 Feb 2022 17:39:41 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59168) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0An-0006Yu-9g for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:49 -0500 Received: from [2607:f8b0:4864:20::1034] (port=45641 helo=mail-pj1-x1034.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Al-0001CT-6M for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:48 -0500 Received: by mail-pj1-x1034.google.com with SMTP id bx9-20020a17090af48900b001bc64ee7d3cso326854pjb.4 for ; Wed, 23 Feb 2022 14:31:45 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=mMRtQwqR+JIHKhxGCA+TZ6Lh4RIplVAtW7d2GOe2aabcU2ObhZz8nFysChL+X81uYZ HWxG1Bf7IW7vFrk3yTQm6igrjA8s2+t2b8iGEUjJ9Ndrh1UktS2JBDucZreqGrtciHF9 t077h2otJGdRO0C6HLeXi2car4sGQKJ7xY1xjENA9oSzNqV6mSxFq9s2imG1OJ+cMTdN OOyL2vNQ61SK9HcsHkabx0zrh1OmdoL8s1c8mYP0Ec5oFmefRJ1YcA6leHt8A8lzXdep AV4rUJbjhlbxtlkYAbpPEXV2fCzAEYI4W7CWLqaO4q3JXrYG7E3xI/9iA/M/gpzZdyxc LmVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=dsisbiiQgZr02+i8BXajPD7UAfDAfMvC9a8kUI9lCOfDJHGkoYvdHHWJcm7nwmx8di oaVsPsJfvPv13+D+4hckeH08Hnxl9WOnWHCLy+3j40XNRSyPc6iOS0Jn0M/U0Pn42l3d NpnrglGX9A9JvQ0OB4HtRLi8Z1P6DDF+ZD2SDLhMHUtvdnFM30s2L/PK1igW26CVB5Qu PRMBf1lxSq+JYd52wX8mRoOq3Zf8wZuIjk74zbJpJ0bzIkkPt+YzYXId7JYSHt864CTY EMp8X1XMJTeNy/bDQv1aw9CyhjNSd6UEnDsBQgMi5Pt82BZh+bHytDi++eboX9JWoaZw rJCQ== X-Gm-Message-State: AOAM532FXzazjYxthyspgo9+MH5R/ldb1QNbByXezznjXo5zjzO7Zagf zvV/e9+5tYio1yPE2zFudeOgjou7oOpcxQ== X-Google-Smtp-Source: ABdhPJyYcA4ug90zs8VD1oXohXbp67GE+oYX9HyhG2qVKKg6rllJgm7PYlttiAJuvsNHPOUAcSuipw== X-Received: by 2002:a17:902:dcc9:b0:14f:edff:7df3 with SMTP id t9-20020a170902dcc900b0014fedff7df3mr1704151pll.154.1645655504906; Wed, 23 Feb 2022 14:31:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/17] target/arm: Fault on invalid TCR_ELx.TxSZ Date: Wed, 23 Feb 2022 12:31:23 -1000 Message-Id: <20220223223137.114264-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1034 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645655983845100001 Content-Type: text/plain; charset="utf-8" Without FEAT_LVA, the behaviour of programming an invalid value is IMPLEMENTATION DEFINED. With FEAT_LVA, programming an invalid minimum value requires a Translation fault. It is most self-consistent to choose to generate the fault always. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Continue to bound in aa64_va_parameters, so that PAuth gets something it can use, but provide a flag for get_phys_addr_lpae to raise a fault. --- target/arm/internals.h | 1 + target/arm/helper.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3f05748ea4..ef6c25d8cb 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1055,6 +1055,7 @@ typedef struct ARMVAParameters { bool hpd : 1; bool using16k : 1; bool using64k : 1; + bool tsz_oob : 1; /* tsz has been clamped to legal range */ } ARMVAParameters; =20 ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, diff --git a/target/arm/helper.c b/target/arm/helper.c index 7bf50fdd76..dd4d95bda2 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11190,8 +11190,8 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, ARMMMUIdx mmu_idx, bool data) { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; - bool epd, hpd, using16k, using64k; - int select, tsz, tbi, max_tsz; + bool epd, hpd, using16k, using64k, tsz_oob; + int select, tsz, tbi, max_tsz, min_tsz; =20 if (!regime_has_2_ranges(mmu_idx)) { select =3D 0; @@ -11232,9 +11232,17 @@ ARMVAParameters aa64_va_parameters(CPUARMState *en= v, uint64_t va, } else { max_tsz =3D 39; } + min_tsz =3D 16; /* TODO: ARMv8.2-LVA */ =20 - tsz =3D MIN(tsz, max_tsz); - tsz =3D MAX(tsz, 16); /* TODO: ARMv8.2-LVA */ + if (tsz > max_tsz) { + tsz =3D max_tsz; + tsz_oob =3D true; + } else if (tsz < min_tsz) { + tsz =3D min_tsz; + tsz_oob =3D true; + } else { + tsz_oob =3D false; + } =20 /* Present TBI as a composite with TBID. */ tbi =3D aa64_va_parameter_tbi(tcr, mmu_idx); @@ -11251,6 +11259,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, .hpd =3D hpd, .using16k =3D using16k, .using64k =3D using64k, + .tsz_oob =3D tsz_oob, }; } =20 @@ -11374,6 +11383,21 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, param =3D aa64_va_parameters(env, address, mmu_idx, access_type !=3D MMU_INST_FETCH); level =3D 0; + + /* + * If TxSZ is programmed to a value larger than the maximum, + * or smaller than the effective minimum, it is IMPLEMENTATION + * DEFINED whether we behave as if the field were programmed + * within bounds, or if a level 0 Translation fault is generated. + * + * With FEAT_LVA, fault on less than minimum becomes required, + * so our choice is to always raise the fault. + */ + if (param.tsz_oob) { + fault_type =3D ARMFault_Translation; + goto do_fault; + } + addrsize =3D 64 - 8 * param.tbi; inputsize =3D 64 - param.tsz; } else { --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656056591693.0725602555466; Wed, 23 Feb 2022 14:40:56 -0800 (PST) Received: from localhost ([::1]:53582 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Jb-0005Zg-Dp for importer@patchew.org; Wed, 23 Feb 2022 17:40:55 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59202) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Ap-0006gp-6k for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:51 -0500 Received: from [2607:f8b0:4864:20::42e] (port=35508 helo=mail-pf1-x42e.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0An-0001D4-2K for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:50 -0500 Received: by mail-pf1-x42e.google.com with SMTP id l19so217071pfu.2 for ; Wed, 23 Feb 2022 14:31:48 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+DAMlpqsE9DmBwY1s+cP0r+gi8rLuchADVNtgdDMW7U=; b=gOBGPyjn86roSjbkFP/FeauGD6Wio1CL1j62VVkw5N+cd1nPvuU+a8gbscsbUsdlcp bpeaNJtqMh52Kvz0Vw2Swi/5geIG5SOfKnfn7xcvHkYUAyeZK3sc72N/0MYOj59FgN3C n0P3neo5bnMiobjkcQle4cgJ9d7WMCt0fwqnpLHAJi2yKrNg2aXfZCvdMq5KxUFBrku/ 6hIPZSOMA43MbhRSntvkJFN1i70RyftJoRZ8ALXnFBsgR4XeKJu1SJljuUgs5/Cb+C1k xD7eeGXz5Hst/U0vPQgo4jx8mD5ie3lZdmyh0DQzxtXzXdi8X2SAhNgbaez48KUX2Ufp 2lGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+DAMlpqsE9DmBwY1s+cP0r+gi8rLuchADVNtgdDMW7U=; b=FpvZIQ0fpfl8CK8Gs+ZRfpdZE8zx1kBVrwxDP98xwag5zt8iSQ7papS3X9REyPuqZE FYt3ehC0d40TNso7gQpOQjwrFVJg0TkvUefI5HYSsNBG9RQl3Q9dWlin9Wug+alGH9iE EJPYdozVotDFKLpzXm4kQVkeerNicEkvFdGMj2rR3qkDk2UFLsAGSs2fnAKgSGeU0ezY pTkL1ebAHCikrrbqjHFCbuAQQxJJpUJhbcL+hqkw7DuhLmBDTWCbOpUzMzRbtUyqf5RZ IuZnAWdsEajTCuRy8jNFOXjHi93TmxJ8ZdL+Xhnt1v2GLeVVgVH8f0kegGOCUsqVLFLQ luiQ== X-Gm-Message-State: AOAM531fBjPVRQ2zBIYKRdufck86yWErEn5jF7ir8zuUnCJQNijt1YGq 3D+sSDfciNuhfqIOUiHohIM0bJkzHkJcMQ== X-Google-Smtp-Source: ABdhPJwCIpRZ3UJPxNOtTx/4M2JERi08FovPiaBmDhPCwz1w+KDdwVp+6JVw+jmw5wwaAk3sUwejvQ== X-Received: by 2002:a63:e747:0:b0:372:c757:c569 with SMTP id j7-20020a63e747000000b00372c757c569mr1401082pgk.516.1645655507689; Wed, 23 Feb 2022 14:31:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/17] target/arm: Move arm_pamax out of line Date: Wed, 23 Feb 2022 12:31:24 -1000 Message-Id: <20220223223137.114264-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42e (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656057135100001 We will shortly share parts of this function with other portions of address translation. Reviewed-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/arm/internals.h | 19 +------------------ target/arm/helper.c | 22 ++++++++++++++++++++++ 2 files changed, 23 insertions(+), 18 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index ef6c25d8cb..fefd1fb8d8 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -243,24 +243,7 @@ static inline void update_spsel(CPUARMState *env, uint= 32_t imm) * Returns the implementation defined bit-width of physical addresses. * The ARMv8 reference manuals refer to this as PAMax(). */ -static inline unsigned int arm_pamax(ARMCPU *cpu) -{ - static const unsigned int pamax_map[] =3D { - [0] =3D 32, - [1] =3D 36, - [2] =3D 40, - [3] =3D 42, - [4] =3D 44, - [5] =3D 48, - }; - unsigned int parange =3D - FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); - - /* id_aa64mmfr0 is a read-only register so values outside of the - * supported mappings can be considered an implementation error. */ - assert(parange < ARRAY_SIZE(pamax_map)); - return pamax_map[parange]; -} +unsigned int arm_pamax(ARMCPU *cpu); =20 /* Return true if extended addresses are enabled. * This is always the case if our translation regime is 64 bit, diff --git a/target/arm/helper.c b/target/arm/helper.c index dd4d95bda2..71e575f352 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11152,6 +11152,28 @@ static uint8_t convert_stage2_attrs(CPUARMState *e= nv, uint8_t s2attrs) } #endif /* !CONFIG_USER_ONLY */ =20 +/* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ +unsigned int arm_pamax(ARMCPU *cpu) +{ + static const unsigned int pamax_map[] =3D { + [0] =3D 32, + [1] =3D 36, + [2] =3D 40, + [3] =3D 42, + [4] =3D 44, + [5] =3D 48, + }; + unsigned int parange =3D + FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); + + /* + * id_aa64mmfr0 is a read-only register so values outside of the + * supported mappings can be considered an implementation error. + */ + assert(parange < ARRAY_SIZE(pamax_map)); + return pamax_map[parange]; +} + static int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx) { if (regime_has_2_ranges(mmu_idx)) { --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656202610222.43367293714562; Wed, 23 Feb 2022 14:43:22 -0800 (PST) Received: from localhost ([::1]:60622 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Lx-0001um-0T for importer@patchew.org; Wed, 23 Feb 2022 17:43:21 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59224) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Aq-0006kx-IS for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:52 -0500 Received: from [2607:f8b0:4864:20::431] (port=35511 helo=mail-pf1-x431.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Ao-0001Df-I3 for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:52 -0500 Received: by mail-pf1-x431.google.com with SMTP id l19so217138pfu.2 for ; Wed, 23 Feb 2022 14:31:50 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TAU62jUEHWqZmP/omH+DP65D27WXovgj7reF6QpCfzg=; b=qci+ATQTMvD+ZRQvRNzNY3SFlHbue3ZUY+cebS/Zwj2QLeycJ7oqNnHFZCnw/zGNXd FbvUOd+hMLUOjiR6yCB5RkV64k/+ZCikHlYqti+f/1dElrrA7sqH0rHbeBZtD6UFFUQd 2mxHpKOmSXsHZHUf0qf8irBBXkQGyWhrTlvDiFMN5nz3SkROpxmawZXlazUrHykhs9/7 Inu007DSVGGvpvT47d1+i4KkcFYbZTj+dkjnfdCcEMmdKaJOlfWPhfoqw6Q2Im1wFeoI 0qjv57FvReuByNfWOrdKPriy2dy8Oftw1nCq7aUfx/7QFD7AEyx/X6LsZA0PRfJDBSzV jlzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TAU62jUEHWqZmP/omH+DP65D27WXovgj7reF6QpCfzg=; b=ZeIKGJOgmC4HjooSFv3Fw6+ASt3rrmJQKcM6o4v+A5UgbtY5tJuRjElvVsPzRnG9Yu K2dWyinZKqvxKUBgIZ/wn08GeRpHDG/0paXxT1wJUvEtY4Rh0D77cCkE7gcNEm1qM8zL 1BQhybmUCqDYzEE5vkUiddpeyHrhP5EyF5YAbiRkwOaZnHwJfsTm8MI3HEDUPA+ihzhs lRb/yFA095Sl7Si80tYqNrf6lNn3OdM7btntDOnpMzXuy3LOBksWtXSI7PpiJNtEBCvk JNHTFZWmIkgjFJzqinS7EiQFpChqn9ujV7UNv8EvjTlA22XtimVHeBquyQLYrLUofHB2 yfdA== X-Gm-Message-State: AOAM530W9AJYO7nIMx5Q3cs3FvxZbUas8/TWj4vaRnRmP6rkbT+FRc0a X1kd7Cj19zDI0ipeEIefJ/DmCn/xdn22Mg== X-Google-Smtp-Source: ABdhPJzZpRVUKB8Qvw74AY10KTm/w6s9Yol5I1U+o4fTP7/bicFk5Jq7do8bpt3ye80gxX2xH7YD0A== X-Received: by 2002:a63:575d:0:b0:373:a27e:7c67 with SMTP id h29-20020a63575d000000b00373a27e7c67mr1412931pgm.558.1645655509245; Wed, 23 Feb 2022 14:31:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 05/17] target/arm: Pass outputsize down to check_s2_mmu_setup Date: Wed, 23 Feb 2022 12:31:25 -1000 Message-Id: <20220223223137.114264-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::431 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656204231100001 Content-Type: text/plain; charset="utf-8" Pass down the width of the output address from translation. For now this is still just PAMax, but a subsequent patch will compute the correct value from TCR_ELx.{I}PS. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 71e575f352..431b0c1405 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11065,7 +11065,7 @@ do_fault: * false otherwise. */ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level, - int inputsize, int stride) + int inputsize, int stride, int outputsize) { const int grainsize =3D stride + 3; int startsizecheck; @@ -11081,22 +11081,19 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool = is_aa64, int level, } =20 if (is_aa64) { - CPUARMState *env =3D &cpu->env; - unsigned int pamax =3D arm_pamax(cpu); - switch (stride) { case 13: /* 64KB Pages. */ - if (level =3D=3D 0 || (level =3D=3D 1 && pamax <=3D 42)) { + if (level =3D=3D 0 || (level =3D=3D 1 && outputsize <=3D 42)) { return false; } break; case 11: /* 16KB Pages. */ - if (level =3D=3D 0 || (level =3D=3D 1 && pamax <=3D 40)) { + if (level =3D=3D 0 || (level =3D=3D 1 && outputsize <=3D 40)) { return false; } break; case 9: /* 4KB Pages. */ - if (level =3D=3D 0 && pamax <=3D 42) { + if (level =3D=3D 0 && outputsize <=3D 42) { return false; } break; @@ -11105,8 +11102,8 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is= _aa64, int level, } =20 /* Inputsize checks. */ - if (inputsize > pamax && - (arm_el_is_aa64(env, 1) || inputsize > 40)) { + if (inputsize > outputsize && + (arm_el_is_aa64(&cpu->env, 1) || inputsize > 40)) { /* This is CONSTRAINED UNPREDICTABLE and we choose to fault. = */ return false; } @@ -11392,7 +11389,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, target_ulong page_size; uint32_t attrs; int32_t stride; - int addrsize, inputsize; + int addrsize, inputsize, outputsize; TCR *tcr =3D regime_tcr(env, mmu_idx); int ap, ns, xn, pxn; uint32_t el =3D regime_el(env, mmu_idx); @@ -11422,11 +11419,13 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, =20 addrsize =3D 64 - 8 * param.tbi; inputsize =3D 64 - param.tsz; + outputsize =3D arm_pamax(cpu); } else { param =3D aa32_va_parameters(env, address, mmu_idx); level =3D 1; addrsize =3D (mmu_idx =3D=3D ARMMMUIdx_Stage2 ? 40 : 32); inputsize =3D addrsize - param.tsz; + outputsize =3D 40; } =20 /* @@ -11511,7 +11510,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, =20 /* Check that the starting level is valid. */ ok =3D check_s2_mmu_setup(cpu, aarch64, startlevel, - inputsize, stride); + inputsize, stride, outputsize); if (!ok) { fault_type =3D ARMFault_Translation; goto do_fault; --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164565622784511.045380863315131; Wed, 23 Feb 2022 14:43:47 -0800 (PST) Received: from localhost ([::1]:32944 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0MM-0002IG-HI for importer@patchew.org; Wed, 23 Feb 2022 17:43:46 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59274) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0At-0006qq-9O for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:55 -0500 Received: from [2607:f8b0:4864:20::62a] (port=35383 helo=mail-pl1-x62a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Ar-0001E8-BJ for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:54 -0500 Received: by mail-pl1-x62a.google.com with SMTP id i1so85652plr.2 for ; Wed, 23 Feb 2022 14:31:51 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gIGj1SBy99bk76FDyotKqntArH5MW9KjKA2GprTkmIQ=; b=sLvusCfoq1Ah8GlJxy/j847In4z7s480NBBmtn6FLR+nkSOJTIu7ge+QcHIZc8vM2D 9m6NiuvGwWaZ2SHOdY3QD+uQieG2uXqwmmvqP7KtTQZEbMPbo5azEwEVFOcukCuc/U5G eGH+dMPna0/06OKXrLkupNB7Yni0aAt0ZQbn3KtAo0eFulsbbloCRlAkZyC199o7DmfF m/c7T8jYNAaqbjKMpUxNnmxm6ivncOkzg4p0LwuXUAPSvRSaw1UFk4P1lkvLJgzVimvb HTFjMjv/A6dq05gndNCYm9U9q71xSeAKIZaJNkrUBuFYSo/IMyeMDaBb3JIIROTHnzms sP7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gIGj1SBy99bk76FDyotKqntArH5MW9KjKA2GprTkmIQ=; b=kWZrAiFOoAGIhtqUnPH1G64pX59PcLcxY2nOcNV7CrQkWLo2d0x7I4PU/9pYcjxEzr gfW7EZdyWL+NiF480BXXzTLe77p81lEjPyw1arQduSQAVXUmrWgIcLvKRDHdkBT0EsIm 0P4Zo/bjLk09KNay9e6WgjhSBjIz7H+SRVAtwpFneSZjzOGb+VIAvp9+KpeCUw3jlI7D GBsZZbt8lCW7dJy2hdwoljau/KQSEZlRGV6PrSICndVqqv0UA/bzPW8Ma17n7clLSocb cHkR+SyNX87RykDFbiE5/xKVas1AURf/4a45bj9tuWsjT2C6ucje5B8dFI2NkzUcu7qL jXBA== X-Gm-Message-State: AOAM532w6VUS34RrK0fHOcC6A6HPSX+FEUhJMrudxrIGd8rLIzSCRchS 3pdy34z00BqnjpQoB5t5v/N4BgC6TgUzGw== X-Google-Smtp-Source: ABdhPJxzc71wMMXpch037H4YvReloP6NmGZxGxsBDwK2iXJuifDQMb5dyzuC4bvuwglBR3Uv7JE5zA== X-Received: by 2002:a17:90b:2251:b0:1b8:c4cc:2057 with SMTP id hk17-20020a17090b225100b001b8c4cc2057mr11364176pjb.193.1645655511021; Wed, 23 Feb 2022 14:31:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/17] target/arm: Use MAKE_64BIT_MASK to compute indexmask Date: Wed, 23 Feb 2022 12:31:26 -1000 Message-Id: <20220223223137.114264-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656230271100005 The macro is a bit more readable than the inlined computation. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 431b0c1405..675aec4bf3 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11518,8 +11518,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, level =3D startlevel; } =20 - indexmask_grainsize =3D (1ULL << (stride + 3)) - 1; - indexmask =3D (1ULL << (inputsize - (stride * (4 - level)))) - 1; + indexmask_grainsize =3D MAKE_64BIT_MASK(0, stride + 3); + indexmask =3D MAKE_64BIT_MASK(0, inputsize - (stride * (4 - level))); =20 /* Now we can extract the actual base address from the TTBR */ descaddr =3D extract64(ttbr, 0, 48); --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656228541955.7715894468292; Wed, 23 Feb 2022 14:43:48 -0800 (PST) Received: from localhost ([::1]:33044 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0MN-0002Lu-D8 for importer@patchew.org; Wed, 23 Feb 2022 17:43:47 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59332) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Av-0006ww-AB for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:57 -0500 Received: from [2607:f8b0:4864:20::102f] (port=39809 helo=mail-pj1-x102f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Ar-0001EZ-Ub for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:56 -0500 Received: by mail-pj1-x102f.google.com with SMTP id h17-20020a17090acf1100b001bc68ecce4aso3978319pju.4 for ; Wed, 23 Feb 2022 14:31:53 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4y89pQ0OdmVIqwd6NdNcqx8YrKd1GuWayeQiD4wW2NU=; b=Z8zPDZfPN18iEOEzjhnS6MKg+S84OsixiiLfXVdyBWC1ZgRB3YWlFUX2CDg9b3GrR6 /9xrkT19NUIMjXHs3RP5BWHGiq5QeXsi3+9eBgDnIO0dlv1ardly/P5jergM887C5AIQ YNgJ9HCNmtP3oMdl2k0t0ZMAY3kE8MEmSohOboaeIRk8a0v/zscmYUQdEiXhl7m8gaP3 hktauuiLBtFLDTwreMBkVmemli1yvkX2y5wA5shT7HjFF+4Y5UMsbgcqb4kL/XuhhjI/ Wf47CVV3htPYCKWjIzatF6Rp/eBM8HUhEkBMF/7FW4UV8eeUJY+iVBUEJrQe3VvALTbG R5Dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4y89pQ0OdmVIqwd6NdNcqx8YrKd1GuWayeQiD4wW2NU=; b=rFuJcnk7scb0+zDg2HtvjbKEMyCsmA7UIIc8bTbvYY21Ue5juiMJeQRdaAJUmLkIB2 amnft1nbiRZ4gD6HN5A+CT28y3itB/c/uB4u4eLSvm9QXUbmDlc65CAH7ZKq2Ndy4hRE 0J4OngRdt5LISPQAElh/YMirhCTJQDNEbRZRB64S9NgsSdhpUjRhttAEiy6hW0+ThbYo bGnsWkdU1tPKKhDHGl7Jaa+5E3/f7j9x1Dnads5mz+zrXoD720oR8Mx66qVnBVMKr2LJ hc5GkeCefH01OVOulaHO/zon77qqsQbxKtE8aEJ+G22FpyHCIPdN8i+/GmsC2ibYaRBu vPzA== X-Gm-Message-State: AOAM532qYfkSThC8ncT7grTzox5LWYMxNKme+BrxoKS6epm3DoV7j7ab uAWBYEJfG6RwqyyD8bUzbsS8ipD4uJOR/Q== X-Google-Smtp-Source: ABdhPJxhDFig15Q9NqAn4W6/VtX1zzoDBrbS/gUxF4ylSRS/3awSbwc7Lm8A/p0SfT0fpUbyBPgQjQ== X-Received: by 2002:a17:902:e84e:b0:14e:cbf5:a9c6 with SMTP id t14-20020a170902e84e00b0014ecbf5a9c6mr1855153plg.169.1645655512485; Wed, 23 Feb 2022 14:31:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 07/17] target/arm: Honor TCR_ELx.{I}PS Date: Wed, 23 Feb 2022 12:31:27 -1000 Message-Id: <20220223223137.114264-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656230244100003 This field controls the output (intermediate) physical address size of the translation process. V8 requires to raise an AddressSize fault if the page tables are programmed incorrectly, such that any intermediate descriptor address, or the final translated address, is out of range. Add a PS field to ARMVAParameters, and properly compute outputsize in get_phys_addr_lpae. Test the descaddr as extracted from TTBR and from page table entries. Restrict descaddrmask so that we won't raise the fault for v7. Reviewed-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/internals.h | 1 + target/arm/helper.c | 72 ++++++++++++++++++++++++++++++++---------- 2 files changed, 57 insertions(+), 16 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index fefd1fb8d8..3d3d41ba2b 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1032,6 +1032,7 @@ static inline uint32_t aarch64_pstate_valid_mask(cons= t ARMISARegisters *id) */ typedef struct ARMVAParameters { unsigned tsz : 8; + unsigned ps : 3; unsigned select : 1; bool tbi : 1; bool epd : 1; diff --git a/target/arm/helper.c b/target/arm/helper.c index 675aec4bf3..c002100979 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11149,17 +11149,19 @@ static uint8_t convert_stage2_attrs(CPUARMState *= env, uint8_t s2attrs) } #endif /* !CONFIG_USER_ONLY */ =20 +/* This mapping is common between ID_AA64MMFR0.PARANGE and TCR_ELx.{I}PS. = */ +static const uint8_t pamax_map[] =3D { + [0] =3D 32, + [1] =3D 36, + [2] =3D 40, + [3] =3D 42, + [4] =3D 44, + [5] =3D 48, +}; + /* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ unsigned int arm_pamax(ARMCPU *cpu) { - static const unsigned int pamax_map[] =3D { - [0] =3D 32, - [1] =3D 36, - [2] =3D 40, - [3] =3D 42, - [4] =3D 44, - [5] =3D 48, - }; unsigned int parange =3D FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); =20 @@ -11210,7 +11212,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; bool epd, hpd, using16k, using64k, tsz_oob; - int select, tsz, tbi, max_tsz, min_tsz; + int select, tsz, tbi, max_tsz, min_tsz, ps; =20 if (!regime_has_2_ranges(mmu_idx)) { select =3D 0; @@ -11224,6 +11226,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, hpd =3D extract32(tcr, 24, 1); } epd =3D false; + ps =3D extract32(tcr, 16, 3); } else { /* * Bit 55 is always between the two regions, and is canonical for @@ -11244,6 +11247,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, epd =3D extract32(tcr, 23, 1); hpd =3D extract64(tcr, 42, 1); } + ps =3D extract64(tcr, 32, 3); } =20 if (cpu_isar_feature(aa64_st, env_archcpu(env))) { @@ -11272,6 +11276,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, =20 return (ARMVAParameters) { .tsz =3D tsz, + .ps =3D ps, .select =3D select, .tbi =3D tbi, .epd =3D epd, @@ -11399,6 +11404,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, =20 /* TODO: This code does not support shareability levels. */ if (aarch64) { + int ps; + param =3D aa64_va_parameters(env, address, mmu_idx, access_type !=3D MMU_INST_FETCH); level =3D 0; @@ -11419,7 +11426,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, =20 addrsize =3D 64 - 8 * param.tbi; inputsize =3D 64 - param.tsz; - outputsize =3D arm_pamax(cpu); + + /* + * Bound PS by PARANGE to find the effective output address size. + * ID_AA64MMFR0 is a read-only register so values outside of the + * supported mappings can be considered an implementation error. + */ + ps =3D FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); + ps =3D MIN(ps, param.ps); + assert(ps < ARRAY_SIZE(pamax_map)); + outputsize =3D pamax_map[ps]; } else { param =3D aa32_va_parameters(env, address, mmu_idx); level =3D 1; @@ -11523,19 +11539,38 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, =20 /* Now we can extract the actual base address from the TTBR */ descaddr =3D extract64(ttbr, 0, 48); + + /* + * If the base address is out of range, raise AddressSizeFault. + * In the pseudocode, this is !IsZero(baseregister<47:outputsize>), + * but we've just cleared the bits above 47, so simplify the test. + */ + if (descaddr >> outputsize) { + level =3D 0; + fault_type =3D ARMFault_AddressSize; + goto do_fault; + } + /* * We rely on this masking to clear the RES0 bits at the bottom of the= TTBR * and also to mask out CnP (bit 0) which could validly be non-zero. */ descaddr &=3D ~indexmask; =20 - /* The address field in the descriptor goes up to bit 39 for ARMv7 - * but up to bit 47 for ARMv8, but we use the descaddrmask - * up to bit 39 for AArch32, because we don't need other bits in that = case - * to construct next descriptor address (anyway they should be all zer= oes). + /* + * For AArch32, the address field in the descriptor goes up to bit 39 + * for both v7 and v8. However, for v8 the SBZ bits [47:40] must be 0 + * or an AddressSize fault is raised. So for v8 we extract those SBZ + * bits as part of the address, which will be checked via outputsize. + * For AArch64, the address field always goes up to bit 47 (with extra + * bits for FEAT_LPA placed elsewhere). AArch64 implies v8. */ - descaddrmask =3D ((1ull << (aarch64 ? 48 : 40)) - 1) & - ~indexmask_grainsize; + if (arm_feature(env, ARM_FEATURE_V8)) { + descaddrmask =3D MAKE_64BIT_MASK(0, 48); + } else { + descaddrmask =3D MAKE_64BIT_MASK(0, 40); + } + descaddrmask &=3D ~indexmask_grainsize; =20 /* Secure accesses start with the page table in secure memory and * can be downgraded to non-secure at any step. Non-secure accesses @@ -11560,7 +11595,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, /* Invalid, or the Reserved level 3 encoding */ goto do_fault; } + descaddr =3D descriptor & descaddrmask; + if (descaddr >> outputsize) { + fault_type =3D ARMFault_AddressSize; + goto do_fault; + } =20 if ((descriptor & 2) && (level < 3)) { /* Table entry. The top five bits are attributes which may --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656380803925.0668499799078; Wed, 23 Feb 2022 14:46:20 -0800 (PST) Received: from localhost ([::1]:39308 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Op-0006XN-RZ for importer@patchew.org; Wed, 23 Feb 2022 17:46:19 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59334) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Av-0006xC-CX for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:57 -0500 Received: from [2607:f8b0:4864:20::631] (port=42754 helo=mail-pl1-x631.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0At-0001Ej-8z for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:57 -0500 Received: by mail-pl1-x631.google.com with SMTP id p17so62072plo.9 for ; Wed, 23 Feb 2022 14:31:54 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TmxawEn4TT//u8dncYbu6ycL9fZfNNpmMP+qU1HcQZ0=; b=WMB2EruxU8tOMv86xci1GCeZnQzzwlFrwKXA+WdpfLvaDMd4xi/hu+S3AJHqEVLv1M +1UJLNqZFjVUepZCpdlhMwT90DX7tPPYe65gi3PjkJbfQNpvq+oNB9utjhfCC/3W7aPu Op7qkuVLuKUejRkOh+zXzw1WaeTNaTD1MImlfuGaWb5HNjKHt5PwGaoFE6YzE8X14cQ1 MP9lGdodL2GHUzi6ndbYxwCLOGcwBKXjc58ZtnyG2pAHW12HKc79UQ9MNk7zfXChoO5W 9HKe+obfwnr6YGnN/WzxJHMUNJu9Qe/TQLpUBNz9RDIMV1qoKX+l64PGyvlEYlsElYo5 fLsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TmxawEn4TT//u8dncYbu6ycL9fZfNNpmMP+qU1HcQZ0=; b=lsFtU74vyVVoJR4feAlaDCrlxS+WYYC8KJBH7YAxBiOMojuEG+o7iHsWbBqMwckpcW 1+W3HPvZJrfhPDaK5mDB/z7H6OHUYj/rytrUHONXvsiWx7/7S/+/z8aq64KztogN0lzm sYT5Us3pibvtT/AnIvUUlddUSy4xqUWnaEVQU3SmA7z+j5uhdUi/BnFVKwSrvAgg4lqQ It2rmrIe/IV44e6MYCYQXHcUGpYOLYGfN21aZq+mFuChxhsD7K1rMd6l/KvCoSTL1Qu4 /kMIL9TR4NJKYNMciYsVFKvwhelofUZUolWPnsI/loqQ+RnzniXQep2M1tm/dg7m0CFQ 7SyQ== X-Gm-Message-State: AOAM530CjSxOPxifevbvStA3+LQ3lNvMBJ/Ql9ZMa5SbosR60FmZSutL Y612KkJrWSRHSb7kTQi0/hPKlprBF9VuTg== X-Google-Smtp-Source: ABdhPJzrsrFx4RwHA0FAUSMfgVojhBCkRGPrQipXIYF3e0RTh/NJOVeTkxz70Z2rDG4IC9foRPFxpg== X-Received: by 2002:a17:90a:4149:b0:1bc:ba63:247e with SMTP id m9-20020a17090a414900b001bcba63247emr964850pjg.173.1645655513960; Wed, 23 Feb 2022 14:31:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/17] target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA Date: Wed, 23 Feb 2022 12:31:28 -1000 Message-Id: <20220223223137.114264-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::631 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656381415100001 Content-Type: text/plain; charset="utf-8" The original A.a revision of the AArch64 ARM required that we force-extend the addresses in these registers from 49 bits. This language has been loosened via a combination of IMPLEMENTATION DEFINED and CONSTRAINTED UNPREDICTABLE to allow consideration of the entire aligned address. This means that we do not have to consider whether or not FEAT_LVA is enabled, and decide from which bit an address might need to be extended. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index c002100979..2eff30d18c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6423,11 +6423,18 @@ static void dbgwvr_write(CPUARMState *env, const AR= MCPRegInfo *ri, ARMCPU *cpu =3D env_archcpu(env); int i =3D ri->crm; =20 - /* Bits [63:49] are hardwired to the value of bit [48]; that is, the - * register reads and behaves as if values written are sign extended. + /* * Bits [1:0] are RES0. + * + * It is IMPLEMENTATION DEFINED whether [63:49] ([63:53] with FEAT_LVA) + * are hardwired to the value of bit [48] ([52] with FEAT_LVA), or if + * they contain the value written. It is CONSTRAINED UNPREDICTABLE + * whether the RESS bits are ignored when comparing an address. + * + * Therefore we are allowed to compare the entire register, which lets + * us avoid considering whether or not FEAT_LVA is actually enabled. */ - value =3D sextract64(value, 0, 49) & ~3ULL; + value &=3D ~3ULL; =20 raw_write(env, ri, value); hw_watchpoint_update(cpu, i); @@ -6473,10 +6480,19 @@ void hw_breakpoint_update(ARMCPU *cpu, int n) case 0: /* unlinked address match */ case 1: /* linked address match */ { - /* Bits [63:49] are hardwired to the value of bit [48]; that is, - * we behave as if the register was sign extended. Bits [1:0] are - * RES0. The BAS field is used to allow setting breakpoints on 16 - * bit wide instructions; it is CONSTRAINED UNPREDICTABLE whether + /* + * Bits [1:0] are RES0. + * + * It is IMPLEMENTATION DEFINED whether bits [63:49] + * ([63:53] for FEAT_LVA) are hardwired to a copy of the sign bit + * of the VA field ([48] or [52] for FEAT_LVA), or whether the + * value is read as written. It is CONSTRAINED UNPREDICTABLE + * whether the RESS bits are ignored when comparing an address. + * Therefore we are allowed to compare the entire register, which + * lets us avoid considering whether FEAT_LVA is actually enabled. + * + * The BAS field is used to allow setting breakpoints on 16-bit + * wide instructions; it is CONSTRAINED UNPREDICTABLE whether * a bp will fire if the addresses covered by the bp and the addre= sses * covered by the insn overlap but the insn doesn't start at the * start of the bp address range. We choose to require the insn and @@ -6489,7 +6505,7 @@ void hw_breakpoint_update(ARMCPU *cpu, int n) * See also figure D2-3 in the v8 ARM ARM (DDI0487A.c). */ int bas =3D extract64(bcr, 5, 4); - addr =3D sextract64(bvr, 0, 49) & ~3ULL; + addr =3D bvr & ~3ULL; if (bas =3D=3D 0) { return; } --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645655903390634.0686128158619; Wed, 23 Feb 2022 14:38:23 -0800 (PST) Received: from localhost ([::1]:48732 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0H8-0002Kt-D1 for importer@patchew.org; Wed, 23 Feb 2022 17:38:22 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59372) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Aw-000713-W3 for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:59 -0500 Received: from [2607:f8b0:4864:20::1032] (port=50904 helo=mail-pj1-x1032.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Au-0001FE-Kr for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:58 -0500 Received: by mail-pj1-x1032.google.com with SMTP id m22so344425pja.0 for ; Wed, 23 Feb 2022 14:31:56 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rots8gM6WyEhatQucngAjy7J8H2b6HMDpJoYQByRIgE=; b=ZpoPYSDCvEQDMS1P7yEcbhrbx3dWfntgn6mAVNCH3+EO8Xf2jcrSOb80Lld9QtVn5X j/gD+wwU0Kdn/A+5TDoQRsSRAFphb9b/ef8ZtA719/RBqDjp8dqQOMj8GKzZuUvKlKAP ur3AdWq7ntsyT0KpAlJM1mas3YPDvYSsBO7AnomTyzdROva1gdpwM+wkLhtpR1clql+6 dqWe6UUIvLUcuXmC1OlpaRvbVAaPt8/gG1wcnfryD5IIfJMLyhpY/Fi7WXCsUfBWCCUo pjUxff+5qZ6gSO9pXjRXHqMDFUxsWgnkvclK7jzMSLa0WpwwzYh2RKI0jY4/pKkoZXsZ +fyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rots8gM6WyEhatQucngAjy7J8H2b6HMDpJoYQByRIgE=; b=wiUW3DFLI8IcfdY+RQK5veU7tUfj/mLkYRBJTikZnUksldgOkVlU7NR0KKy6bggfmK Phzp7TzsVEKnd1DqX+1Q263jHwR2zPIo5nvSD/x/s7O7WgVcEsNRQLIGiwnpTH0fXF0r uPIHWDclvaYpMLpNsBwvEl29X840pyemUFnC4tmMS9BUjOnP43QckugOAY+xYGUPUfLn 67ub/o1r53J/FDJEFMqOa9kYbLYDT+S2keDhex5myUj0bKuTIex+u049fpxAukfYQXUt 5uNOrrQPOo7MFC4l7w6OGKoY/iroXi9xvyb2yTR9ykXsXDiHMtzQ3+g4ou/HmB7hv/+g XPDg== X-Gm-Message-State: AOAM530xIHqEkTe+w53RYGnu4lH1Y3M47chnrBWdUnIBAI4yuTphFLo9 Oc7oXHK+3zfrWgGUHiqjLegpPRM+FJwc1A== X-Google-Smtp-Source: ABdhPJyYSbN9htu/ksuJumzYFl+DuGid5n2rv5qDLFCgoHji1Px/cqytToY6kD2gQDjCvqM8ao2Bvw== X-Received: by 2002:a17:90b:124c:b0:1bc:369b:7db5 with SMTP id gx12-20020a17090b124c00b001bc369b7db5mr11448650pjb.179.1645655515389; Wed, 23 Feb 2022 14:31:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/17] target/arm: Implement FEAT_LVA Date: Wed, 23 Feb 2022 12:31:29 -1000 Message-Id: <20220223223137.114264-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1032 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645655905159100001 Content-Type: text/plain; charset="utf-8" This feature is relatively small, as it applies only to 64k pages and thus requires no additional changes to the table descriptor walking algorithm, only a change to the minimum TSZ (which is the inverse of the maximum virtual address space size). Note that this feature widens VBAR_ELx, but we already treat the register as being 64 bits wide. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- docs/system/arm/emulation.rst | 1 + target/arm/cpu-param.h | 2 +- target/arm/cpu.h | 5 +++++ target/arm/cpu64.c | 1 + target/arm/helper.c | 9 ++++++++- 5 files changed, 16 insertions(+), 2 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 144dc491d9..f3eabddfb5 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -27,6 +27,7 @@ the following architecture extensions: - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) +- FEAT_LVA (Large Virtual Address space) - FEAT_MTE (Memory Tagging Extension) - FEAT_MTE2 (Memory Tagging Extension) - FEAT_MTE3 (MTE Asymmetric Fault Handling) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 7f38d33b8e..5f9c288b1a 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -11,7 +11,7 @@ #ifdef TARGET_AARCH64 # define TARGET_LONG_BITS 64 # define TARGET_PHYS_ADDR_SPACE_BITS 48 -# define TARGET_VIRT_ADDR_SPACE_BITS 48 +# define TARGET_VIRT_ADDR_SPACE_BITS 52 #else # define TARGET_LONG_BITS 32 # define TARGET_PHYS_ADDR_SPACE_BITS 40 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c6a4d50e82..c52d56f669 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -4289,6 +4289,11 @@ static inline bool isar_feature_aa64_ccidx(const ARM= ISARegisters *id) return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, CCIDX) !=3D 0; } =20 +static inline bool isar_feature_aa64_lva(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, VARANGE) !=3D 0; +} + static inline bool isar_feature_aa64_tts2uxn(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, XNX) !=3D 0; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1171ab16b9..1de31ffb40 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -811,6 +811,7 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); t =3D FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* TTCNP */ t =3D FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* TTST */ + t =3D FIELD_DP64(t, ID_AA64MMFR2, VARANGE, 1); /* FEAT_LVA */ cpu->isar.id_aa64mmfr2 =3D t; =20 t =3D cpu->isar.id_aa64zfr0; diff --git a/target/arm/helper.c b/target/arm/helper.c index 2eff30d18c..28b4347213 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11271,7 +11271,14 @@ ARMVAParameters aa64_va_parameters(CPUARMState *en= v, uint64_t va, } else { max_tsz =3D 39; } - min_tsz =3D 16; /* TODO: ARMv8.2-LVA */ + + min_tsz =3D 16; + if (using64k) { + if (cpu_isar_feature(aa64_lva, env_archcpu(env))) { + min_tsz =3D 12; + } + } + /* TODO: FEAT_LPA2 */ =20 if (tsz > max_tsz) { tsz =3D max_tsz; --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656384104340.23773881404134; Wed, 23 Feb 2022 14:46:24 -0800 (PST) Received: from localhost ([::1]:39470 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Ot-0006do-77 for importer@patchew.org; Wed, 23 Feb 2022 17:46:23 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59402) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0Ay-00073y-EJ for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:01 -0500 Received: from [2607:f8b0:4864:20::52e] (port=38799 helo=mail-pg1-x52e.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Aw-0001Fo-9T for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:00 -0500 Received: by mail-pg1-x52e.google.com with SMTP id 132so85160pga.5 for ; Wed, 23 Feb 2022 14:31:57 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DRWkLoJkIekxooE0yM1xnliLnzzt/ozTUB9sEE/E5Ow=; b=HsqqqynCxDcY7I8E2Acrusu7Vuj2V/L3cS4Te9EDN/S57+i1HTRWhIhqbzyeTo4/80 uPbOUZClni+rjI3bpqlBi6f7IE4vV3BR9nFe2XZT+cPBcnWXJ8XKBuNs/vL66qTNf8sB G3rpHUU9uYnOEMKW88ah3RQbDYARnke1y8hXDGtKzvnZfpDcCTj4M8vrZz3rK/SRDCVs 3Purz5O0CXIYQQlD8CbPicp4gMAzuXVORy/9AAq2QUV5kLh0xLE5fRpu+xUS6KNut5lT 1g2fPwMVVHNbwiQJjQfwNtfMlNFgiMJSLzN0EIjXskHqQrzzvtLQ2KzyzTrasInq7qou ITyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DRWkLoJkIekxooE0yM1xnliLnzzt/ozTUB9sEE/E5Ow=; b=waUERKjJaz5rxZ+8npvzwP8AIIMy8W7WdaaZdm/bpDdJ6gqGoC7Y4PVDqyF5mX5Jeg Fj+2DEVxVyV2orESUnaqcrH7ZFWuR3P/Zb9gNYgQeS3qDGgSQ8X+EFbeAKtC1iW/siYa k3pIw4t6ycdXeFgVD3SmBfBehHx3tf/OMBZKZAgEEMBrRFX1F8ZJPP8i+D+bn87r1IhL DaExPPK+qnso1dHXXl0yxfH0sPdSTPKf/68fBy8wdlclZTwynxzGbX02AschmHjopg6Q jz6kYdCI+3PNbAfXAjOC5SbaZeH8jdleO6nS7+Gjm/LGtCPoFkiPpZdHXxw1Dv9gWRLN BYJA== X-Gm-Message-State: AOAM532xUCHCOIM094yH+tIpBLyLaFMw936EBw4qyXBIwpjdW1FQt9tt asqw8k2UU5dxRm1hwwvxv2mbljGZl/0alg== X-Google-Smtp-Source: ABdhPJxvDA4RRlQEwTENI61sXhE6YiF7je2N35goZiibJedvC9KipfIg13or3MAEWLjehhqjhCoAZQ== X-Received: by 2002:a65:644f:0:b0:375:6899:87db with SMTP id s15-20020a65644f000000b00375689987dbmr1429743pgv.112.1645655516848; Wed, 23 Feb 2022 14:31:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/17] target/arm: Implement FEAT_LPA Date: Wed, 23 Feb 2022 12:31:30 -1000 Message-Id: <20220223223137.114264-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52e (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656385452100001 Content-Type: text/plain; charset="utf-8" This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 64k pages. The only thing left at this point is to handle the extra bits in the TTBR and in the table descriptors. Note that PAR_EL1 and HPFAR_EL2 are nominally extended, but we don't mask out the high bits when writing to those registers, so no changes are required there. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- docs/system/arm/emulation.rst | 1 + target/arm/cpu-param.h | 2 +- target/arm/cpu64.c | 2 +- target/arm/helper.c | 19 ++++++++++++++++--- 4 files changed, 19 insertions(+), 5 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index f3eabddfb5..0053ddce20 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -24,6 +24,7 @@ the following architecture extensions: - FEAT_I8MM (AArch64 Int8 matrix multiplication instructions) - FEAT_JSCVT (JavaScript conversion instructions) - FEAT_LOR (Limited ordering regions) +- FEAT_LPA (Large Physical Address space) - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 5f9c288b1a..b59d505761 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -10,7 +10,7 @@ =20 #ifdef TARGET_AARCH64 # define TARGET_LONG_BITS 64 -# define TARGET_PHYS_ADDR_SPACE_BITS 48 +# define TARGET_PHYS_ADDR_SPACE_BITS 52 # define TARGET_VIRT_ADDR_SPACE_BITS 52 #else # define TARGET_LONG_BITS 32 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1de31ffb40..d88662cef6 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -795,7 +795,7 @@ static void aarch64_max_initfn(Object *obj) cpu->isar.id_aa64pfr1 =3D t; =20 t =3D cpu->isar.id_aa64mmfr0; - t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 5); /* PARange: 48 bits */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */ cpu->isar.id_aa64mmfr0 =3D t; =20 t =3D cpu->isar.id_aa64mmfr1; diff --git a/target/arm/helper.c b/target/arm/helper.c index 28b4347213..950f56599e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11173,6 +11173,7 @@ static const uint8_t pamax_map[] =3D { [3] =3D 42, [4] =3D 44, [5] =3D 48, + [6] =3D 52, }; =20 /* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ @@ -11564,11 +11565,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, descaddr =3D extract64(ttbr, 0, 48); =20 /* - * If the base address is out of range, raise AddressSizeFault. + * For FEAT_LPA and PS=3D6, bits [51:48] of descaddr are in [5:2] of T= TBR. + * + * Otherwise, if the base address is out of range, raise AddressSizeFa= ult. * In the pseudocode, this is !IsZero(baseregister<47:outputsize>), * but we've just cleared the bits above 47, so simplify the test. */ - if (descaddr >> outputsize) { + if (outputsize > 48) { + descaddr |=3D extract64(ttbr, 2, 4) << 48; + } else if (descaddr >> outputsize) { level =3D 0; fault_type =3D ARMFault_AddressSize; goto do_fault; @@ -11620,7 +11625,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, } =20 descaddr =3D descriptor & descaddrmask; - if (descaddr >> outputsize) { + + /* + * For FEAT_LPA and PS=3D6, bits [51:48] of descaddr are in [15:12] + * of descriptor. Otherwise, if descaddr is out of range, raise + * AddressSizeFault. + */ + if (outputsize > 48) { + descaddr |=3D extract64(descriptor, 12, 4) << 48; + } else if (descaddr >> outputsize) { fault_type =3D ARMFault_AddressSize; goto do_fault; } --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656384983253.43247560569432; Wed, 23 Feb 2022 14:46:24 -0800 (PST) Received: from localhost ([::1]:39632 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Ot-0006ki-Vx for importer@patchew.org; Wed, 23 Feb 2022 17:46:24 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59434) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0B0-00075l-AC for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:02 -0500 Received: from [2607:f8b0:4864:20::1035] (port=56269 helo=mail-pj1-x1035.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Ax-0001GC-Rf for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:01 -0500 Received: by mail-pj1-x1035.google.com with SMTP id gb21so294528pjb.5 for ; Wed, 23 Feb 2022 14:31:59 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LEHpSJT8J9ebqqTQjfyKLCxLV+2FFN9FnOSHNM/yVQA=; b=kiY62SkrmyQWbDayOPFjfJYfbitMiww3SYSsE9+fJJtcUdtQ2/ZtABx+iTOLRtu7BA SNyzfun3bSubk7/e14xLtbHHMot6XIiqB2ue+Hz0B7HbpVZHuzPCZO8OUyAgeU5o2owh RJM8vZxXR20PubDIG6MEadGNoiJrqhXinj577l6Wf03p85OnOMuXgXRjC5CNkuwECs9P t2PJGLWPfAf8gb4Rjmcshkn5syu5wcESsuB29jV/PpV2TeddfBoqX80ntGVEgn+Qpkok XAAWiL/voPtjociSk4lUotdgyOZddcs4g1aWdKITGWQgwdXnlzq8T4D6+s/CafVjDyPS uypg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LEHpSJT8J9ebqqTQjfyKLCxLV+2FFN9FnOSHNM/yVQA=; b=hn9l+aFRLtC2mSiV1HF5JYut/Oa/GfDaJoziP2WgDbpDHdQc3PPS1BuJK3fFqR+Yz1 sIOQLBtLoeA4aLZwofQcdQCCvGbnfv/DrwLpdTlJZy+gxvWdvwtwdHrdWvjiQqUNON8C qq8Mi9CufqAev9H9q6NwBkhpLwIjoC6O2wpWLoc2+BcPjmNyUXCjqlFnIRkVQjWiHv9A uUGZ/sFKyQQUqaI/nT8hxbBZFlVoRo87r/gFgJ/RJLtMlrUfaerGsE2I+kTPwkY44Fxh hFcAJ3eBley/9CBsQYDJxLaU/f8f7T8klmAHvhTgoarX6B8RnDcy+1vrfAxIgy4732dw KN+g== X-Gm-Message-State: AOAM532rArhAy50vUsndZl4isv9YHrv7JaXrr/M5ZZKfs6d77NnCytBr YcZp4gBdZdAXjv3gWsJcVpW8CoJlenyJ9A== X-Google-Smtp-Source: ABdhPJxHVxO3n6VHv8tKKO6vPJ2exXv7sP6qDqb0/aUOV9rT9qlF95ajK+GpOEN5reUMpMqagGrztA== X-Received: by 2002:a17:902:b94b:b0:14e:f1a8:9b99 with SMTP id h11-20020a170902b94b00b0014ef1a89b99mr1909464pls.28.1645655518546; Wed, 23 Feb 2022 14:31:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/17] target/arm: Extend arm_fi_to_lfsc to level -1 Date: Wed, 23 Feb 2022 12:31:31 -1000 Message-Id: <20220223223137.114264-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1035 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656387493100001 Content-Type: text/plain; charset="utf-8" With FEAT_LPA2, rather than introducing translation level 4, we introduce level -1, below the current level 0. Extend arm_fi_to_lfsc to handle these faults. Assert that this new translation level does not leak into fault types for which it is not defined, which allows some masking of fi->level to be removed. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/internals.h | 35 +++++++++++++++++++++++++++++------ 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3d3d41ba2b..00af41d792 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -462,28 +462,51 @@ static inline uint32_t arm_fi_to_lfsc(ARMMMUFaultInfo= *fi) case ARMFault_None: return 0; case ARMFault_AddressSize: - fsc =3D fi->level & 3; + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b101001; + } else { + fsc =3D fi->level; + } break; case ARMFault_AccessFlag: - fsc =3D (fi->level & 3) | (0x2 << 2); + assert(fi->level >=3D 0 && fi->level <=3D 3); + fsc =3D 0b001000 | fi->level; break; case ARMFault_Permission: - fsc =3D (fi->level & 3) | (0x3 << 2); + assert(fi->level >=3D 0 && fi->level <=3D 3); + fsc =3D 0b001100 | fi->level; break; case ARMFault_Translation: - fsc =3D (fi->level & 3) | (0x1 << 2); + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b101011; + } else { + fsc =3D 0b000100 | fi->level; + } break; case ARMFault_SyncExternal: fsc =3D 0x10 | (fi->ea << 12); break; case ARMFault_SyncExternalOnWalk: - fsc =3D (fi->level & 3) | (0x5 << 2) | (fi->ea << 12); + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b010011; + } else { + fsc =3D 0b010100 | fi->level; + } + fsc |=3D fi->ea << 12; break; case ARMFault_SyncParity: fsc =3D 0x18; break; case ARMFault_SyncParityOnWalk: - fsc =3D (fi->level & 3) | (0x7 << 2); + assert(fi->level >=3D -1 && fi->level <=3D 3); + if (fi->level < 0) { + fsc =3D 0b011011; + } else { + fsc =3D 0b011100 | fi->level; + } break; case ARMFault_AsyncParity: fsc =3D 0x19; --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656511008925.4162783649092; Wed, 23 Feb 2022 14:48:31 -0800 (PST) Received: from localhost ([::1]:46230 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Qv-0002sJ-Is for importer@patchew.org; Wed, 23 Feb 2022 17:48:29 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59486) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0B3-00078S-Er for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:05 -0500 Received: from [2607:f8b0:4864:20::1036] (port=40522 helo=mail-pj1-x1036.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Az-0001Ge-TS for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:04 -0500 Received: by mail-pj1-x1036.google.com with SMTP id em10-20020a17090b014a00b001bc3071f921so3970800pjb.5 for ; Wed, 23 Feb 2022 14:32:00 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Uavi3yQmU7TEij7jJpcySVBC3+TVvlm3sHX3b1s1W6c=; b=E4feHmkw/CmFwD/8fElw2/hS3oCNmfdUHVZDn3IWXTB7dIjgwUZi0XJAmOQNRegIrz 28lSFtVcpbFJhChctH0KvNC6hhURRAY5Y+axEGoOwMJNodSBAsf25ZxjXk81nUgVgeGy vB8IvZTfWPkecl0hniL82TztDa6Uhpn1wtVqm8sRb5PVVGnJfDP70d0ewDYpgY0Oalaz EDD2JnlE3+OOfSXF5Wsoea459gs7XrxGteBsSFR+WrrcOx5Pcovx23uz3tAFri6Z8I05 k5kUIvFx7L9vInfJi69uv8Wg1ZdFiqH/jy6zrk3Ht9qmwQkxv2V8nIQ760oIyzeUyDDv Vr0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Uavi3yQmU7TEij7jJpcySVBC3+TVvlm3sHX3b1s1W6c=; b=ITX5ud7LzKTbrRHC/3bXvhfCyXf3atnL/QzA3lEPD2yUmPlyLo3BFFazsiT4axZdJ+ iRNEVuIXxBtbk6FvQlc0E+SpSbgnXF0GyxJhVoJxrP57MB8RI/sN2346WFu2AF4m0pMg LGwfjpXU1LNvK5sSy4JuIcMdicLIw5cdyVTHgsJhfT/f/Cx3FiRpzkjSL+ExHQiXhSFH 2E3n7ONnPVFQBEKfzaanjpnee6gjawIFyrMPbXmTe5zIBx6x1nJ1cjMuigHdzSMb19bP RQDlWj0e63eJOaHZwau6m7RvejRgFaaru/vE/XBK1ZrCuRq98u14xds486KLKpzeQsI9 toPQ== X-Gm-Message-State: AOAM531waA4L92CuXj6OnWyviyBVtVJ+OA/JoKHx7sllRXzEO9mx23CL uLMLtPF+1nRd/Zj2SQ9X31AYKbeq9AwM5g== X-Google-Smtp-Source: ABdhPJxb4tQh/Aqc00UJdkf3ZPWL5HdNfaPw1YifBNDGI05bexFevqqPyY+XrbGa6GviaQhGQvIuog== X-Received: by 2002:a17:90b:d91:b0:1bc:ade1:54e3 with SMTP id bg17-20020a17090b0d9100b001bcade154e3mr3020272pjb.8.1645655520073; Wed, 23 Feb 2022 14:32:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 12/17] target/arm: Introduce tlbi_aa64_get_range Date: Wed, 23 Feb 2022 12:31:32 -1000 Message-Id: <20220223223137.114264-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1036 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656512612100001 Content-Type: text/plain; charset="utf-8" Merge tlbi_aa64_range_get_length and tlbi_aa64_range_get_base, returning a structure containing both results. Pass in the ARMMMUIdx, rather than the digested two_ranges boolean. This is in preparation for FEAT_LPA2, where the interpretation of 'value' depends on the effective value of DS for the regime. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 58 +++++++++++++++++++-------------------------- 1 file changed, 24 insertions(+), 34 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 950f56599e..31c2a716f2 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4511,70 +4511,60 @@ static void tlbi_aa64_vae3is_write(CPUARMState *env= , const ARMCPRegInfo *ri, } =20 #ifdef TARGET_AARCH64 -static uint64_t tlbi_aa64_range_get_length(CPUARMState *env, - uint64_t value) -{ - unsigned int page_shift; - unsigned int page_size_granule; - uint64_t num; - uint64_t scale; - uint64_t exponent; +typedef struct { + uint64_t base; uint64_t length; +} TLBIRange; + +static TLBIRange tlbi_aa64_get_range(CPUARMState *env, ARMMMUIdx mmuidx, + uint64_t value) +{ + unsigned int page_size_granule, page_shift, num, scale, exponent; + TLBIRange ret =3D { }; =20 - num =3D extract64(value, 39, 5); - scale =3D extract64(value, 44, 2); page_size_granule =3D extract64(value, 46, 2); =20 if (page_size_granule =3D=3D 0) { qemu_log_mask(LOG_GUEST_ERROR, "Invalid page size granule %d\n", page_size_granule); - return 0; + return ret; } =20 page_shift =3D (page_size_granule - 1) * 2 + 12; - + num =3D extract64(value, 39, 5); + scale =3D extract64(value, 44, 2); exponent =3D (5 * scale) + 1; - length =3D (num + 1) << (exponent + page_shift); =20 - return length; -} + ret.length =3D (num + 1) << (exponent + page_shift); =20 -static uint64_t tlbi_aa64_range_get_base(CPUARMState *env, uint64_t value, - bool two_ranges) -{ - /* TODO: ARMv8.7 FEAT_LPA2 */ - uint64_t pageaddr; - - if (two_ranges) { - pageaddr =3D sextract64(value, 0, 37) << TARGET_PAGE_BITS; + if (regime_has_2_ranges(mmuidx)) { + ret.base =3D sextract64(value, 0, 37) << TARGET_PAGE_BITS; } else { - pageaddr =3D extract64(value, 0, 37) << TARGET_PAGE_BITS; + ret.base =3D extract64(value, 0, 37) << TARGET_PAGE_BITS; } =20 - return pageaddr; + return ret; } =20 static void do_rvae_write(CPUARMState *env, uint64_t value, int idxmap, bool synced) { ARMMMUIdx one_idx =3D ARM_MMU_IDX_A | ctz32(idxmap); - bool two_ranges =3D regime_has_2_ranges(one_idx); - uint64_t baseaddr, length; + TLBIRange range; int bits; =20 - baseaddr =3D tlbi_aa64_range_get_base(env, value, two_ranges); - length =3D tlbi_aa64_range_get_length(env, value); - bits =3D tlbbits_for_regime(env, one_idx, baseaddr); + range =3D tlbi_aa64_get_range(env, one_idx, value); + bits =3D tlbbits_for_regime(env, one_idx, range.base); =20 if (synced) { tlb_flush_range_by_mmuidx_all_cpus_synced(env_cpu(env), - baseaddr, - length, + range.base, + range.length, idxmap, bits); } else { - tlb_flush_range_by_mmuidx(env_cpu(env), baseaddr, - length, idxmap, bits); + tlb_flush_range_by_mmuidx(env_cpu(env), range.base, + range.length, idxmap, bits); } } =20 --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656559476695.131338938296; Wed, 23 Feb 2022 14:49:19 -0800 (PST) Received: from localhost ([::1]:47548 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Rh-0003nz-Av for importer@patchew.org; Wed, 23 Feb 2022 17:49:17 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59514) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0B5-00079z-Sr for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:09 -0500 Received: from [2607:f8b0:4864:20::1033] (port=55291 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0B1-0001Gr-DQ for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:05 -0500 Received: by mail-pj1-x1033.google.com with SMTP id b8so295351pjb.4 for ; Wed, 23 Feb 2022 14:32:02 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.32.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:32:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iuG8ohkKwqyyIJ7svsXNRHI3s70BPYfliw43HdSQEsk=; b=WddS2ivjSWfNCTiD1OOwywbmtXYERS9f9cKw9sBPsqwsdwF13gXFDZQXznIoHcZ6Z6 VQyCOG8v3AIC8azqObcb5p1dJP4zfkF31qkZiNoGUpICs1dEeyge0k0egcw27mUk+1+G ZonCBG9cj/spNu8efQYMwJO0gZAVWYP/+ThksB3Cr9G0xgYPv1QrNAPT7iGieyS+nKsp wuHI/Aa+rIX+6PdRKmlm7b/toLTQ2r1sQtyJM2bckxJXM3t4BDGO53Albqq2N5sRin+n 1F6vAsntLlGT/B78qOj2I3pbAG6husIZN2qPjs23rJMvmvKC4pKBZgyP/cUmjzIvHWL9 nkIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iuG8ohkKwqyyIJ7svsXNRHI3s70BPYfliw43HdSQEsk=; b=00mG6k8VeAgJ/34NIommAhV/CbuURrmKhHpLr6t+Mh3kpvr7izp7tBLmgituKJQBEW XnO6n3n6qEcZWGnhDzG5aYkYTDznP7br5aZ9UCxBAC9lA8Ix6a/BFrXC3/QpAMg7/4Ta lOZE59yFiFrTyQ06MsCGiFlkG3YUHJ+AqZy0qVcMIYm1DXlOUda/VFFTURPrWwcZk9WF eUVRF9ct9F/vFFVA0Aysjx3LtIWP9Eq4kk9PB/Bpuc+QFG51JmVvMXfX+21GER/GQU+h fq77csLWqfAq4b1J3+nT104wjguZMloaJ+QcbDzkS5B2y7Y/cB7hagV3n+E0Oh4Famqg tFWw== X-Gm-Message-State: AOAM531MzTjarjewntJjU2xt86NU171pmcUm4plTwDdS0uZJobOzzsPP msAMD4hklPZGlEwObuG2koyYvsRsqg3s8w== X-Google-Smtp-Source: ABdhPJwmGB7nO0T90zWZHjoGI3XAZh3emi1m3aJnIDJp2hxS6HdgwuBWUC4k9XZj+LAFEjQl4fbZrg== X-Received: by 2002:a17:90a:4043:b0:1bc:450:df68 with SMTP id k3-20020a17090a404300b001bc0450df68mr11308406pjg.120.1645655521450; Wed, 23 Feb 2022 14:32:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 13/17] target/arm: Fix TLBIRange.base for 16k and 64k pages Date: Wed, 23 Feb 2022 12:31:33 -1000 Message-Id: <20220223223137.114264-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656560557100001 Content-Type: text/plain; charset="utf-8" The shift of the BaseADDR field depends on the translation granule in use. Fixes: 84940ed8255 ("target/arm: Add support for FEAT_TLBIRANGE") Reported-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 31c2a716f2..e455397fb5 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4538,10 +4538,11 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *e= nv, ARMMMUIdx mmuidx, ret.length =3D (num + 1) << (exponent + page_shift); =20 if (regime_has_2_ranges(mmuidx)) { - ret.base =3D sextract64(value, 0, 37) << TARGET_PAGE_BITS; + ret.base =3D sextract64(value, 0, 37); } else { - ret.base =3D extract64(value, 0, 37) << TARGET_PAGE_BITS; + ret.base =3D extract64(value, 0, 37); } + ret.base <<=3D page_shift; =20 return ret; } --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656696222717.1091578692383; Wed, 23 Feb 2022 14:51:36 -0800 (PST) Received: from localhost ([::1]:52286 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Tu-000766-MQ for importer@patchew.org; Wed, 23 Feb 2022 17:51:34 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59556) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0B7-0007BX-MI for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:11 -0500 Received: from [2607:f8b0:4864:20::431] (port=35512 helo=mail-pf1-x431.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0B3-0001HK-6D for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:08 -0500 Received: by mail-pf1-x431.google.com with SMTP id l19so217576pfu.2 for ; Wed, 23 Feb 2022 14:32:03 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.32.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:32:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WFTKQrLiJ3VwSgvkt/IhaEgBVQ3+b8tLX7nUBsUG9rM=; b=nWPSZzl1BCWj/NZFxKS0xZWxznh190caDQn90GNbYNatDKrYpUUZ3tmS4mTitmHWkE AG+o+jKuOmr+O5p96aQWAW/3vlYCRsjsKjWmZ2kmvc0pRcoYv7pCjgHd1KhAdetf3Q7C oYeiOyArEHmyEbapSM+Jtla6f6/ghxgR2NE9rmRe5OUCXR2dQGv2jPpV+XT0Qrx+Z6ct n2qXuKa/nBKsuxKLtNdh9jfKGIjNmdSnVoDO4GFck3++1YGDmXyS2bTTlkhRy2NpH3RO dCzBZ/FEzAtY7R2DqizVc6YUjHvd5ns/BsTwCc9gZIFZiFi7caXsjbG42OfotEjcrU48 pl7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WFTKQrLiJ3VwSgvkt/IhaEgBVQ3+b8tLX7nUBsUG9rM=; b=S0NQauqCwUEHkI7EHByoy0xi4+mUoEmmUKUYeHu30I7qEav+aB2zK9C3TZb9kAYk76 7nxQrFJ/g69Y8aCDVqSPNGu4MAwW+B9gCvyuUpshxTYWmqcVKQub/nltKq8YrHPlXdMa B/DwjwabGBjZ9xdY2vJkoJZK8FIEkToxzWCo/tA6u+UgXM5s49l7AJHbene87x9161nP B1LPQFDxvO3KV/+qKkEdwsEP9HVPkD/GabO3oEZNjL1/HWeDyBY/nJM67tzkHM0DVeNi qP0usEeLG2PIypmsj5OSwqlPChW4Oy6d8hsk8kOwDdHZTtlw0Gq4otRFTBCJBH1uweYR RcXA== X-Gm-Message-State: AOAM5319XTEPDMoXytEyDFVqiNDw4PLlVuaRo8hiu8i6yz52hGQ4VGqd RHJlbMHSC2zOPyudaDK9JA1da6ruug/vYA== X-Google-Smtp-Source: ABdhPJzdvp4M0CYcaaD1NMp+5V42ZMV/tr1v7F3yUcuDyunIzXZhdl1kdcx6YZqq7gfB9O5upxPf/w== X-Received: by 2002:a63:af02:0:b0:375:57f0:8af1 with SMTP id w2-20020a63af02000000b0037557f08af1mr1400927pge.188.1645655523076; Wed, 23 Feb 2022 14:32:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 14/17] target/arm: Validate tlbi TG matches translation granule in use Date: Wed, 23 Feb 2022 12:31:34 -1000 Message-Id: <20220223223137.114264-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::431 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656697754100001 Content-Type: text/plain; charset="utf-8" For FEAT_LPA2, we will need other ARMVAParameters, which themselves depend on the translation granule in use. We might as well validate that the given TG matches; the architecture "does not require that the instruction invalidates any entries" if this is not true. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index e455397fb5..3a7f5cf6f0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4520,12 +4520,16 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *e= nv, ARMMMUIdx mmuidx, uint64_t value) { unsigned int page_size_granule, page_shift, num, scale, exponent; + /* Extract one bit to represent the va selector in use. */ + uint64_t select =3D sextract64(value, 36, 1); + ARMVAParameters param =3D aa64_va_parameters(env, select, mmuidx, true= ); TLBIRange ret =3D { }; =20 page_size_granule =3D extract64(value, 46, 2); =20 - if (page_size_granule =3D=3D 0) { - qemu_log_mask(LOG_GUEST_ERROR, "Invalid page size granule %d\n", + /* The granule encoded in value must match the granule in use. */ + if (page_size_granule !=3D (param.using64k ? 3 : param.using16k ? 2 : = 1)) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid tlbi page size granule %d\= n", page_size_granule); return ret; } @@ -4537,7 +4541,7 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *env= , ARMMMUIdx mmuidx, =20 ret.length =3D (num + 1) << (exponent + page_shift); =20 - if (regime_has_2_ranges(mmuidx)) { + if (param.select) { ret.base =3D sextract64(value, 0, 37); } else { ret.base =3D extract64(value, 0, 37); --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656720742483.868529208857; Wed, 23 Feb 2022 14:52:00 -0800 (PST) Received: from localhost ([::1]:52670 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0UJ-0007Lg-49 for importer@patchew.org; Wed, 23 Feb 2022 17:51:59 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59592) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0B9-0007DB-Nd for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:12 -0500 Received: from [2607:f8b0:4864:20::42c] (port=36527 helo=mail-pf1-x42c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0B5-0001Hk-Io for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:10 -0500 Received: by mail-pf1-x42c.google.com with SMTP id z16so212474pfh.3 for ; Wed, 23 Feb 2022 14:32:05 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.32.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:32:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/ncep1+pfaj4VrhFhzBJtvktsI7eesl8NO/EGk2kyoM=; b=NVeSSx7n9c7TYeAr0xNMSrZxIH+iXkMzh4tFFfdzOVote81ikFS6NSu1zhrfEj2MWR qW45y7kATahxyn7cv09cn6Z9+CQhvDeOgIo7UGiRY8T1cUG1/5pB+Iu3LCj7fJXzvDi2 AdS+ILB/CGxaJTnwMMZD+nCzqGnLUXybvc7h9LYAz3YcSSA94mAsC7qr0E5Kz4iR7s8N QfGrLjcQBT6hL1BdXyLknqwbAmq7MPEx4b+JlHhXL/Bxj5tped3DHZjMx2vh41uP0oq+ Md+3Y19yOF3EobkZq3Cu+8RSUN/QZ2mz4Ti1LrmI8cNfqBWF8NPrTH8TqvfhCregF5fC Cg4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/ncep1+pfaj4VrhFhzBJtvktsI7eesl8NO/EGk2kyoM=; b=tBSmatJjLGJ0pt2bMSYWMCJ089ThpCHVLUrETp5pSm5/rI2tQxFZ83VhI3pA+AF0Ca aPGp5N5LOwtPAOrKtYrqddb+Z+n3IkHcKY8ybLR+TDNErvdgToZY1zJHI4dW35zdiFeq kB3IPQSNVZf5PcC4/h5ibcyuM5PA5f9XTPu44FuYyLYjU7bfFj9cEqdsqxMfSdflNS7d xAtcYjg9CNyDLC6i/PJoyopMnquY9dk36g8gx6OrfwuBNxgSy+CN1mIrPxD0MeWIiOAH dtIxIlifHeClU+09fvpSOGcKf/A3hGVIZYQiovG5dZaBzg0RkQC6TTVVJtbRPJXQA66K SlSA== X-Gm-Message-State: AOAM531RR40CypDTzYsdl3TQsh030WogydHUE0orZ3W7llzAa/zM6f80 1RpUHsZvDaHAlGvkMMWUIa0O7/eWdu7Ksw== X-Google-Smtp-Source: ABdhPJzo92NBvI/eoVpVPvAH3E8aPZ2mHsYr7A8A2kRBfn2GYD+693QiWuuV57oPiTDhldbzGMkZsw== X-Received: by 2002:a63:7709:0:b0:36c:8c3c:1199 with SMTP id s9-20020a637709000000b0036c8c3c1199mr1389383pgc.580.1645655524524; Wed, 23 Feb 2022 14:32:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 15/17] target/arm: Advertise all page sizes for -cpu max Date: Wed, 23 Feb 2022 12:31:35 -1000 Message-Id: <20220223223137.114264-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656721875100001 Content-Type: text/plain; charset="utf-8" We support 16k pages, but do not advertize that in ID_AA64MMFR0. The value 0 in the TGRAN*_2 fields indicates that stage2 lookups defer to the same support as stage1 lookups. This setting is deprecated, so indicate support for all stage2 page sizes directly. Signed-off-by: Richard Henderson --- target/arm/cpu64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index d88662cef6..2fdc16bf18 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -796,6 +796,10 @@ static void aarch64_max_initfn(Object *obj) =20 t =3D cpu->isar.id_aa64mmfr0; t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supporte= d */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16_2, 2); /* 16k stage2 support= ed */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN64_2, 2); /* 64k stage2 support= ed */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 2); /* 4k stage2 support= ed */ cpu->isar.id_aa64mmfr0 =3D t; =20 t =3D cpu->isar.id_aa64mmfr1; --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656953601333.5662532286399; Wed, 23 Feb 2022 14:55:53 -0800 (PST) Received: from localhost ([::1]:59768 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Y4-0003sR-M3 for importer@patchew.org; Wed, 23 Feb 2022 17:55:52 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0BE-0007EU-Bv for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:17 -0500 Received: from [2607:f8b0:4864:20::430] (port=45919 helo=mail-pf1-x430.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0BA-0001K9-Ht for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:14 -0500 Received: by mail-pf1-x430.google.com with SMTP id u16so178385pfg.12 for ; Wed, 23 Feb 2022 14:32:12 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:32:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mWBxuwt8V3FGFQ5JHqGb8ST2XOZhCQVYfBFh0OJ1LZY=; b=hTKynpU4Atz5CQAPq4e1VBoM/n3yAK6l9EAAFoCfoay8cSuB4Tqvb+K72ISi9BSJX1 XlWvYbk560KMVvprHxfct4DKelHCbncfqoPiUZxmBCw24AmTFEc7KP6s9+gWrUF/HpsK bsHc7w82jzDe5F6HmTRYqE5YeHrhTQL5XdcI6tkzcqCTlwcvLTOUv1+wTxqAQyVUZPKB jlyFXmdAYAwET/LhRgq9Y39iL4ACpgUdwOpGMzPQeuv6P7bPjOjiHz+N1bxuS/+37dyu Eaz878KttbQb6ZKenbSz1RJYdghtWV6NA7yMI3KPVMbKXHGXNEx7PrHnfuVvWqtVqT0r RKnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mWBxuwt8V3FGFQ5JHqGb8ST2XOZhCQVYfBFh0OJ1LZY=; b=G+Bbjszok4ILOLKyjc8Y4lhQYHHTYRJKsoLv+kmOgk3fIy2KVvhbqS2YkXYPnfKFf/ 5QyLuAWDiNHOVjhLwYTiCoweBF2wI2+3fAhN9gf1ah5r8aRIGgsM0T6ab+S8D3QZnFOZ 1lJOD6y7ahODp4hABVeI1v+tlJsYPexamSpOPq3o4JAU7LAaMD5XHjHxRZNU145+P/Is FdV+Fv6DnQ3ydMNDxqpDOcsy+NiQOm2YGpWwT49EFJuv6Uarapx1PlPFV6FLYAVcr+cQ m0U+XGviiuUYpCflKIBPTsZOGCw0diiylUhzSVdOz0jtng9Xp8n7SK3ZcipioH1plDZ5 5gbg== X-Gm-Message-State: AOAM532TqsWyL5+XkCjTk7UbAyYMKeSpS9xUXb+9wblfOyXFIB1AZCrT rYobae/ToDcakAHOhcDsSJllHuKod8b0IQ== X-Google-Smtp-Source: ABdhPJyDa/xjUALxa1rvwS6unEKstiVIJF/hykpcKCeCxQVD+2aJpKco1a33yBn+3TYwlVNX+bGNlw== X-Received: by 2002:a63:9d44:0:b0:374:a18a:17fa with SMTP id i65-20020a639d44000000b00374a18a17famr1383122pgd.293.1645655526475; Wed, 23 Feb 2022 14:32:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 16/17] tests/avocado: Limit test_virt_tcg_gicv[23] to cortex-a72 Date: Wed, 23 Feb 2022 12:31:36 -1000 Message-Id: <20220223223137.114264-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::430 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Beraldo Leal , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , qemu-arm@nongnu.org, Cleber Rosa , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656954134100001 These tests currently use Fedora Core 31, with a v5.3.7 kernel, which is broken vs FEAT_LPA2. Before we can re-enable these tests for -cpu max, we need to advance to at least a v5.12 kernel. Signed-off-by: Richard Henderson --- Fedora Cloud 35 uses a v5.14 kernel, and does work with FEAT_LPA2. However, I have no idea how to update the makefile/avocado combo to get that to happen. Cc: Cleber Rosa Cc: Philippe Mathieu-Daud=C3=A9 Cc: Wainer dos Santos Moschetta Cc: Beraldo Leal --- tests/avocado/boot_linux.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/avocado/boot_linux.py b/tests/avocado/boot_linux.py index ab19146d1e..a79c1578a6 100644 --- a/tests/avocado/boot_linux.py +++ b/tests/avocado/boot_linux.py @@ -74,7 +74,7 @@ def add_common_args(self): def test_virt_tcg_gicv2(self): """ :avocado: tags=3Daccel:tcg - :avocado: tags=3Dcpu:max + :avocado: tags=3Dcpu:cortex-a72 :avocado: tags=3Ddevice:gicv2 """ self.require_accelerator("tcg") @@ -86,7 +86,7 @@ def test_virt_tcg_gicv2(self): def test_virt_tcg_gicv3(self): """ :avocado: tags=3Daccel:tcg - :avocado: tags=3Dcpu:max + :avocado: tags=3Dcpu:cortex-a72 :avocado: tags=3Ddevice:gicv3 """ self.require_accelerator("tcg") --=20 2.25.1 From nobody Thu May 16 02:59:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645656812111447.8789243762519; Wed, 23 Feb 2022 14:53:32 -0800 (PST) Received: from localhost ([::1]:56462 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0Vm-0001ck-RS for importer@patchew.org; Wed, 23 Feb 2022 17:53:30 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59616) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0BB-0007Di-Dn for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:15 -0500 Received: from [2607:f8b0:4864:20::52a] (port=34622 helo=mail-pg1-x52a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0B7-0001JW-H7 for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:32:12 -0500 Received: by mail-pg1-x52a.google.com with SMTP id 139so100099pge.1 for ; Wed, 23 Feb 2022 14:32:08 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.32.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:32:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=19hfjB18qiT1jmcGWmvL02wOHBgHmeraSiuqJSfuTKE=; b=fboG4XYxuwhNIrOwWSpRKkeUdgCF6i5/UsCu2/T7o3XMrZAAXpWIDsITLMURkhlSfn CHNe7H6UkjTvcuzUknyU+p2rvdzOH5fAvUaA0EkNR9NCcj5+kQrzIgsMM/PGIXeAJHk8 yW2dZDlT3duyECfo+EjVqgWGtdQlg+PDQxmOo5hwcC92kLHJPuh3y846DHYLkyYhTvbk QVh/ABHm/Txdy4KoQdJh66U0HT4XjHJZghJQTen9A4k8k4lcuYvsxcl+D802ev1WURuM fnTUPQuvFg5clDh/XA9L/bKU1As2ZvBRcwyhhfcNGG38q29qjG2u25QuQ8bbl4y6Bfyv nT4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=19hfjB18qiT1jmcGWmvL02wOHBgHmeraSiuqJSfuTKE=; b=thS7o3rVzLQ9L5jg1NQygasMVdr25Vq29/7fXGMFuYiVH37wctxGV8Rdgao1RnBhMW TqdWsToUR3bQ+F4OpmPuEFgNX0/1MYapJo44r3RgYWd3Ds9fxy7WgX4fer7Ppm8VKP/0 ozQ5UEebXjRdeY49m7zBPVq4HgDfPz/cMan3U6ipzDNHtrmn2uNDjXF5gDiJhVAif5oF zEVledxe0useqAA/Uedcp7Zx5n5U/5NtewsW0crSjGqGIsv697OoWYrwJmJWFgZkPZju qOd+sTOwdoMho2oLfuIZAGPNRAVsmVcLDh541WDB7HJAilu0H7J+OfrZT2l9adq6iA6N iEbA== X-Gm-Message-State: AOAM531Mww2ne0HU22nvZgtTrr8XZqbqWzzboR94sR3EKQ43HLDzUS2b FftWbIsZwchPlZkHNA8wTwcv+NZd/+6Pvw== X-Google-Smtp-Source: ABdhPJw/LpsNzAyJGKb5C2SXFQt5j2Gpw5SSK2M4fLvzNdlrn4QsxkNWEY3aSCgCeUcTHYUthTYpKw== X-Received: by 2002:a05:6a00:2311:b0:4e1:52bf:e466 with SMTP id h17-20020a056a00231100b004e152bfe466mr1903687pfh.77.1645655527993; Wed, 23 Feb 2022 14:32:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 17/17] target/arm: Implement FEAT_LPA2 Date: Wed, 23 Feb 2022 12:31:37 -1000 Message-Id: <20220223223137.114264-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52a (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645656813332100001 Content-Type: text/plain; charset="utf-8" This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 4k or 16k pages. This introduces the DS bit to TCR_ELx, which is RES0 unless the page size is enabled and supports LPA2, resulting in the effective value of DS for a given table walk. The DS bit changes the format of the page table descriptor slightly, moving the PS field out to TCR so that all pages have the same sharability and repurposing those bits of the page table descriptor for the highest bits of the output address. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Check DS in tlbi_aa64_get_range. Check TGRAN4_2 and TGRAN16_2. --- docs/system/arm/emulation.rst | 1 + target/arm/cpu.h | 22 ++++++++ target/arm/internals.h | 2 + target/arm/cpu64.c | 7 ++- target/arm/helper.c | 102 +++++++++++++++++++++++++++++----- 5 files changed, 116 insertions(+), 18 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 0053ddce20..520fd39071 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -25,6 +25,7 @@ the following architecture extensions: - FEAT_JSCVT (JavaScript conversion instructions) - FEAT_LOR (Limited ordering regions) - FEAT_LPA (Large Physical Address space) +- FEAT_LPA2 (Large Physical and virtual Address space v2) - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c52d56f669..24d9fff170 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -4284,6 +4284,28 @@ static inline bool isar_feature_aa64_i8mm(const ARMI= SARegisters *id) return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, I8MM) !=3D 0; } =20 +static inline bool isar_feature_aa64_tgran4_lpa2(const ARMISARegisters *id) +{ + return FIELD_SEX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN4) >=3D 1; +} + +static inline bool isar_feature_aa64_tgran4_2_lpa2(const ARMISARegisters *= id) +{ + unsigned t =3D FIELD_EX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN4_2); + return t >=3D 3 || (t =3D=3D 0 && isar_feature_aa64_tgran4_lpa2(id)); +} + +static inline bool isar_feature_aa64_tgran16_lpa2(const ARMISARegisters *i= d) +{ + return FIELD_EX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN16) >=3D 2; +} + +static inline bool isar_feature_aa64_tgran16_2_lpa2(const ARMISARegisters = *id) +{ + unsigned t =3D FIELD_EX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN16_2); + return t >=3D 3 || (t =3D=3D 0 && isar_feature_aa64_tgran16_lpa2(id)); +} + static inline bool isar_feature_aa64_ccidx(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, CCIDX) !=3D 0; diff --git a/target/arm/internals.h b/target/arm/internals.h index 00af41d792..a34be2e459 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1056,6 +1056,7 @@ static inline uint32_t aarch64_pstate_valid_mask(cons= t ARMISARegisters *id) typedef struct ARMVAParameters { unsigned tsz : 8; unsigned ps : 3; + unsigned sh : 2; unsigned select : 1; bool tbi : 1; bool epd : 1; @@ -1063,6 +1064,7 @@ typedef struct ARMVAParameters { bool using16k : 1; bool using64k : 1; bool tsz_oob : 1; /* tsz has been clamped to legal range */ + bool ds : 1; } ARMVAParameters; =20 ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 2fdc16bf18..fc3c65ab2a 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -796,10 +796,11 @@ static void aarch64_max_initfn(Object *obj) =20 t =3D cpu->isar.id_aa64mmfr0; t =3D FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */ - t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supporte= d */ - t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16_2, 2); /* 16k stage2 support= ed */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 2); /* 16k pages w/ LPA2 = */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4, 1); /* 4k pages w/ LPA2 = */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN16_2, 3); /* 16k stage2 w/ LPA2= */ + t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 3); /* 4k stage2 w/ LPA2= */ t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN64_2, 2); /* 64k stage2 support= ed */ - t =3D FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 2); /* 4k stage2 support= ed */ cpu->isar.id_aa64mmfr0 =3D t; =20 t =3D cpu->isar.id_aa64mmfr1; diff --git a/target/arm/helper.c b/target/arm/helper.c index 3a7f5cf6f0..088956eecf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4546,6 +4546,14 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *en= v, ARMMMUIdx mmuidx, } else { ret.base =3D extract64(value, 0, 37); } + if (param.ds) { + /* + * With DS=3D1, BaseADDR is always shifted 16 so that it is able + * to address all 52 va bits. The input address is perforce + * aligned on a 64k boundary regardless of translation granule. + */ + page_shift =3D 16; + } ret.base <<=3D page_shift; =20 return ret; @@ -11081,8 +11089,13 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool i= s_aa64, int level, const int grainsize =3D stride + 3; int startsizecheck; =20 - /* Negative levels are never allowed. */ - if (level < 0) { + /* + * Negative levels are usually not allowed... + * Except for FEAT_LPA2, 4k page table, 52-bit address space, which + * begins with level -1. Note that previous feature tests will have + * eliminated this combination if it is not enabled. + */ + if (level < (inputsize =3D=3D 52 && stride =3D=3D 9 ? -1 : 0)) { return false; } =20 @@ -11223,8 +11236,9 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, ARMMMUIdx mmu_idx, bool data) { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; - bool epd, hpd, using16k, using64k, tsz_oob; - int select, tsz, tbi, max_tsz, min_tsz, ps; + bool epd, hpd, using16k, using64k, tsz_oob, ds; + int select, tsz, tbi, max_tsz, min_tsz, ps, sh; + ARMCPU *cpu =3D env_archcpu(env); =20 if (!regime_has_2_ranges(mmu_idx)) { select =3D 0; @@ -11238,7 +11252,9 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, hpd =3D extract32(tcr, 24, 1); } epd =3D false; + sh =3D extract32(tcr, 12, 2); ps =3D extract32(tcr, 16, 3); + ds =3D extract64(tcr, 32, 1); } else { /* * Bit 55 is always between the two regions, and is canonical for @@ -11248,6 +11264,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, if (!select) { tsz =3D extract32(tcr, 0, 6); epd =3D extract32(tcr, 7, 1); + sh =3D extract32(tcr, 12, 2); using64k =3D extract32(tcr, 14, 1); using16k =3D extract32(tcr, 15, 1); hpd =3D extract64(tcr, 41, 1); @@ -11257,24 +11274,51 @@ ARMVAParameters aa64_va_parameters(CPUARMState *e= nv, uint64_t va, using64k =3D tg =3D=3D 3; tsz =3D extract32(tcr, 16, 6); epd =3D extract32(tcr, 23, 1); + sh =3D extract32(tcr, 28, 2); hpd =3D extract64(tcr, 42, 1); } ps =3D extract64(tcr, 32, 3); + ds =3D extract64(tcr, 59, 1); } =20 - if (cpu_isar_feature(aa64_st, env_archcpu(env))) { + if (cpu_isar_feature(aa64_st, cpu)) { max_tsz =3D 48 - using64k; } else { max_tsz =3D 39; } =20 + /* + * DS is RES0 unless FEAT_LPA2 is supported for the given page size; + * adjust the effective value of DS, as documented. + */ min_tsz =3D 16; if (using64k) { - if (cpu_isar_feature(aa64_lva, env_archcpu(env))) { + if (cpu_isar_feature(aa64_lva, cpu)) { + min_tsz =3D 12; + } + ds =3D false; + } else if (ds) { + switch (mmu_idx) { + case ARMMMUIdx_Stage2: + case ARMMMUIdx_Stage2_S: + if (using16k) { + ds =3D cpu_isar_feature(aa64_tgran16_2_lpa2, cpu); + } else { + ds =3D cpu_isar_feature(aa64_tgran4_2_lpa2, cpu); + } + break; + default: + if (using16k) { + ds =3D cpu_isar_feature(aa64_tgran16_lpa2, cpu); + } else { + ds =3D cpu_isar_feature(aa64_tgran4_lpa2, cpu); + } + break; + } + if (ds) { min_tsz =3D 12; } } - /* TODO: FEAT_LPA2 */ =20 if (tsz > max_tsz) { tsz =3D max_tsz; @@ -11296,6 +11340,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, return (ARMVAParameters) { .tsz =3D tsz, .ps =3D ps, + .sh =3D sh, .select =3D select, .tbi =3D tbi, .epd =3D epd, @@ -11303,6 +11348,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env= , uint64_t va, .using16k =3D using16k, .using64k =3D using64k, .tsz_oob =3D tsz_oob, + .ds =3D ds, }; } =20 @@ -11528,10 +11574,19 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, * VTCR_EL2.SL0 field (whose interpretation depends on the page si= ze) */ uint32_t sl0 =3D extract32(tcr->raw_tcr, 6, 2); + uint32_t sl2 =3D extract64(tcr->raw_tcr, 33, 1); uint32_t startlevel; bool ok; =20 - if (!aarch64 || stride =3D=3D 9) { + /* SL2 is RES0 unless DS=3D1 & 4kb granule. */ + if (param.ds && stride =3D=3D 9 && sl2) { + if (sl0 !=3D 0) { + level =3D 0; + fault_type =3D ARMFault_Translation; + goto do_fault; + } + startlevel =3D -1; + } else if (!aarch64 || stride =3D=3D 9) { /* AArch32 or 4KB pages */ startlevel =3D 2 - sl0; =20 @@ -11585,10 +11640,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, * for both v7 and v8. However, for v8 the SBZ bits [47:40] must be 0 * or an AddressSize fault is raised. So for v8 we extract those SBZ * bits as part of the address, which will be checked via outputsize. - * For AArch64, the address field always goes up to bit 47 (with extra - * bits for FEAT_LPA placed elsewhere). AArch64 implies v8. + * For AArch64, the address field goes up to bit 47, or 49 with FEAT_L= PA2; + * the highest bits of a 52-bit output are placed elsewhere. */ - if (arm_feature(env, ARM_FEATURE_V8)) { + if (param.ds) { + descaddrmask =3D MAKE_64BIT_MASK(0, 50); + } else if (arm_feature(env, ARM_FEATURE_V8)) { descaddrmask =3D MAKE_64BIT_MASK(0, 48); } else { descaddrmask =3D MAKE_64BIT_MASK(0, 40); @@ -11623,11 +11680,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, = uint64_t address, =20 /* * For FEAT_LPA and PS=3D6, bits [51:48] of descaddr are in [15:12] - * of descriptor. Otherwise, if descaddr is out of range, raise - * AddressSizeFault. + * of descriptor. For FEAT_LPA2 and effective DS, bits [51:50] of + * descaddr are in [9:8]. Otherwise, if descaddr is out of range, + * raise AddressSizeFault. */ if (outputsize > 48) { - descaddr |=3D extract64(descriptor, 12, 4) << 48; + if (param.ds) { + descaddr |=3D extract64(descriptor, 8, 2) << 50; + } else { + descaddr |=3D extract64(descriptor, 12, 4) << 48; + } } else if (descaddr >> outputsize) { fault_type =3D ARMFault_AddressSize; goto do_fault; @@ -11721,7 +11783,17 @@ static bool get_phys_addr_lpae(CPUARMState *env, u= int64_t address, assert(attrindx <=3D 7); cacheattrs->attrs =3D extract64(mair, attrindx * 8, 8); } - cacheattrs->shareability =3D extract32(attrs, 6, 2); + + /* + * For FEAT_LPA2 and effective DS, the SH field in the attributes + * was re-purposed for output address bits. The SH attribute in + * that case comes from TCR_ELx, which we extracted earlier. + */ + if (param.ds) { + cacheattrs->shareability =3D param.sh; + } else { + cacheattrs->shareability =3D extract32(attrs, 6, 2); + } =20 *phys_ptr =3D descaddr; *page_size_ptr =3D page_size; --=20 2.25.1