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bh=zZCOV+fx06YOgONFCCQ/kgxJUjZPsMQZ+eVQZJE9mKI=; b=E4QWwsj4FNiUEI3du4wu8i2h+LWIa6NuyaxPKzT9OvK8gDXp+NiO9Xlu+DvMfwW+xaaOiv E3te1okvsuaCJCKoAIFAIDqNfAD0bU5ko8bdd22qRALA04vV1nsNcoYhX/lrEW44uUGz2r dcUr7rWQafrjbWbPfHmPJAx1MlFGOWw= X-MC-Unique: BRa6miO4MRuGUoeQ_Xv07A-1 From: Vitaly Kuznetsov To: qemu-devel@nongnu.org Subject: [PATCH v2 1/3] i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES Date: Thu, 17 Feb 2022 15:29:47 +0100 Message-Id: <20220217142949.297454-2-vkuznets@redhat.com> In-Reply-To: <20220217142949.297454-1-vkuznets@redhat.com> References: <20220217142949.297454-1-vkuznets@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=vkuznets@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=vkuznets@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Marcelo Tosatti Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1645111414739100001 Content-Type: text/plain; charset="utf-8" Previously, HV_CPUID_NESTED_FEATURES.EAX CPUID leaf was handled differently as it was only used to encode the supported eVMCS version range. In fact, there are also feature (e.g. Enlightened MSR-Bitmap) bits there. In preparation to adding these features, move HV_CPUID_NESTED_FEATURES leaf handling to hv_build_cpuid_leaf() and drop now-unneeded 'hyperv_nested'. No functional change intended. Signed-off-by: Vitaly Kuznetsov --- target/i386/cpu.h | 1 - target/i386/kvm/kvm.c | 23 +++++++++++++++-------- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 9911d7c8711b..537479d24928 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1725,7 +1725,6 @@ struct X86CPU { uint32_t hyperv_vendor_id[3]; uint32_t hyperv_interface_id[4]; uint32_t hyperv_limits[3]; - uint32_t hyperv_nested[4]; bool hyperv_enforce_cpuid; uint32_t hyperv_ver_id_build; uint16_t hyperv_ver_id_major; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 2c8feb4a6f7b..ceb331db8963 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -802,6 +802,8 @@ static bool tsc_is_stable_and_known(CPUX86State *env) || env->user_tsc_khz; } =20 +#define DEFAULT_EVMCS_VERSION ((1 << 8) | 1) + static struct { const char *desc; struct { @@ -1209,6 +1211,13 @@ static uint32_t hv_build_cpuid_leaf(CPUState *cs, ui= nt32_t func, int reg) } } =20 + /* HV_CPUID_NESTED_FEATURES.EAX also encodes the supported eVMCS range= */ + if (func =3D=3D HV_CPUID_NESTED_FEATURES && reg =3D=3D R_EAX) { + if (hyperv_feat_enabled(cpu, HYPERV_FEAT_EVMCS)) { + r |=3D DEFAULT_EVMCS_VERSION; + } + } + return r; } =20 @@ -1338,11 +1347,13 @@ static int hyperv_fill_cpuids(CPUState *cs, X86CPU *cpu =3D X86_CPU(cs); struct kvm_cpuid_entry2 *c; uint32_t cpuid_i =3D 0; + uint32_t nested_eax =3D + hv_build_cpuid_leaf(cs, HV_CPUID_NESTED_FEATURES, R_EAX); =20 c =3D &cpuid_ent[cpuid_i++]; c->function =3D HV_CPUID_VENDOR_AND_MAX_FUNCTIONS; - c->eax =3D hyperv_feat_enabled(cpu, HYPERV_FEAT_EVMCS) ? - HV_CPUID_NESTED_FEATURES : HV_CPUID_IMPLEMENT_LIMITS; + c->eax =3D nested_eax ? HV_CPUID_NESTED_FEATURES : + HV_CPUID_IMPLEMENT_LIMITS; c->ebx =3D cpu->hyperv_vendor_id[0]; c->ecx =3D cpu->hyperv_vendor_id[1]; c->edx =3D cpu->hyperv_vendor_id[2]; @@ -1406,7 +1417,7 @@ static int hyperv_fill_cpuids(CPUState *cs, c->ecx =3D cpu->hyperv_limits[1]; c->edx =3D cpu->hyperv_limits[2]; =20 - if (hyperv_feat_enabled(cpu, HYPERV_FEAT_EVMCS)) { + if (nested_eax) { uint32_t function; =20 /* Create zeroed 0x40000006..0x40000009 leaves */ @@ -1418,7 +1429,7 @@ static int hyperv_fill_cpuids(CPUState *cs, =20 c =3D &cpuid_ent[cpuid_i++]; c->function =3D HV_CPUID_NESTED_FEATURES; - c->eax =3D cpu->hyperv_nested[0]; + c->eax =3D nested_eax; } =20 return cpuid_i; @@ -1440,8 +1451,6 @@ static bool evmcs_version_supported(uint16_t evmcs_ve= rsion, (max_version <=3D max_supported_version); } =20 -#define DEFAULT_EVMCS_VERSION ((1 << 8) | 1) - static int hyperv_init_vcpu(X86CPU *cpu) { CPUState *cs =3D CPU(cpu); @@ -1545,8 +1554,6 @@ static int hyperv_init_vcpu(X86CPU *cpu) supported_evmcs_version >> 8); return -ENOTSUP; } - - cpu->hyperv_nested[0] =3D evmcs_version; } =20 if (cpu->hyperv_enforce_cpuid) { --=20 2.35.1 From nobody Mon May 20 21:02:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1645111853; cv=none; d=zohomail.com; s=zohoarc; b=gG5XjUIVN1m5/wPMBBRcPuNCEZM17DzeuQgG2uqnpVWcRCBWvhVEJXetOIBr4zoImR0BrD+uw76IZQW4vR9t/CJ4iGZJtHD2wO6XI14mWz4bn/o9dMwcQkDIZ9DaCKJF3Fs1S0wCL3jVOfPftonyIn7LjM6kyZCrBfvYODVultk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1645111853; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=u1jsjBx4NXkJAMK/idReTSoBzio3uAuh2zN+gfuXDco=; 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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1645108198; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=u1jsjBx4NXkJAMK/idReTSoBzio3uAuh2zN+gfuXDco=; b=bXptyNJH/B94OpicDpZH/ktjlH9H98YPRIq4ZgK/0ND+P9eMlmhExMOi7z8XzPz5roMjvH HfTSFUohOfsrfgWH/sqY8nfYEaWzT4Ogqd6sjr7SazRrC+7/+j4Y7B6aR+kYDJ4TxyzQ4z wUObN5/lvHVaapLyl0QPJFiZvuVwO9Y= X-MC-Unique: RXBNkaM6N3auIXlRY9Voag-1 From: Vitaly Kuznetsov To: qemu-devel@nongnu.org Subject: [PATCH v2 2/3] i386: Hyper-V Enlightened MSR bitmap feature Date: Thu, 17 Feb 2022 15:29:48 +0100 Message-Id: <20220217142949.297454-3-vkuznets@redhat.com> In-Reply-To: <20220217142949.297454-1-vkuznets@redhat.com> References: <20220217142949.297454-1-vkuznets@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; 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charset="utf-8" The newly introduced enlightenment allow L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. Signed-off-by: Vitaly Kuznetsov --- docs/hyperv.txt | 10 ++++++++++ target/i386/cpu.c | 2 ++ target/i386/cpu.h | 1 + target/i386/kvm/hyperv-proto.h | 5 +++++ target/i386/kvm/kvm.c | 7 +++++++ 5 files changed, 25 insertions(+) diff --git a/docs/hyperv.txt b/docs/hyperv.txt index 0417c183a3b0..08429124a634 100644 --- a/docs/hyperv.txt +++ b/docs/hyperv.txt @@ -225,6 +225,16 @@ default (WS2016). Note: hv-version-id-* are not enlightenments and thus don't enable Hyper-V identification when specified without any other enlightenments. =20 +3.21. hv-emsr-bitmap +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +The enlightenment is nested specific, it targets Hyper-V on KVM guests. Wh= en +enabled, it allows L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to +avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. While the protoco= l is +supported for both VMX (Intel) and SVM (AMD), the VMX implementation requi= res +Enlightened VMCS ('hv-evmcs') feature to also be enabled. + +Recommended: hv-evmcs (Intel) + 4. Supplementary features =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index aa9e6368004c..f7405fdf4fa5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6839,6 +6839,8 @@ static Property x86_cpu_properties[] =3D { HYPERV_FEAT_STIMER_DIRECT, 0), DEFINE_PROP_BIT64("hv-avic", X86CPU, hyperv_features, HYPERV_FEAT_AVIC, 0), + DEFINE_PROP_BIT64("hv-emsr-bitmap", X86CPU, hyperv_features, + HYPERV_FEAT_MSR_BITMAP, 0), DEFINE_PROP_ON_OFF_AUTO("hv-no-nonarch-coresharing", X86CPU, hyperv_no_nonarch_cs, ON_OFF_AUTO_OFF), DEFINE_PROP_BOOL("hv-passthrough", X86CPU, hyperv_passthrough, false), diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 537479d24928..d6ae9e60a9a0 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1060,6 +1060,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define HYPERV_FEAT_IPI 13 #define HYPERV_FEAT_STIMER_DIRECT 14 #define HYPERV_FEAT_AVIC 15 +#define HYPERV_FEAT_MSR_BITMAP 16 =20 #ifndef HYPERV_SPINLOCK_NEVER_NOTIFY #define HYPERV_SPINLOCK_NEVER_NOTIFY 0xFFFFFFFF diff --git a/target/i386/kvm/hyperv-proto.h b/target/i386/kvm/hyperv-proto.h index 89f81afda7c6..38e25468122d 100644 --- a/target/i386/kvm/hyperv-proto.h +++ b/target/i386/kvm/hyperv-proto.h @@ -72,6 +72,11 @@ #define HV_ENLIGHTENED_VMCS_RECOMMENDED (1u << 14) #define HV_NO_NONARCH_CORESHARING (1u << 18) =20 +/* + * HV_CPUID_NESTED_FEATURES.EAX bits + */ +#define HV_NESTED_MSR_BITMAP (1u << 19) + /* * Basic virtualized MSRs */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ceb331db8963..f719ef3f8384 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -934,6 +934,13 @@ static struct { .bits =3D HV_DEPRECATING_AEOI_RECOMMENDED} } }, + [HYPERV_FEAT_MSR_BITMAP] =3D { + .desc =3D "enlightened MSR-Bitmap (hv-emsr-bitmap)", + .flags =3D { + {.func =3D HV_CPUID_NESTED_FEATURES, .reg =3D R_EAX, + .bits =3D HV_NESTED_MSR_BITMAP} + } + }, }; =20 static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max, --=20 2.35.1 From nobody Mon May 20 21:02:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1645112276; cv=none; d=zohomail.com; s=zohoarc; b=M0mVVBPeKAEM4+Hkjb3BMhxT3uRRuozntyuEqvIp/oFQcxbmsnDmU72l8g0tImKIJQCfRVPrkDiF42U3n3ET6/8LWbJmeD1qhGWrODmp8I8aX6PgAo9iFPdtHjpVgBaQUkalbrQb3oVwWoLTZmcF27UFZ3ZJbcR611VS5ER7cns= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1645112276; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uyJ1XaiHU9zZLZzBkPbvTXeCsTJuK8cz5xTDH2PFO2c=; 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charset="utf-8" Hyper-V specification allows to pass parameters for certain hypercalls using XMM registers ("XMM Fast Hypercall Input"). When the feature is in use, it allows for faster hypercalls processing as KVM can avoid reading guest's memory. KVM supports the feature since v5.14. Rename HV_HYPERCALL_{PARAMS_XMM_AVAILABLE -> XMM_INPUT_AVAILABLE} to comply with KVM. Signed-off-by: Vitaly Kuznetsov --- docs/hyperv.txt | 6 ++++++ target/i386/cpu.c | 2 ++ target/i386/cpu.h | 1 + target/i386/kvm/hyperv-proto.h | 2 +- target/i386/kvm/kvm.c | 7 +++++++ 5 files changed, 17 insertions(+), 1 deletion(-) diff --git a/docs/hyperv.txt b/docs/hyperv.txt index 08429124a634..857268d37d61 100644 --- a/docs/hyperv.txt +++ b/docs/hyperv.txt @@ -235,6 +235,12 @@ Enlightened VMCS ('hv-evmcs') feature to also be enabl= ed. =20 Recommended: hv-evmcs (Intel) =20 +3.22. hv-xmm-input +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Hyper-V specification allows to pass parameters for certain hypercalls usi= ng XMM +registers ("XMM Fast Hypercall Input"). When the feature is in use, it all= ows +for faster hypercalls processing as KVM can avoid reading guest's memory. + 4. Supplementary features =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f7405fdf4fa5..0b171db1d046 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6841,6 +6841,8 @@ static Property x86_cpu_properties[] =3D { HYPERV_FEAT_AVIC, 0), DEFINE_PROP_BIT64("hv-emsr-bitmap", X86CPU, hyperv_features, HYPERV_FEAT_MSR_BITMAP, 0), + DEFINE_PROP_BIT64("hv-xmm-input", X86CPU, hyperv_features, + HYPERV_FEAT_XMM_INPUT, 0), DEFINE_PROP_ON_OFF_AUTO("hv-no-nonarch-coresharing", X86CPU, hyperv_no_nonarch_cs, ON_OFF_AUTO_OFF), DEFINE_PROP_BOOL("hv-passthrough", X86CPU, hyperv_passthrough, false), diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d6ae9e60a9a0..da251d165d13 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1061,6 +1061,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define HYPERV_FEAT_STIMER_DIRECT 14 #define HYPERV_FEAT_AVIC 15 #define HYPERV_FEAT_MSR_BITMAP 16 +#define HYPERV_FEAT_XMM_INPUT 17 =20 #ifndef HYPERV_SPINLOCK_NEVER_NOTIFY #define HYPERV_SPINLOCK_NEVER_NOTIFY 0xFFFFFFFF diff --git a/target/i386/kvm/hyperv-proto.h b/target/i386/kvm/hyperv-proto.h index 38e25468122d..74d91adb7a16 100644 --- a/target/i386/kvm/hyperv-proto.h +++ b/target/i386/kvm/hyperv-proto.h @@ -51,7 +51,7 @@ #define HV_GUEST_DEBUGGING_AVAILABLE (1u << 1) #define HV_PERF_MONITOR_AVAILABLE (1u << 2) #define HV_CPU_DYNAMIC_PARTITIONING_AVAILABLE (1u << 3) -#define HV_HYPERCALL_PARAMS_XMM_AVAILABLE (1u << 4) +#define HV_HYPERCALL_XMM_INPUT_AVAILABLE (1u << 4) #define HV_GUEST_IDLE_STATE_AVAILABLE (1u << 5) #define HV_FREQUENCY_MSRS_AVAILABLE (1u << 8) #define HV_GUEST_CRASH_MSR_AVAILABLE (1u << 10) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index f719ef3f8384..8279b116fac6 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -941,6 +941,13 @@ static struct { .bits =3D HV_NESTED_MSR_BITMAP} } }, + [HYPERV_FEAT_XMM_INPUT] =3D { + .desc =3D "XMM fast hypercall input (hv-xmm-input)", + .flags =3D { + {.func =3D HV_CPUID_FEATURES, .reg =3D R_EDX, + .bits =3D HV_HYPERCALL_XMM_INPUT_AVAILABLE} + } + }, }; =20 static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max, --=20 2.35.1