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[77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DChXguDILJX7hAfj1nv8VIcMQ6DAEI68Y7I8Xvc3k5g=; b=DTg6YNsMvXNavOdjSCAVw/4jyqIRWbvxcDno38Z8Qm9jC0dsnS+ClRfIPcskaIUUM7 BD2S1AltEG+uItd1XWaGPJr7fwjIM9oQ6qzTACO2lSQ6qn2NsfyxAblpluv3jxy1LxCk PvVkf7WIpoafLDRo9iKv7fA1hnC+fg+Scyv7J6BjmoWhkGhEzh1GIlr4DVeqdUwbH5i7 w0wns6I774MRKCcD0xcTSzekdbzsE5v4L7KeFqUKZJg6U8uLcT/2+UbbhO4jZsEI7ual kNC/JEeWBIOhMRKMnRtYzlIBsDxqqvkcahvMX1hTEtjCyG6mgvOq+Z4cLANDTwKiSEAi 1ZMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DChXguDILJX7hAfj1nv8VIcMQ6DAEI68Y7I8Xvc3k5g=; b=EdDg8LC5e6oF0FnEMiqxpEfpiFtBPxjHcsOXk9ru4ar3f8lEfqGPktlWpzwbzyReZW V8GY2XL2T4ezs2PGdPTs5VFTYXu/s7O1jGl0rd1XAT+kFXFT7ZZSgemj66omJ/B8nBlu RqDoO74nc8UQEv6Uk2kCB2kHpWhC7xblRq4CHMPVvDtMnoPhBj/wr6FeZxQUyJG4wyA7 PYFUkKA/DWKETn5aDNe1/0RqF28A4JJ3+9XNb2tDiJO1YI7oaicLHzbRAb/USh/Sp8Z6 H+FOCVAMNx33puaDUaw69CIotWlAx3EhKGpyFJswJvwhcL61chHBIgYFfHd2gf418imZ iksg== X-Gm-Message-State: AOAM5319XEOLVuDxzfnCwvUBuiL1ap3eVGU5KKZ/W4tM1XMyhE4iOhlM KQvRVe88+Y8XKoq0kvOt30jZH8uXV7g= X-Google-Smtp-Source: ABdhPJyvCAjtPXYmkJXrPwAi6nuBYIlmY9ARai2HUcw3XYGw+Jb8hIRClvdYPZgDmtDkEHXTfuawEQ== X-Received: by 2002:a05:6402:34c5:b0:411:f082:d69 with SMTP id w5-20020a05640234c500b00411f0820d69mr1813940edc.65.1645093219550; Thu, 17 Feb 2022 02:20:19 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 1/7] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration Date: Thu, 17 Feb 2022 11:19:18 +0100 Message-Id: <20220217101924.15347-2-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::52f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=shentey@gmail.com; helo=mail-ed1-x52f.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645093495877100001 Content-Type: text/plain; charset="utf-8" Based on commit e735b55a8c11dd455e31ccd4420e6c9485191d0c: piix_pci: eliminate PIIX3State::pci_irq_levels PIIX3State::pci_irq_levels are redundant which is already tracked by PCIBus layer. So eliminate them. The IRQ levels in the PCIBus layer are already preserved during migration. By reusing them and rather than having a redundant implementation the bug is avoided in the first place. Suggested-by: Peter Maydell Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell --- hw/mips/gt64xxx_pci.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index c7480bd019..4cbd0911f5 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1006,14 +1006,11 @@ static int gt64120_pci_map_irq(PCIDevice *pci_dev, = int irq_num) } } =20 -static int pci_irq_levels[4]; - static void gt64120_pci_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; qemu_irq *pic =3D opaque; - - pci_irq_levels[irq_num] =3D level; + PCIBus *bus =3D pci_get_bus(piix4_dev); =20 /* now we change the pic irq level according to the piix irq mappings = */ /* XXX: optimize */ @@ -1023,7 +1020,7 @@ static void gt64120_pci_set_irq(void *opaque, int irq= _num, int level) pic_level =3D 0; for (i =3D 0; i < 4; i++) { if (pic_irq =3D=3D piix4_dev->config[PIIX_PIRQCA + i]) { - pic_level |=3D pci_irq_levels[i]; + pic_level |=3D pci_bus_get_irq_level(bus, i); } } qemu_set_irq(pic[pic_irq], pic_level); --=20 2.35.1 From nobody Mon May 20 22:06:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645093495478951.5410486964257; Thu, 17 Feb 2022 02:24:55 -0800 (PST) Received: from localhost ([::1]:46330 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKdy1-0001LA-Ig for importer@patchew.org; Thu, 17 Feb 2022 05:24:53 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47274) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKdth-0006cq-Rc for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:25 -0500 Received: from [2a00:1450:4864:20::534] (port=43713 helo=mail-ed1-x534.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nKdte-0002ue-4N for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:24 -0500 Received: by mail-ed1-x534.google.com with SMTP id m3so2751796eda.10 for ; Thu, 17 Feb 2022 02:20:21 -0800 (PST) Received: from Provence.localdomain (dynamic-077-183-198-236.77.183.pool.telefonica.de. [77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kKdKAumc0RP1Q740UZngqkordg1LPYlH9vW3BgbqcX0=; b=CCe9ZPKTnwOAJ653rSyrLzTlGmIc/tTZQ6vfXQ8O1gWsfV4e7gIo2r41opvp1C1uRt 0eIwacowOzqaIiqY4JfFbWSvMb71ePGWjDAL64aoD0vto69CbA9cyYpP317ke23QWiUb aQk8u0skDX0/rO79BCbSwlwNpSTuSsy6heGREHqtGo7bSDYdHRAhT+jBh3WWpvX4GtAp 0n29tS+W0HmsGp2fNdVGRhW2nIDj/QCdlErZFvw101bfyqNLwD0QiTHvKsYuB4d+zhxn Jkf2Yh/3i4Po6QY8fZebFJwjkH3GvFCT0bdcWCIMKBB6HUymqgosjxl6i7nQOuc+U5pv bksw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kKdKAumc0RP1Q740UZngqkordg1LPYlH9vW3BgbqcX0=; b=ZCPAz2cfYN/XFYiIt/L2bvLyQounPCY+U8fQInNAHS7h4alTR4gqLwkvpgN9QpYRMp c9KH1sMB5j6D6pR2oN5sE2OdeMrWf8uZeGnGYfizh16zzptOD9uuoOluO3Ac2sG6FR+t +amLxtvtHdlQPQDjpATQl+lZKdxA+wSG8lgocGw4tfsV4GeSmMT8NvjA0iaVKF7Y63qx +xR1djhjtcCkRDZL+G4Hr0JnqLEvfnOWL55QMgYbTIOHhgGH65L3RixTBYb5SoMm6MLJ iXqoqBSm43wi00AwIm4dZQ1ATxg/cQCW7obk1BQtDCtJwdsaE9hc4iAZc+ecNzAftDMQ LSeQ== X-Gm-Message-State: AOAM530+j+zhuP4QBEkFA+p3IVgh4+jX64EmRfOwMNt0j6zBSpEJin7Z M3Rj6/gDZA8TkNKAyktUwSi+pJ6uayQ= X-Google-Smtp-Source: ABdhPJzytZCzZXtyxfkua/ytY/6NJSla4wcEp1MsTZxX3JL0sIYVIqI8cv88ULTF3Hckc1rPe+I6TQ== X-Received: by 2002:aa7:ca5a:0:b0:410:9259:2e6f with SMTP id j26-20020aa7ca5a000000b0041092592e6fmr1839577edt.105.1645093220452; Thu, 17 Feb 2022 02:20:20 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 2/7] malta: Move PCI interrupt handling from gt64xxx_pci to piix4 Date: Thu, 17 Feb 2022 11:19:19 +0100 Message-Id: <20220217101924.15347-3-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::534 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=shentey@gmail.com; helo=mail-ed1-x534.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645093497686100007 Handling PCI interrupts in piix4 increases cohesion and reduces differences between piix4 and piix3. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/piix4.c | 55 ++++++++++++++++++++++++++++++++++++++ hw/mips/gt64xxx_pci.c | 60 ++++-------------------------------------- hw/mips/malta.c | 6 +---- include/hw/mips/mips.h | 2 +- 4 files changed, 62 insertions(+), 61 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 0fe7b69bc4..196b56e69c 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -45,6 +45,7 @@ struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa; + qemu_irq i8259[ISA_NUM_IRQS]; =20 RTCState rtc; /* Reset Control Register */ @@ -54,6 +55,27 @@ struct PIIX4State { =20 OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) =20 +static void piix4_set_irq(void *opaque, int irq_num, int level) +{ + int i, pic_irq, pic_level; + qemu_irq *pic =3D opaque; + PCIBus *bus =3D pci_get_bus(piix4_dev); + + /* now we change the pic irq level according to the piix irq mappings = */ + /* XXX: optimize */ + pic_irq =3D piix4_dev->config[PIIX_PIRQCA + irq_num]; + if (pic_irq < 16) { + /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ + pic_level =3D 0; + for (i =3D 0; i < 4; i++) { + if (pic_irq =3D=3D piix4_dev->config[PIIX_PIRQCA + i]) { + pic_level |=3D pci_bus_get_irq_level(bus, i); + } + } + qemu_set_irq(pic[pic_irq], pic_level); + } +} + static void piix4_isa_reset(DeviceState *dev) { PIIX4State *d =3D PIIX4_PCI_DEVICE(dev); @@ -248,8 +270,34 @@ static void piix4_register_types(void) =20 type_init(piix4_register_types) =20 +static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) +{ + int slot; + + slot =3D PCI_SLOT(pci_dev->devfn); + + switch (slot) { + /* PIIX4 USB */ + case 10: + return 3; + /* AMD 79C973 Ethernet */ + case 11: + return 1; + /* Crystal 4281 Sound */ + case 12: + return 2; + /* PCI slot 1 to 4 */ + case 18 ... 21: + return ((slot - 18) + irq_num) & 0x03; + /* Unknown device, don't do any translation */ + default: + return irq_num; + } +} + DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s) { + PIIX4State *s; PCIDevice *pci; DeviceState *dev; int devfn =3D PCI_DEVFN(10, 0); @@ -257,6 +305,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa= _bus, I2CBus **smbus) pci =3D pci_create_simple_multifunction(pci_bus, devfn, true, TYPE_PIIX4_PCI_DEVICE); dev =3D DEVICE(pci); + s =3D PIIX4_PCI_DEVICE(pci); if (isa_bus) { *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); } @@ -271,5 +320,11 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **is= a_bus, I2CBus **smbus) NULL, 0, NULL); } =20 + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->i8259, 4); + + for (int i =3D 0; i < ISA_NUM_IRQS; i++) { + s->i8259[i] =3D qdev_get_gpio_in_named(dev, "isa", i); + } + return dev; } diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 4cbd0911f5..eb205d6d70 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -29,7 +29,6 @@ #include "hw/mips/mips.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" -#include "hw/southbridge/piix.h" #include "migration/vmstate.h" #include "hw/intc/i8259.h" #include "hw/irq.h" @@ -981,53 +980,6 @@ static const MemoryRegionOps isd_mem_ops =3D { }, }; =20 -static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num) -{ - int slot; - - slot =3D PCI_SLOT(pci_dev->devfn); - - switch (slot) { - /* PIIX4 USB */ - case 10: - return 3; - /* AMD 79C973 Ethernet */ - case 11: - return 1; - /* Crystal 4281 Sound */ - case 12: - return 2; - /* PCI slot 1 to 4 */ - case 18 ... 21: - return ((slot - 18) + irq_num) & 0x03; - /* Unknown device, don't do any translation */ - default: - return irq_num; - } -} - -static void gt64120_pci_set_irq(void *opaque, int irq_num, int level) -{ - int i, pic_irq, pic_level; - qemu_irq *pic =3D opaque; - PCIBus *bus =3D pci_get_bus(piix4_dev); - - /* now we change the pic irq level according to the piix irq mappings = */ - /* XXX: optimize */ - pic_irq =3D piix4_dev->config[PIIX_PIRQCA + irq_num]; - if (pic_irq < 16) { - /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ - pic_level =3D 0; - for (i =3D 0; i < 4; i++) { - if (pic_irq =3D=3D piix4_dev->config[PIIX_PIRQCA + i]) { - pic_level |=3D pci_bus_get_irq_level(bus, i); - } - } - qemu_set_irq(pic[pic_irq], pic_level); - } -} - - static void gt64120_reset(DeviceState *dev) { GT64120State *s =3D GT64120_PCI_HOST_BRIDGE(dev); @@ -1204,7 +1156,7 @@ static void gt64120_realize(DeviceState *dev, Error *= *errp) "gt64120-isd", 0x1000); } =20 -PCIBus *gt64120_register(qemu_irq *pic) +PCIBus *gt64120_register(void) { GT64120State *d; PCIHostState *phb; @@ -1215,12 +1167,10 @@ PCIBus *gt64120_register(qemu_irq *pic) phb =3D PCI_HOST_BRIDGE(dev); memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); - phb->bus =3D pci_register_root_bus(dev, "pci", - gt64120_pci_set_irq, gt64120_pci_map_= irq, - pic, - &d->pci0_mem, - get_system_io(), - PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); + phb->bus =3D pci_root_bus_new(dev, "pci", + &d->pci0_mem, + get_system_io(), + PCI_DEVFN(18, 0), TYPE_PCI_BUS); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); diff --git a/hw/mips/malta.c b/hw/mips/malta.c index b770b8d367..13254dbc89 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -97,7 +97,6 @@ struct MaltaState { =20 Clock *cpuclk; MIPSCPSState cps; - qemu_irq i8259[ISA_NUM_IRQS]; }; =20 static struct _loaderparams { @@ -1391,7 +1390,7 @@ void mips_malta_init(MachineState *machine) stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); =20 /* Northbridge */ - pci_bus =3D gt64120_register(s->i8259); + pci_bus =3D gt64120_register(); /* * The whole address space decoded by the GT-64120A doesn't generate * exception when accessing invalid memory. Create an empty slot to @@ -1404,9 +1403,6 @@ void mips_malta_init(MachineState *machine) =20 /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); - for (int i =3D 0; i < ISA_NUM_IRQS; i++) { - s->i8259[i] =3D qdev_get_gpio_in_named(dev, "isa", i); - } =20 /* generate SPD EEPROM data */ generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size); diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h index 6c9c8805f3..ff88942e63 100644 --- a/include/hw/mips/mips.h +++ b/include/hw/mips/mips.h @@ -10,7 +10,7 @@ #include "exec/memory.h" =20 /* gt64xxx.c */ -PCIBus *gt64120_register(qemu_irq *pic); +PCIBus *gt64120_register(void); =20 /* bonito.c */ PCIBus *bonito_init(qemu_irq *pic); --=20 2.35.1 From nobody Mon May 20 22:06:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645093799087426.6498540419582; Thu, 17 Feb 2022 02:29:59 -0800 (PST) Received: from localhost ([::1]:54724 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKe2w-0007D8-RR for importer@patchew.org; Thu, 17 Feb 2022 05:29:58 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47272) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKdth-0006cP-Lx for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:25 -0500 Received: from [2a00:1450:4864:20::530] (port=42592 helo=mail-ed1-x530.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nKdtf-0002v2-1K for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:25 -0500 Received: by mail-ed1-x530.google.com with SMTP id i11so7081642eda.9 for ; Thu, 17 Feb 2022 02:20:22 -0800 (PST) Received: from Provence.localdomain (dynamic-077-183-198-236.77.183.pool.telefonica.de. [77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oPo1LMB8EjG1PKoS7SlXIi3cecxwyMrfD2W0YBpiTmQ=; b=SUDeAihqN00OmUM1xdaStiOmlN4tnbim5qRwGyIKiIIW26NAL7G3EteV0xKt/B/PX0 lwpM301tPUF2N4W44UpOKTThejRuPKKDRLDm6rGmbapd3JSbcwH3gQYyAgJKzjMnvfC3 PVhfBueP/+2oMBmS65mqWwbfkbLBtIwror4IPfyGnuPZhozIJElDhp/pxMQQay7918C+ WJ1wBT70paG3klariMxRePGZSqlsQ58FY/1W9mxJbaLvXEikxDuxH4AnUWxteNQFOtuc gga4q+xxr7pgv20rMsF2sWeFQAc2cy99td0SaATEUsUA0u3AxnSlI0/7uOabPUIPrC/3 Yr2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oPo1LMB8EjG1PKoS7SlXIi3cecxwyMrfD2W0YBpiTmQ=; b=HioVKEX+ZHyHVYZgUH5UOWcsuwNKhv/R/bWkjnDmJO1fgYkXhPht32BtVg+PpL/zxY su9ri74RN/Y1OMy6IdlG01Rx7BpC8Ts01RjG/a8TgxvJI4a7/ZoIKTMhFAKpdVe8WSzM sG48iIaBTouWoftrWBvtqwhHgR406/33Kmf7LUrEi7wd67mHS6gWex1HBjCktA8MFziP dsb4u3Ny6avfSBk/SgamKkC8zGlJ3FxvKwOcb7QTbd1WLO/0qrlaP5nkVNSIVcLJeN2Z hci0skHWcYqPo7h1yV9J76K1xm7HcdCKCx3QDlis0uXUzmzepzrdkOiXuDXo+EyUinlZ 6VZg== X-Gm-Message-State: AOAM531trI52WtROF2IHBaOFYbSoXbVEJvdbVDLQwy2lFhouExMvnuDJ I7L6FBx2SVATD2q4M782FqlMaBE8QAU= X-Google-Smtp-Source: ABdhPJyGJooTDpFvQR2bet5NgkIx3+F7JTUIaWrAIIkJE/nNDFC4zO3Dnq/3/HiyOXbObx4s1GMuLw== X-Received: by 2002:a05:6402:430f:b0:410:a082:c6da with SMTP id m15-20020a056402430f00b00410a082c6damr1812566edc.438.1645093221585; Thu, 17 Feb 2022 02:20:21 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 3/7] hw/isa/piix4: Resolve redundant i8259[] attribute Date: Thu, 17 Feb 2022 11:19:20 +0100 Message-Id: <20220217101924.15347-4-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::530 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=shentey@gmail.com; helo=mail-ed1-x530.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645093801726100003 This is a follow-up on patch "malta: Move PCI interrupt handling from gt64xxx_pci to piix4" where i8259[] was moved from MaltaState to PIIX4State to make the code movement more obvious. However, i8259[] seems redundant to *isa, so remove it. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael S. Tsirkin --- hw/isa/piix4.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 196b56e69c..179968b18e 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -45,7 +45,6 @@ struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa; - qemu_irq i8259[ISA_NUM_IRQS]; =20 RTCState rtc; /* Reset Control Register */ @@ -320,11 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **is= a_bus, I2CBus **smbus) NULL, 0, NULL); } =20 - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->i8259, 4); - - for (int i =3D 0; i < ISA_NUM_IRQS; i++) { - s->i8259[i] =3D qdev_get_gpio_in_named(dev, "isa", i); - } + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); =20 return dev; } --=20 2.35.1 From nobody Mon May 20 22:06:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645094145718221.34826417645354; Thu, 17 Feb 2022 02:35:45 -0800 (PST) Received: from localhost ([::1]:33864 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKe8W-0003tj-4M for importer@patchew.org; Thu, 17 Feb 2022 05:35:44 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47288) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKdti-0006dp-Es for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:26 -0500 Received: from [2a00:1450:4864:20::633] (port=37665 helo=mail-ej1-x633.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nKdtg-0002vH-2Z for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:26 -0500 Received: by mail-ej1-x633.google.com with SMTP id bg10so6050514ejb.4 for ; Thu, 17 Feb 2022 02:20:23 -0800 (PST) Received: from Provence.localdomain (dynamic-077-183-198-236.77.183.pool.telefonica.de. [77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fv04+POlH5pIZx0q4PgvkVhFNcEbQGNzNkVBRpZhCes=; b=AMKECsLBLaWMLDAVvx8OFqMHE4hT+vQbX/DJva8abJHK8jymbdIpueKbbX34Y6xgj4 atU908bH7PKp6hC5GwwsmnPoNqteKSg7G1rXmKhtmtpNSrQCDLZZA0BCXqsU8aegXhVy y8/Gq6iQdaOop18sc+C6O1zXLNDFlTzVyVjmVVf/P4Ze8eDpeFZMnyAMuvSJWo6QeOyt cvNIeLR3u4a1d8LU9U5N6D1Rv1YzIpfHefLHVKA6uy3JLyBxzkTZ69B8m7VlLRoaVeHz 6a6LBxhNkOc3zTyy77pe9Bpst0xGxWeKzyE5XuBKYWUawx7DHRmWLfWeV8Sd9OC2AaFk hlfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fv04+POlH5pIZx0q4PgvkVhFNcEbQGNzNkVBRpZhCes=; b=uwlsCktRzR7aS8U1SrNRC1/u10sYMccvY2xbzO0xL7gUr8kLiHuZEbTyEGPMgWuDte Rw/UsEe2jze4XeTp2mhudLDBYwm78xLN2eMZXjnV0f+5DBDqPARnv6JUnZq98RNZrCVc uDH8iBppMdbyrdG0vi4om8av+HTa1/yENV85o5umnkZFd0RiuuhUt2LLTg4Qx9S1IuUN Xa+GTBUU41lRwD8N1i1A5EcE4mvsDtmGvtz2zEnyHBvabzKLtEWZF3FdYJspqBsTNFlR /RPAQ4IC2AIwjMNFolNKaiPHSJLimSp98H0k/YjWIC/uHQzTTM1ltZEMO1sYVYcZj6Wr ejIw== X-Gm-Message-State: AOAM533V0v8pn0EoDmtD45VQ37f3HnjbJXvpG+a9+zYblhGo3RGevP7L p66W5stpQz0bKCuoqhtvB19/r+cOdnk= X-Google-Smtp-Source: ABdhPJyro3cxSabVTKFUECMmsJQKligVF9AYMfLgzlnFcLxQaG4ItGVXC9rLqqBzKDIedjpfm7ziNg== X-Received: by 2002:a17:906:7852:b0:6ce:88f5:4dc9 with SMTP id p18-20020a170906785200b006ce88f54dc9mr1793719ejm.491.1645093222600; Thu, 17 Feb 2022 02:20:22 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 4/7] hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq() Date: Thu, 17 Feb 2022 11:19:21 +0100 Message-Id: <20220217101924.15347-5-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::633 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=shentey@gmail.com; helo=mail-ej1-x633.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Michael S . Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645094148235100001 Passing PIIX4State rather than just the qemu_irq allows for resolving the global piix4_dev variable. Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael S. Tsirkin --- hw/isa/piix4.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 179968b18e..caa2002e2c 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -57,7 +57,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) static void piix4_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; - qemu_irq *pic =3D opaque; + PIIX4State *s =3D opaque; PCIBus *bus =3D pci_get_bus(piix4_dev); =20 /* now we change the pic irq level according to the piix irq mappings = */ @@ -71,7 +71,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int = level) pic_level |=3D pci_bus_get_irq_level(bus, i); } } - qemu_set_irq(pic[pic_irq], pic_level); + qemu_set_irq(s->isa[pic_irq], pic_level); } } =20 @@ -319,7 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa= _bus, I2CBus **smbus) NULL, 0, NULL); } =20 - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); =20 return dev; } --=20 2.35.1 From nobody Mon May 20 22:06:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645093495640258.01406185784424; Thu, 17 Feb 2022 02:24:55 -0800 (PST) Received: from localhost ([::1]:46626 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKdy2-0001X6-GT for importer@patchew.org; Thu, 17 Feb 2022 05:24:54 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47318) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKdtm-0006hm-9F for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:30 -0500 Received: from [2a00:1450:4864:20::636] (port=37668 helo=mail-ej1-x636.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nKdti-0002wO-2V for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:29 -0500 Received: by mail-ej1-x636.google.com with SMTP id bg10so6050672ejb.4 for ; Thu, 17 Feb 2022 02:20:24 -0800 (PST) Received: from Provence.localdomain (dynamic-077-183-198-236.77.183.pool.telefonica.de. [77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KELY3CAB4d07BDetRGotYwvw76oRR8+YLOX5VD+ZX1E=; b=ptToxxTlCEleYMg563kof57b1qb0w3ByJs3n23JG1NUJyXM6ewm2HPsZWg38cQksY5 KX8vsoNZqerArcznS8C9Alu4iUVSmVHv07BRyKBQCnFoGMksYRxVEG+4Z1IxBB5MWtSJ PRFmxlyONu95M2GZEVhWmf+HQLxMwHjfrzRl6okuvfAbsOL8jvpZKnkZs088P1RvaPeq Je+SbiT7DdKr23Z2x90OzvLSiM/qHKAYPs9gQWENXQWadgwgqXGlzgQDUhRcH/GZokqZ w5d94xKkaqnwHOkFq7ZsVhcWqfpB2es7o+UbjzYrxaIv3ciuhZ1euRe8FyiuzNP0jvaT r8YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KELY3CAB4d07BDetRGotYwvw76oRR8+YLOX5VD+ZX1E=; b=bpeScxlI/Tt2q5CcJi3Cs0U5NEZNHL8eRG7y7NfkjQP3j5w7iyHgvr8hzzvss34Sat +Hn6HV6GpLqad9IZH6Ddy03Z4izewcG64WImXe+HwtMGgbn951LjyNUV8Op/2Ct7nSns hJBzoubW3HuTrroQGeCJMNzH4cWuumtgnG1fQY2rqe2dp5XxcuYP97CtcQAuDdZdT4N7 ENwK0AS60zagCGAz/uvnEJ7txD9YDqwZ2Hn46m59aSmA281ylxY/NuSYxwvmQ0f1d5YU 5Ygn0rV0UD78pyJhVtjqV0dSfGikHTgRCxauSUVPcQ/h34UyxlwLooahRAlYtcE3U2Wh ZGQQ== X-Gm-Message-State: AOAM530sNHxykPPaC7Tp0EkXuqNWBABcH7VJv4x1IohDHp9zIc908aPp zpKHLG+QZUgrll+tljyr9rbM8cmhMY0= X-Google-Smtp-Source: ABdhPJy7f3c0tV3u87stU3tUfVs8VN5Qtz2B7415uVbuQFqxgsD6pLdNesjwNJzzNr6E4adIBegvZg== X-Received: by 2002:a17:906:7746:b0:6ce:a12e:489f with SMTP id o6-20020a170906774600b006cea12e489fmr1670997ejn.551.1645093223644; Thu, 17 Feb 2022 02:20:23 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 5/7] hw/isa/piix4: Resolve global instance variable Date: Thu, 17 Feb 2022 11:19:22 +0100 Message-Id: <20220217101924.15347-6-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::636 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=shentey@gmail.com; helo=mail-ej1-x636.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645094399545100001 Now that piix4_set_irq's opaque parameter references own PIIX4State, piix4_dev becomes redundant. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael S. Tsirkin --- hw/isa/piix4.c | 10 +++------- include/hw/southbridge/piix.h | 2 -- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index caa2002e2c..2e9b5ccada 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -39,8 +39,6 @@ #include "sysemu/runstate.h" #include "qom/object.h" =20 -PCIDevice *piix4_dev; - struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; @@ -58,16 +56,16 @@ static void piix4_set_irq(void *opaque, int irq_num, in= t level) { int i, pic_irq, pic_level; PIIX4State *s =3D opaque; - PCIBus *bus =3D pci_get_bus(piix4_dev); + PCIBus *bus =3D pci_get_bus(&s->dev); =20 /* now we change the pic irq level according to the piix irq mappings = */ /* XXX: optimize */ - pic_irq =3D piix4_dev->config[PIIX_PIRQCA + irq_num]; + pic_irq =3D s->dev.config[PIIX_PIRQCA + irq_num]; if (pic_irq < 16) { /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ pic_level =3D 0; for (i =3D 0; i < 4; i++) { - if (pic_irq =3D=3D piix4_dev->config[PIIX_PIRQCA + i]) { + if (pic_irq =3D=3D s->dev.config[PIIX_PIRQCA + i]) { pic_level |=3D pci_bus_get_irq_level(bus, i); } } @@ -219,8 +217,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ); - - piix4_dev =3D dev; } =20 static void piix4_init(Object *obj) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 6387f2b612..f63f83e5c6 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -70,8 +70,6 @@ typedef struct PIIXState PIIX3State; DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, TYPE_PIIX3_PCI_DEVICE) =20 -extern PCIDevice *piix4_dev; - PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); =20 DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s); --=20 2.35.1 From nobody Mon May 20 22:06:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164509427796274.36015428034511; Thu, 17 Feb 2022 02:37:57 -0800 (PST) Received: from localhost ([::1]:37026 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKeAe-00062L-WA for importer@patchew.org; Thu, 17 Feb 2022 05:37:57 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47358) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKdtn-0006mD-V8 for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:31 -0500 Received: from [2a00:1450:4864:20::62f] (port=45654 helo=mail-ej1-x62f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nKdti-0002xX-FU for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:31 -0500 Received: by mail-ej1-x62f.google.com with SMTP id lw4so5977164ejb.12 for ; Thu, 17 Feb 2022 02:20:26 -0800 (PST) Received: from Provence.localdomain (dynamic-077-183-198-236.77.183.pool.telefonica.de. [77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FjZmcHcFQKseAEVMH4Ldpagp8bK5okxSN4jEauQ21es=; b=T/zdlWgqFdWgjcvqcxQbDRYX4+f9EoDx0XsHHhsO26b5pOQQk3qzfpi/8UPF5uBkW1 hAVOdrC0xuqPUTVGnzuY3RleCqHD+a/SWgzBHc9u1VSSKBYbOd/pK8XWxjY0K9dnNEJs qfAmxZx0oMosOEVj/FnNIgiU5AIOe779G2OyMu+4Ck61osOrloU6DitJtSDL0OT4yACT 5NisdHeXXQFDiKBLjAHz0XtqtdTbtapHpBB9GZpX/H75a44p7wrCHhptRbsdi1miUGil Z3bXV+d8psQ5K4JlnDgIhR4KPjvcUzkQQ6zt0yzk2sUNyy2feGwZSxUNgM3vUtfZCedR sVnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FjZmcHcFQKseAEVMH4Ldpagp8bK5okxSN4jEauQ21es=; b=WQIcD7EEiwyFukynROo1FXzIvykZoTvgYXaNCQCMVsMlSUqbVgn7IG2InNtyUXQHXq 1ZH/afb6wLXQY8w3/AilNuHHuQB0lzLABcrr2KB0ox5jvwn3rsW+pR8+Uc22NDE7PaSf SrOSp0uAip0+SLA+VtgOBuWj2g3VQi70m6zvhLICXO6HtS/8pkAkEfheKg+cKI4n8U2W Ik6Wyz2lm3f908wxxVjT0xzb6Vvk7WN7n2zUaWUobuGy7JfQICPOqoLS3GS9LYmziVZP ezoASuhGP7aVr/h9etm85A2qlXIcLYmbRpAj3mY0RqyqJB77JmWztgbB5esBU2qWqXL3 a11Q== X-Gm-Message-State: AOAM530K9y+ssuAZI8EYX2RKbJldGIFhShdLXZP13UcIAfDuleiX2Fck RPw5TpHU8K7FumNaKntlExCLtj5016g= X-Google-Smtp-Source: ABdhPJzzmAg+CrxJh8DQsa0IZkMhEbsQqZsVyZx4lKAgXWuYgael47xlOO47u4uznbQpqo4PDO5Ekw== X-Received: by 2002:a17:906:bc46:b0:6cd:e855:18fc with SMTP id s6-20020a170906bc4600b006cde85518fcmr1703398ejv.263.1645093225042; Thu, 17 Feb 2022 02:20:25 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 6/7] hw/isa/piix4: Replace some magic IRQ constants Date: Thu, 17 Feb 2022 11:19:23 +0100 Message-Id: <20220217101924.15347-7-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::62f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=shentey@gmail.com; helo=mail-ej1-x62f.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645094278639100001 This is a follow-up on patch "malta: Move PCI interrupt handling from gt64xxx_pci to piix4". gt64xxx_pci used magic constants, and probably didn't want to use piix4-specific constants. Now that the interrupt handing resides in piix4, its constants can be used. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael S. Tsirkin --- hw/isa/piix4.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 2e9b5ccada..f876c71750 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -61,10 +61,10 @@ static void piix4_set_irq(void *opaque, int irq_num, in= t level) /* now we change the pic irq level according to the piix irq mappings = */ /* XXX: optimize */ pic_irq =3D s->dev.config[PIIX_PIRQCA + irq_num]; - if (pic_irq < 16) { + if (pic_irq < ISA_NUM_IRQS) { /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ pic_level =3D 0; - for (i =3D 0; i < 4; i++) { + for (i =3D 0; i < PIIX_NUM_PIRQS; i++) { if (pic_irq =3D=3D s->dev.config[PIIX_PIRQCA + i]) { pic_level |=3D pci_bus_get_irq_level(bus, i); } @@ -315,7 +315,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa= _bus, I2CBus **smbus) NULL, 0, NULL); } =20 - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PI= RQS); =20 return dev; } --=20 2.35.1 From nobody Mon May 20 22:06:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1645093801861815.5109937080576; Thu, 17 Feb 2022 02:30:01 -0800 (PST) Received: from localhost ([::1]:54946 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKe2y-0007MP-MR for importer@patchew.org; Thu, 17 Feb 2022 05:30:00 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47360) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKdtn-0006mb-WC for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:32 -0500 Received: from [2a00:1450:4864:20::530] (port=39913 helo=mail-ed1-x530.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nKdtl-0002zH-VT for qemu-devel@nongnu.org; Thu, 17 Feb 2022 05:20:31 -0500 Received: by mail-ed1-x530.google.com with SMTP id u18so8725308edt.6 for ; Thu, 17 Feb 2022 02:20:26 -0800 (PST) Received: from Provence.localdomain (dynamic-077-183-198-236.77.183.pool.telefonica.de. [77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/2H6Kju1HQIwMzyjyD2tOtStIN9FFUqCW7TnSzlxvNo=; b=C83SScQnuijwIs+sxGoIGan320fIM+Fql98aXbBhhd8XqmL/eacEMw3t80GAD+ZfZu mCAWmGWEz46maeJSvsnfq6DRJOy5p/TQvq00iBRNkZ2/RkAF/O7B+zWSeIVErHssUrXu recGwtXbUsYfMT/bykUaUst3YEHo5nk2vlGeDK4QkD1wSGk3F9WeQllYWaPpzh5OyzXr Dlu1QxOV5u84em853W82A0k5PH5PF8ofBjHt3VJt7LqX00J8IrwRV8l78C+F4/gJl5Lj vrDZqAyiWL0iUlpw4+A9Qo8ux5cfkwB8mHY6ZO41DTdkWNrFkO5EWaEcr/JS0kL51bof tI9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/2H6Kju1HQIwMzyjyD2tOtStIN9FFUqCW7TnSzlxvNo=; b=gHPG+UwL+079z8Y5A8zSCh4eyz95sXbE12dZXtZ46zbHItIvrt/WPACR+GeBZzLWcI Ngq+4fyo/U9eK+4rbfVDTn9/W6uyIXmlG9Qr5mqQrxDAcCBhleuI43MAsvdbg/7jywc/ ba+JZHxGuZTBsDvBQqZlpjKIYaFFtoR3l4fZVvCxGc0ZjPR9MQBXrf8DrJfsAFbIFsoi ekkpa5SUZWbIz7m72ngwTkSzsNAG2TMVp+gY7bgvsTHxuQiVWHETW0fOoq/gIIyn+MBk sAj024khTNE1rCHkO43LMXN8gQSxczSS+iQtFp7KBo0POCrRnDWfTU4vjvIdtKY1r+oq 6FEQ== X-Gm-Message-State: AOAM5312LF7O/tk0gZdOH4TECw729k8kRCYorey6YtEiQlkPM+e0mUSo VZOPPUc+rLD0XY8Y/mjjqzHA4nYwH/c= X-Google-Smtp-Source: ABdhPJykH1nFZD7E35U4cK6Elai4sg8YfiNZYTRQSYyL93VNRuxN+vurCpu9UAsvZjy6vaAMAA4voQ== X-Received: by 2002:a50:ba8e:0:b0:410:a99c:4c3b with SMTP id x14-20020a50ba8e000000b00410a99c4c3bmr1852663ede.427.1645093225944; Thu, 17 Feb 2022 02:20:25 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 7/7] hw/mips/gt64xxx_pci: Resolve gt64120_register() Date: Thu, 17 Feb 2022 11:19:24 +0100 Message-Id: <20220217101924.15347-8-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::530 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=shentey@gmail.com; helo=mail-ed1-x530.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1645093803404100005 Now that gt64120_register() lost its pic parameter, there is an opportunity to remove it. gt64120_register() is old style by wrapping qdev API, and the new style is to use qdev directly. So take the opportunity and modernize the code. Suggested-by: BALATON Zoltan Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 21 ++++----------------- hw/mips/malta.c | 3 ++- include/hw/mips/mips.h | 3 --- 3 files changed, 6 insertions(+), 21 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index eb205d6d70..e0ff1b5566 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -26,7 +26,6 @@ #include "qapi/error.h" #include "qemu/units.h" #include "qemu/log.h" -#include "hw/mips/mips.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "migration/vmstate.h" @@ -1151,30 +1150,18 @@ static void gt64120_reset(DeviceState *dev) static void gt64120_realize(DeviceState *dev, Error **errp) { GT64120State *s =3D GT64120_PCI_HOST_BRIDGE(dev); + PCIHostState *phb =3D PCI_HOST_BRIDGE(dev); =20 memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, "gt64120-isd", 0x1000); -} - -PCIBus *gt64120_register(void) -{ - GT64120State *d; - PCIHostState *phb; - DeviceState *dev; - - dev =3D qdev_new(TYPE_GT64120_PCI_HOST_BRIDGE); - d =3D GT64120_PCI_HOST_BRIDGE(dev); - phb =3D PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); - address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); + memory_region_init(&s->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); + address_space_init(&s->pci0_mem_as, &s->pci0_mem, "pci0-mem"); phb->bus =3D pci_root_bus_new(dev, "pci", - &d->pci0_mem, + &s->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), TYPE_PCI_BUS); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); - return phb->bus; } =20 static void gt64120_pci_realize(PCIDevice *d, Error **errp) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 13254dbc89..55037eb90f 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1390,7 +1390,8 @@ void mips_malta_init(MachineState *machine) stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); =20 /* Northbridge */ - pci_bus =3D gt64120_register(); + dev =3D sysbus_create_simple("gt64120", -1, NULL); + pci_bus =3D PCI_BUS(qdev_get_child_bus(dev, "pci")); /* * The whole address space decoded by the GT-64120A doesn't generate * exception when accessing invalid memory. Create an empty slot to diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h index ff88942e63..101799f7d3 100644 --- a/include/hw/mips/mips.h +++ b/include/hw/mips/mips.h @@ -9,9 +9,6 @@ =20 #include "exec/memory.h" =20 -/* gt64xxx.c */ -PCIBus *gt64120_register(void); - /* bonito.c */ PCIBus *bonito_init(qemu_irq *pic); =20 --=20 2.35.1