From nobody Sun Feb 8 00:39:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1644604600774640.2885933434565; Fri, 11 Feb 2022 10:36:40 -0800 (PST) Received: from localhost ([::1]:53190 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nIamd-0006mJ-Ez for importer@patchew.org; Fri, 11 Feb 2022 13:36:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:56478) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nIakL-0004FA-Jv; Fri, 11 Feb 2022 13:34:17 -0500 Received: from [2607:f8b0:4864:20::22c] (port=38879 helo=mail-oi1-x22c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nIakJ-00046V-DS; Fri, 11 Feb 2022 13:34:17 -0500 Received: by mail-oi1-x22c.google.com with SMTP id u13so10526858oie.5; Fri, 11 Feb 2022 10:34:14 -0800 (PST) Received: from rekt.COMFAST ([191.205.140.35]) by smtp.gmail.com with ESMTPSA id t22sm10008145oiw.2.2022.02.11.10.34.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Feb 2022 10:34:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GpJuGvr7mh5zyLB3hjnj75ImlfXDY9lwn6KVAYwwpKs=; b=KsQElMC5DVO7/TjaYzWTZaqJBZxNjY4xByinJeHNIyOyYl9+TGIq55pCFywykXzsrx qtEN2KE9WYL3RnWhRDwlofoRS0QKXgLrzKnOzaJZ1lB0+UiZsl/oFWvBN1D3Vt9XQ+KM +WrDJziiHPNjxWGKDsPFA+EOMsf1uxDzamNbYkhJD/1sYKfMuuRE2/OTwBmFRqWYPkRg vXNTmpKIAh0aJqAkVKLq77WwP1qRnPXTtsCyuvtitQ0IoGPxPMEly8kScST11qpBjDYX AbA7TFbUV9KQsGb9U1TgojHJMCYwsoo+s+3hOLQxUjniY9UOdenD2Ij3oKmdVNvinsbt StwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GpJuGvr7mh5zyLB3hjnj75ImlfXDY9lwn6KVAYwwpKs=; b=5Vk9EBOUikKRF2S7niY7F4KhTBLjk6I+3096AGnKNp+/Et+naIiBVOxFlYz8oUhjTO y5xNzXYigwzNtHAmokbCcwKdgoUOD3ZNSlLuTvQcIsmz3pDUBMVgI90e5erz5bl3fZaI K/177sRpcSmFxqJtV+b4QCAz6dMOm1jXRYDnwiXmymtYe8n/gzdqzaHyu16S25qa3Gn3 VAU4bW1NJcWUSFFn4j6+wWZ+4hagQWxAxjY5atO1VNP2loNW+w8xmEiHEEC0o6cb3SSg Yu1WBzJxmJRurWvVaYnuvQqfbqOFxq8M1wY7wsJWN4qynLzuhIo6BcuAitmKAuMdKU0g fjMg== X-Gm-Message-State: AOAM533TKcZVkA5Ab1VoV+R4J7855tmGbLKa3wmKR1suW4oaZLp5rdyK exk45fJpOFVHcIe/aUC6T+IOUQ1rJhs= X-Google-Smtp-Source: ABdhPJzcX3oEUhaGLaTf/Lp98hSsO3+sVTnEKgrfTM8IPDm5gLhHcKXmhzvoW4C9UTZOwwJgJHxtpQ== X-Received: by 2002:a05:6808:148e:: with SMTP id e14mr855318oiw.180.1644604453898; Fri, 11 Feb 2022 10:34:13 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v11 1/4] target/ppc: fix indent of function parameters Date: Fri, 11 Feb 2022 15:33:51 -0300 Message-Id: <20220211183354.563602-2-danielhb413@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220211183354.563602-1-danielhb413@gmail.com> References: <20220211183354.563602-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::22c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22c; envelope-from=danielhb413@gmail.com; helo=mail-oi1-x22c.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1644604602350100002 Content-Type: text/plain; charset="utf-8" Fix indentation of powerpc_set_excp_state() and ppc_excp_apply_ail() parameters. Reviewed-by: David Gibson Signed-off-by: Daniel Henrique Barboza --- target/ppc/excp_helper.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index c107953dec..8a49a4ab90 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -265,9 +265,9 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCSta= te *env, int excp, * +--------------------------------------------------------------------+ */ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp_model, int excp, - target_ulong msr, - target_ulong *new_msr, - target_ulong *vector) + target_ulong msr, + target_ulong *new_msr, + target_ulong *vector) { #if defined(TARGET_PPC64) CPUPPCState *env =3D &cpu->env; @@ -362,7 +362,7 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int exc= p_model, int excp, } =20 static void powerpc_set_excp_state(PowerPCCPU *cpu, - target_ulong vector, target_ulon= g msr) + target_ulong vector, target_ulong msr) { CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; --=20 2.34.1 From nobody Sun Feb 8 00:39:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164460460023268.3515755933496; Fri, 11 Feb 2022 10:36:40 -0800 (PST) Received: from localhost ([::1]:53164 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nIamc-0006lc-Gu for importer@patchew.org; Fri, 11 Feb 2022 13:36:38 -0500 Received: from eggs.gnu.org ([209.51.188.92]:56492) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nIakN-0004Ge-Nc; Fri, 11 Feb 2022 13:34:19 -0500 Received: from [2607:f8b0:4864:20::235] (port=34537 helo=mail-oi1-x235.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nIakL-00046n-FQ; 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charset="utf-8" There are still PMU exclusive bits to handle in fire_PMC_interrupt() before implementing the EBB support. Let's finalize it now to avoid dealing with PMU and EBB logic at the same time in the next patches. fire_PMC_interrupt() will fire an Performance Monitor alert depending on MMCR0_PMAE. If we are required to freeze the timers (MMCR0_FCECE) we'll also need to update summaries and delete the existing overflow timers. In all cases we're going to update the cycle counters. Signed-off-by: Daniel Henrique Barboza --- target/ppc/power8-pmu.c | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index 236e8e66e9..d245663158 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -222,6 +222,20 @@ static void pmu_update_overflow_timers(CPUPPCState *en= v) } } =20 +static void pmu_delete_timers(CPUPPCState *env) +{ + QEMUTimer *pmc_overflow_timer; + int sprn; + + for (sprn =3D SPR_POWER_PMC1; sprn <=3D SPR_POWER_PMC6; sprn++) { + pmc_overflow_timer =3D get_cyc_overflow_timer(env, sprn); + + if (pmc_overflow_timer) { + timer_del(pmc_overflow_timer); + } + } +} + void helper_store_mmcr0(CPUPPCState *env, target_ulong value) { bool hflags_pmcc0 =3D (value & MMCR0_PMCC0) !=3D 0; @@ -271,8 +285,26 @@ static void fire_PMC_interrupt(PowerPCCPU *cpu) { CPUPPCState *env =3D &cpu->env; =20 - if (!(env->spr[SPR_POWER_MMCR0] & MMCR0_EBE)) { - return; + pmu_update_cycles(env); + + if (env->spr[SPR_POWER_MMCR0] & MMCR0_FCECE) { + env->spr[SPR_POWER_MMCR0] &=3D ~MMCR0_FCECE; + env->spr[SPR_POWER_MMCR0] |=3D MMCR0_FC; + + /* Changing MMCR0_FC requires a new HFLAGS_INSN_CNT calc */ + pmu_update_summaries(env); + + /* + * Delete all pending timers if we need to freeze + * the PMC. We'll restart them when the PMC starts + * running again. + */ + pmu_delete_timers(env); + } + + if (env->spr[SPR_POWER_MMCR0] & MMCR0_PMAE) { + env->spr[SPR_POWER_MMCR0] &=3D ~MMCR0_PMAE; + env->spr[SPR_POWER_MMCR0] |=3D MMCR0_PMAO; } =20 /* PMC interrupt not implemented yet */ --=20 2.34.1 From nobody Sun Feb 8 00:39:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16446052358931019.6178221331247; Fri, 11 Feb 2022 10:47:15 -0800 (PST) Received: from localhost ([::1]:60234 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nIaws-0003Nt-Cj for importer@patchew.org; Fri, 11 Feb 2022 13:47:14 -0500 Received: from eggs.gnu.org ([209.51.188.92]:56520) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nIakQ-0004LH-5X; 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charset="utf-8" PPC_INTERRUPT_EBB is a new interrupt that will be used to deliver EBB exceptions that had to be postponed because the thread wasn't in problem state at the time the event-based branch was supposed to occur. ISA 3.1 also defines two EBB exceptions: Performance Monitor EBB exception and External EBB exception. They are being added as POWERPC_EXCP_PERFM_EBB and POWERPC_EXCP_EXTERNAL_EBB. PPC_INTERRUPT_EBB will check BESCR bits to see the EBB type that occurred and trigger the appropriate exception. Both exceptions are doing the same thing in this first implementation: clear BESCR_GE and enter the branch with env->nip retrieved from SPR_EBBHR. The checks being done by the interrupt code are msr_pr and BESCR_GE states. All other checks (EBB facility check, BESCR_PME bit, specific bits related to the event type) must be done beforehand. Signed-off-by: Daniel Henrique Barboza Reviewed-by: C=C3=A9dric Le Goater --- target/ppc/cpu.h | 5 ++++- target/ppc/cpu_init.c | 4 ++++ target/ppc/excp_helper.c | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 41 insertions(+), 1 deletion(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index dcd83b503c..3962c8f6f4 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -129,8 +129,10 @@ enum { /* ISA 3.00 additions */ POWERPC_EXCP_HVIRT =3D 101, POWERPC_EXCP_SYSCALL_VECTORED =3D 102, /* scv exception = */ + POWERPC_EXCP_PERFM_EBB =3D 103, /* Performance Monitor EBB Exceptio= n */ + POWERPC_EXCP_EXTERNAL_EBB =3D 104, /* External EBB Exception = */ /* EOL = */ - POWERPC_EXCP_NB =3D 103, + POWERPC_EXCP_NB =3D 105, /* QEMU exceptions: special cases we want to stop translation = */ POWERPC_EXCP_SYSCALL_USER =3D 0x203, /* System call in user mode only = */ }; @@ -2453,6 +2455,7 @@ enum { PPC_INTERRUPT_HMI, /* Hypervisor Maintenance interrupt */ PPC_INTERRUPT_HDOORBELL, /* Hypervisor Doorbell interrupt = */ PPC_INTERRUPT_HVIRT, /* Hypervisor virtualization interrupt = */ + PPC_INTERRUPT_EBB, /* Event-based Branch exception = */ }; =20 /* Processor Compatibility mask (PCR) */ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index bf60529d37..136d8ca8b5 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -2336,6 +2336,10 @@ static void init_excp_POWER8(CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_FU] =3D 0x00000F60; env->excp_vectors[POWERPC_EXCP_HV_FU] =3D 0x00000F80; env->excp_vectors[POWERPC_EXCP_SDOOR_HV] =3D 0x00000E80; + + /* Userland exceptions without vector value in PowerISA v3.1 */ + env->excp_vectors[POWERPC_EXCP_PERFM_EBB] =3D 0x0; + env->excp_vectors[POWERPC_EXCP_EXTERNAL_EBB] =3D 0x0; #endif } =20 diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 8a49a4ab90..ad40a0f8e6 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -990,6 +990,21 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int ex= cp) new_msr |=3D (target_ulong)MSR_HVB; new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); break; + case POWERPC_EXCP_PERFM_EBB: /* Performance Monitor EBB Excepti= on */ + case POWERPC_EXCP_EXTERNAL_EBB: /* External EBB Exception = */ + env->spr[SPR_BESCR] &=3D ~BESCR_GE; + + /* + * Save NIP for rfebb insn in SPR_EBBRR. Next nip is + * stored in the EBB Handler SPR_EBBHR. + */ + env->spr[SPR_EBBRR] =3D env->nip; + powerpc_set_excp_state(cpu, env->spr[SPR_EBBHR], env->msr); + + /* + * This exception is handled in userspace. No need to proceed. + */ + return; case POWERPC_EXCP_THERM: /* Thermal interrupt = */ case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt= */ case POWERPC_EXCP_VPUA: /* Vector assist exception = */ @@ -1681,6 +1696,24 @@ static void ppc_hw_interrupt(CPUPPCState *env) powerpc_excp(cpu, POWERPC_EXCP_THERM); return; } + /* EBB exception */ + if (env->pending_interrupts & (1 << PPC_INTERRUPT_EBB)) { + /* + * EBB exception must be taken in problem state and + * with BESCR_GE set. + */ + if (msr_pr =3D=3D 1 && env->spr[SPR_BESCR] & BESCR_GE) { + env->pending_interrupts &=3D ~(1 << PPC_INTERRUPT_EBB); + + if (env->spr[SPR_BESCR] & BESCR_PMEO) { + powerpc_excp(cpu, POWERPC_EXCP_PERFM_EBB); + } else if (env->spr[SPR_BESCR] & BESCR_EEO) { + powerpc_excp(cpu, POWERPC_EXCP_EXTERNAL_EBB); + } + + return; + } + } } =20 if (env->resume_as_sreset) { --=20 2.34.1 From nobody Sun Feb 8 00:39:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 11 Feb 2022 10:34:20 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v11 4/4] target/ppc: trigger PERFM EBBs from power8-pmu.c Date: Fri, 11 Feb 2022 15:33:54 -0300 Message-Id: <20220211183354.563602-5-danielhb413@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220211183354.563602-1-danielhb413@gmail.com> References: <20220211183354.563602-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::c2d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2d; envelope-from=danielhb413@gmail.com; helo=mail-oo1-xc2d.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1644605451601100001 Content-Type: text/plain; charset="utf-8" This patch adds the EBB exception support that are triggered by Performance Monitor alerts. This happens when a Performance Monitor alert occurs and MMCR0_EBE, BESCR_PME and BESCR_GE are set. fire_PMC_interrupt() will execute a new ebb_perfm_excp() helper that will check for MMCR0_EBE, BESCR_PME and BESCR_GE bits. If all bits are set, do_ebb() will attempt to trigger a PERFM EBB event. If the EBB facility is enabled in both FSCR and HFSCR we consider that the EBB is valid and set BESCR_PMEO. After that, if we're running in problem state, fire a POWERPC_EXCP_PERM_EBB immediately. Otherwise we'll queue a PPC_INTERRUPT_EBB. Signed-off-by: Daniel Henrique Barboza --- target/ppc/excp_helper.c | 48 ++++++++++++++++++++++++++++++++++++++++ target/ppc/helper.h | 1 + target/ppc/power8-pmu.c | 3 +-- 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index ad40a0f8e6..0c031e67b1 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1948,6 +1948,54 @@ void helper_rfebb(CPUPPCState *env, target_ulong s) env->spr[SPR_BESCR] &=3D ~BESCR_GE; } } + +/* + * Triggers or queues an 'ebb_excp' EBB exception. All checks + * but FSCR, HFSCR and msr_pr must be done beforehand. + * + * PowerISA v3.1 isn't clear about whether an EBB should be + * postponed or cancelled if the EBB facility is unavailable. + * Our assumption here is that the EBB is cancelled if both + * FSCR and HFSCR EBB facilities aren't available. + */ +static void do_ebb(CPUPPCState *env, int ebb_excp) +{ + PowerPCCPU *cpu =3D env_archcpu(env); + CPUState *cs =3D CPU(cpu); + + /* + * FSCR_EBB and FSCR_IC_EBB are the same bits used with + * HFSCR. + */ + helper_fscr_facility_check(env, FSCR_EBB, 0, FSCR_IC_EBB); + helper_hfscr_facility_check(env, FSCR_EBB, "EBB", FSCR_IC_EBB); + + if (ebb_excp =3D=3D POWERPC_EXCP_PERFM_EBB) { + env->spr[SPR_BESCR] |=3D BESCR_PMEO; + } else if (ebb_excp =3D=3D POWERPC_EXCP_EXTERNAL_EBB) { + env->spr[SPR_BESCR] |=3D BESCR_EEO; + } + + if (msr_pr =3D=3D 1) { + powerpc_excp(cpu, ebb_excp); + } else { + env->pending_interrupts |=3D 1 << PPC_INTERRUPT_EBB; + cpu_interrupt(cs, CPU_INTERRUPT_HARD); + } +} + +void helper_ebb_perfm_excp(CPUPPCState *env) +{ + bool perfm_ebb_enabled =3D env->spr[SPR_POWER_MMCR0] & MMCR0_EBE && + env->spr[SPR_BESCR] & BESCR_PME && + env->spr[SPR_BESCR] & BESCR_GE; + + if (!perfm_ebb_enabled) { + return; + } + + do_ebb(env, POWERPC_EXCP_PERFM_EBB); +} #endif =20 /*************************************************************************= ****/ diff --git a/target/ppc/helper.h b/target/ppc/helper.h index f2e5060910..adc31235a8 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -19,6 +19,7 @@ DEF_HELPER_1(rfid, void, env) DEF_HELPER_1(rfscv, void, env) DEF_HELPER_1(hrfid, void, env) DEF_HELPER_2(rfebb, void, env, tl) +DEF_HELPER_1(ebb_perfm_excp, void, env) DEF_HELPER_2(store_lpcr, void, env, tl) DEF_HELPER_2(store_pcr, void, env, tl) DEF_HELPER_2(store_mmcr0, void, env, tl) diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index d245663158..38e1ecb782 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -307,8 +307,7 @@ static void fire_PMC_interrupt(PowerPCCPU *cpu) env->spr[SPR_POWER_MMCR0] |=3D MMCR0_PMAO; } =20 - /* PMC interrupt not implemented yet */ - return; + helper_ebb_perfm_excp(env); } =20 /* This helper assumes that the PMC is running. */ --=20 2.34.1