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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 35/39] hw/intc/arm_gicv3_its: Drop TableDesc and CmdQDesc valid
fields
Date: Tue, 8 Feb 2022 11:39:44 +0000
Message-Id: <20220208113948.3217356-36-peter.maydell@linaro.org>
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Currently we track in the TableDesc and CmdQDesc structs the state of
the GITS_BASER<n> and GITS_CBASER Valid bits. However we aren't very
consistent abut checking the valid field: we test it in update_cte()
and update_dte(), but not anywhere else we look things up in tables.
The GIC specification says that it is UNPREDICTABLE if a guest fails
to set any of these Valid bits before enabling the ITS via
GITS_CTLR.Enabled. So we can choose to handle Valid =3D=3D 0 as
equivalent to a zero-length table. This is in fact how we're already
catching this case in most of the table-access paths: when Valid is 0
we leave the num_entries fields in TableDesc or CmdQDesc set to zero,
and then the out-of-bounds check "index >=3D num_entries" that we have
to do anyway before doing any of these table lookups will always be
true, catching the no-valid-table case without any extra code.
So we can remove the checks on the valid field from update_cte()
and update_dte(): since these happen after the bounds check there
was never any case when the test could fail. That means the valid
fields would be entirely unused, so just remove them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220201193207.2771604-11-peter.maydell@linaro.org
---
include/hw/intc/arm_gicv3_its_common.h | 2 --
hw/intc/arm_gicv3_its.c | 31 ++++++++++++--------------
2 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_g=
icv3_its_common.h
index 3e2ad2dff60..0f130494dd3 100644
--- a/include/hw/intc/arm_gicv3_its_common.h
+++ b/include/hw/intc/arm_gicv3_its_common.h
@@ -42,7 +42,6 @@
#define GITS_TRANSLATER 0x0040
=20
typedef struct {
- bool valid;
bool indirect;
uint16_t entry_sz;
uint32_t page_sz;
@@ -51,7 +50,6 @@ typedef struct {
} TableDesc;
=20
typedef struct {
- bool valid;
uint32_t num_entries;
uint64_t base_addr;
} CmdQDesc;
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index e3b63efddcc..9735d609df2 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -442,10 +442,6 @@ static bool update_cte(GICv3ITSState *s, uint16_t icid=
, const CTEntry *cte)
uint64_t cteval =3D 0;
MemTxResult res =3D MEMTX_OK;
=20
- if (!s->ct.valid) {
- return true;
- }
-
if (cte->valid) {
/* add mapping entry to collection table */
cteval =3D FIELD_DP64(cteval, CTE, VALID, 1);
@@ -504,15 +500,11 @@ static bool update_dte(GICv3ITSState *s, uint32_t dev=
id, const DTEntry *dte)
uint64_t dteval =3D 0;
MemTxResult res =3D MEMTX_OK;
=20
- if (s->dt.valid) {
- if (dte->valid) {
- /* add mapping entry to device table */
- dteval =3D FIELD_DP64(dteval, DTE, VALID, 1);
- dteval =3D FIELD_DP64(dteval, DTE, SIZE, dte->size);
- dteval =3D FIELD_DP64(dteval, DTE, ITTADDR, dte->ittaddr);
- }
- } else {
- return true;
+ if (dte->valid) {
+ /* add mapping entry to device table */
+ dteval =3D FIELD_DP64(dteval, DTE, VALID, 1);
+ dteval =3D FIELD_DP64(dteval, DTE, SIZE, dte->size);
+ dteval =3D FIELD_DP64(dteval, DTE, ITTADDR, dte->ittaddr);
}
=20
entry_addr =3D table_entry_addr(s, &s->dt, devid, &res);
@@ -901,7 +893,6 @@ static void extract_table_params(GICv3ITSState *s)
}
=20
memset(td, 0, sizeof(*td));
- td->valid =3D FIELD_EX64(value, GITS_BASER, VALID);
/*
* If GITS_BASER<n>.Valid is 0 for any <n> then we will not process
* interrupts. (GITS_TYPER.HCC is 0 for this implementation, so we
@@ -909,8 +900,15 @@ static void extract_table_params(GICv3ITSState *s)
* for the register corresponding to the Collection table but we
* still have to process interrupts using non-memory-backed
* Collection table entries.)
+ * The specification makes it UNPREDICTABLE to enable the ITS with=
out
+ * marking each BASER<n> as valid. We choose to handle these as if
+ * the table was zero-sized, so commands using the table will fail
+ * and interrupts requested via GITS_TRANSLATER writes will be ign=
ored.
+ * This happens automatically by leaving the num_entries field at
+ * zero, which will be caught by the bounds checks we have before
+ * every table lookup anyway.
*/
- if (!td->valid) {
+ if (!FIELD_EX64(value, GITS_BASER, VALID)) {
continue;
}
td->page_sz =3D page_sz;
@@ -936,9 +934,8 @@ static void extract_cmdq_params(GICv3ITSState *s)
num_pages =3D FIELD_EX64(value, GITS_CBASER, SIZE) + 1;
=20
memset(&s->cq, 0 , sizeof(s->cq));
- s->cq.valid =3D FIELD_EX64(value, GITS_CBASER, VALID);
=20
- if (s->cq.valid) {
+ if (FIELD_EX64(value, GITS_CBASER, VALID)) {
s->cq.num_entries =3D (num_pages * GITS_PAGE_SIZE_4K) /
GITS_CMDQ_ENTRY_SIZE;
s->cq.base_addr =3D FIELD_EX64(value, GITS_CBASER, PHYADDR);
--=20
2.25.1