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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 28/39] hw/intc/arm_gicv3_its: Pass DTEntry to update_dte()
Date: Tue, 8 Feb 2022 11:39:37 +0000
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Make update_dte() take a DTEntry struct rather than all the fields of
the new DTE as separate arguments.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220201193207.2771604-4-peter.maydell@linaro.org
---
hw/intc/arm_gicv3_its.c | 35 ++++++++++++++++++-----------------
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 6d70d7d59e2..1856210e79a 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -465,20 +465,23 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, co=
nst uint64_t *cmdpkt)
return update_cte(s, icid, valid, rdbase) ? CMD_CONTINUE : CMD_STALL;
}
=20
-static bool update_dte(GICv3ITSState *s, uint32_t devid, bool valid,
- uint8_t size, uint64_t itt_addr)
+/*
+ * Update the Device Table entry for @devid to @dte. Returns true
+ * on success, false if there was a memory access error.
+ */
+static bool update_dte(GICv3ITSState *s, uint32_t devid, const DTEntry *dt=
e)
{
AddressSpace *as =3D &s->gicv3->dma_as;
uint64_t entry_addr;
- uint64_t dte =3D 0;
+ uint64_t dteval =3D 0;
MemTxResult res =3D MEMTX_OK;
=20
if (s->dt.valid) {
- if (valid) {
+ if (dte->valid) {
/* add mapping entry to device table */
- dte =3D FIELD_DP64(dte, DTE, VALID, 1);
- dte =3D FIELD_DP64(dte, DTE, SIZE, size);
- dte =3D FIELD_DP64(dte, DTE, ITTADDR, itt_addr);
+ dteval =3D FIELD_DP64(dteval, DTE, VALID, 1);
+ dteval =3D FIELD_DP64(dteval, DTE, SIZE, dte->size);
+ dteval =3D FIELD_DP64(dteval, DTE, ITTADDR, dte->ittaddr);
}
} else {
return true;
@@ -493,27 +496,25 @@ static bool update_dte(GICv3ITSState *s, uint32_t dev=
id, bool valid,
/* No L2 table for this index: discard write and continue */
return true;
}
- address_space_stq_le(as, entry_addr, dte, MEMTXATTRS_UNSPECIFIED, &res=
);
+ address_space_stq_le(as, entry_addr, dteval, MEMTXATTRS_UNSPECIFIED, &=
res);
return res =3D=3D MEMTX_OK;
}
=20
static ItsCmdResult process_mapd(GICv3ITSState *s, const uint64_t *cmdpkt)
{
uint32_t devid;
- uint8_t size;
- uint64_t itt_addr;
- bool valid;
+ DTEntry dte;
=20
devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT;
- size =3D cmdpkt[1] & SIZE_MASK;
- itt_addr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT;
- valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK;
+ dte.size =3D cmdpkt[1] & SIZE_MASK;
+ dte.ittaddr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT;
+ dte.valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK;
=20
if ((devid >=3D s->dt.num_entries) ||
- (size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS))) {
+ (dte.size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS))) {
qemu_log_mask(LOG_GUEST_ERROR,
"ITS MAPD: invalid device table attributes "
- "devid %d or size %d\n", devid, size);
+ "devid %d or size %d\n", devid, dte.size);
/*
* in this implementation, in case of error
* we ignore this command and move onto the next
@@ -522,7 +523,7 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, cons=
t uint64_t *cmdpkt)
return CMD_CONTINUE;
}
=20
- return update_dte(s, devid, valid, size, itt_addr) ? CMD_CONTINUE : CM=
D_STALL;
+ return update_dte(s, devid, &dte) ? CMD_CONTINUE : CMD_STALL;
}
=20
static ItsCmdResult process_movall(GICv3ITSState *s, const uint64_t *cmdpk=
t)
--=20
2.25.1