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[121.45.127.8]) by smtp.gmail.com with ESMTPSA id mi11sm1543422pjb.37.2022.02.07.23.17.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Feb 2022 23:17:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8UZVMY0pvo1xV7MrFt0a3sWDGzIB2xwb969t7jjX7iw=; b=ekHLtPDnLfgwIVfYaq/1dnHpgedAFmkBDXfrE0z51GOeDbykevx1ppb6hjkLjb1KUu gBS791CA7fMAa2WmuWEupxK86U5Jxj5jKNU8heZeHaxO0QYTcIYUwWTgfUEwgDUAuyCK OF+28rgTsUNT0hruhY5qebRAUePB7mBuQ/2CC+CW7oIgr3uu/8GTtC2DuIP4v1XVMmO8 euNcdbwneuzrHxhe5b/lRzOpPOgA+Avz0afg1A49k5VUmgu2WZKRGIT6fpijQ4NwvrJA qPNHNpbj4Zd/HfSUMaNNWKH1M/13wMdSJeeKAN4pVFB149NTI0fVxRV7ZvE7d/6M+s2W 4IZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8UZVMY0pvo1xV7MrFt0a3sWDGzIB2xwb969t7jjX7iw=; b=zapE5CTQBrEpDpoVKjXDVVpKJvPG9ZgTUHk9X1+nQ83UqDAy4wxqsrzl51I4Xp/xCd HULrFXIVY/2OXcQoZmir7T2Pr0pLgN7hNE5cIPkh5vV25lmKYlR1SQ/T2XtCMHL5PXtm Y8Npb/CH6gAjxCr8OluQlFmA64tVcThYsErMv23TOwQctWc6ENAjAFNzy9dOoDUIp8Vf nW6VBVeWw5aJFCORK2thjd3r2cIQ6s3hV9Yy1XL7MSIMNNdyuYRfM04bbxQVo+76SCen C30EIulNoNZMMjKqOTHwUMvhduWG+OwaQgqjDTgXUt6RhNn12OvGWPbsME4BFETN1f2l x47w== X-Gm-Message-State: AOAM531iGmmURXMXkjh1CY/qU3YMNPhvFBvY2l+2RKF4+sthq3eP03jC 6Hq7swZpqLrctwR+Q1HCuXfqaNucyNK1Tg== X-Google-Smtp-Source: ABdhPJwxHwpVU0TQ6fG3hsDdaRWwCinrDqzEBYt6gMSGWt/sP2mQHL2WF7czatcD8NPMisuElEUmIQ== X-Received: by 2002:a17:902:dac8:: with SMTP id q8mr3325550plx.57.1644304637771; Mon, 07 Feb 2022 23:17:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v6 1/8] tcg/sparc: Use tcg_out_movi_imm13 in tcg_out_addsub2_i64 Date: Tue, 8 Feb 2022 18:17:03 +1100 Message-Id: <20220208071710.320122-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220208071710.320122-1-richard.henderson@linaro.org> References: <20220208071710.320122-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102d (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1644306852905100001 Content-Type: text/plain; charset="utf-8" When BH is constant, it is constrained to 10 bits for use in MOVCC. For the cases in which we must load the constant BH into a register, we do not need the full logic of tcg_out_movi; we can use the simpler function for emitting a 13 bit constant. This eliminates the only case in which TCG_REG_T2 was passed to tcg_out_movi, which will shortly become invalid. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- tcg/sparc/tcg-target.c.inc | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc index 0c062c60eb..82a7c684b6 100644 --- a/tcg/sparc/tcg-target.c.inc +++ b/tcg/sparc/tcg-target.c.inc @@ -795,7 +795,7 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg r= l, TCGReg rh, if (use_vis3_instructions && !is_sub) { /* Note that ADDXC doesn't accept immediates. */ if (bhconst && bh !=3D 0) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); + tcg_out_movi_imm13(s, TCG_REG_T2, bh); bh =3D TCG_REG_T2; } tcg_out_arith(s, rh, ah, bh, ARITH_ADDXC); @@ -811,9 +811,13 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg = rl, TCGReg rh, tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, rh, ah, 0); } } else { - /* Otherwise adjust BH as if there is carry into T2 ... */ + /* + * Otherwise adjust BH as if there is carry into T2. + * Note that constant BH is constrained to 10 bits for the MOVCC, + * so the adjustment fits 11 bits. + */ if (bhconst) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh + (is_sub ? -1 : = 1)); + tcg_out_movi_imm13(s, TCG_REG_T2, bh + (is_sub ? -1 : 1)); } else { tcg_out_arithi(s, TCG_REG_T2, bh, 1, is_sub ? ARITH_SUB : ARITH_ADD); --=20 2.25.1