From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643996690594454.4200776399267; Fri, 4 Feb 2022 09:44:50 -0800 (PST) Received: from localhost ([::1]:57964 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG2dd-0007q1-AR for importer@patchew.org; Fri, 04 Feb 2022 12:44:49 -0500 Received: from eggs.gnu.org ([209.51.188.92]:35122) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG2UW-0000jS-3i; Fri, 04 Feb 2022 12:35:26 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:59922) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG2UR-00015m-Df; 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Fri, 04 Feb 2022 17:34:43 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 214HYhUp34144622 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 4 Feb 2022 17:34:43 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1D4C7AE06B; Fri, 4 Feb 2022 17:34:43 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F2CBEAE075; Fri, 4 Feb 2022 17:34:40 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:34:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=teUxZttQ6Pn5MHFuQ8zx0OYgfhzhgVmTuXoHtPyENXg=; b=IM+UuOVzPvNpHrbL+DcY9LzhjLALMhb6cU4SVlOB0sU+9xY4KUm0f6RR+bk1dyjQgdcD oCm35cy5ofaL6VMrgZTS5/upqTIeD2GdU0hcPHvWXcv5zk87D8TJG6JdRQrF1onGaXyN 1znDpggeU/t0hSW42wDG4IM4DcM/xOIYBFUTy1uA8I1+1JJQ9ymMCevVYaFahz6ewysy i/yCWPVLRbm1XIRrnSv2vtjHtGXD6RAIlWaeHgyTkkekj9Fa1wewfj+AC176IsoqLuBq yt65ZLxCXJ9yP1VWG6r+ATO7doH72g8dM2+t2Hai8LBMemtGEz8nxhRZguz2wL3VCWzj Cg== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 01/10] target/ppc: Merge 7x5 and 7x0 exception model IDs Date: Fri, 4 Feb 2022 14:34:21 -0300 Message-Id: <20220204173430.1457358-2-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: _UJTwDPM6SQqX1Yt38pznDbFjV5AsIgn X-Proofpoint-ORIG-GUID: 61jA9MGcIt3Q3L90OwDv603jr63KGO1Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 mlxlogscore=999 suspectscore=0 spamscore=0 malwarescore=0 phishscore=0 priorityscore=1501 impostorscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643996691724100001 Content-Type: text/plain; charset="utf-8" Since we've split the exception code by exception model, the exception model IDs are becoming less useful. These two can be merged. Signed-off-by: Fabiano Rosas --- target/ppc/cpu-qom.h | 6 ++---- target/ppc/cpu_init.c | 16 ++++++++-------- target/ppc/excp_helper.c | 2 +- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 3880fb3337..98facee9fa 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -90,10 +90,8 @@ enum powerpc_excp_t { POWERPC_EXCP_40x, /* PowerPC 603/604/G2 exception model */ POWERPC_EXCP_6xx, - /* PowerPC 7x0 exception model */ - POWERPC_EXCP_7x0, - /* PowerPC 7x5 exception model */ - POWERPC_EXCP_7x5, + /* PowerPC 7xx exception model */ + POWERPC_EXCP_7xx, /* PowerPC 74xx exception model */ POWERPC_EXCP_74xx, /* BookE exception model */ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 95c5831ba6..d97f718354 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -4021,7 +4021,7 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_32B; - pcc->excp_model =3D POWERPC_EXCP_7x0; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4098,7 +4098,7 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_32B; - pcc->excp_model =3D POWERPC_EXCP_7x0; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4298,7 +4298,7 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_32B; - pcc->excp_model =3D POWERPC_EXCP_7x0; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4378,7 +4378,7 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_32B; - pcc->excp_model =3D POWERPC_EXCP_7x0; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4463,7 +4463,7 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_32B; - pcc->excp_model =3D POWERPC_EXCP_7x0; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4548,7 +4548,7 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_32B; - pcc->excp_model =3D POWERPC_EXCP_7x0; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4624,7 +4624,7 @@ POWERPC_FAMILY(745)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_SOFT_6xx; - pcc->excp_model =3D POWERPC_EXCP_7x5; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | @@ -4711,7 +4711,7 @@ POWERPC_FAMILY(755)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model =3D POWERPC_MMU_SOFT_6xx; - pcc->excp_model =3D POWERPC_EXCP_7x5; + pcc->excp_model =3D POWERPC_EXCP_7xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_BE | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 7bdda6f165..b6a5c36fd2 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1844,7 +1844,7 @@ static inline void powerpc_excp_legacy(PowerPCCPU *cp= u, int excp) hreg_swap_gpr_tgpr(env); } /* fall through */ - case POWERPC_EXCP_7x5: + case POWERPC_EXCP_7xx: ppc_excp_debug_sw_tlb(env, excp); =20 msr |=3D env->crf[0] << 28; --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643996468227277.42558873298606; Fri, 4 Feb 2022 09:41:08 -0800 (PST) Received: from localhost ([::1]:52214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG2a2-0003iv-8g for importer@patchew.org; Fri, 04 Feb 2022 12:41:06 -0500 Received: from eggs.gnu.org ([209.51.188.92]:35034) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG2UT-0000j9-Vn; Fri, 04 Feb 2022 12:35:22 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:39566) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG2UM-00015v-H0; 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Fri, 04 Feb 2022 17:34:46 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 214HYkd141091378 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 4 Feb 2022 17:34:46 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0E296AE066; Fri, 4 Feb 2022 17:34:46 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AAEB5AE06D; Fri, 4 Feb 2022 17:34:43 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:34:43 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=1cf+OfPIIIc4yJTIyMr0B2UAEkTm2OjosQtXfe2eu1w=; b=RxyRiDXNarE8Akp562YbkJij3nzhxBSA6pfO5a5YXdZb2olx5SXXLgy6vdexGYP71O2l iWIOJPmkwXpiSAw4iMQIOzPD7S3wB36mciDHI62jbogbjzFl9liM3n4QogFzQOWXMJAK 1mZ8Pi6iyov7bb8hYU4CwqQtG1XEwrLR+N68+cptbJrMAZAdMOMLfrKlo2NxG+uI/OWc bElZF2zJ1J47/Ak6CcRN6MkuO1clTnYYLj2umwEG6vqcTUVknrbx06VjsmzAblAZ0jmL hGETGtY8xy2yRnNafM/4fDwpcpySdctH8nvJRE2bpW5w2gl4o0DgFZWDnMiUMI+dZbUw Dw== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 02/10] target/ppc: Introduce powerpc_excp_7xx Date: Fri, 4 Feb 2022 14:34:22 -0300 Message-Id: <20220204173430.1457358-3-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: NufOfNtPt0ZO2ffkcSniycHKce3ewewi X-Proofpoint-GUID: FTzxiG0I1r43y86Y9i2SUiaHRvC1DwjL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 priorityscore=1501 malwarescore=0 bulkscore=0 impostorscore=0 spamscore=0 phishscore=0 adultscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643996470190100003 Content-Type: text/plain; charset="utf-8" Introduce a new powerpc_excp function specific for PowerPC 7xx CPUs (740, 745, 750, 750cl, 750cx, 750fx, 750gx, 755). This commit copies powerpc_excp_legacy verbatim so the next one has a clean diff. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 469 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 469 insertions(+) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index b6a5c36fd2..df96f620b2 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -741,6 +741,472 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int exc= p) powerpc_set_excp_state(cpu, vector, new_msr); } =20 +static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) +{ + CPUState *cs =3D CPU(cpu); + CPUPPCState *env =3D &cpu->env; + int excp_model =3D env->excp_model; + target_ulong msr, new_msr, vector; + int srr0, srr1, lev =3D -1; + + if (excp <=3D POWERPC_EXCP_NONE || excp >=3D POWERPC_EXCP_NB) { + cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); + } + + qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx + " =3D> %s (%d) error=3D%02x\n", env->nip, powerpc_excp_n= ame(excp), + excp, env->error_code); + + /* new srr1 value excluding must-be-zero bits */ + if (excp_model =3D=3D POWERPC_EXCP_BOOKE) { + msr =3D env->msr; + } else { + msr =3D env->msr & ~0x783f0000ULL; + } + + /* + * new interrupt handler msr preserves existing HV and ME unless + * explicitly overriden + */ + new_msr =3D env->msr & (((target_ulong)1 << MSR_ME) | MSR_HVB); + + /* target registers */ + srr0 =3D SPR_SRR0; + srr1 =3D SPR_SRR1; + + /* + * check for special resume at 0x100 from doze/nap/sleep/winkle on + * P7/P8/P9 + */ + if (env->resume_as_sreset) { + excp =3D powerpc_reset_wakeup(cs, env, excp, &msr); + } + + /* + * Hypervisor emulation assistance interrupt only exists on server + * arch 2.05 server or later. We also don't want to generate it if + * we don't have HVB in msr_mask (PAPR mode). + */ + if (excp =3D=3D POWERPC_EXCP_HV_EMU +#if defined(TARGET_PPC64) + && !(mmu_is_64bit(env->mmu_model) && (env->msr_mask & MSR_HVB)) +#endif /* defined(TARGET_PPC64) */ + + ) { + excp =3D POWERPC_EXCP_PROGRAM; + } + +#ifdef TARGET_PPC64 + /* + * SPEU and VPU share the same IVOR but they exist in different + * processors. SPEU is e500v1/2 only and VPU is e6500 only. + */ + if (excp_model =3D=3D POWERPC_EXCP_BOOKE && excp =3D=3D POWERPC_EXCP_V= PU) { + excp =3D POWERPC_EXCP_SPEU; + } +#endif + + vector =3D env->excp_vectors[excp]; + if (vector =3D=3D (target_ulong)-1ULL) { + cpu_abort(cs, "Raised an exception without defined vector %d\n", + excp); + } + + vector |=3D env->excp_prefix; + + switch (excp) { + case POWERPC_EXCP_CRITICAL: /* Critical input = */ + switch (excp_model) { + case POWERPC_EXCP_40x: + srr0 =3D SPR_40x_SRR2; + srr1 =3D SPR_40x_SRR3; + break; + case POWERPC_EXCP_BOOKE: + srr0 =3D SPR_BOOKE_CSRR0; + srr1 =3D SPR_BOOKE_CSRR1; + break; + case POWERPC_EXCP_6xx: + break; + default: + goto excp_invalid; + } + break; + case POWERPC_EXCP_MCHECK: /* Machine check exception = */ + if (msr_me =3D=3D 0) { + /* + * Machine check exception is not enabled. Enter + * checkstop state. + */ + fprintf(stderr, "Machine check while not allowed. " + "Entering checkstop state\n"); + if (qemu_log_separate()) { + qemu_log("Machine check while not allowed. " + "Entering checkstop state\n"); + } + cs->halted =3D 1; + cpu_interrupt_exittb(cs); + } + if (env->msr_mask & MSR_HVB) { + /* + * ISA specifies HV, but can be delivered to guest with HV + * clear (e.g., see FWNMI in PAPR). + */ + new_msr |=3D (target_ulong)MSR_HVB; + } + + /* machine check exceptions don't have ME set */ + new_msr &=3D ~((target_ulong)1 << MSR_ME); + + /* XXX: should also have something loaded in DAR / DSISR */ + switch (excp_model) { + case POWERPC_EXCP_40x: + srr0 =3D SPR_40x_SRR2; + srr1 =3D SPR_40x_SRR3; + break; + case POWERPC_EXCP_BOOKE: + /* FIXME: choose one or the other based on CPU type */ + srr0 =3D SPR_BOOKE_MCSRR0; + srr1 =3D SPR_BOOKE_MCSRR1; + + env->spr[SPR_BOOKE_CSRR0] =3D env->nip; + env->spr[SPR_BOOKE_CSRR1] =3D msr; + break; + default: + break; + } + break; + case POWERPC_EXCP_DSI: /* Data storage exception = */ + trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); + break; + case POWERPC_EXCP_ISI: /* Instruction storage exception = */ + trace_ppc_excp_isi(msr, env->nip); + msr |=3D env->error_code; + break; + case POWERPC_EXCP_EXTERNAL: /* External input = */ + { + bool lpes0; + + cs =3D CPU(cpu); + + /* + * Exception targeting modifiers + * + * LPES0 is supported on POWER7/8/9 + * LPES1 is not supported (old iSeries mode) + * + * On anything else, we behave as if LPES0 is 1 + * (externals don't alter MSR:HV) + */ +#if defined(TARGET_PPC64) + if (excp_model =3D=3D POWERPC_EXCP_POWER7 || + excp_model =3D=3D POWERPC_EXCP_POWER8 || + excp_model =3D=3D POWERPC_EXCP_POWER9 || + excp_model =3D=3D POWERPC_EXCP_POWER10) { + lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); + } else +#endif /* defined(TARGET_PPC64) */ + { + lpes0 =3D true; + } + + if (!lpes0) { + new_msr |=3D (target_ulong)MSR_HVB; + new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); + srr0 =3D SPR_HSRR0; + srr1 =3D SPR_HSRR1; + } + if (env->mpic_proxy) { + /* IACK the IRQ on delivery */ + env->spr[SPR_BOOKE_EPR] =3D ldl_phys(cs->as, env->mpic_iack); + } + break; + } + case POWERPC_EXCP_ALIGN: /* Alignment exception = */ + /* Get rS/rD and rA from faulting opcode */ + /* + * Note: the opcode fields will not be set properly for a + * direct store load/store, but nobody cares as nobody + * actually uses direct store segments. + */ + env->spr[SPR_DSISR] |=3D (env->error_code & 0x03FF0000) >> 16; + break; + case POWERPC_EXCP_PROGRAM: /* Program exception = */ + switch (env->error_code & ~0xF) { + case POWERPC_EXCP_FP: + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + trace_ppc_excp_fp_ignore(); + cs->exception_index =3D POWERPC_EXCP_NONE; + env->error_code =3D 0; + return; + } + + /* + * FP exceptions always have NIP pointing to the faulting + * instruction, so always use store_next and claim we are + * precise in the MSR. + */ + msr |=3D 0x00100000; + env->spr[SPR_BOOKE_ESR] =3D ESR_FP; + break; + case POWERPC_EXCP_INVAL: + trace_ppc_excp_inval(env->nip); + msr |=3D 0x00080000; + env->spr[SPR_BOOKE_ESR] =3D ESR_PIL; + break; + case POWERPC_EXCP_PRIV: + msr |=3D 0x00040000; + env->spr[SPR_BOOKE_ESR] =3D ESR_PPR; + break; + case POWERPC_EXCP_TRAP: + msr |=3D 0x00020000; + env->spr[SPR_BOOKE_ESR] =3D ESR_PTR; + break; + default: + /* Should never occur */ + cpu_abort(cs, "Invalid program exception %d. Aborting\n", + env->error_code); + break; + } + break; + case POWERPC_EXCP_SYSCALL: /* System call exception = */ + lev =3D env->error_code; + + if ((lev =3D=3D 1) && cpu->vhyp) { + dump_hcall(env); + } else { + dump_syscall(env); + } + + /* + * We need to correct the NIP which in this case is supposed + * to point to the next instruction + */ + env->nip +=3D 4; + + /* "PAPR mode" built-in hypercall emulation */ + if ((lev =3D=3D 1) && cpu->vhyp) { + PPCVirtualHypervisorClass *vhc =3D + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + vhc->hypercall(cpu->vhyp, cpu); + return; + } + if (lev =3D=3D 1) { + new_msr |=3D (target_ulong)MSR_HVB; + } + break; + case POWERPC_EXCP_SYSCALL_VECTORED: /* scv exception = */ + lev =3D env->error_code; + dump_syscall(env); + env->nip +=3D 4; + new_msr |=3D env->msr & ((target_ulong)1 << MSR_EE); + new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); + + vector +=3D lev * 0x20; + + env->lr =3D env->nip; + env->ctr =3D msr; + break; + case POWERPC_EXCP_FPU: /* Floating-point unavailable exception = */ + case POWERPC_EXCP_APU: /* Auxiliary processor unavailable = */ + case POWERPC_EXCP_DECR: /* Decrementer exception = */ + break; + case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt = */ + /* FIT on 4xx */ + trace_ppc_excp_print("FIT"); + break; + case POWERPC_EXCP_WDT: /* Watchdog timer interrupt = */ + trace_ppc_excp_print("WDT"); + switch (excp_model) { + case POWERPC_EXCP_BOOKE: + srr0 =3D SPR_BOOKE_CSRR0; + srr1 =3D SPR_BOOKE_CSRR1; + break; + default: + break; + } + break; + case POWERPC_EXCP_DTLB: /* Data TLB error = */ + case POWERPC_EXCP_ITLB: /* Instruction TLB error = */ + break; + case POWERPC_EXCP_DEBUG: /* Debug interrupt = */ + if (env->flags & POWERPC_FLAG_DE) { + /* FIXME: choose one or the other based on CPU type */ + srr0 =3D SPR_BOOKE_DSRR0; + srr1 =3D SPR_BOOKE_DSRR1; + + env->spr[SPR_BOOKE_CSRR0] =3D env->nip; + env->spr[SPR_BOOKE_CSRR1] =3D msr; + + /* DBSR already modified by caller */ + } else { + cpu_abort(cs, "Debug exception triggered on unsupported model\= n"); + } + break; + case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable/V= PU */ + env->spr[SPR_BOOKE_ESR] =3D ESR_SPV; + break; + case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt = */ + break; + case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt = */ + srr0 =3D SPR_BOOKE_CSRR0; + srr1 =3D SPR_BOOKE_CSRR1; + break; + case POWERPC_EXCP_RESET: /* System reset exception = */ + /* A power-saving exception sets ME, otherwise it is unchanged */ + if (msr_pow) { + /* indicate that we resumed from power save mode */ + msr |=3D 0x10000; + new_msr |=3D ((target_ulong)1 << MSR_ME); + } + if (env->msr_mask & MSR_HVB) { + /* + * ISA specifies HV, but can be delivered to guest with HV + * clear (e.g., see FWNMI in PAPR, NMI injection in QEMU). + */ + new_msr |=3D (target_ulong)MSR_HVB; + } else { + if (msr_pow) { + cpu_abort(cs, "Trying to deliver power-saving system reset= " + "exception %d with no HV support\n", excp); + } + } + break; + case POWERPC_EXCP_DSEG: /* Data segment exception = */ + case POWERPC_EXCP_ISEG: /* Instruction segment exception = */ + case POWERPC_EXCP_TRACE: /* Trace exception = */ + break; + case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excepti= on */ + msr |=3D env->error_code; + /* fall through */ + case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception = */ + case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception = */ + case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception = */ + case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excepti= on */ + case POWERPC_EXCP_SDOOR_HV: /* Hypervisor Doorbell interrupt = */ + case POWERPC_EXCP_HV_EMU: + case POWERPC_EXCP_HVIRT: /* Hypervisor virtualization = */ + srr0 =3D SPR_HSRR0; + srr1 =3D SPR_HSRR1; + new_msr |=3D (target_ulong)MSR_HVB; + new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); + break; + case POWERPC_EXCP_VPU: /* Vector unavailable exception = */ + case POWERPC_EXCP_VSXU: /* VSX unavailable exception = */ + case POWERPC_EXCP_FU: /* Facility unavailable exception = */ +#ifdef TARGET_PPC64 + env->spr[SPR_FSCR] |=3D ((target_ulong)env->error_code << 56); +#endif + break; + case POWERPC_EXCP_HV_FU: /* Hypervisor Facility Unavailable Except= ion */ +#ifdef TARGET_PPC64 + env->spr[SPR_HFSCR] |=3D ((target_ulong)env->error_code << FSCR_IC= _POS); + srr0 =3D SPR_HSRR0; + srr1 =3D SPR_HSRR1; + new_msr |=3D (target_ulong)MSR_HVB; + new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); +#endif + break; + case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt = */ + trace_ppc_excp_print("PIT"); + break; + case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error = */ + case POWERPC_EXCP_DLTLB: /* Data load TLB miss = */ + case POWERPC_EXCP_DSTLB: /* Data store TLB miss = */ + switch (excp_model) { + case POWERPC_EXCP_6xx: + /* Swap temporary saved registers with GPRs */ + if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) { + new_msr |=3D (target_ulong)1 << MSR_TGPR; + hreg_swap_gpr_tgpr(env); + } + /* fall through */ + case POWERPC_EXCP_7xx: + ppc_excp_debug_sw_tlb(env, excp); + + msr |=3D env->crf[0] << 28; + msr |=3D env->error_code; /* key, D/I, S/L bits */ + /* Set way using a LRU mechanism */ + msr |=3D ((env->last_way + 1) & (env->nb_ways - 1)) << 17; + break; + default: + cpu_abort(cs, "Invalid TLB miss exception\n"); + break; + } + break; + case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt= */ + case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrup= t */ + case POWERPC_EXCP_EPERFM: /* Embedded performance monitor interrupt= */ + case POWERPC_EXCP_FPA: /* Floating-point assist exception = */ + case POWERPC_EXCP_DABR: /* Data address breakpoint = */ + case POWERPC_EXCP_IABR: /* Instruction address breakpoint = */ + case POWERPC_EXCP_SMI: /* System management interrupt = */ + case POWERPC_EXCP_THERM: /* Thermal interrupt = */ + case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt= */ + case POWERPC_EXCP_VPUA: /* Vector assist exception = */ + case POWERPC_EXCP_SOFTP: /* Soft patch exception = */ + case POWERPC_EXCP_MAINT: /* Maintenance exception = */ + case POWERPC_EXCP_MEXTBR: /* Maskable external breakpoint = */ + case POWERPC_EXCP_NMEXTBR: /* Non maskable external breakpoint = */ + cpu_abort(cs, "%s exception not implemented\n", + powerpc_excp_name(excp)); + break; + default: + excp_invalid: + cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); + break; + } + + /* Sanity check */ + if (!(env->msr_mask & MSR_HVB)) { + if (new_msr & MSR_HVB) { + cpu_abort(cs, "Trying to deliver HV exception (MSR) %d with " + "no HV support\n", excp); + } + if (srr0 =3D=3D SPR_HSRR0) { + cpu_abort(cs, "Trying to deliver HV exception (HSRR) %d with " + "no HV support\n", excp); + } + } + + /* + * Sort out endianness of interrupt, this differs depending on the + * CPU, the HV mode, etc... + */ + if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) { + new_msr |=3D (target_ulong)1 << MSR_LE; + } + +#if defined(TARGET_PPC64) + if (excp_model =3D=3D POWERPC_EXCP_BOOKE) { + if (env->spr[SPR_BOOKE_EPCR] & EPCR_ICM) { + /* Cat.64-bit: EPCR.ICM is copied to MSR.CM */ + new_msr |=3D (target_ulong)1 << MSR_CM; + } else { + vector =3D (uint32_t)vector; + } + } else { + if (!msr_isf && !mmu_is_64bit(env->mmu_model)) { + vector =3D (uint32_t)vector; + } else { + new_msr |=3D (target_ulong)1 << MSR_SF; + } + } +#endif + + if (excp !=3D POWERPC_EXCP_SYSCALL_VECTORED) { + /* Save PC */ + env->spr[srr0] =3D env->nip; + + /* Save MSR */ + env->spr[srr1] =3D msr; + } + + /* This can update new_msr and vector if AIL applies */ + ppc_excp_apply_ail(cpu, excp_model, excp, msr, &new_msr, &vector); + + powerpc_set_excp_state(cpu, vector, new_msr); +} + static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) { CPUState *cs =3D CPU(cpu); @@ -1942,6 +2408,9 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_6xx: powerpc_excp_6xx(cpu, excp); break; + case POWERPC_EXCP_7xx: + powerpc_excp_7xx(cpu, excp); + break; case POWERPC_EXCP_74xx: powerpc_excp_74xx(cpu, excp); break; --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16439968155906.0393016933636545; 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Fri, 4 Feb 2022 17:34:49 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BDD48AE06F; Fri, 4 Feb 2022 17:34:48 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A924EAE060; Fri, 4 Feb 2022 17:34:46 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:34:46 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=LdDQmEH2kAw/Jmx21j1scH6ZYkN1XvZ3yxH+fUFniYo=; b=W0WcAXPJkArV/5UpXbJG+epFN3Py5wcaMt1zunqgL1Zm1FelY86McunWNFcRyaa0vM+Y dDiO5g1QX6aWP/GWUKMj9L0IiQV6OOOSGDc2vSB8WTqVdvCHK4O6cX/zAwTB1BYvWcCV XyHEK3cVthE2zYDt38vFkY6Ij01IAbR1xY6aRE/mIapX1c6rzW7IKFCVA2BL34bXCdpO d3r8hQGXt/WFClcdEuRF1T+t5w6Be80wbprywpIO5wSs44pvzjtnMs/RmArUvPfczrA4 9Kk/poRS0nf59rskPhBEfrItySXVl3NfYUybchi/9w1rygBYXOnJZVV4ZX9yVJJlbdS3 ww== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 03/10] target/ppc: Simplify powerpc_excp_7xx Date: Fri, 4 Feb 2022 14:34:23 -0300 Message-Id: <20220204173430.1457358-4-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 9lkbVPnlPqdElTo19vbvOzDbAoq0hocF X-Proofpoint-GUID: fr73AE4Yz1zCIHI5cEaAFxyrN5Cy6ckN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 phishscore=0 spamscore=0 malwarescore=0 clxscore=1015 mlxlogscore=838 impostorscore=0 bulkscore=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643996817750100001 Content-Type: text/plain; charset="utf-8" Differences from the generic powerpc_excp code: - Not BookE, so some MSR bits are cleared at interrupt dispatch; - No MSR_HV; - No power saving states; - No Hypervisor Emulation Assistance; - Not 64 bits; - No System call vectored; - No Alternate Interrupt Location. Exceptions used: POWERPC_EXCP_ALIGN POWERPC_EXCP_DECR POWERPC_EXCP_DLTLB POWERPC_EXCP_DSI POWERPC_EXCP_DSTLB POWERPC_EXCP_EXTERNAL POWERPC_EXCP_FPU POWERPC_EXCP_IABR POWERPC_EXCP_IFTLB POWERPC_EXCP_ISI POWERPC_EXCP_MCHECK POWERPC_EXCP_PERFM POWERPC_EXCP_PROGRAM POWERPC_EXCP_RESET POWERPC_EXCP_SMI POWERPC_EXCP_SYSCALL POWERPC_EXCP_THERM POWERPC_EXCP_TRACE Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 185 ++------------------------------------- 1 file changed, 9 insertions(+), 176 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index df96f620b2..358c3f6206 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -758,54 +758,26 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) excp, env->error_code); =20 /* new srr1 value excluding must-be-zero bits */ - if (excp_model =3D=3D POWERPC_EXCP_BOOKE) { - msr =3D env->msr; - } else { - msr =3D env->msr & ~0x783f0000ULL; - } + msr =3D env->msr & ~0x783f0000ULL; =20 /* - * new interrupt handler msr preserves existing HV and ME unless + * new interrupt handler msr preserves existing ME unless * explicitly overriden */ - new_msr =3D env->msr & (((target_ulong)1 << MSR_ME) | MSR_HVB); + new_msr =3D env->msr & ((target_ulong)1 << MSR_ME); =20 /* target registers */ srr0 =3D SPR_SRR0; srr1 =3D SPR_SRR1; =20 - /* - * check for special resume at 0x100 from doze/nap/sleep/winkle on - * P7/P8/P9 - */ - if (env->resume_as_sreset) { - excp =3D powerpc_reset_wakeup(cs, env, excp, &msr); - } - /* * Hypervisor emulation assistance interrupt only exists on server - * arch 2.05 server or later. We also don't want to generate it if - * we don't have HVB in msr_mask (PAPR mode). + * arch 2.05 server or later. */ - if (excp =3D=3D POWERPC_EXCP_HV_EMU -#if defined(TARGET_PPC64) - && !(mmu_is_64bit(env->mmu_model) && (env->msr_mask & MSR_HVB)) -#endif /* defined(TARGET_PPC64) */ - - ) { + if (excp =3D=3D POWERPC_EXCP_HV_EMU) { excp =3D POWERPC_EXCP_PROGRAM; } =20 -#ifdef TARGET_PPC64 - /* - * SPEU and VPU share the same IVOR but they exist in different - * processors. SPEU is e500v1/2 only and VPU is e6500 only. - */ - if (excp_model =3D=3D POWERPC_EXCP_BOOKE && excp =3D=3D POWERPC_EXCP_V= PU) { - excp =3D POWERPC_EXCP_SPEU; - } -#endif - vector =3D env->excp_vectors[excp]; if (vector =3D=3D (target_ulong)-1ULL) { cpu_abort(cs, "Raised an exception without defined vector %d\n", @@ -815,22 +787,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) vector |=3D env->excp_prefix; =20 switch (excp) { - case POWERPC_EXCP_CRITICAL: /* Critical input = */ - switch (excp_model) { - case POWERPC_EXCP_40x: - srr0 =3D SPR_40x_SRR2; - srr1 =3D SPR_40x_SRR3; - break; - case POWERPC_EXCP_BOOKE: - srr0 =3D SPR_BOOKE_CSRR0; - srr1 =3D SPR_BOOKE_CSRR1; - break; - case POWERPC_EXCP_6xx: - break; - default: - goto excp_invalid; - } - break; case POWERPC_EXCP_MCHECK: /* Machine check exception = */ if (msr_me =3D=3D 0) { /* @@ -994,63 +950,9 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) new_msr |=3D (target_ulong)MSR_HVB; } break; - case POWERPC_EXCP_SYSCALL_VECTORED: /* scv exception = */ - lev =3D env->error_code; - dump_syscall(env); - env->nip +=3D 4; - new_msr |=3D env->msr & ((target_ulong)1 << MSR_EE); - new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); - - vector +=3D lev * 0x20; - - env->lr =3D env->nip; - env->ctr =3D msr; - break; case POWERPC_EXCP_FPU: /* Floating-point unavailable exception = */ - case POWERPC_EXCP_APU: /* Auxiliary processor unavailable = */ case POWERPC_EXCP_DECR: /* Decrementer exception = */ break; - case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt = */ - /* FIT on 4xx */ - trace_ppc_excp_print("FIT"); - break; - case POWERPC_EXCP_WDT: /* Watchdog timer interrupt = */ - trace_ppc_excp_print("WDT"); - switch (excp_model) { - case POWERPC_EXCP_BOOKE: - srr0 =3D SPR_BOOKE_CSRR0; - srr1 =3D SPR_BOOKE_CSRR1; - break; - default: - break; - } - break; - case POWERPC_EXCP_DTLB: /* Data TLB error = */ - case POWERPC_EXCP_ITLB: /* Instruction TLB error = */ - break; - case POWERPC_EXCP_DEBUG: /* Debug interrupt = */ - if (env->flags & POWERPC_FLAG_DE) { - /* FIXME: choose one or the other based on CPU type */ - srr0 =3D SPR_BOOKE_DSRR0; - srr1 =3D SPR_BOOKE_DSRR1; - - env->spr[SPR_BOOKE_CSRR0] =3D env->nip; - env->spr[SPR_BOOKE_CSRR1] =3D msr; - - /* DBSR already modified by caller */ - } else { - cpu_abort(cs, "Debug exception triggered on unsupported model\= n"); - } - break; - case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable/V= PU */ - env->spr[SPR_BOOKE_ESR] =3D ESR_SPV; - break; - case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt = */ - break; - case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt = */ - srr0 =3D SPR_BOOKE_CSRR0; - srr1 =3D SPR_BOOKE_CSRR1; - break; case POWERPC_EXCP_RESET: /* System reset exception = */ /* A power-saving exception sets ME, otherwise it is unchanged */ if (msr_pow) { @@ -1071,44 +973,8 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) } } break; - case POWERPC_EXCP_DSEG: /* Data segment exception = */ - case POWERPC_EXCP_ISEG: /* Instruction segment exception = */ case POWERPC_EXCP_TRACE: /* Trace exception = */ break; - case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excepti= on */ - msr |=3D env->error_code; - /* fall through */ - case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception = */ - case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception = */ - case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception = */ - case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excepti= on */ - case POWERPC_EXCP_SDOOR_HV: /* Hypervisor Doorbell interrupt = */ - case POWERPC_EXCP_HV_EMU: - case POWERPC_EXCP_HVIRT: /* Hypervisor virtualization = */ - srr0 =3D SPR_HSRR0; - srr1 =3D SPR_HSRR1; - new_msr |=3D (target_ulong)MSR_HVB; - new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); - break; - case POWERPC_EXCP_VPU: /* Vector unavailable exception = */ - case POWERPC_EXCP_VSXU: /* VSX unavailable exception = */ - case POWERPC_EXCP_FU: /* Facility unavailable exception = */ -#ifdef TARGET_PPC64 - env->spr[SPR_FSCR] |=3D ((target_ulong)env->error_code << 56); -#endif - break; - case POWERPC_EXCP_HV_FU: /* Hypervisor Facility Unavailable Except= ion */ -#ifdef TARGET_PPC64 - env->spr[SPR_HFSCR] |=3D ((target_ulong)env->error_code << FSCR_IC= _POS); - srr0 =3D SPR_HSRR0; - srr1 =3D SPR_HSRR1; - new_msr |=3D (target_ulong)MSR_HVB; - new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); -#endif - break; - case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt = */ - trace_ppc_excp_print("PIT"); - break; case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error = */ case POWERPC_EXCP_DLTLB: /* Data load TLB miss = */ case POWERPC_EXCP_DSTLB: /* Data store TLB miss = */ @@ -1133,25 +999,14 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int ex= cp) break; } break; - case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt= */ - case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrup= t */ - case POWERPC_EXCP_EPERFM: /* Embedded performance monitor interrupt= */ - case POWERPC_EXCP_FPA: /* Floating-point assist exception = */ - case POWERPC_EXCP_DABR: /* Data address breakpoint = */ case POWERPC_EXCP_IABR: /* Instruction address breakpoint = */ case POWERPC_EXCP_SMI: /* System management interrupt = */ case POWERPC_EXCP_THERM: /* Thermal interrupt = */ case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt= */ - case POWERPC_EXCP_VPUA: /* Vector assist exception = */ - case POWERPC_EXCP_SOFTP: /* Soft patch exception = */ - case POWERPC_EXCP_MAINT: /* Maintenance exception = */ - case POWERPC_EXCP_MEXTBR: /* Maskable external breakpoint = */ - case POWERPC_EXCP_NMEXTBR: /* Non maskable external breakpoint = */ cpu_abort(cs, "%s exception not implemented\n", powerpc_excp_name(excp)); break; default: - excp_invalid: cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); break; } @@ -1176,33 +1031,11 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int e= xcp) new_msr |=3D (target_ulong)1 << MSR_LE; } =20 -#if defined(TARGET_PPC64) - if (excp_model =3D=3D POWERPC_EXCP_BOOKE) { - if (env->spr[SPR_BOOKE_EPCR] & EPCR_ICM) { - /* Cat.64-bit: EPCR.ICM is copied to MSR.CM */ - new_msr |=3D (target_ulong)1 << MSR_CM; - } else { - vector =3D (uint32_t)vector; - } - } else { - if (!msr_isf && !mmu_is_64bit(env->mmu_model)) { - vector =3D (uint32_t)vector; - } else { - new_msr |=3D (target_ulong)1 << MSR_SF; - } - } -#endif + /* Save PC */ + env->spr[srr0] =3D env->nip; =20 - if (excp !=3D POWERPC_EXCP_SYSCALL_VECTORED) { - /* Save PC */ - env->spr[srr0] =3D env->nip; - - /* Save MSR */ - env->spr[srr1] =3D msr; - } - - /* This can update new_msr and vector if AIL applies */ - ppc_excp_apply_ail(cpu, excp_model, excp, msr, &new_msr, &vector); + /* Save MSR */ + env->spr[srr1] =3D msr; =20 powerpc_set_excp_state(cpu, vector, new_msr); } --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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b=PyY+x4gTHTENI5pxoO577w9swC75COKzNbIHDMXVGkMwravCWif0ekEt0j6FB5JBAPxQ 5MfRv8Uo1W3pOY+mbNEduuTRM6FjXtKuWPDnGdnXmw97q1d6CFpCOpBpzwujToiLj543 /YT/o0a9/pQZX7F+EJvzljN/q8qhxzN2fa8JQenXSS+LEqXy1QxjSysPR9iq4pO6fOXi J2p1Ccyy3ZmDbLh909+TyTkeXgUvuBrZyzRSMvvx1RvZkfGhtqdBhpucXk179IbQVKqa GhWg1ZU9iS7a6bImHvT4jKNkGLHq1Trv1lpveXDnPdY6qo4g8pcm+2d6AvFT+/B//u4u tg== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 04/10] target/ppc: 7xx: Machine Check exception cleanup Date: Fri, 4 Feb 2022 14:34:24 -0300 Message-Id: <20220204173430.1457358-5-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: -A5QaHrySD9VEURDgtpnGm8Nwjtdx9qF X-Proofpoint-GUID: arL1_SIoWdgIkcqx_qKHdqKSFEVwL3j_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 phishscore=0 clxscore=1015 mlxscore=0 bulkscore=0 malwarescore=0 spamscore=0 mlxlogscore=935 lowpriorityscore=0 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643997839837100001 Content-Type: text/plain; charset="utf-8" There's no MSR_HV in the 7xx. Also remove 40x and BookE code. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 358c3f6206..4996b96616 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -802,34 +802,10 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) cs->halted =3D 1; cpu_interrupt_exittb(cs); } - if (env->msr_mask & MSR_HVB) { - /* - * ISA specifies HV, but can be delivered to guest with HV - * clear (e.g., see FWNMI in PAPR). - */ - new_msr |=3D (target_ulong)MSR_HVB; - } =20 /* machine check exceptions don't have ME set */ new_msr &=3D ~((target_ulong)1 << MSR_ME); =20 - /* XXX: should also have something loaded in DAR / DSISR */ - switch (excp_model) { - case POWERPC_EXCP_40x: - srr0 =3D SPR_40x_SRR2; - srr1 =3D SPR_40x_SRR3; - break; - case POWERPC_EXCP_BOOKE: - /* FIXME: choose one or the other based on CPU type */ - srr0 =3D SPR_BOOKE_MCSRR0; - srr1 =3D SPR_BOOKE_MCSRR1; - - env->spr[SPR_BOOKE_CSRR0] =3D env->nip; - env->spr[SPR_BOOKE_CSRR1] =3D msr; - break; - default: - break; - } break; case POWERPC_EXCP_DSI: /* Data storage exception = */ trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643997059504283.3633767553192; Fri, 4 Feb 2022 09:50:59 -0800 (PST) Received: from localhost ([::1]:41090 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG2ja-0007QC-Fc for importer@patchew.org; Fri, 04 Feb 2022 12:50:58 -0500 Received: from eggs.gnu.org ([209.51.188.92]:35128) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG2UW-0000jU-4O; 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Fri, 04 Feb 2022 17:34:56 +0000 Received: from pps.filterd (ppma04dal.us.ibm.com [127.0.0.1]) by ppma04dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 214HSwvh031815; Fri, 4 Feb 2022 17:34:55 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma04dal.us.ibm.com with ESMTP id 3e0r0ru31n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 04 Feb 2022 17:34:55 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 214HYsN223921002 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 4 Feb 2022 17:34:54 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9DDD2AE06B; Fri, 4 Feb 2022 17:34:54 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1C0FAAE060; Fri, 4 Feb 2022 17:34:52 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:34:51 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=b8O3maDFTW+i5MxJtSl7zO81Ra+E75WCJdrcGKl/1zo=; b=Tf4tPXhG/E0Pc6euh6ATGf7EtgJ8CL7Zd4fiR42wu6KEstnOpkUaZQu+8PzRmi64r09M EAO0WXHexeBHTruiHdmLHy4eVGiq+GXUlq8isOYMFmaRYGo20ZpKixgY5g9UeJSBOQnT wfvSbOnTvFAYITq32nVmE2eCb3tlmvPrPyAJe6G7iTH08zIgDrxuq47isDtj1ivgusVk GcfXrNKpiLAXq191r27d3NEI2fhBal3CG+Q+rNfPix5FR56M8EJ5Pfd8zlV7watCXEbL Vw8f4mHrr/cIlUcpj2Jy9l/f13A5BWjXP+3MQ7CJP4r5ePj13/gGwLK7+aD7nXL3X0Wp Mg== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 05/10] target/ppc: 7xx: External interrupt cleanup Date: Fri, 4 Feb 2022 14:34:25 -0300 Message-Id: <20220204173430.1457358-6-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: fspG01M0FZviMQYnOm2wyGIOo5eTmC5h X-Proofpoint-ORIG-GUID: TWkyh29kcFvne7VttCC7vhnPE2iNVBvc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 mlxlogscore=976 clxscore=1015 lowpriorityscore=0 adultscore=0 mlxscore=0 spamscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643997060970100001 Content-Type: text/plain; charset="utf-8" There is no MSR_HV in the 7xx so remove the LPES0 handling. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 37 ------------------------------------- 1 file changed, 37 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 4996b96616..5e2c2aa544 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -815,44 +815,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) msr |=3D env->error_code; break; case POWERPC_EXCP_EXTERNAL: /* External input = */ - { - bool lpes0; - - cs =3D CPU(cpu); - - /* - * Exception targeting modifiers - * - * LPES0 is supported on POWER7/8/9 - * LPES1 is not supported (old iSeries mode) - * - * On anything else, we behave as if LPES0 is 1 - * (externals don't alter MSR:HV) - */ -#if defined(TARGET_PPC64) - if (excp_model =3D=3D POWERPC_EXCP_POWER7 || - excp_model =3D=3D POWERPC_EXCP_POWER8 || - excp_model =3D=3D POWERPC_EXCP_POWER9 || - excp_model =3D=3D POWERPC_EXCP_POWER10) { - lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); - } else -#endif /* defined(TARGET_PPC64) */ - { - lpes0 =3D true; - } - - if (!lpes0) { - new_msr |=3D (target_ulong)MSR_HVB; - new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); - srr0 =3D SPR_HSRR0; - srr1 =3D SPR_HSRR1; - } - if (env->mpic_proxy) { - /* IACK the IRQ on delivery */ - env->spr[SPR_BOOKE_EPR] =3D ldl_phys(cs->as, env->mpic_iack); - } break; - } case POWERPC_EXCP_ALIGN: /* Alignment exception = */ /* Get rS/rD and rA from faulting opcode */ /* --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643997676492909.1934215026008; Fri, 4 Feb 2022 10:01:16 -0800 (PST) Received: from localhost ([::1]:54214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG2tW-00085o-1Z for importer@patchew.org; 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Fri, 4 Feb 2022 17:34:54 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=FsiDgZKvwmkV/zoMMx2SW6mzm4xuaLUFsAzs/NrzgHI=; b=GHOTZ7GjKNdwUBljPX6vqSCw2T36zDKx4rq/2H8Qw7pqmQZjOxQp+/cmCKwuHovtOrVA ABNco/CIFqPR2Af3HgIBDDVkHA9Yg02/jGvehiVrU7HW8mwo0SmkwQVcdFSENk4a1pbK Ti4HnIkvNkOrw6uuE2E5N4c02IOjN+CD/N15Rq26R2MkjFo0mCVxUQyLjxi5Eb1Wq3q7 aQbBGs3x5fYRTn1Trbrm+n3p5RyEWXdgK58dBtJkW9qn7k76hrDU2tyo7U/HHhzN/ZjJ NoqKOxXkRuQ0t0PknTPexo65pz4FdeKb5Boal8lb/U72hI8JHyX7jpZSt8odNR4nDNK/ 6Q== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 06/10] target/ppc: 7xx: Program exception cleanup Date: Fri, 4 Feb 2022 14:34:26 -0300 Message-Id: <20220204173430.1457358-7-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: mu6HR0bv0sX8CJEojERQXjGGA3c19u0- X-Proofpoint-ORIG-GUID: vxclIjBOuocs80lCrIP4xVTwWOMufsZ_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 mlxlogscore=999 suspectscore=0 spamscore=0 malwarescore=0 phishscore=0 priorityscore=1501 impostorscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643997680013100001 Content-Type: text/plain; charset="utf-8" There's no ESR in the 7xx. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 5e2c2aa544..8f810f7de5 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -841,20 +841,16 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) * precise in the MSR. */ msr |=3D 0x00100000; - env->spr[SPR_BOOKE_ESR] =3D ESR_FP; break; case POWERPC_EXCP_INVAL: trace_ppc_excp_inval(env->nip); msr |=3D 0x00080000; - env->spr[SPR_BOOKE_ESR] =3D ESR_PIL; break; case POWERPC_EXCP_PRIV: msr |=3D 0x00040000; - env->spr[SPR_BOOKE_ESR] =3D ESR_PPR; break; case POWERPC_EXCP_TRAP: msr |=3D 0x00020000; - env->spr[SPR_BOOKE_ESR] =3D ESR_PTR; break; default: /* Should never occur */ --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 04 Feb 2022 17:35:01 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 214HZ0jR26804514 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 4 Feb 2022 17:35:00 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7BC2EAE060; Fri, 4 Feb 2022 17:35:00 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 208D3AE06A; Fri, 4 Feb 2022 17:34:58 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:34:57 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=Kk8yWESsbt3qdtpwzc37jeW70Mk9iwzLlwzU3OEl8hg=; b=Pd3+rn1gmM0cSuy8ykUBMc2AeQKh8l1Rknts8Laf67ya5Aqs9IzxnIDji+4IohGPQSHR cgS4ICba5jAF9FVFANsAA9Ygz/pItEhGCnDNd+tuBboFz8FsKFfe7rrydyIr5n53oPJj 1rjz3HsK0yZn1kmnq332ei5YoFWX7pja+12Gl0TLxjvDxvNM3pRQTMEYvgfinWC8EEKp WV+kV8Fwyaz8KvjPKSskmRshZv85P5QqmEvgvZ0Z0sbcMSIRGpKVB0VJHM90X0spMKFY NqM2KYFK8hCnDXwUnVydM3r3inWt+Zy3thK8oM/nE2oW+PKD2q9NwBUFGPoapuMH73+3 oQ== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 07/10] target/ppc: 7xx: System Call exception cleanup Date: Fri, 4 Feb 2022 14:34:27 -0300 Message-Id: <20220204173430.1457358-8-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Ayl3gkQLs_PdINbJCyxxUMAscbqYr4a1 X-Proofpoint-ORIG-GUID: 6OEAEk4uYhnD8puS7e2TJVxFqNoQ3eFl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 mlxlogscore=940 clxscore=1015 lowpriorityscore=0 adultscore=0 mlxscore=0 spamscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643996471905100005 Content-Type: text/plain; charset="utf-8" Remove the BookE code and add a comment explaining why we need to keep hypercall support even though this CPU does not have a hypervisor mode. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 8f810f7de5..14a4eea9d6 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -747,7 +747,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) CPUPPCState *env =3D &cpu->env; int excp_model =3D env->excp_model; target_ulong msr, new_msr, vector; - int srr0, srr1, lev =3D -1; + int srr0, srr1; =20 if (excp <=3D POWERPC_EXCP_NONE || excp >=3D POWERPC_EXCP_NB) { cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); @@ -860,9 +860,10 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) } break; case POWERPC_EXCP_SYSCALL: /* System call exception = */ - lev =3D env->error_code; + { + int lev =3D env->error_code; =20 - if ((lev =3D=3D 1) && cpu->vhyp) { + if (lev =3D=3D 1 && cpu->vhyp) { dump_hcall(env); } else { dump_syscall(env); @@ -874,17 +875,21 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) */ env->nip +=3D 4; =20 - /* "PAPR mode" built-in hypercall emulation */ - if ((lev =3D=3D 1) && cpu->vhyp) { + /* + * The Virtual Open Firmware (VOF) relies on the 'sc 1' + * instruction to communicate with QEMU. The pegasos2 machine + * uses VOF and the 7xx CPUs, so although the 7xx don't have + * HV mode, we need to keep hypercall support. + */ + if (lev =3D=3D 1 && cpu->vhyp) { PPCVirtualHypervisorClass *vhc =3D PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); vhc->hypercall(cpu->vhyp, cpu); return; } - if (lev =3D=3D 1) { - new_msr |=3D (target_ulong)MSR_HVB; - } + break; + } case POWERPC_EXCP_FPU: /* Floating-point unavailable exception = */ case POWERPC_EXCP_DECR: /* Decrementer exception = */ break; --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643996468014671.5073400834295; Fri, 4 Feb 2022 09:41:08 -0800 (PST) Received: from localhost ([::1]:52310 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG2a2-0003nT-Bb for importer@patchew.org; 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Fri, 4 Feb 2022 17:35:04 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 19D34AE06A; Fri, 4 Feb 2022 17:35:01 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:35:00 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=VwKiqo67kX7EisGgFw9v8TkcLxKfvEDYlgVRjvvmhxk=; b=ZyleecvTgMm2zfJGyur/VmMLi37NgImIamm/ECYbbKxYbG8vjn8fAs1P0xh21iOvP1g9 5CB6UNS6NLX0tCDD23opKbP0WYoVfIn8ss+Wl/NRyZH24/tZ5BLy4kHHn6u8N501zxk2 yvYVh5oNzoJAAMBqfjvThlsHbR6UBY4F+RFPSIMQLZ4R6I4FLD7x2wu110XBs81HsFiB 6X4SE+TjYMVaV0x3uxiUODGeE2dicTXdarh/0IpLqgl0OKzD9Qmz+DnQ++0sKpjEH62z jeqOg0OcwyR9VMSOF3LyOvuANlpwrD4/tmEdiA/zCQBxFMyzgTZtE686SlZM/EbhA2MK Pw== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 08/10] target/ppc: 7xx: System Reset cleanup Date: Fri, 4 Feb 2022 14:34:28 -0300 Message-Id: <20220204173430.1457358-9-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ff4KfIRGuJWJ3o63sBbLOApSCIFw9tbT X-Proofpoint-GUID: AHJFKNXN936Sxs3QVurLkf2BnckRjTh1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 phishscore=0 clxscore=1015 mlxscore=0 bulkscore=0 malwarescore=0 spamscore=0 mlxlogscore=743 lowpriorityscore=0 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643996470156100001 Content-Type: text/plain; charset="utf-8" Thre is no HV support in the 7xx. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 14a4eea9d6..2bbfc25d2b 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -894,23 +894,9 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_DECR: /* Decrementer exception = */ break; case POWERPC_EXCP_RESET: /* System reset exception = */ - /* A power-saving exception sets ME, otherwise it is unchanged */ if (msr_pow) { - /* indicate that we resumed from power save mode */ - msr |=3D 0x10000; - new_msr |=3D ((target_ulong)1 << MSR_ME); - } - if (env->msr_mask & MSR_HVB) { - /* - * ISA specifies HV, but can be delivered to guest with HV - * clear (e.g., see FWNMI in PAPR, NMI injection in QEMU). - */ - new_msr |=3D (target_ulong)MSR_HVB; - } else { - if (msr_pow) { - cpu_abort(cs, "Trying to deliver power-saving system reset= " - "exception %d with no HV support\n", excp); - } + cpu_abort(cs, "Trying to deliver power-saving system reset " + "exception %d with no HV support\n", excp); } break; case POWERPC_EXCP_TRACE: /* Trace exception = */ --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643998601794577.198342743148; Fri, 4 Feb 2022 10:16:41 -0800 (PST) Received: from localhost ([::1]:38582 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG38S-0000QS-V2 for importer@patchew.org; Fri, 04 Feb 2022 13:16:40 -0500 Received: from eggs.gnu.org ([209.51.188.92]:35188) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG2UX-0000jw-Li; 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Fri, 04 Feb 2022 17:35:09 +0000 Received: from pps.filterd (ppma04dal.us.ibm.com [127.0.0.1]) by ppma04dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 214HSv84031668; Fri, 4 Feb 2022 17:35:08 GMT Received: from b01cxnp23033.gho.pok.ibm.com (b01cxnp23033.gho.pok.ibm.com [9.57.198.28]) by ppma04dal.us.ibm.com with ESMTP id 3e0r0ru35b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 04 Feb 2022 17:35:08 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 214HZ79u35062108 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 4 Feb 2022 17:35:07 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 700BFAE066; Fri, 4 Feb 2022 17:35:07 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7091DAE05C; Fri, 4 Feb 2022 17:35:05 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:35:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=iE8Pf+9ozmHrss9JohmdE7eIkX8eRVorJZiByf65Ox4=; b=Gc1Up8hH5C6X4SmNZlX4m3pnxpekZcuUPBx+96K4OCYLSuxNFevyy8NWCqtPuRSBOPoX RWogdsf1c2iGEuDjoUvi3U1bUC180emYhkKo6mYTHaEVZA+2RCM8mzPRrBN1a+6brDqy lX8MAyGNcv8svpzJl5ixtLwYjWKmQ/Pv6YDYcZ9pO+wnCLWIxGKglEh1l68MbOYERimu q8RA1oHxJTH1GT4NxHKRCTM76sbFhm99KkXvxVOSDrG8vGaEgndAYWY54nPlo8dVdkLQ 2EkqxFdS3FnWEm4pFrjXEtndVWVIs4mmILFZMBrqpOr70cpAt5eB+kf2zi9/CapHiA0z Hw== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 09/10] target/ppc: 7xx: Software TLB cleanup Date: Fri, 4 Feb 2022 14:34:29 -0300 Message-Id: <20220204173430.1457358-10-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: u3jAkA-1vyfXngA8hAhQORBgjWmmG12T X-Proofpoint-GUID: pQT8Gv2o0JX1JAI5a3B9ZntUKRIze9mG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 mlxlogscore=475 adultscore=0 malwarescore=0 suspectscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 phishscore=0 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643998604723100001 Content-Type: text/plain; charset="utf-8" This code applies only to the 7xx CPUs, so we can remove the switch statement. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 26 ++++++-------------------- 1 file changed, 6 insertions(+), 20 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 2bbfc25d2b..dd373a4d5b 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -745,7 +745,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) { CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; - int excp_model =3D env->excp_model; target_ulong msr, new_msr, vector; int srr0, srr1; =20 @@ -904,26 +903,13 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error = */ case POWERPC_EXCP_DLTLB: /* Data load TLB miss = */ case POWERPC_EXCP_DSTLB: /* Data store TLB miss = */ - switch (excp_model) { - case POWERPC_EXCP_6xx: - /* Swap temporary saved registers with GPRs */ - if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) { - new_msr |=3D (target_ulong)1 << MSR_TGPR; - hreg_swap_gpr_tgpr(env); - } - /* fall through */ - case POWERPC_EXCP_7xx: - ppc_excp_debug_sw_tlb(env, excp); + ppc_excp_debug_sw_tlb(env, excp); + + msr |=3D env->crf[0] << 28; + msr |=3D env->error_code; /* key, D/I, S/L bits */ + /* Set way using a LRU mechanism */ + msr |=3D ((env->last_way + 1) & (env->nb_ways - 1)) << 17; =20 - msr |=3D env->crf[0] << 28; - msr |=3D env->error_code; /* key, D/I, S/L bits */ - /* Set way using a LRU mechanism */ - msr |=3D ((env->last_way + 1) & (env->nb_ways - 1)) << 17; - break; - default: - cpu_abort(cs, "Invalid TLB miss exception\n"); - break; - } break; case POWERPC_EXCP_IABR: /* Instruction address breakpoint = */ case POWERPC_EXCP_SMI: /* System management interrupt = */ --=20 2.34.1 From nobody Fri Dec 19 07:42:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643997235439392.8376515094726; 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Fri, 4 Feb 2022 17:35:10 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E7A91AE067; Fri, 4 Feb 2022 17:35:09 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 10686AE060; Fri, 4 Feb 2022 17:35:08 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.79.16]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 4 Feb 2022 17:35:07 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=1beqNWUOMxORUpwiJ1iJY9moPbR9rZlOtmg8Wdk42hc=; b=hQJ+/qRmhPzHnYUJsiO2LSWxLVwLz0DUkgpRIrTy5tXOwwCkomgyxKlqXVlv/O+I1uwk S6gZmPiQndBurWO2wDv2FunKWydP5oJR6KnFE/FnT/lT4U4pHrO2qyo9zju0QceScRyt 9lXAvwN7J5V4LgZCmA3W5JgQblw4wykGcEkfwTdhaMpTLdMJUXHG81n72sgQDcTS5cuH W2f8uS/GAxrIl5+U9qvB6qvorGGLtARRZ+dJIlKC5p52jqOTQjzMBPMteyVntL/3vRnC WJJnKZP2T9hSBn0Z9Y2bY8QRpHeHvabOcDlLhqWJnylPvCcI6+zDywQE0usDNGSQmv4y 2A== From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 10/10] target/ppc: 7xx: Set SRRs directly in exception code Date: Fri, 4 Feb 2022 14:34:30 -0300 Message-Id: <20220204173430.1457358-11-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220204173430.1457358-1-farosas@linux.ibm.com> References: <20220204173430.1457358-1-farosas@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: sWPSQrDUjJf1vESkUbbcsJhB2CXu0lRO X-Proofpoint-ORIG-GUID: a-f2DbcGYlVZ9jSAlGm6Mc_JqiDoHPmJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-04_07,2022-02-03_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 mlxlogscore=678 clxscore=1015 lowpriorityscore=0 adultscore=0 mlxscore=0 spamscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202040097 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643997236988100001 Content-Type: text/plain; charset="utf-8" The 7xx CPUs don't have alternate/hypervisor Save and Restore Registers, so we can set SRR0 and SRR1 directly. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index dd373a4d5b..0eb6b7af55 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -746,7 +746,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; target_ulong msr, new_msr, vector; - int srr0, srr1; =20 if (excp <=3D POWERPC_EXCP_NONE || excp >=3D POWERPC_EXCP_NB) { cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); @@ -765,10 +764,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) */ new_msr =3D env->msr & ((target_ulong)1 << MSR_ME); =20 - /* target registers */ - srr0 =3D SPR_SRR0; - srr1 =3D SPR_SRR1; - /* * Hypervisor emulation assistance interrupt only exists on server * arch 2.05 server or later. @@ -929,10 +924,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) cpu_abort(cs, "Trying to deliver HV exception (MSR) %d with " "no HV support\n", excp); } - if (srr0 =3D=3D SPR_HSRR0) { - cpu_abort(cs, "Trying to deliver HV exception (HSRR) %d with " - "no HV support\n", excp); - } } =20 /* @@ -944,10 +935,10 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int exc= p) } =20 /* Save PC */ - env->spr[srr0] =3D env->nip; + env->spr[SPR_SRR0] =3D env->nip; =20 /* Save MSR */ - env->spr[srr1] =3D msr; + env->spr[SPR_SRR1] =3D msr; =20 powerpc_set_excp_state(cpu, vector, new_msr); } --=20 2.34.1