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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aM2+UxPzWjA1KpVbRhblTipNTCf1EvXdXhK2XLBnlnc=; b=cmYg+OQ8z2OdmPuinq74oZGjk4RWMD9i4UbFO86Bn4KEdFcsr4/u8nzGw43CmxSTnO CaO8mrz7AcdStJU/mbisFriyjxY3b7ZxqfUv+1qL3teWGcyA9Voxj9SyzlwT5IYKLEzH UQMbuaBulbhd4wckHJo3C9w9lxd6jylliPjbAC86fTcwnYvBAGgfQPQ9qQNPJtWb7V+X b7U/4fS/au4A47TshBK9/iiSYpPbxK288TT/1eelX8sUrkt0aP+qU54MWqeyJ5PQtLDM Xdps1wnxrMB+8oZH7jx5H0Gln1rM+liQMbUWKEeSQP30Pt1rI1icyyq201RvmBME9d0S U7bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aM2+UxPzWjA1KpVbRhblTipNTCf1EvXdXhK2XLBnlnc=; b=GpKBmtY0sUFvv7NmF6SvE956Dj/ebEBlh2hWFHP/ghA/f/Z+XRK2IzYtc5nruEeRm1 pL+qyNObH3Ifr8k5BFz0eTeVEToQon3QbHoSQ5KXdZIpzVwtL120Nho8Kjo00+LZ/6RU lPRRsivv3bZuN8sK7gqSeNdI0/jfKA2Lg3SJbNPTb9RMws5bjTaiXYDmNq4NkWLXBJp1 oqvTAOoA4jOH3wB+JssH1p9y8yqrfKNOOMhAfqbloI21OVOFx6h/iWgqXDX8OYjDq5Ef XMhWnrknWj6X7IoSxdNM2I/HviNhN3WIPMXJiqaxPnI23Ao7iEZCg4W67KK9EJ9dVMQU GJOQ== X-Gm-Message-State: AOAM532WLvCYmmrlUoXA61GqXuVEpQueYS7nUDm+LAdy2w43ai49zIHe bxp54CwsOniovPT2tT4LVNrQhA== X-Google-Smtp-Source: ABdhPJwujUlgVHDVZqcobTMPAGZ1v3DJm3ccUQokh2pxBDzKxKuVjOd0PSIT4mctT3SwuBvrw4I4JQ== X-Received: by 2002:adf:e4cb:: with SMTP id v11mr22023959wrm.139.1643743930443; Tue, 01 Feb 2022 11:32:10 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 01/13] hw/intc/arm_gicv3_its: Use address_space_map() to access command queue packets Date: Tue, 1 Feb 2022 19:31:55 +0000 Message-Id: <20220201193207.2771604-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::429 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643761385053100001 Content-Type: text/plain; charset="utf-8" Currently the ITS accesses each 8-byte doubleword in a 4-doubleword command packet with a separate address_space_ldq_le() call. This is awkward because the individual command processing functions have ended up with code to handle "load more doublewords out of the packet", which is both unwieldy and also a potential source of bugs because it's not obvious when looking at a line that pulls a field out of the 'value' variable which of the 4 doublewords that variable currently holds. Switch to using address_space_map() to map the whole command packet at once and fish the four doublewords out of it. Then each process_* function can start with a few lines of code that extract the fields it cares about. This requires us to split out the guts of process_its_cmd() into a new do_process_its_cmd(), because we were previously overloading the value and offset arguments as a backdoor way to directly pass the devid and eventid from a write to GITS_TRANSLATER. The new do_process_its_cmd() takes those arguments directly, and process_its_cmd() is just a wrapper that does the "read fields from command packet" part. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/gicv3_internal.h | 4 +- hw/intc/arm_gicv3_its.c | 208 +++++++++++---------------------------- 2 files changed, 62 insertions(+), 150 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index b1af26df9f4..60c8617e4e4 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -309,8 +309,8 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define LPI_CTE_ENABLED TABLE_ENTRY_VALID_MASK #define LPI_PRIORITY_MASK 0xfc =20 -#define GITS_CMDQ_ENTRY_SIZE 32 -#define NUM_BYTES_IN_DW 8 +#define GITS_CMDQ_ENTRY_WORDS 4 +#define GITS_CMDQ_ENTRY_SIZE (GITS_CMDQ_ENTRY_WORDS * sizeof(uint64_t)) =20 #define CMD_MASK 0xff =20 diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 51d9be4ae6f..b74753fb8fe 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -224,11 +224,9 @@ static uint64_t get_dte(GICv3ITSState *s, uint32_t dev= id, MemTxResult *res) * 3. handling of ITS CLEAR command * 4. handling of ITS DISCARD command */ -static ItsCmdResult process_its_cmd(GICv3ITSState *s, uint64_t value, - uint32_t offset, ItsCmdType cmd) +static ItsCmdResult do_process_its_cmd(GICv3ITSState *s, uint32_t devid, + uint32_t eventid, ItsCmdType cmd) { - AddressSpace *as =3D &s->gicv3->dma_as; - uint32_t devid, eventid; MemTxResult res =3D MEMTX_OK; bool dte_valid; uint64_t dte =3D 0; @@ -240,22 +238,6 @@ static ItsCmdResult process_its_cmd(GICv3ITSState *s, = uint64_t value, bool cte_valid =3D false; uint64_t rdbase; =20 - if (cmd =3D=3D NONE) { - devid =3D offset; - } else { - devid =3D ((value & DEVID_MASK) >> DEVID_SHIFT); - - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - } - - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - eventid =3D (value & EVENTID_MASK); - if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: devid %d>=3D%d", @@ -342,11 +324,19 @@ static ItsCmdResult process_its_cmd(GICv3ITSState *s,= uint64_t value, } return CMD_CONTINUE; } - -static ItsCmdResult process_mapti(GICv3ITSState *s, uint64_t value, - uint32_t offset, bool ignore_pInt) +static ItsCmdResult process_its_cmd(GICv3ITSState *s, const uint64_t *cmdp= kt, + ItsCmdType cmd) +{ + uint32_t devid, eventid; + + devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; + eventid =3D cmdpkt[1] & EVENTID_MASK; + return do_process_its_cmd(s, devid, eventid, cmd); +} + +static ItsCmdResult process_mapti(GICv3ITSState *s, const uint64_t *cmdpkt, + bool ignore_pInt) { - AddressSpace *as =3D &s->gicv3->dma_as; uint32_t devid, eventid; uint32_t pIntid =3D 0; uint64_t num_eventids; @@ -357,32 +347,16 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, u= int64_t value, uint64_t dte =3D 0; IteEntry ite =3D {}; =20 - devid =3D ((value & DEVID_MASK) >> DEVID_SHIFT); - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - eventid =3D (value & EVENTID_MASK); + devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; + eventid =3D cmdpkt[1] & EVENTID_MASK; =20 if (ignore_pInt) { pIntid =3D eventid; } else { - pIntid =3D ((value & pINTID_MASK) >> pINTID_SHIFT); + pIntid =3D (cmdpkt[1] & pINTID_MASK) >> pINTID_SHIFT; } =20 - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - icid =3D value & ICID_MASK; + icid =3D cmdpkt[2] & ICID_MASK; =20 if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, @@ -459,31 +433,18 @@ static bool update_cte(GICv3ITSState *s, uint16_t ici= d, bool valid, return res =3D=3D MEMTX_OK; } =20 -static ItsCmdResult process_mapc(GICv3ITSState *s, uint32_t offset) +static ItsCmdResult process_mapc(GICv3ITSState *s, const uint64_t *cmdpkt) { - AddressSpace *as =3D &s->gicv3->dma_as; uint16_t icid; uint64_t rdbase; bool valid; - MemTxResult res =3D MEMTX_OK; - uint64_t value; =20 - offset +=3D NUM_BYTES_IN_DW; - offset +=3D NUM_BYTES_IN_DW; + icid =3D cmdpkt[2] & ICID_MASK; =20 - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - icid =3D value & ICID_MASK; - - rdbase =3D (value & R_MAPC_RDBASE_MASK) >> R_MAPC_RDBASE_SHIFT; + rdbase =3D (cmdpkt[2] & R_MAPC_RDBASE_MASK) >> R_MAPC_RDBASE_SHIFT; rdbase &=3D RDBASE_PROCNUM_MASK; =20 - valid =3D (value & CMD_FIELD_VALID_MASK); + valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; =20 if ((icid >=3D s->ct.num_entries) || (rdbase >=3D s->gicv3->num_cpu)) { qemu_log_mask(LOG_GUEST_ERROR, @@ -532,39 +493,17 @@ static bool update_dte(GICv3ITSState *s, uint32_t dev= id, bool valid, return res =3D=3D MEMTX_OK; } =20 -static ItsCmdResult process_mapd(GICv3ITSState *s, uint64_t value, - uint32_t offset) +static ItsCmdResult process_mapd(GICv3ITSState *s, const uint64_t *cmdpkt) { - AddressSpace *as =3D &s->gicv3->dma_as; uint32_t devid; uint8_t size; uint64_t itt_addr; bool valid; - MemTxResult res =3D MEMTX_OK; =20 - devid =3D ((value & DEVID_MASK) >> DEVID_SHIFT); - - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - size =3D (value & SIZE_MASK); - - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - itt_addr =3D (value & ITTADDR_MASK) >> ITTADDR_SHIFT; - - valid =3D (value & CMD_FIELD_VALID_MASK); + devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; + size =3D cmdpkt[1] & SIZE_MASK; + itt_addr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT; + valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; =20 if ((devid >=3D s->dt.num_entries) || (size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS))) { @@ -582,23 +521,13 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, ui= nt64_t value, return update_dte(s, devid, valid, size, itt_addr) ? CMD_CONTINUE : CM= D_STALL; } =20 -static ItsCmdResult process_movall(GICv3ITSState *s, uint64_t value, - uint32_t offset) +static ItsCmdResult process_movall(GICv3ITSState *s, const uint64_t *cmdpk= t) { - AddressSpace *as =3D &s->gicv3->dma_as; - MemTxResult res =3D MEMTX_OK; uint64_t rd1, rd2; =20 - /* No fields in dwords 0 or 1 */ - offset +=3D NUM_BYTES_IN_DW; - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } + rd1 =3D FIELD_EX64(cmdpkt[2], MOVALL_2, RDBASE1); + rd2 =3D FIELD_EX64(cmdpkt[3], MOVALL_3, RDBASE2); =20 - rd1 =3D FIELD_EX64(value, MOVALL_2, RDBASE1); if (rd1 >=3D s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, "%s: RDBASE1 %" PRId64 @@ -606,15 +535,6 @@ static ItsCmdResult process_movall(GICv3ITSState *s, u= int64_t value, __func__, rd1, s->gicv3->num_cpu); return CMD_CONTINUE; } - - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - - rd2 =3D FIELD_EX64(value, MOVALL_3, RDBASE2); if (rd2 >=3D s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, "%s: RDBASE2 %" PRId64 @@ -634,10 +554,8 @@ static ItsCmdResult process_movall(GICv3ITSState *s, u= int64_t value, return CMD_CONTINUE; } =20 -static ItsCmdResult process_movi(GICv3ITSState *s, uint64_t value, - uint32_t offset) +static ItsCmdResult process_movi(GICv3ITSState *s, const uint64_t *cmdpkt) { - AddressSpace *as =3D &s->gicv3->dma_as; MemTxResult res =3D MEMTX_OK; uint32_t devid, eventid, intid; uint16_t old_icid, new_icid; @@ -648,23 +566,9 @@ static ItsCmdResult process_movi(GICv3ITSState *s, uin= t64_t value, uint64_t num_eventids; IteEntry ite =3D {}; =20 - devid =3D FIELD_EX64(value, MOVI_0, DEVICEID); - - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - eventid =3D FIELD_EX64(value, MOVI_1, EVENTID); - - offset +=3D NUM_BYTES_IN_DW; - value =3D address_space_ldq_le(as, s->cq.base_addr + offset, - MEMTXATTRS_UNSPECIFIED, &res); - if (res !=3D MEMTX_OK) { - return CMD_STALL; - } - new_icid =3D FIELD_EX64(value, MOVI_2, ICID); + devid =3D FIELD_EX64(cmdpkt[0], MOVI_0, DEVICEID); + eventid =3D FIELD_EX64(cmdpkt[1], MOVI_1, EVENTID); + new_icid =3D FIELD_EX64(cmdpkt[2], MOVI_2, ICID); =20 if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, @@ -786,9 +690,7 @@ static void process_cmdq(GICv3ITSState *s) uint32_t wr_offset =3D 0; uint32_t rd_offset =3D 0; uint32_t cq_offset =3D 0; - uint64_t data; AddressSpace *as =3D &s->gicv3->dma_as; - MemTxResult res =3D MEMTX_OK; uint8_t cmd; int i; =20 @@ -816,28 +718,40 @@ static void process_cmdq(GICv3ITSState *s) =20 while (wr_offset !=3D rd_offset) { ItsCmdResult result =3D CMD_CONTINUE; + void *hostmem; + hwaddr buflen; + uint64_t cmdpkt[GITS_CMDQ_ENTRY_WORDS]; =20 cq_offset =3D (rd_offset * GITS_CMDQ_ENTRY_SIZE); - data =3D address_space_ldq_le(as, s->cq.base_addr + cq_offset, - MEMTXATTRS_UNSPECIFIED, &res); - if (res !=3D MEMTX_OK) { + + buflen =3D GITS_CMDQ_ENTRY_SIZE; + hostmem =3D address_space_map(as, s->cq.base_addr + cq_offset, + &buflen, false, MEMTXATTRS_UNSPECIFIED= ); + if (!hostmem || buflen !=3D GITS_CMDQ_ENTRY_SIZE) { + if (hostmem) { + address_space_unmap(as, hostmem, buflen, false, 0); + } s->creadr =3D FIELD_DP64(s->creadr, GITS_CREADR, STALLED, 1); qemu_log_mask(LOG_GUEST_ERROR, "%s: could not read command at 0x%" PRIx64 "\n", __func__, s->cq.base_addr + cq_offset); break; } + for (i =3D 0; i < ARRAY_SIZE(cmdpkt); i++) { + cmdpkt[i] =3D ldq_le_p(hostmem + i * sizeof(uint64_t)); + } + address_space_unmap(as, hostmem, buflen, false, 0); =20 - cmd =3D (data & CMD_MASK); + cmd =3D cmdpkt[0] & CMD_MASK; =20 trace_gicv3_its_process_command(rd_offset, cmd); =20 switch (cmd) { case GITS_CMD_INT: - result =3D process_its_cmd(s, data, cq_offset, INTERRUPT); + result =3D process_its_cmd(s, cmdpkt, INTERRUPT); break; case GITS_CMD_CLEAR: - result =3D process_its_cmd(s, data, cq_offset, CLEAR); + result =3D process_its_cmd(s, cmdpkt, CLEAR); break; case GITS_CMD_SYNC: /* @@ -848,19 +762,19 @@ static void process_cmdq(GICv3ITSState *s) */ break; case GITS_CMD_MAPD: - result =3D process_mapd(s, data, cq_offset); + result =3D process_mapd(s, cmdpkt); break; case GITS_CMD_MAPC: - result =3D process_mapc(s, cq_offset); + result =3D process_mapc(s, cmdpkt); break; case GITS_CMD_MAPTI: - result =3D process_mapti(s, data, cq_offset, false); + result =3D process_mapti(s, cmdpkt, false); break; case GITS_CMD_MAPI: - result =3D process_mapti(s, data, cq_offset, true); + result =3D process_mapti(s, cmdpkt, true); break; case GITS_CMD_DISCARD: - result =3D process_its_cmd(s, data, cq_offset, DISCARD); + result =3D process_its_cmd(s, cmdpkt, DISCARD); break; case GITS_CMD_INV: case GITS_CMD_INVALL: @@ -875,10 +789,10 @@ static void process_cmdq(GICv3ITSState *s) } break; case GITS_CMD_MOVI: - result =3D process_movi(s, data, cq_offset); + result =3D process_movi(s, cmdpkt); break; case GITS_CMD_MOVALL: - result =3D process_movall(s, data, cq_offset); + result =3D process_movall(s, cmdpkt); break; default: break; @@ -1032,15 +946,13 @@ static MemTxResult gicv3_its_translation_write(void = *opaque, hwaddr offset, { GICv3ITSState *s =3D (GICv3ITSState *)opaque; bool result =3D true; - uint32_t devid =3D 0; =20 trace_gicv3_its_translation_write(offset, data, size, attrs.requester_= id); =20 switch (offset) { case GITS_TRANSLATER: if (s->ctlr & R_GITS_CTLR_ENABLED_MASK) { - devid =3D attrs.requester_id; - result =3D process_its_cmd(s, data, devid, NONE); + result =3D do_process_its_cmd(s, attrs.requester_id, data, NON= E); } break; default: --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643757963642328.416638875736; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NxK8OvGxGH00I1nCeizxtHY1cDOj4tKxyxRC6N9cwrs=; b=PMeEC+I+ugyZEQEV27lnZrmbZ76VND0PdLDlzHOfuRwYWcMmaNRvhQKIDyrBiMhk3w lMiNOO2RxgNa03n4tKfxHdtffUEcdeIbmqtGuZW9F9vq/7d/ZvbqWdSrPsGn3G80GfSC dg3fURPRTMtqe5LQST0GoKDnNDHroHtwdpqgQVAeEk20jB9LgicmCjZCiLPTHv06GNh+ X+7V5685dLtc53G9d8GC9jkyPNTNzTeMsJdhoQmmEWQIejF6+2OcCClBRjXAIDCaLJYd jp++ZKaopSHUV08jGLiID6rRa8UGhsHZieUVnk8+o74njcKmks27oKCVJYyDvn78ptW5 eaWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NxK8OvGxGH00I1nCeizxtHY1cDOj4tKxyxRC6N9cwrs=; b=axh2QaTj5PidW/PtbL3T/KM64vhQqybQwuqnY94F0OuZGry1YuYF+YxAiKIIChpDRW YlyIlbHbVl4enHhT29HJioQUgMZqpBUdWk1DPuZ5+eBzbM5lgtiH+vEAF+/s2p8OcYT5 im9LCtU972gbisitUTa5m85hRxQhe/AXIh1ZLUUff0e3bgw3FB2ukIwbemt+2RHX0evm mbET2xQ+bnRqKojLVHXL2EEqLeHITxFoaRX0s1gXPHPfoa8aFsPnk91YrvBxrDzAoJcT HT/7Dyt8/jJNffVybfVpA7rdUuBDBbSPUMCwa1haM51EZ0qjFaQhbaBy7r0lIugJlvIh VpdA== X-Gm-Message-State: AOAM530gc7sHB1/UOQLa3pgljjfL3v8v60px6RBLSfHaJ0Mo20e/53N5 K9Vf/r6or5ug1KryRnMBk5iLMA== X-Google-Smtp-Source: ABdhPJxj8ouVmnS/vE68FbqaFM3IGrZiLTP6LQ/4NtJBGZFS8utmCmnBx1vLUsqowBiyh46p5z8JVA== X-Received: by 2002:a5d:64c4:: with SMTP id f4mr23479351wri.278.1643743931524; Tue, 01 Feb 2022 11:32:11 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 02/13] hw/intc/arm_gicv3_its: Keep DTEs as a struct, not a raw uint64_t Date: Tue, 1 Feb 2022 19:31:56 +0000 Message-Id: <20220201193207.2771604-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::429 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643757964975100001 Content-Type: text/plain; charset="utf-8" In the ITS, a DTE is an entry in the device table, which contains multiple fields. Currently the function get_dte() which reads one entry from the device table returns it as a raw 64-bit integer, which we then pass around in that form, only extracting fields from it as we need them. Create a real C struct with the same fields as the DTE, and populate it in get_dte(), so that that function and update_dte() are the only ones that need to care about the in-guest-memory format of the DTE. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- This isn't a massive gain for the DTE, though I do think it looks a bit nicer. The real benefit is in aligning all the get_{cte,dte,ite} functions to have the same shaped API: currently get_ite() is different from all the rest. --- hw/intc/arm_gicv3_its.c | 111 ++++++++++++++++++++-------------------- 1 file changed, 56 insertions(+), 55 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index b74753fb8fe..6d70d7d59e2 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -46,6 +46,12 @@ typedef struct { uint64_t itel; } IteEntry; =20 +typedef struct DTEntry { + bool valid; + unsigned size; + uint64_t ittaddr; +} DTEntry; + /* * The ITS spec permits a range of CONSTRAINED UNPREDICTABLE options * if a command parameter is not correct. These include both "stall @@ -143,22 +149,18 @@ static bool get_cte(GICv3ITSState *s, uint16_t icid, = uint64_t *cte, return FIELD_EX64(*cte, CTE, VALID); } =20 -static bool update_ite(GICv3ITSState *s, uint32_t eventid, uint64_t dte, +static bool update_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *= dte, IteEntry ite) { AddressSpace *as =3D &s->gicv3->dma_as; - uint64_t itt_addr; MemTxResult res =3D MEMTX_OK; =20 - itt_addr =3D FIELD_EX64(dte, DTE, ITTADDR); - itt_addr <<=3D ITTADDR_SHIFT; /* 256 byte aligned */ - - address_space_stq_le(as, itt_addr + (eventid * (sizeof(uint64_t) + + address_space_stq_le(as, dte->ittaddr + (eventid * (sizeof(uint64_t) + sizeof(uint32_t))), ite.itel, MEMTXATTRS_UNSPECIF= IED, &res); =20 if (res =3D=3D MEMTX_OK) { - address_space_stl_le(as, itt_addr + (eventid * (sizeof(uint64_t) + + address_space_stl_le(as, dte->ittaddr + (eventid * (sizeof(uint64_= t) + sizeof(uint32_t))) + sizeof(uint32_t), ite.it= eh, MEMTXATTRS_UNSPECIFIED, &res); } @@ -169,24 +171,20 @@ static bool update_ite(GICv3ITSState *s, uint32_t eve= ntid, uint64_t dte, } } =20 -static bool get_ite(GICv3ITSState *s, uint32_t eventid, uint64_t dte, +static bool get_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *dte, uint16_t *icid, uint32_t *pIntid, MemTxResult *res) { AddressSpace *as =3D &s->gicv3->dma_as; - uint64_t itt_addr; bool status =3D false; IteEntry ite =3D {}; =20 - itt_addr =3D FIELD_EX64(dte, DTE, ITTADDR); - itt_addr <<=3D ITTADDR_SHIFT; /* 256 byte aligned */ - - ite.itel =3D address_space_ldq_le(as, itt_addr + + ite.itel =3D address_space_ldq_le(as, dte->ittaddr + (eventid * (sizeof(uint64_t) + sizeof(uint32_t))), MEMTXATTRS_UNSPECI= FIED, res); =20 if (*res =3D=3D MEMTX_OK) { - ite.iteh =3D address_space_ldl_le(as, itt_addr + + ite.iteh =3D address_space_ldl_le(as, dte->ittaddr + (eventid * (sizeof(uint64_t) + sizeof(uint32_t))) + sizeof(uint32= _t), MEMTXATTRS_UNSPECIFIED, res); @@ -205,15 +203,33 @@ static bool get_ite(GICv3ITSState *s, uint32_t eventi= d, uint64_t dte, return status; } =20 -static uint64_t get_dte(GICv3ITSState *s, uint32_t devid, MemTxResult *res) +/* + * Read the Device Table entry at index @devid. On success (including + * successfully determining that there is no valid DTE for this index), + * we return MEMTX_OK and populate the DTEntry struct accordingly. + * If there is an error reading memory then we return the error code. + */ +static MemTxResult get_dte(GICv3ITSState *s, uint32_t devid, DTEntry *dte) { + MemTxResult res =3D MEMTX_OK; AddressSpace *as =3D &s->gicv3->dma_as; - uint64_t entry_addr =3D table_entry_addr(s, &s->dt, devid, res); + uint64_t entry_addr =3D table_entry_addr(s, &s->dt, devid, &res); + uint64_t dteval; =20 if (entry_addr =3D=3D -1) { - return 0; /* a DTE entry with the Valid bit clear */ + /* No L2 table entry, i.e. no valid DTE, or a memory error */ + dte->valid =3D false; + return res; } - return address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED, re= s); + dteval =3D address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED= , &res); + if (res !=3D MEMTX_OK) { + return res; + } + dte->valid =3D FIELD_EX64(dteval, DTE, VALID); + dte->size =3D FIELD_EX64(dteval, DTE, SIZE); + /* DTE word field stores bits [51:8] of the ITT address */ + dte->ittaddr =3D FIELD_EX64(dteval, DTE, ITTADDR) << ITTADDR_SHIFT; + return MEMTX_OK; } =20 /* @@ -228,8 +244,6 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, uint32_t eventid, ItsCmdType cmd) { MemTxResult res =3D MEMTX_OK; - bool dte_valid; - uint64_t dte =3D 0; uint64_t num_eventids; uint16_t icid =3D 0; uint32_t pIntid =3D 0; @@ -237,6 +251,7 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, uint64_t cte =3D 0; bool cte_valid =3D false; uint64_t rdbase; + DTEntry dte; =20 if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, @@ -245,23 +260,17 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState = *s, uint32_t devid, return CMD_CONTINUE; } =20 - dte =3D get_dte(s, devid, &res); - - if (res !=3D MEMTX_OK) { + if (get_dte(s, devid, &dte) !=3D MEMTX_OK) { return CMD_STALL; } - dte_valid =3D FIELD_EX64(dte, DTE, VALID); - - if (!dte_valid) { + if (!dte.valid) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: " - "invalid dte: %"PRIx64" for %d\n", - __func__, dte, devid); + "invalid dte for %d\n", __func__, devid); return CMD_CONTINUE; } =20 - num_eventids =3D 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); - + num_eventids =3D 1ULL << (dte.size + 1); if (eventid >=3D num_eventids) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: eventid %d >=3D %" @@ -270,7 +279,7 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, return CMD_CONTINUE; } =20 - ite_valid =3D get_ite(s, eventid, dte, &icid, &pIntid, &res); + ite_valid =3D get_ite(s, eventid, &dte, &icid, &pIntid, &res); if (res !=3D MEMTX_OK) { return CMD_STALL; } @@ -320,7 +329,7 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, if (cmd =3D=3D DISCARD) { IteEntry ite =3D {}; /* remove mapping from interrupt translation table */ - return update_ite(s, eventid, dte, ite) ? CMD_CONTINUE : CMD_STALL; + return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STAL= L; } return CMD_CONTINUE; } @@ -341,11 +350,9 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, co= nst uint64_t *cmdpkt, uint32_t pIntid =3D 0; uint64_t num_eventids; uint32_t num_intids; - bool dte_valid; - MemTxResult res =3D MEMTX_OK; uint16_t icid =3D 0; - uint64_t dte =3D 0; IteEntry ite =3D {}; + DTEntry dte; =20 devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; eventid =3D cmdpkt[1] & EVENTID_MASK; @@ -365,24 +372,21 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, c= onst uint64_t *cmdpkt, return CMD_CONTINUE; } =20 - dte =3D get_dte(s, devid, &res); - - if (res !=3D MEMTX_OK) { + if (get_dte(s, devid, &dte) !=3D MEMTX_OK) { return CMD_STALL; } - dte_valid =3D FIELD_EX64(dte, DTE, VALID); - num_eventids =3D 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); + num_eventids =3D 1ULL << (dte.size + 1); num_intids =3D 1ULL << (GICD_TYPER_IDBITS + 1); =20 if ((icid >=3D s->ct.num_entries) - || !dte_valid || (eventid >=3D num_eventids) || + || !dte.valid || (eventid >=3D num_eventids) || (((pIntid < GICV3_LPI_INTID_START) || (pIntid >=3D num_intids)= ) && (pIntid !=3D INTID_SPURIOUS))) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes " "icid %d or eventid %d or pIntid %d or" "unmapped dte %d\n", __func__, icid, eventid, - pIntid, dte_valid); + pIntid, dte.valid); /* * in this implementation, in case of error * we ignore this command and move onto the next @@ -392,13 +396,13 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, c= onst uint64_t *cmdpkt, } =20 /* add ite entry to interrupt translation table */ - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, dte_valid); + ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, true); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTTYPE, ITE_INTTYPE_PHYSICAL= ); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, pIntid); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, DOORBELL, INTID_SPURIOUS); ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, ICID, icid); =20 - return update_ite(s, eventid, dte, ite) ? CMD_CONTINUE : CMD_STALL; + return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; } =20 static bool update_cte(GICv3ITSState *s, uint16_t icid, bool valid, @@ -561,10 +565,10 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) uint16_t old_icid, new_icid; uint64_t old_cte, new_cte; uint64_t old_rdbase, new_rdbase; - uint64_t dte; - bool dte_valid, ite_valid, cte_valid; + bool ite_valid, cte_valid; uint64_t num_eventids; IteEntry ite =3D {}; + DTEntry dte; =20 devid =3D FIELD_EX64(cmdpkt[0], MOVI_0, DEVICEID); eventid =3D FIELD_EX64(cmdpkt[1], MOVI_1, EVENTID); @@ -576,21 +580,18 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) __func__, devid, s->dt.num_entries); return CMD_CONTINUE; } - dte =3D get_dte(s, devid, &res); - if (res !=3D MEMTX_OK) { + if (get_dte(s, devid, &dte) !=3D MEMTX_OK) { return CMD_STALL; } =20 - dte_valid =3D FIELD_EX64(dte, DTE, VALID); - if (!dte_valid) { + if (!dte.valid) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: " - "invalid dte: %"PRIx64" for %d\n", - __func__, dte, devid); + "invalid dte for %d\n", __func__, devid); return CMD_CONTINUE; } =20 - num_eventids =3D 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); + num_eventids =3D 1ULL << (dte.size + 1); if (eventid >=3D num_eventids) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: eventid %d >=3D %" @@ -599,7 +600,7 @@ static ItsCmdResult process_movi(GICv3ITSState *s, cons= t uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - ite_valid =3D get_ite(s, eventid, dte, &old_icid, &intid, &res); + ite_valid =3D get_ite(s, eventid, &dte, &old_icid, &intid, &res); if (res !=3D MEMTX_OK) { return CMD_STALL; } @@ -678,7 +679,7 @@ static ItsCmdResult process_movi(GICv3ITSState *s, cons= t uint64_t *cmdpkt) ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, intid); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, DOORBELL, INTID_SPURIOUS); ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, ICID, new_icid); - return update_ite(s, eventid, dte, ite) ? CMD_CONTINUE : CMD_STALL; + return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; } =20 /* --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643758394311130.05207591300336; Tue, 1 Feb 2022 15:33:14 -0800 (PST) Received: from localhost ([::1]:51550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF2e9-0001Hy-DX for importer@patchew.org; Tue, 01 Feb 2022 18:33:13 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60386) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytB-0001nT-5C for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:32 -0500 Received: from [2a00:1450:4864:20::432] (port=36663 helo=mail-wr1-x432.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEysv-0002Vz-ND for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:16 -0500 Received: by mail-wr1-x432.google.com with SMTP id u15so34046500wrt.3 for ; Tue, 01 Feb 2022 11:32:13 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YvlbklIZ7LuGPJG4Zm4kfWOMRWUOqrvxpxIx0INpC+I=; b=b5MI7hVuCU7CMJq1/5ZgjhCwOhZiRch9rB9ajlPXBD4USaQMt/KoPRu5oBQP10uVm8 hD7zBbP3k910QUSIcaLTJAYVfSvnopCSV2mp7FO2uFM7CAY8b0Il7JIaoZ1GBl39F3Ey EW76NIHdxqE99h8haum6ysMTP8hBlxHl8GawVwWNd1P+3bsoF8NpRkNc0k+A+igLtuLu vso59g65EkBTdqDzcgSDeBeIyn4rDBR5kSE3r1R52B1eF9LDD9HSwsQEGlVsX691hQ/U Pl1In1FsY2lWx99V/EwV6d3W7wNaLuuMwKlD9znPkqNlPkuy7GnPfKdGZ2HfxF5+Y1nW PmXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YvlbklIZ7LuGPJG4Zm4kfWOMRWUOqrvxpxIx0INpC+I=; b=d7i/ZbL+OzhFN7zKqkVXWOOPaSQPL27ua/nuLWMaq7jJdj+LzZSlSD1ZOabHEvQq21 6ebIVGV6TKhEe0C38y/EzULW3+nhHy67xhSztE5lxetbY3Xzy69m32sOa/f4g8TsfEUr QZRNjZ8+zkZ7KB5yiORmW80ZdDUqDb6q09tyY1ZR1+dEhxXrbSeqhhfcUho/nsuUYRjX XFX12hjst8HMlIo2FWzr/9FHAf6yyGpzCq1rdb74CIOz4AVM3LmkumXc/Vg1tlPra0st kI4gUwPuP4HkjGpmKZevzhhboWJdgqqPOXkDfKjUiWvk2hmIsM2rsaxgsJoMuuc601ET Y2aA== X-Gm-Message-State: AOAM533g1xo6vhRZaHehgHteEAnSgVyc1HE4WZKhWiB4UJEsgVrYWeYR uFVVHBWO4mCTGBPlL++Oca+iQda2/0wY9w== X-Google-Smtp-Source: ABdhPJx47/q3lUDrFlqc0+nDFucO/xlcXZzCBzZWuyZLKWYQxC9wqmF2eWLRyLre5p+Vxv+bltfBcg== X-Received: by 2002:a5d:64a9:: with SMTP id m9mr21965365wrp.661.1643743932299; Tue, 01 Feb 2022 11:32:12 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 03/13] hw/intc/arm_gicv3_its: Pass DTEntry to update_dte() Date: Tue, 1 Feb 2022 19:31:57 +0000 Message-Id: <20220201193207.2771604-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::432 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643758396549100003 Content-Type: text/plain; charset="utf-8" Make update_dte() take a DTEntry struct rather than all the fields of the new DTE as separate arguments. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 6d70d7d59e2..1856210e79a 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -465,20 +465,23 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, co= nst uint64_t *cmdpkt) return update_cte(s, icid, valid, rdbase) ? CMD_CONTINUE : CMD_STALL; } =20 -static bool update_dte(GICv3ITSState *s, uint32_t devid, bool valid, - uint8_t size, uint64_t itt_addr) +/* + * Update the Device Table entry for @devid to @dte. Returns true + * on success, false if there was a memory access error. + */ +static bool update_dte(GICv3ITSState *s, uint32_t devid, const DTEntry *dt= e) { AddressSpace *as =3D &s->gicv3->dma_as; uint64_t entry_addr; - uint64_t dte =3D 0; + uint64_t dteval =3D 0; MemTxResult res =3D MEMTX_OK; =20 if (s->dt.valid) { - if (valid) { + if (dte->valid) { /* add mapping entry to device table */ - dte =3D FIELD_DP64(dte, DTE, VALID, 1); - dte =3D FIELD_DP64(dte, DTE, SIZE, size); - dte =3D FIELD_DP64(dte, DTE, ITTADDR, itt_addr); + dteval =3D FIELD_DP64(dteval, DTE, VALID, 1); + dteval =3D FIELD_DP64(dteval, DTE, SIZE, dte->size); + dteval =3D FIELD_DP64(dteval, DTE, ITTADDR, dte->ittaddr); } } else { return true; @@ -493,27 +496,25 @@ static bool update_dte(GICv3ITSState *s, uint32_t dev= id, bool valid, /* No L2 table for this index: discard write and continue */ return true; } - address_space_stq_le(as, entry_addr, dte, MEMTXATTRS_UNSPECIFIED, &res= ); + address_space_stq_le(as, entry_addr, dteval, MEMTXATTRS_UNSPECIFIED, &= res); return res =3D=3D MEMTX_OK; } =20 static ItsCmdResult process_mapd(GICv3ITSState *s, const uint64_t *cmdpkt) { uint32_t devid; - uint8_t size; - uint64_t itt_addr; - bool valid; + DTEntry dte; =20 devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; - size =3D cmdpkt[1] & SIZE_MASK; - itt_addr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT; - valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; + dte.size =3D cmdpkt[1] & SIZE_MASK; + dte.ittaddr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT; + dte.valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; =20 if ((devid >=3D s->dt.num_entries) || - (size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS))) { + (dte.size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS))) { qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPD: invalid device table attributes " - "devid %d or size %d\n", devid, size); + "devid %d or size %d\n", devid, dte.size); /* * in this implementation, in case of error * we ignore this command and move onto the next @@ -522,7 +523,7 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, cons= t uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - return update_dte(s, devid, valid, size, itt_addr) ? CMD_CONTINUE : CM= D_STALL; + return update_dte(s, devid, &dte) ? CMD_CONTINUE : CMD_STALL; } =20 static ItsCmdResult process_movall(GICv3ITSState *s, const uint64_t *cmdpk= t) --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643765168614299.61217470017255; Tue, 1 Feb 2022 17:26:08 -0800 (PST) Received: from localhost ([::1]:36846 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF4PP-0005WD-1y for importer@patchew.org; Tue, 01 Feb 2022 20:26:07 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60382) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytB-0001nQ-4r for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:32 -0500 Received: from [2a00:1450:4864:20::42f] (port=33532 helo=mail-wr1-x42f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEysw-0002WK-Ic for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:16 -0500 Received: by mail-wr1-x42f.google.com with SMTP id e8so34084038wrc.0 for ; Tue, 01 Feb 2022 11:32:14 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y92dO/2qMOMRqobpIK/3O4HIwg33Qdc8PfDszoLNeew=; b=SRVznH70KXATmN7v5CVFoP4wpBd9IfMtU0fFdASyBKxshGKJSr24xLbKYevPxp7KdZ Wdeshziw0Vxi3dSKAYmDOn4EJ8AfvnSEPHBeZ3qIlcIJhbX5S9hCillp7IH2Tdv4hheO 8Y1B4oriulZip7IZcOse2R8cFmb3hfUlhuksKiSJgNrS47C27T6KUfMzdYEV2BTC97Yw pAKBbXXC5Abza61qKhuue3vifX1kOMt0jR7ljMKGgtkqI4ajLs49cxLl4b4eGqUVk8Vp TV1NNUnq6aKfJozjnqTnCyEmMr5vzyPPatCP0S+RxxyRRkmGibWfrRYmLUbTurrSV1ku O3rA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y92dO/2qMOMRqobpIK/3O4HIwg33Qdc8PfDszoLNeew=; b=IZC+ABh8rfXe1EG9EUhg8olgJ9lJu1oZ/hjrOAEjGGky7R21+Nznj/5utCZ7C5g6aG L4W/Sm8LJ3Kw4INhEoI3S9ueSwD38XpE7Oi31ZZ3WMd/APa7JizANgmUfLtXAmizzmmi pMty9zvDqQbka+j+3d+Yk+shIC5dtMuu0MzW+MtqovApGoo719pb25tg6z3lkEg1BfI3 GVlWXLo1k6Tig4OzPjSpC2iQHT+x9zMu8+Ki66MnZOLW0oobqKaGMs0j9KxpqCCs/se4 WRBoiqMbpZ8a5kTdYR6h8Kc5zgtw4wUh+LPgtOn79BHLuE/LFkjt2cxIwBlbRn0DOL1w +NrA== X-Gm-Message-State: AOAM533p27dm3vPLd7N+9GXv1GD3y8BumFpyX/UyDcKL4KabWPvB45KG bfCEVSBbvS8hazwlfcXUqAWxUA== X-Google-Smtp-Source: ABdhPJyzofkHHi5BotAKzEi0x5EMXk0zoZVBAQoH6VhuGICOxXtLPbhHd6aLiVxtpjIsGmdPwfKMww== X-Received: by 2002:adf:f80a:: with SMTP id s10mr22060827wrp.440.1643743933234; Tue, 01 Feb 2022 11:32:13 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 04/13] hw/intc/arm_gicv3_its: Keep CTEs as a struct, not a raw uint64_t Date: Tue, 1 Feb 2022 19:31:58 +0000 Message-Id: <20220201193207.2771604-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::42f (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643765171501100001 Content-Type: text/plain; charset="utf-8" In the ITS, a CTE is an entry in the collection table, which contains multiple fields. Currently the function get_cte() which reads one entry from the device table returns a success/failure boolean and passes back the raw 64-bit integer CTE value via a pointer argument. We then extract fields from the CTE as we need them. Create a real C struct with the same fields as the CTE, and populate it in get_cte(), so that that function and update_cte() are the only ones which need to care about the in-guest-memory format of the CTE. This brings get_cte()'s API into line with get_dte(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 96 ++++++++++++++++++++++------------------- 1 file changed, 52 insertions(+), 44 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 1856210e79a..482a71ba73c 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -52,6 +52,11 @@ typedef struct DTEntry { uint64_t ittaddr; } DTEntry; =20 +typedef struct CTEntry { + bool valid; + uint32_t rdbase; +} CTEntry; + /* * The ITS spec permits a range of CONSTRAINED UNPREDICTABLE options * if a command parameter is not correct. These include both "stall @@ -135,18 +140,32 @@ static uint64_t table_entry_addr(GICv3ITSState *s, Ta= bleDesc *td, return (l2 & ((1ULL << 51) - 1)) + (idx % num_l2_entries) * td->entry_= sz; } =20 -static bool get_cte(GICv3ITSState *s, uint16_t icid, uint64_t *cte, - MemTxResult *res) +/* + * Read the Collection Table entry at index @icid. On success (including + * successfully determining that there is no valid CTE for this index), + * we return MEMTX_OK and populate the CTEntry struct @cte accordingly. + * If there is an error reading memory then we return the error code. + */ +static MemTxResult get_cte(GICv3ITSState *s, uint16_t icid, CTEntry *cte) { AddressSpace *as =3D &s->gicv3->dma_as; - uint64_t entry_addr =3D table_entry_addr(s, &s->ct, icid, res); + MemTxResult res =3D MEMTX_OK; + uint64_t entry_addr =3D table_entry_addr(s, &s->ct, icid, &res); + uint64_t cteval; =20 if (entry_addr =3D=3D -1) { - return false; /* not valid */ + /* No L2 table entry, i.e. no valid CTE, or a memory error */ + cte->valid =3D false; + return res; } =20 - *cte =3D address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED, = res); - return FIELD_EX64(*cte, CTE, VALID); + cteval =3D address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED= , &res); + if (res !=3D MEMTX_OK) { + return res; + } + cte->valid =3D FIELD_EX64(cteval, CTE, VALID); + cte->rdbase =3D FIELD_EX64(cteval, CTE, RDBASE); + return MEMTX_OK; } =20 static bool update_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *= dte, @@ -248,10 +267,8 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *= s, uint32_t devid, uint16_t icid =3D 0; uint32_t pIntid =3D 0; bool ite_valid =3D false; - uint64_t cte =3D 0; - bool cte_valid =3D false; - uint64_t rdbase; DTEntry dte; + CTEntry cte; =20 if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, @@ -298,15 +315,13 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState = *s, uint32_t devid, return CMD_CONTINUE; } =20 - cte_valid =3D get_cte(s, icid, &cte, &res); - if (res !=3D MEMTX_OK) { + if (get_cte(s, icid, &cte) !=3D MEMTX_OK) { return CMD_STALL; } - if (!cte_valid) { + if (!cte.valid) { qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: " - "invalid cte: %"PRIx64"\n", - __func__, cte); + "%s: invalid command attributes: invalid CTE\n", + __func__); return CMD_CONTINUE; } =20 @@ -314,16 +329,14 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState = *s, uint32_t devid, * Current implementation only supports rdbase =3D=3D procnum * Hence rdbase physical address is ignored */ - rdbase =3D FIELD_EX64(cte, CTE, RDBASE); - - if (rdbase >=3D s->gicv3->num_cpu) { + if (cte.rdbase >=3D s->gicv3->num_cpu) { return CMD_CONTINUE; } =20 if ((cmd =3D=3D CLEAR) || (cmd =3D=3D DISCARD)) { - gicv3_redist_process_lpi(&s->gicv3->cpu[rdbase], pIntid, 0); + gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], pIntid, 0); } else { - gicv3_redist_process_lpi(&s->gicv3->cpu[rdbase], pIntid, 1); + gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], pIntid, 1); } =20 if (cmd =3D=3D DISCARD) { @@ -564,12 +577,11 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) MemTxResult res =3D MEMTX_OK; uint32_t devid, eventid, intid; uint16_t old_icid, new_icid; - uint64_t old_cte, new_cte; - uint64_t old_rdbase, new_rdbase; - bool ite_valid, cte_valid; + bool ite_valid; uint64_t num_eventids; IteEntry ite =3D {}; DTEntry dte; + CTEntry old_cte, new_cte; =20 devid =3D FIELD_EX64(cmdpkt[0], MOVI_0, DEVICEID); eventid =3D FIELD_EX64(cmdpkt[1], MOVI_1, EVENTID); @@ -627,50 +639,46 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - cte_valid =3D get_cte(s, old_icid, &old_cte, &res); - if (res !=3D MEMTX_OK) { + if (get_cte(s, old_icid, &old_cte) !=3D MEMTX_OK) { return CMD_STALL; } - if (!cte_valid) { + if (!old_cte.valid) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: " - "invalid cte: %"PRIx64"\n", - __func__, old_cte); + "invalid CTE for old ICID 0x%x\n", + __func__, old_icid); return CMD_CONTINUE; } =20 - cte_valid =3D get_cte(s, new_icid, &new_cte, &res); - if (res !=3D MEMTX_OK) { + if (get_cte(s, new_icid, &new_cte) !=3D MEMTX_OK) { return CMD_STALL; } - if (!cte_valid) { + if (!new_cte.valid) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: " - "invalid cte: %"PRIx64"\n", - __func__, new_cte); + "invalid CTE for new ICID 0x%x\n", + __func__, new_icid); return CMD_CONTINUE; } =20 - old_rdbase =3D FIELD_EX64(old_cte, CTE, RDBASE); - if (old_rdbase >=3D s->gicv3->num_cpu) { + if (old_cte.rdbase >=3D s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, - "%s: CTE has invalid rdbase 0x%"PRIx64"\n", - __func__, old_rdbase); + "%s: CTE has invalid rdbase 0x%x\n", + __func__, old_cte.rdbase); return CMD_CONTINUE; } =20 - new_rdbase =3D FIELD_EX64(new_cte, CTE, RDBASE); - if (new_rdbase >=3D s->gicv3->num_cpu) { + if (new_cte.rdbase >=3D s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, - "%s: CTE has invalid rdbase 0x%"PRIx64"\n", - __func__, new_rdbase); + "%s: CTE has invalid rdbase 0x%x\n", + __func__, new_cte.rdbase); return CMD_CONTINUE; } =20 - if (old_rdbase !=3D new_rdbase) { + if (old_cte.rdbase !=3D new_cte.rdbase) { /* Move the LPI from the old redistributor to the new one */ - gicv3_redist_mov_lpi(&s->gicv3->cpu[old_rdbase], - &s->gicv3->cpu[new_rdbase], + gicv3_redist_mov_lpi(&s->gicv3->cpu[old_cte.rdbase], + &s->gicv3->cpu[new_cte.rdbase], intid); } =20 --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K0nLPSuvZhVnaozrSckCXHtamDQkkON8hOQuG5n7HiU=; b=yIbPQlnf8scHcROhpf5AY1WQ0ehLAqmw9oatx2UqtJN4Nu0/1VCkOjPQDSomDN3eSE LukTVVBtpaG4DD/tZEZZepIyD10g9eYyesHo+AnlybNeEMIuRuzXx4870Gu4YOLlvA3a xP1EWxcDheqzHevu+kQwBFNKhGTH98d9UziCrBiDQ+hGlO1zrdH6YVKLW4CDo7crwEfY GoZFawtSlm91L9x62E2DXLlgZHG5SCX88Cy50LM4vXL61IM/1+5l7d3o5Z4EgB26sWyd e0BnUmpuAtRDcIRmC34MCBbOVC7DXbSuKE42g26quCKYiMb3TeeJRpSVwqihSckOdR74 5E6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K0nLPSuvZhVnaozrSckCXHtamDQkkON8hOQuG5n7HiU=; b=hAQUj9AFS8zxHltv8Uhz+WN4Qdzu5xzAGbtXwGwbgaQ/YZ4sZkN6aiSCtIClOYTr+y tfJdCY+BghZCYQsX6JfxXoCo/bkXYSgdj6OeQ0ew/jVqOGJb0XmQHQxngA79WQiJB5kv IUiTMiRmyVrqgAfhfZ/0h3n5DnaeC27PyCf2wZ1j4thGTldainmO7XAqttgPnzNi5R0b 4gb3rlN2Au3adhciWc8MH/uKqO+Vsmpleric49A7y3GiPMaPkQOuYNd74bNMh5iSIs2v t4FRA0iEOBziXykAWXSewyn1IylpS0WS6RFIhVXf+AoKFc0OrT5GVNaAnC1t3fcAPC2f eM0Q== X-Gm-Message-State: AOAM5304ROIDwjkYMfTWYkeJ2d0LfUM6x4FnZW51s8lTcs8bSJhHQ/Ew E6pLGaDdzsimD/OzYwx8Pu0BEA== X-Google-Smtp-Source: ABdhPJzd7vSWsocdk98qnrgohzJj18Z9UsL34ykboMedi9sr4hR2TeXaeE7/5/6ZyLzEObWW5BbxkA== X-Received: by 2002:a05:6000:10c:: with SMTP id o12mr22533087wrx.299.1643743934027; Tue, 01 Feb 2022 11:32:14 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 05/13] hw/intc/arm_gicv3_its: Pass CTEntry to update_cte() Date: Tue, 1 Feb 2022 19:31:59 +0000 Message-Id: <20220201193207.2771604-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::434 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643764343386100001 Content-Type: text/plain; charset="utf-8" Make update_cte() take a CTEntry struct rather than all the fields of the new CTE as separate arguments. This brings it into line with the update_dte() API. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 482a71ba73c..b94775fd379 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -418,22 +418,25 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, c= onst uint64_t *cmdpkt, return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; } =20 -static bool update_cte(GICv3ITSState *s, uint16_t icid, bool valid, - uint64_t rdbase) +/* + * Update the Collection Table entry for @icid to @cte. Returns true + * on success, false if there was a memory access error. + */ +static bool update_cte(GICv3ITSState *s, uint16_t icid, const CTEntry *cte) { AddressSpace *as =3D &s->gicv3->dma_as; uint64_t entry_addr; - uint64_t cte =3D 0; + uint64_t cteval =3D 0; MemTxResult res =3D MEMTX_OK; =20 if (!s->ct.valid) { return true; } =20 - if (valid) { + if (cte->valid) { /* add mapping entry to collection table */ - cte =3D FIELD_DP64(cte, CTE, VALID, 1); - cte =3D FIELD_DP64(cte, CTE, RDBASE, rdbase); + cteval =3D FIELD_DP64(cteval, CTE, VALID, 1); + cteval =3D FIELD_DP64(cteval, CTE, RDBASE, cte->rdbase); } =20 entry_addr =3D table_entry_addr(s, &s->ct, icid, &res); @@ -446,27 +449,26 @@ static bool update_cte(GICv3ITSState *s, uint16_t ici= d, bool valid, return true; } =20 - address_space_stq_le(as, entry_addr, cte, MEMTXATTRS_UNSPECIFIED, &res= ); + address_space_stq_le(as, entry_addr, cteval, MEMTXATTRS_UNSPECIFIED, &= res); return res =3D=3D MEMTX_OK; } =20 static ItsCmdResult process_mapc(GICv3ITSState *s, const uint64_t *cmdpkt) { uint16_t icid; - uint64_t rdbase; - bool valid; + CTEntry cte; =20 icid =3D cmdpkt[2] & ICID_MASK; =20 - rdbase =3D (cmdpkt[2] & R_MAPC_RDBASE_MASK) >> R_MAPC_RDBASE_SHIFT; - rdbase &=3D RDBASE_PROCNUM_MASK; + cte.rdbase =3D (cmdpkt[2] & R_MAPC_RDBASE_MASK) >> R_MAPC_RDBASE_SHIFT; + cte.rdbase &=3D RDBASE_PROCNUM_MASK; =20 - valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; + cte.valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; =20 - if ((icid >=3D s->ct.num_entries) || (rdbase >=3D s->gicv3->num_cpu)) { + if ((icid >=3D s->ct.num_entries) || (cte.rdbase >=3D s->gicv3->num_cp= u)) { qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid collection table attributes " - "icid %d rdbase %" PRIu64 "\n", icid, rdbase); + "icid %d rdbase %u\n", icid, cte.rdbase); /* * in this implementation, in case of error * we ignore this command and move onto the next @@ -475,7 +477,7 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, cons= t uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - return update_cte(s, icid, valid, rdbase) ? CMD_CONTINUE : CMD_STALL; + return update_cte(s, icid, &cte) ? CMD_CONTINUE : CMD_STALL; } =20 /* --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643761743149986.2975645518254; Tue, 1 Feb 2022 16:29:03 -0800 (PST) Received: from localhost ([::1]:37438 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF3W9-0008Rq-Gk for importer@patchew.org; Tue, 01 Feb 2022 19:29:01 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60588) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytI-0001p5-72 for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:37 -0500 Received: from [2a00:1450:4864:20::332] (port=33496 helo=mail-wm1-x332.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytC-0002Wx-6k for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:35 -0500 Received: by mail-wm1-x332.google.com with SMTP id n12-20020a05600c3b8c00b0034eb13edb8eso1843273wms.0 for ; Tue, 01 Feb 2022 11:32:15 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ywQcTYQTXZACbh58F2F6qFMIzANHo8mVYTxx87r5y/I=; b=r3SDdjCk4hSLsVzZ//sQF63ojNMPqzH+ov6SA/eair7cn1oqwwYKfzbvPuZHsEj1aD WnTIYhSEKpK20tfSbq+lAAlIeCn8FoP0zHOO3W0IoI6MP5xhVwKw+yetAP+/O6oj372I rC3Ls2Le2pwHjUv7L00Tszk9hhck72+X27Gz4oiunTuUuOu+hCbkh/m5ucdYaUahVBU+ OP+10u6CVFYfVCKD75u6C1d/dgdqr64MEvptN7wrBluGslXzZzSnlG2TdAuYFtjIBbL5 Kny9QkEt/uAhwcYFOHEKh8QIpFuVGW5J/07ouTbvpm2F2sggd2C7u9cFrlyVcenoJXq/ i/Ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ywQcTYQTXZACbh58F2F6qFMIzANHo8mVYTxx87r5y/I=; b=ncJ/MgzHVq/PExzHr7+/uV0Za7vYEwNax2jMUHn/rn6wxoKZO/8UELhi2DNEuihDUr O1wGTh8cImarfhG7g6V7Vh0sSUtJQlK3QIkv9WMj0NQB1c7eK+F1ydBOquIZ040cBkVh h7YHFeQii/lYRHujN3fiKzwFhQvUiwqFFjMVLqblSuzHJL7PVSc+hiPtp3/V50CEwk/x WoQ5ZUZf9AsnU5a2CUm2MzAiG+oFe2AEeqmIRzR1QGwNfJz3KPgHCMkj46LOAw+9XdVF q/FJQDiPA+dvmwuJX9I0OU8ssgwYjUxSxzlAt3Qe9yCMAEZRK19ovSF2JSt7vzor+meq k/DA== X-Gm-Message-State: AOAM533rXUXjNzPScb8Zlq8A0fH0Lt4zb7ahC91FkU30Cul2mVcP03Kg QO/GVFjdbtQsNn3VEbxINQH+7V95wvQ4cg== X-Google-Smtp-Source: ABdhPJyecTZm3OmOdCT1Q5Q652dSF5sIw0Xl4ghvxFghTXBnTy/kTz+jr10ZdAHVTIJ4Kx0BjGoOwA== X-Received: by 2002:a05:600c:2245:: with SMTP id a5mr3112520wmm.8.1643743934897; Tue, 01 Feb 2022 11:32:14 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 06/13] hw/intc/arm_gicv3_its: Fix address calculation in get_ite() and update_ite() Date: Tue, 1 Feb 2022 19:32:00 +0000 Message-Id: <20220201193207.2771604-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::332 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643761746240100001 Content-Type: text/plain; charset="utf-8" In get_ite() and update_ite() we work with a 12-byte in-guest-memory table entry, which we intend to handle as an 8-byte value followed by a 4-byte value. Unfortunately the calculation of the address of the 4-byte value is wrong, because we write it as: table_base_address + (index * entrysize) + 4 (obfuscated by the way the expression has been written) when it should be + 8. This bug meant that we overwrote the top bytes of the 8-byte value with the 4-byte value. There are no guest-visible effects because the top half of the 8-byte value contains only the doorbell interrupt field, which is used only in GICv4, and the two bugs in the "write ITE" and "read ITE" codepaths cancel each other out. We can't simply change the calculation, because this would break migration of a (TCG) guest from the old version of QEMU which had in-guest-memory interrupt tables written using the buggy version of update_ite(). We must also at the same time change the layout of the fields within the ITE_L and ITE_H values so that the in-memory locations of the fields we care about (VALID, INTTYPE, INTID and ICID) stay the same. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/gicv3_internal.h | 19 ++++++++++--------- hw/intc/arm_gicv3_its.c | 28 +++++++++++----------------- 2 files changed, 21 insertions(+), 26 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 60c8617e4e4..2bf1baef047 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -370,22 +370,23 @@ FIELD(MOVI_2, ICID, 0, 16) * 12 bytes Interrupt translation Table Entry size * as per Table 5.3 in GICv3 spec * ITE Lower 8 Bytes - * Bits: | 49 ... 26 | 25 ... 2 | 1 | 0 | - * Values: | Doorbell | IntNum | IntType | Valid | + * Bits: | 63 ... 48 | 47 ... 32 | 31 ... 26 | 25 ... 2 | 1 | = 0 | + * Values: | vPEID | ICID | unused | IntNum | IntType | V= alid | * ITE Higher 4 Bytes - * Bits: | 31 ... 16 | 15 ...0 | - * Values: | vPEID | ICID | - * (When Doorbell is unused, as it always is in GICv3, it is 1023) + * Bits: | 31 ... 25 | 24 ... 0 | + * Values: | unused | Doorbell | + * (When Doorbell is unused, as it always is for INTYPE_PHYSICAL, + * the value of that field in memory cannot be relied upon -- older + * versions of QEMU did not correctly write to that memory.) */ #define ITS_ITT_ENTRY_SIZE 0xC =20 FIELD(ITE_L, VALID, 0, 1) FIELD(ITE_L, INTTYPE, 1, 1) FIELD(ITE_L, INTID, 2, 24) -FIELD(ITE_L, DOORBELL, 26, 24) - -FIELD(ITE_H, ICID, 0, 16) -FIELD(ITE_H, VPEID, 16, 16) +FIELD(ITE_L, ICID, 32, 16) +FIELD(ITE_L, VPEID, 48, 16) +FIELD(ITE_H, DOORBELL, 0, 24) =20 /* Possible values for ITE_L INTTYPE */ #define ITE_INTTYPE_VIRTUAL 0 diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index b94775fd379..48eaf20a6c9 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -173,14 +173,12 @@ static bool update_ite(GICv3ITSState *s, uint32_t eve= ntid, const DTEntry *dte, { AddressSpace *as =3D &s->gicv3->dma_as; MemTxResult res =3D MEMTX_OK; + hwaddr iteaddr =3D dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; =20 - address_space_stq_le(as, dte->ittaddr + (eventid * (sizeof(uint64_t) + - sizeof(uint32_t))), ite.itel, MEMTXATTRS_UNSPECIF= IED, - &res); + address_space_stq_le(as, iteaddr, ite.itel, MEMTXATTRS_UNSPECIFIED, &r= es); =20 if (res =3D=3D MEMTX_OK) { - address_space_stl_le(as, dte->ittaddr + (eventid * (sizeof(uint64_= t) + - sizeof(uint32_t))) + sizeof(uint32_t), ite.it= eh, + address_space_stl_le(as, iteaddr + 8, ite.iteh, MEMTXATTRS_UNSPECIFIED, &res); } if (res !=3D MEMTX_OK) { @@ -196,16 +194,12 @@ static bool get_ite(GICv3ITSState *s, uint32_t eventi= d, const DTEntry *dte, AddressSpace *as =3D &s->gicv3->dma_as; bool status =3D false; IteEntry ite =3D {}; + hwaddr iteaddr =3D dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; =20 - ite.itel =3D address_space_ldq_le(as, dte->ittaddr + - (eventid * (sizeof(uint64_t) + - sizeof(uint32_t))), MEMTXATTRS_UNSPECI= FIED, - res); + ite.itel =3D address_space_ldq_le(as, iteaddr, MEMTXATTRS_UNSPECIFIED,= res); =20 if (*res =3D=3D MEMTX_OK) { - ite.iteh =3D address_space_ldl_le(as, dte->ittaddr + - (eventid * (sizeof(uint64_t) + - sizeof(uint32_t))) + sizeof(uint32= _t), + ite.iteh =3D address_space_ldl_le(as, iteaddr + 8, MEMTXATTRS_UNSPECIFIED, res); =20 if (*res =3D=3D MEMTX_OK) { @@ -213,7 +207,7 @@ static bool get_ite(GICv3ITSState *s, uint32_t eventid,= const DTEntry *dte, int inttype =3D FIELD_EX64(ite.itel, ITE_L, INTTYPE); if (inttype =3D=3D ITE_INTTYPE_PHYSICAL) { *pIntid =3D FIELD_EX64(ite.itel, ITE_L, INTID); - *icid =3D FIELD_EX32(ite.iteh, ITE_H, ICID); + *icid =3D FIELD_EX64(ite.itel, ITE_L, ICID); status =3D true; } } @@ -412,8 +406,8 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, true); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTTYPE, ITE_INTTYPE_PHYSICAL= ); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, pIntid); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, DOORBELL, INTID_SPURIOUS); - ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, ICID, icid); + ite.itel =3D FIELD_DP64(ite.itel, ITE_L, ICID, icid); + ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, DOORBELL, INTID_SPURIOUS); =20 return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; } @@ -688,8 +682,8 @@ static ItsCmdResult process_movi(GICv3ITSState *s, cons= t uint64_t *cmdpkt) ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, 1); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTTYPE, ITE_INTTYPE_PHYSICAL= ); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, intid); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, DOORBELL, INTID_SPURIOUS); - ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, ICID, new_icid); + ite.itel =3D FIELD_DP64(ite.itel, ITE_L, ICID, new_icid); + ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, DOORBELL, INTID_SPURIOUS); return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; } =20 --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643759191557920.8927842422944; Tue, 1 Feb 2022 15:46:31 -0800 (PST) Received: from localhost ([::1]:42060 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF2qz-0005i2-OH for importer@patchew.org; Tue, 01 Feb 2022 18:46:29 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60572) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytI-0001p3-5s for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:37 -0500 Received: from [2a00:1450:4864:20::32c] (port=34439 helo=mail-wm1-x32c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytA-0002XA-Rm for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:32 -0500 Received: by mail-wm1-x32c.google.com with SMTP id bg19-20020a05600c3c9300b0034565e837b6so1599087wmb.1 for ; Tue, 01 Feb 2022 11:32:16 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=49llGIcUTgJBFjwDsRuayXX0Chj7UB+qkc+tnZISWh0=; b=txoqg5oDrlGlq/mxk692by0zNf7x04hs/CImsmQBZUYpyaRqAOgEdQ54JCJ5NnxLzM EeRDn78NG3OJRSrUlqMV3oiPoS5uFbDU4lnLQeBQwD0DJi88OToqnrKgi8X6yE3GNZoS wuyRXbe8MkXxzCtQ33idu433HfKQcFK+PcGmlfNDceZblTf1xcsWFk6GpBofOq19E1Vi JpBOgXPRa9mjfRPHzIPMyCgrGFGbkFVdJzvz6hznYxDyW44tEY+wtnlULq6RMLjvv4KF AXB3iKfBHQ/mtEDIaHfwJUUYn9+JTnjFdAqLtScH6OD/sBzvF9fkXypFeyvyoHPTtZyq Hp2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=49llGIcUTgJBFjwDsRuayXX0Chj7UB+qkc+tnZISWh0=; b=4jcmQYE7pdbomQuuOOZiZNNeffxBXJ990yuegtPupKQxlIlGDqNj5tRbv2Vbp+ey9q hJ0PyiuGPIPrp1ZqDFDbzsI3WuKrtlJ3RyGT+4KjToraeY1XGAo/fPjLxhhgy7+plHYL 53ZByZB8ElMAbSUe75w+8cQUptXn20ia+jPN6cvzfFhpGv3VfUH2RDAToQZKZfbEIf8d Tt5x+ewjzj5/QldWZjt7+BbkiWfwDip3dWo4+qKHzdIpSZh0pEls/UZkzYB6I7ZsISRy ssUZy5SYUyAKSQdcp4KP3HYYLvjiIF8nS+tSKXBedqatYi2CBAVFimpSnDfG5RJ4nvuw dSsA== X-Gm-Message-State: AOAM530CkArGORW63x3zsfaRaUD0smRaH6yI+tRsOny0FhEGdV+1vTuc RgzVURyR2HnjvKgxkUYGbp254Bebz24afQ== X-Google-Smtp-Source: ABdhPJzQ+XJO+XFICoSXHlMPnDTCGK3uU858CXKzljjZp9mdM9gW4hTKXKIX5dDblnDJEtQK1WXKsg== X-Received: by 2002:a05:600c:3b25:: with SMTP id m37mr3082886wms.40.1643743935666; Tue, 01 Feb 2022 11:32:15 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 07/13] hw/intc/arm_gicv3_its: Avoid nested ifs in get_ite() Date: Tue, 1 Feb 2022 19:32:01 +0000 Message-Id: <20220201193207.2771604-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::32c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643759193161100001 Content-Type: text/plain; charset="utf-8" The get_ite() code has some awkward nested if statements; clean them up by returning early if the memory accesses fail. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 48eaf20a6c9..6975a349f62 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -197,20 +197,22 @@ static bool get_ite(GICv3ITSState *s, uint32_t eventi= d, const DTEntry *dte, hwaddr iteaddr =3D dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; =20 ite.itel =3D address_space_ldq_le(as, iteaddr, MEMTXATTRS_UNSPECIFIED,= res); + if (*res !=3D MEMTX_OK) { + return false; + } =20 - if (*res =3D=3D MEMTX_OK) { - ite.iteh =3D address_space_ldl_le(as, iteaddr + 8, - MEMTXATTRS_UNSPECIFIED, res); + ite.iteh =3D address_space_ldl_le(as, iteaddr + 8, + MEMTXATTRS_UNSPECIFIED, res); + if (*res !=3D MEMTX_OK) { + return false; + } =20 - if (*res =3D=3D MEMTX_OK) { - if (FIELD_EX64(ite.itel, ITE_L, VALID)) { - int inttype =3D FIELD_EX64(ite.itel, ITE_L, INTTYPE); - if (inttype =3D=3D ITE_INTTYPE_PHYSICAL) { - *pIntid =3D FIELD_EX64(ite.itel, ITE_L, INTID); - *icid =3D FIELD_EX64(ite.itel, ITE_L, ICID); - status =3D true; - } - } + if (FIELD_EX64(ite.itel, ITE_L, VALID)) { + int inttype =3D FIELD_EX64(ite.itel, ITE_L, INTTYPE); + if (inttype =3D=3D ITE_INTTYPE_PHYSICAL) { + *pIntid =3D FIELD_EX64(ite.itel, ITE_L, INTID); + *icid =3D FIELD_EX64(ite.itel, ITE_L, ICID); + status =3D true; } } return status; --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643758888559746.3767085870236; Tue, 1 Feb 2022 15:41:28 -0800 (PST) Received: from localhost ([::1]:33214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF2m6-00082Z-W6 for importer@patchew.org; Tue, 01 Feb 2022 18:41:27 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60594) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytI-0001p6-7s for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:37 -0500 Received: from [2a00:1450:4864:20::332] (port=45726 helo=mail-wm1-x332.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytC-0002XQ-6U for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:33 -0500 Received: by mail-wm1-x332.google.com with SMTP id j5-20020a05600c1c0500b0034d2e956aadso2330341wms.4 for ; Tue, 01 Feb 2022 11:32:17 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nPLPb9l/Buw26NK1shfWRC6uzupfDfIm6yLALRPCcoU=; b=oVklytxsIcBPVPSk81GXVHKEb2LwBcUq6jZNSI9RAHQneo55Cu2zNhblndu3GoP7XJ lulqBf8ezODJOrz66L7/MWRgcqgN1IDdt6dYeReJt4zBeJZ6FwLCZBDqZgadeykwHd/C Y0Nrvhz0jQP7AZPP3OZfDT83ay6Z8mspZ1aF/RvW8ze3V6Oy32KErMPEZnDK41A408Gp NpRxalOlPT09ACSISHsyO0UbZeUq66b9x564yLlFxXLqirHzpIBLrs0YIEBRo2t6MPCa VmQzjIx00/0zkNftmD7skwZfNaVAsc07TycyhBPfLT/6EnaTzjJCHX+CfavXUKPG017z ZDPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nPLPb9l/Buw26NK1shfWRC6uzupfDfIm6yLALRPCcoU=; b=kTUoKScYQ7b/WkqUI/2Fb+McmBk4D87YsvaeAjmkPuLYKEMSgcjIegxzQMk6S0mrdW RhMybCtTRLWjb7lg2zaX+Ku3+GerMK3V7uqJYA2+BCA5hWqdRWGH+PZTHeax6N9G/JDx b4r6wnXNBqx+oIV+axO8C6K0whupwaXU/DiNF1pz/V1eTNAp/QeP6wcuFtyhG5Or+1WF zH8wJ2S7c5By+VaGCsz0jB8lHWZNEER4o3t1/LzKNoI9oTtizdmh4GKRANSMEWdSfgBm UadxniWa3FCs5FdAaVRTpyWAnI+UJyU2noAyiiHQ6qGntI4XqCcylHIerjh4JpaWC1SG 16FA== X-Gm-Message-State: AOAM533Olayx+knkoc2u2dDSl4ZNN99giPc8nbWTRmnimayd1ol1mDvf kHM/7YuOSrrpcCOjR4QUXUELfw== X-Google-Smtp-Source: ABdhPJxqQy5vu706DcQRJcyx1r6/CeXi6uhuv0kPH70T0tQE2Z+fzw9hUDr7N4i/cusiiWod5U7cYg== X-Received: by 2002:a05:600c:2741:: with SMTP id 1mr3177734wmw.50.1643743936764; Tue, 01 Feb 2022 11:32:16 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 08/13] hw/intc/arm_gicv3_its: Pass ITE values back from get_ite() via a struct Date: Tue, 1 Feb 2022 19:32:02 +0000 Message-Id: <20220201193207.2771604-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::332 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643758890816100001 Content-Type: text/plain; charset="utf-8" In get_ite() we currently return the caller some of the fields of an Interrupt Table Entry via a set of pointer arguments, and validate some of them internally (interrupt type and valid bit) to return a simple true/false 'valid' indication. Define a new ITEntry struct which has all the fields that the in-memory ITE has, and bring the get_ite() function in to line with get_dte() and get_cte(). This paves the way for handling virtual interrupts, which will want a different subset of the fields in the ITE. Handling them under the old "lots of pointer arguments" scheme would have meant a confusingly large set of arguments for this function. The new struct ITEntry is obviously confusably similar to the existing IteEntry struct, whose fields are the raw 12 bytes of the in-memory ITE. In the next commit we will make update_ite() use ITEntry instead of IteEntry, which will allow us to delete the IteEntry struct and remove the confusion. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 102 ++++++++++++++++++++++------------------ 1 file changed, 55 insertions(+), 47 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 6975a349f62..bd741085022 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -57,6 +57,16 @@ typedef struct CTEntry { uint32_t rdbase; } CTEntry; =20 +typedef struct ITEntry { + bool valid; + int inttype; + uint32_t intid; + uint32_t doorbell; + uint32_t icid; + uint32_t vpeid; +} ITEntry; + + /* * The ITS spec permits a range of CONSTRAINED UNPREDICTABLE options * if a command parameter is not correct. These include both "stall @@ -188,34 +198,38 @@ static bool update_ite(GICv3ITSState *s, uint32_t eve= ntid, const DTEntry *dte, } } =20 -static bool get_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *dte, - uint16_t *icid, uint32_t *pIntid, MemTxResult *res) +/* + * Read the Interrupt Table entry at index @eventid from the table specifi= ed + * by the DTE @dte. On success, we return MEMTX_OK and populate the ITEntry + * struct @ite accordingly. If there is an error reading memory then we re= turn + * the error code. + */ +static MemTxResult get_ite(GICv3ITSState *s, uint32_t eventid, + const DTEntry *dte, ITEntry *ite) { AddressSpace *as =3D &s->gicv3->dma_as; - bool status =3D false; - IteEntry ite =3D {}; + MemTxResult res =3D MEMTX_OK; + uint64_t itel; + uint32_t iteh; hwaddr iteaddr =3D dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; =20 - ite.itel =3D address_space_ldq_le(as, iteaddr, MEMTXATTRS_UNSPECIFIED,= res); - if (*res !=3D MEMTX_OK) { - return false; + itel =3D address_space_ldq_le(as, iteaddr, MEMTXATTRS_UNSPECIFIED, &re= s); + if (res !=3D MEMTX_OK) { + return res; } =20 - ite.iteh =3D address_space_ldl_le(as, iteaddr + 8, - MEMTXATTRS_UNSPECIFIED, res); - if (*res !=3D MEMTX_OK) { - return false; + iteh =3D address_space_ldl_le(as, iteaddr + 8, MEMTXATTRS_UNSPECIFIED,= &res); + if (res !=3D MEMTX_OK) { + return res; } =20 - if (FIELD_EX64(ite.itel, ITE_L, VALID)) { - int inttype =3D FIELD_EX64(ite.itel, ITE_L, INTTYPE); - if (inttype =3D=3D ITE_INTTYPE_PHYSICAL) { - *pIntid =3D FIELD_EX64(ite.itel, ITE_L, INTID); - *icid =3D FIELD_EX64(ite.itel, ITE_L, ICID); - status =3D true; - } - } - return status; + ite->valid =3D FIELD_EX64(itel, ITE_L, VALID); + ite->inttype =3D FIELD_EX64(itel, ITE_L, INTTYPE); + ite->intid =3D FIELD_EX64(itel, ITE_L, INTID); + ite->icid =3D FIELD_EX64(itel, ITE_L, ICID); + ite->vpeid =3D FIELD_EX64(itel, ITE_L, VPEID); + ite->doorbell =3D FIELD_EX64(iteh, ITE_H, DOORBELL); + return MEMTX_OK; } =20 /* @@ -258,13 +272,10 @@ static MemTxResult get_dte(GICv3ITSState *s, uint32_t= devid, DTEntry *dte) static ItsCmdResult do_process_its_cmd(GICv3ITSState *s, uint32_t devid, uint32_t eventid, ItsCmdType cmd) { - MemTxResult res =3D MEMTX_OK; uint64_t num_eventids; - uint16_t icid =3D 0; - uint32_t pIntid =3D 0; - bool ite_valid =3D false; DTEntry dte; CTEntry cte; + ITEntry ite; =20 if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, @@ -292,26 +303,25 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState = *s, uint32_t devid, return CMD_CONTINUE; } =20 - ite_valid =3D get_ite(s, eventid, &dte, &icid, &pIntid, &res); - if (res !=3D MEMTX_OK) { + if (get_ite(s, eventid, &dte, &ite) !=3D MEMTX_OK) { return CMD_STALL; } =20 - if (!ite_valid) { + if (!ite.valid || ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: invalid ITE\n", __func__); return CMD_CONTINUE; } =20 - if (icid >=3D s->ct.num_entries) { + if (ite.icid >=3D s->ct.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid ICID 0x%x in ITE (table corrupted?)\n", - __func__, icid); + __func__, ite.icid); return CMD_CONTINUE; } =20 - if (get_cte(s, icid, &cte) !=3D MEMTX_OK) { + if (get_cte(s, ite.icid, &cte) !=3D MEMTX_OK) { return CMD_STALL; } if (!cte.valid) { @@ -330,15 +340,15 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState = *s, uint32_t devid, } =20 if ((cmd =3D=3D CLEAR) || (cmd =3D=3D DISCARD)) { - gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], pIntid, 0); + gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], ite.intid, 0); } else { - gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], pIntid, 1); + gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], ite.intid, 1); } =20 if (cmd =3D=3D DISCARD) { - IteEntry ite =3D {}; + IteEntry itee =3D {}; /* remove mapping from interrupt translation table */ - return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STAL= L; + return update_ite(s, eventid, &dte, itee) ? CMD_CONTINUE : CMD_STA= LL; } return CMD_CONTINUE; } @@ -572,14 +582,13 @@ static ItsCmdResult process_movall(GICv3ITSState *s, = const uint64_t *cmdpkt) =20 static ItsCmdResult process_movi(GICv3ITSState *s, const uint64_t *cmdpkt) { - MemTxResult res =3D MEMTX_OK; - uint32_t devid, eventid, intid; - uint16_t old_icid, new_icid; - bool ite_valid; + uint32_t devid, eventid; + uint16_t new_icid; uint64_t num_eventids; IteEntry ite =3D {}; DTEntry dte; CTEntry old_cte, new_cte; + ITEntry old_ite; =20 devid =3D FIELD_EX64(cmdpkt[0], MOVI_0, DEVICEID); eventid =3D FIELD_EX64(cmdpkt[1], MOVI_1, EVENTID); @@ -611,22 +620,21 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - ite_valid =3D get_ite(s, eventid, &dte, &old_icid, &intid, &res); - if (res !=3D MEMTX_OK) { + if (get_ite(s, eventid, &dte, &old_ite) !=3D MEMTX_OK) { return CMD_STALL; } =20 - if (!ite_valid) { + if (!old_ite.valid || old_ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: invalid ITE\n", __func__); return CMD_CONTINUE; } =20 - if (old_icid >=3D s->ct.num_entries) { + if (old_ite.icid >=3D s->ct.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid ICID 0x%x in ITE (table corrupted?)\n", - __func__, old_icid); + __func__, old_ite.icid); return CMD_CONTINUE; } =20 @@ -637,14 +645,14 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - if (get_cte(s, old_icid, &old_cte) !=3D MEMTX_OK) { + if (get_cte(s, old_ite.icid, &old_cte) !=3D MEMTX_OK) { return CMD_STALL; } if (!old_cte.valid) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: " "invalid CTE for old ICID 0x%x\n", - __func__, old_icid); + __func__, old_ite.icid); return CMD_CONTINUE; } =20 @@ -677,13 +685,13 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) /* Move the LPI from the old redistributor to the new one */ gicv3_redist_mov_lpi(&s->gicv3->cpu[old_cte.rdbase], &s->gicv3->cpu[new_cte.rdbase], - intid); + old_ite.intid); } =20 /* Update the ICID field in the interrupt translation table entry */ ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, 1); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTTYPE, ITE_INTTYPE_PHYSICAL= ); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, intid); + ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, old_ite.intid); ite.itel =3D FIELD_DP64(ite.itel, ITE_L, ICID, new_icid); ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, DOORBELL, INTID_SPURIOUS); return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643764330070633.3019518242304; Tue, 1 Feb 2022 17:12:10 -0800 (PST) Received: from localhost ([::1]:55924 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF4Bt-00071d-AC for importer@patchew.org; Tue, 01 Feb 2022 20:12:09 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60692) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytK-0001rK-Kw for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:39 -0500 Received: from [2a00:1450:4864:20::335] (port=40652 helo=mail-wm1-x335.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytH-0002XY-2p for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:38 -0500 Received: by mail-wm1-x335.google.com with SMTP id l129-20020a1c2587000000b0035394fedf14so2721920wml.5 for ; Tue, 01 Feb 2022 11:32:18 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ySqmSUe+pqKU2/8QTA7TiGVv/mwkYf9L8c4E7rJVGHU=; b=KQY7SNl1o+xanxUO64cGKa1UnOuHrm3wcbHPJvPZbdQ3/7ua6uc1rNbxWlFI64JhQG HHmbKViSBImkww+wAhE55CFfn4Z2S6UVjBle1HbwmcM85S4LmjXuSFI6L3Zb+WNv3UDo V9CdTmr00y2w3V7/jEQXjqDwf08ppbQh29fVnZQYDMLx4vwVGRex0U2PSl++EuxPdOBM xacUUdpES+Qszy70qpAGwnSjpbj76doIzasn+wy+iA1lWHGYQAOICrR+NLcdeQ09sDMq KLHCRxM/eQNRDH93Deym2CLicSBXnk6q/iGuQ0/J7UyTzvN0KbSrpfM5FAnue/PxljOQ tDrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ySqmSUe+pqKU2/8QTA7TiGVv/mwkYf9L8c4E7rJVGHU=; b=BrZ8Vvp5n8RVOfnZ4gDv0igzfh548w8DXVOlL00V0lCUueKgHKCPZMZotdFvHcDeAv NJsDMkzVFI3g7EmYnZOvAZU2/tD+0kvr40WFcYH0zSc9h6a6cqG0dlOxYp4/p3PWGNGN VLxG0hkzHEVwADCBsEIxkr5SvFpbD/YphmSBB6yP3Wb2b9BLAt/uPyIHxyc+2OKjwWzt hc+oKQVqbF/pvqD/BMD0S+UdN9yiVT1fOqrn+rDujhDW2t3VWfttlj7zjP4x824EZWc2 hjRI61D6OyhjYB4LPSbapCT08UucMHThHThzM6pnDfB+AkTm7KZ2RbeF6StyezXPYJn5 tVdA== X-Gm-Message-State: AOAM530ZB+uJbApTsf9DtmzFJO9MchKZos46rfS8iZOpsvCf+LjZBWRU /0psxoYBY2BmbjkUwT3+q0fx7g== X-Google-Smtp-Source: ABdhPJzj2V6ZlqMCK/7AHfhygOHgX9l+HPSCUuk9mwLtaxccpWHU9DGWglMkuTCS6R2l82IHPhfgYQ== X-Received: by 2002:a05:600c:25a:: with SMTP id 26mr3060727wmj.184.1643743937597; Tue, 01 Feb 2022 11:32:17 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 09/13] hw/intc/arm_gicv3_its: Make update_ite() use ITEntry Date: Tue, 1 Feb 2022 19:32:03 +0000 Message-Id: <20220201193207.2771604-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::335 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643764332185100003 Content-Type: text/plain; charset="utf-8" Make the update_ite() struct use the new ITEntry struct, so that callers don't need to assemble the in-memory ITE data themselves, and only get_ite() and update_ite() need to care about that in-memory layout. We can then drop the no-longer-used IteEntry struct definition. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 62 +++++++++++++++++++++-------------------- 1 file changed, 32 insertions(+), 30 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index bd741085022..e3b63efddcc 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -41,11 +41,6 @@ typedef enum ItsCmdType { INTERRUPT =3D 3, } ItsCmdType; =20 -typedef struct { - uint32_t iteh; - uint64_t itel; -} IteEntry; - typedef struct DTEntry { bool valid; unsigned size; @@ -178,24 +173,35 @@ static MemTxResult get_cte(GICv3ITSState *s, uint16_t= icid, CTEntry *cte) return MEMTX_OK; } =20 +/* + * Update the Interrupt Table entry at index @evinted in the table specifi= ed + * by the dte @dte. Returns true on success, false if there was a memory + * access error. + */ static bool update_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *= dte, - IteEntry ite) + const ITEntry *ite) { AddressSpace *as =3D &s->gicv3->dma_as; MemTxResult res =3D MEMTX_OK; hwaddr iteaddr =3D dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; + uint64_t itel =3D 0; + uint32_t iteh =3D 0; =20 - address_space_stq_le(as, iteaddr, ite.itel, MEMTXATTRS_UNSPECIFIED, &r= es); - - if (res =3D=3D MEMTX_OK) { - address_space_stl_le(as, iteaddr + 8, ite.iteh, - MEMTXATTRS_UNSPECIFIED, &res); + if (ite->valid) { + itel =3D FIELD_DP64(itel, ITE_L, VALID, 1); + itel =3D FIELD_DP64(itel, ITE_L, INTTYPE, ite->inttype); + itel =3D FIELD_DP64(itel, ITE_L, INTID, ite->intid); + itel =3D FIELD_DP64(itel, ITE_L, ICID, ite->icid); + itel =3D FIELD_DP64(itel, ITE_L, VPEID, ite->vpeid); + iteh =3D FIELD_DP32(iteh, ITE_H, DOORBELL, ite->doorbell); } + + address_space_stq_le(as, iteaddr, itel, MEMTXATTRS_UNSPECIFIED, &res); if (res !=3D MEMTX_OK) { return false; - } else { - return true; } + address_space_stl_le(as, iteaddr + 8, iteh, MEMTXATTRS_UNSPECIFIED, &r= es); + return res =3D=3D MEMTX_OK; } =20 /* @@ -346,9 +352,10 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *= s, uint32_t devid, } =20 if (cmd =3D=3D DISCARD) { - IteEntry itee =3D {}; + ITEntry ite =3D {}; /* remove mapping from interrupt translation table */ - return update_ite(s, eventid, &dte, itee) ? CMD_CONTINUE : CMD_STA= LL; + ite.valid =3D false; + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STA= LL; } return CMD_CONTINUE; } @@ -370,8 +377,8 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, uint64_t num_eventids; uint32_t num_intids; uint16_t icid =3D 0; - IteEntry ite =3D {}; DTEntry dte; + ITEntry ite; =20 devid =3D (cmdpkt[0] & DEVID_MASK) >> DEVID_SHIFT; eventid =3D cmdpkt[1] & EVENTID_MASK; @@ -415,13 +422,13 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, c= onst uint64_t *cmdpkt, } =20 /* add ite entry to interrupt translation table */ - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, true); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTTYPE, ITE_INTTYPE_PHYSICAL= ); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, pIntid); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, ICID, icid); - ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, DOORBELL, INTID_SPURIOUS); - - return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; + ite.valid =3D true; + ite.inttype =3D ITE_INTTYPE_PHYSICAL; + ite.intid =3D pIntid; + ite.icid =3D icid; + ite.doorbell =3D INTID_SPURIOUS; + ite.vpeid =3D 0; + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL; } =20 /* @@ -585,7 +592,6 @@ static ItsCmdResult process_movi(GICv3ITSState *s, cons= t uint64_t *cmdpkt) uint32_t devid, eventid; uint16_t new_icid; uint64_t num_eventids; - IteEntry ite =3D {}; DTEntry dte; CTEntry old_cte, new_cte; ITEntry old_ite; @@ -689,12 +695,8 @@ static ItsCmdResult process_movi(GICv3ITSState *s, con= st uint64_t *cmdpkt) } =20 /* Update the ICID field in the interrupt translation table entry */ - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, VALID, 1); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTTYPE, ITE_INTTYPE_PHYSICAL= ); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, INTID, old_ite.intid); - ite.itel =3D FIELD_DP64(ite.itel, ITE_L, ICID, new_icid); - ite.iteh =3D FIELD_DP32(ite.iteh, ITE_H, DOORBELL, INTID_SPURIOUS); - return update_ite(s, eventid, &dte, ite) ? CMD_CONTINUE : CMD_STALL; + old_ite.icid =3D new_icid; + return update_ite(s, eventid, &dte, &old_ite) ? CMD_CONTINUE : CMD_STA= LL; } =20 /* --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643765271525911.0483679521308; Tue, 1 Feb 2022 17:27:51 -0800 (PST) Received: from localhost ([::1]:38514 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF4R4-0006rs-Lx for importer@patchew.org; Tue, 01 Feb 2022 20:27:50 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60764) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytM-0001sx-86 for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:40 -0500 Received: from [2a00:1450:4864:20::331] (port=43646 helo=mail-wm1-x331.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytI-0002Xg-1y for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:39 -0500 Received: by mail-wm1-x331.google.com with SMTP id k6-20020a05600c1c8600b003524656034cso2339489wms.2 for ; Tue, 01 Feb 2022 11:32:19 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EUHw8m4RBKGoqre1Z9En7gX4Mxb4JnFHHHZdcEKUkCs=; b=PT4/03686p5mVTGJvRQrm4cVIIdOtAlPa/KD8mY1Rq5+bclMBYb+u55yDHaBPbkI8E nh7IOksZq5+jh6avyqzHYeqXMCs/eVYBJUOsd8/cY1yAqytRQXXzjVRk1NaudkXgrtB5 ggE2Ev5EcGieE/YDd7tvbj56Pi/iVTpGQsEzhCLK4a1h7qzaFLI1m52W26SZhHy8gqM5 zaurEAVMQ/sd4m4Jo1p+VIcu13NROFP9IgRewocuElJDRTMfkd65Cw5SiJ82HAN43r1R ExpyKFnopCf7sOWi0Cxtbcbw9F4/c1O+I47re0tPzJnEVK++hMUDB5hK7ZyoSk1ckQdJ WELA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EUHw8m4RBKGoqre1Z9En7gX4Mxb4JnFHHHZdcEKUkCs=; b=MaGHWkjqjUKNJjoOjoFmkR2+gEuekSUvLe5MMcluiZmRGy5qo6V7m5/7roadIkknGD GMFBRmyU77RufXivjJn85luusaRYJpB7CISgGb9onfAYZFUo7H1yv/v0YN/tJAtSQezI 8p8f2qKE/Im/rQk0hR+0g8A+B6ggfz3Ko7YNPEZkjtzuYvdQAzkaz+IcMv/qTNm6Hvbh 3vO3U05a9s649zzViUazssRFe8tXMcIVh3RfgV6ZaP3QDA/l3Lcr0y/M3RFIplX0AsA0 txPVbqbVKd89Few91BQmWxiSjfhcWUNe++YM1r/+idm7cHTwpiSeC39karLp19nMcaJB 0fYg== X-Gm-Message-State: AOAM530wutQ4G+RvTaFl5CuEn9dmzAQuoOuxnidg71WjToJkHq7gs8no gCQYcMNwrWbVBcVNimMq2NJ8cg== X-Google-Smtp-Source: ABdhPJwiENaiStnlF9RXLepv/dPjLSLwoaK61gmupM4YlmD6gvR3vpmZuwQ6/m/mNlkduLty9S77Tw== X-Received: by 2002:a05:600c:1f0a:: with SMTP id bd10mr3093343wmb.6.1643743938426; Tue, 01 Feb 2022 11:32:18 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 10/13] hw/intc/arm_gicv3_its: Drop TableDesc and CmdQDesc valid fields Date: Tue, 1 Feb 2022 19:32:04 +0000 Message-Id: <20220201193207.2771604-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::331 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643765274114100001 Content-Type: text/plain; charset="utf-8" Currently we track in the TableDesc and CmdQDesc structs the state of the GITS_BASER and GITS_CBASER Valid bits. However we aren't very consistent abut checking the valid field: we test it in update_cte() and update_dte(), but not anywhere else we look things up in tables. The GIC specification says that it is UNPREDICTABLE if a guest fails to set any of these Valid bits before enabling the ITS via GITS_CTLR.Enabled. So we can choose to handle Valid =3D=3D 0 as equivalent to a zero-length table. This is in fact how we're already catching this case in most of the table-access paths: when Valid is 0 we leave the num_entries fields in TableDesc or CmdQDesc set to zero, and then the out-of-bounds check "index >=3D num_entries" that we have to do anyway before doing any of these table lookups will always be true, catching the no-valid-table case without any extra code. So we can remove the checks on the valid field from update_cte() and update_dte(): since these happen after the bounds check there was never any case when the test could fail. That means the valid fields would be entirely unused, so just remove them. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- include/hw/intc/arm_gicv3_its_common.h | 2 -- hw/intc/arm_gicv3_its.c | 31 ++++++++++++-------------- 2 files changed, 14 insertions(+), 19 deletions(-) diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_g= icv3_its_common.h index 3e2ad2dff60..0f130494dd3 100644 --- a/include/hw/intc/arm_gicv3_its_common.h +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -42,7 +42,6 @@ #define GITS_TRANSLATER 0x0040 =20 typedef struct { - bool valid; bool indirect; uint16_t entry_sz; uint32_t page_sz; @@ -51,7 +50,6 @@ typedef struct { } TableDesc; =20 typedef struct { - bool valid; uint32_t num_entries; uint64_t base_addr; } CmdQDesc; diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index e3b63efddcc..9735d609df2 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -442,10 +442,6 @@ static bool update_cte(GICv3ITSState *s, uint16_t icid= , const CTEntry *cte) uint64_t cteval =3D 0; MemTxResult res =3D MEMTX_OK; =20 - if (!s->ct.valid) { - return true; - } - if (cte->valid) { /* add mapping entry to collection table */ cteval =3D FIELD_DP64(cteval, CTE, VALID, 1); @@ -504,15 +500,11 @@ static bool update_dte(GICv3ITSState *s, uint32_t dev= id, const DTEntry *dte) uint64_t dteval =3D 0; MemTxResult res =3D MEMTX_OK; =20 - if (s->dt.valid) { - if (dte->valid) { - /* add mapping entry to device table */ - dteval =3D FIELD_DP64(dteval, DTE, VALID, 1); - dteval =3D FIELD_DP64(dteval, DTE, SIZE, dte->size); - dteval =3D FIELD_DP64(dteval, DTE, ITTADDR, dte->ittaddr); - } - } else { - return true; + if (dte->valid) { + /* add mapping entry to device table */ + dteval =3D FIELD_DP64(dteval, DTE, VALID, 1); + dteval =3D FIELD_DP64(dteval, DTE, SIZE, dte->size); + dteval =3D FIELD_DP64(dteval, DTE, ITTADDR, dte->ittaddr); } =20 entry_addr =3D table_entry_addr(s, &s->dt, devid, &res); @@ -901,7 +893,6 @@ static void extract_table_params(GICv3ITSState *s) } =20 memset(td, 0, sizeof(*td)); - td->valid =3D FIELD_EX64(value, GITS_BASER, VALID); /* * If GITS_BASER.Valid is 0 for any then we will not process * interrupts. (GITS_TYPER.HCC is 0 for this implementation, so we @@ -909,8 +900,15 @@ static void extract_table_params(GICv3ITSState *s) * for the register corresponding to the Collection table but we * still have to process interrupts using non-memory-backed * Collection table entries.) + * The specification makes it UNPREDICTABLE to enable the ITS with= out + * marking each BASER as valid. We choose to handle these as if + * the table was zero-sized, so commands using the table will fail + * and interrupts requested via GITS_TRANSLATER writes will be ign= ored. + * This happens automatically by leaving the num_entries field at + * zero, which will be caught by the bounds checks we have before + * every table lookup anyway. */ - if (!td->valid) { + if (!FIELD_EX64(value, GITS_BASER, VALID)) { continue; } td->page_sz =3D page_sz; @@ -936,9 +934,8 @@ static void extract_cmdq_params(GICv3ITSState *s) num_pages =3D FIELD_EX64(value, GITS_CBASER, SIZE) + 1; =20 memset(&s->cq, 0 , sizeof(s->cq)); - s->cq.valid =3D FIELD_EX64(value, GITS_CBASER, VALID); =20 - if (s->cq.valid) { + if (FIELD_EX64(value, GITS_CBASER, VALID)) { s->cq.num_entries =3D (num_pages * GITS_PAGE_SIZE_4K) / GITS_CMDQ_ENTRY_SIZE; s->cq.base_addr =3D FIELD_EX64(value, GITS_CBASER, PHYADDR); --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643753588863427.45728821265004; Tue, 1 Feb 2022 14:13:08 -0800 (PST) Received: from localhost ([::1]:40522 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF1Od-0006ej-R1 for importer@patchew.org; Tue, 01 Feb 2022 17:13:07 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60750) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytL-0001rQ-Qj for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:39 -0500 Received: from [2a00:1450:4864:20::334] (port=38900 helo=mail-wm1-x334.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytI-0002Xo-1R for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:39 -0500 Received: by mail-wm1-x334.google.com with SMTP id o30-20020a05600c511e00b0034f4c3186f4so2818468wms.3 for ; Tue, 01 Feb 2022 11:32:20 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nPzzTIMjX8+LmKQr0pPoJuhI0Z54vBV3jrfkNEOyMpQ=; b=Oojr49ptSEYDc2UEYTipQgMfjRt/UNcm4OqFRkXC6pQb6P7JNCwP/oYdgDsjNOBtCr CPTiMNNDlEfoD4p2idxWxqn0mWR1q6iK+D+wjtfd8AqHfUJnv3iJmqVQJS3hN8LVGp1R AV2pstxjV0bIyRMuFlp9hAXXoJdYX5VqL/T1h5xr2TsV42uLGQSouuArdKPjRJmVZR8V q7aUnAo+QSRFeCi0ZjsSyZIsGPfrtr/jdLJ5bU6ccb0a3AAHb/mRJ9/zoG4JwbBEMOp4 Y6XtXrpBIh/6qtlt2RRa/oOxw6txvdnZ8j6xBSFel1Lnv5C0K2X1QXysMKrk2IcMKEbP TUFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nPzzTIMjX8+LmKQr0pPoJuhI0Z54vBV3jrfkNEOyMpQ=; b=FWLHiDff8DpJISLSNAeF7kEhinhxpje6KQK2ZjmNmL4E+Um+sxyB0gui7cyClkxm1c tm/+ffySCAv7nqHIVOwWJQTjFybTd3tacJOu6sUV4KgVqBoZy9F56csF36PXzCAw8hUp ogg/VgBr7EdygRdAsg5owBJQyCSYBWs151ho2s0TIMo6D+KreF5NxCPRpkf22koIW3kT jVSlQ3HAlPZJ2pg/PLDECrZqx1q05EChOdOE35ZwWGTdKwv2lahOhGZshHQJg2WDni3Z itVeXcU/ewy/RRbV8f2scNRbviE6vMpfywBBNIQX4HVJIwuZ1j0m7e5ia4ixnKhxhmtA U7Ng== X-Gm-Message-State: AOAM533nkBEE0DnXkjzsqb9T7OFDGpPEDTW+b9RCH/gAemibi0YSQlk/ ZOh6DXryEajA7afNmJrdZ3GG0w== X-Google-Smtp-Source: ABdhPJwLvw482/QHDjdabL6RHWYokOnjB7qshV5QFlECJVTiwabJPRSt3eU5JIF8Fy5n90WTBeFMqw== X-Received: by 2002:a05:600c:ac7:: with SMTP id c7mr3128130wmr.61.1643743939232; Tue, 01 Feb 2022 11:32:19 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 11/13] hw/intc/arm_gicv3_its: In MAPC with V=0, don't check rdbase field Date: Tue, 1 Feb 2022 19:32:05 +0000 Message-Id: <20220201193207.2771604-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::334 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643753590364100001 Content-Type: text/plain; charset="utf-8" In the MAPC command, if V=3D0 this is a request to delete a collection table entry and the rdbase field of the command packet will not be used. In particular, the specification says that the "UNPREDICTABLE if rdbase is not valid" only applies for V=3D1. We were doing a check-and-log-guest-error on rdbase regardless of whether the V bit was set, and also (harmlessly but confusingly) storing the contents of the rdbase field into the updated collection table entry. Update the code so that if V=3D0 we don't check or use the rdbase field value. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 9735d609df2..069991f7f36 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -468,21 +468,21 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, co= nst uint64_t *cmdpkt) CTEntry cte; =20 icid =3D cmdpkt[2] & ICID_MASK; - - cte.rdbase =3D (cmdpkt[2] & R_MAPC_RDBASE_MASK) >> R_MAPC_RDBASE_SHIFT; - cte.rdbase &=3D RDBASE_PROCNUM_MASK; - cte.valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; + if (cte.valid) { + cte.rdbase =3D (cmdpkt[2] & R_MAPC_RDBASE_MASK) >> R_MAPC_RDBASE_S= HIFT; + cte.rdbase &=3D RDBASE_PROCNUM_MASK; + } else { + cte.rdbase =3D 0; + } =20 - if ((icid >=3D s->ct.num_entries) || (cte.rdbase >=3D s->gicv3->num_cp= u)) { + if (icid >=3D s->ct.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%d", icid= ); + return CMD_CONTINUE; + } + if (cte.valid && cte.rdbase >=3D s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, - "ITS MAPC: invalid collection table attributes " - "icid %d rdbase %u\n", icid, cte.rdbase); - /* - * in this implementation, in case of error - * we ignore this command and move onto the next - * command in the queue - */ + "ITS MAPC: invalid RDBASE %u ", cte.rdbase); return CMD_CONTINUE; } =20 --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164376323953969.81234332847282; Tue, 1 Feb 2022 16:53:59 -0800 (PST) Received: from localhost ([::1]:46316 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF3u0-0007Hz-SK for importer@patchew.org; Tue, 01 Feb 2022 19:53:41 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytI-0001p4-6x for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:37 -0500 Received: from [2a00:1450:4864:20::431] (port=45612 helo=mail-wr1-x431.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytC-0002Xx-70 for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:35 -0500 Received: by mail-wr1-x431.google.com with SMTP id m14so33787015wrg.12 for ; Tue, 01 Feb 2022 11:32:20 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PyoYFz0rNK5fksgWbnYb2wlrhqu+KYVYudh2oRoiZhU=; b=DRJO4rd5AVFypEImjA7KJFFGxfCuH6D6v8JACNPRmzBOEsGeMwFOmUmKEJU0UhV+Zq 5jMSyUJM06eD/0WjLKttEfdnpxpnABPINsq/GYx+9BLXE1oQWLSD7azDdGj2JO13yeQQ dgQos0uFsG3ElJM6bXqnAxL4GjO0awqopx21nc8XI9Q1AM8bXoqWkswldPsxS25mnyK2 Jorrc2DfcH7CAuK3eDCBgasnYMpZaHgUi+MWm2cHyri5s7UBWCJQZkgA3gEAUoYBUtPN CPaugd8AyiwJBvaVBWgLQb1YvxIlUBekGndKCLd2+qAgRAtuCpbEWL+gEGcSKBEWk/X0 dUMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PyoYFz0rNK5fksgWbnYb2wlrhqu+KYVYudh2oRoiZhU=; b=hNn+5VOXdH96RisqupVNSdgjZ3myZL2ObUoIwekJjZHiBoLHRzw+rjH0FvMXp2MkfP PV0AhcQ3yig55jhNesFS3Cci7tQ9FSzcJAG8sFjfbjyXihT1yXNag6Op5HDvi0TdYWsp NSAAKkFyRbD6BstSdV1qrt8W+kUHJesX14o5CwE0DBHvBQ/0QlzKGEV6I1X4dBwWbMn1 2JZqooid0b7LyHxmoSQzxkbuMHA7rmbGGaqMot81iuqIoCb3MXaJGgnIuGQyiDmJcQgU JwTq5D1OeU4MQTVChwxm2DuDPPaMZ7YnsXQE4klLutqM3cbd93wmCdKHIz3DS9h5zYvV oHjg== X-Gm-Message-State: AOAM531FpwvlCRhkImEnHZhpjTFYYT9c2HgEZSvRdXaMgKux/0n205Ql UhtV0Dm/w78QCsDpOc9Dc9EV4A== X-Google-Smtp-Source: ABdhPJygeBQuyX0J8zc2OlAfe+Y3XDaVTJShAHAQt+mmIOm0CG8UtQ2DcLiUlf7Sb1sXCrIY4wKqDw== X-Received: by 2002:adf:fb10:: with SMTP id c16mr22693982wrr.200.1643743940023; Tue, 01 Feb 2022 11:32:20 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 12/13] hw/intc/arm_gicv3_its: Don't allow intid 1023 in MAPI/MAPTI Date: Tue, 1 Feb 2022 19:32:06 +0000 Message-Id: <20220201193207.2771604-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::431 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643763242092100001 Content-Type: text/plain; charset="utf-8" When handling MAPI/MAPTI, we allow the supplied interrupt ID to be either 1023 or something in the valid LPI range. This is a mistake: only a real valid LPI is allowed. (The general behaviour of the ITS is that most interrupt ID fields require a value in the LPI range; the exception is that fields specifying a doorbell value, which are all in GICv4 commands, allow also 1023 to mean "no doorbell".) Remove the condition that incorrectly allows 1023 here. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- This one's my fault -- Shashi's original code did the right thing, IIRC. The spec text and pseudocode disagree here, and in code review I backed the wrong horse. Sorry. --- hw/intc/arm_gicv3_its.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 069991f7f36..8dade9440ac 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -406,8 +406,7 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, =20 if ((icid >=3D s->ct.num_entries) || !dte.valid || (eventid >=3D num_eventids) || - (((pIntid < GICV3_LPI_INTID_START) || (pIntid >=3D num_intids)= ) && - (pIntid !=3D INTID_SPURIOUS))) { + (((pIntid < GICV3_LPI_INTID_START) || (pIntid >=3D num_intids)= ))) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes " "icid %d or eventid %d or pIntid %d or" --=20 2.25.1 From nobody Fri May 17 21:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643753337656583.2492950730917; Tue, 1 Feb 2022 14:08:57 -0800 (PST) Received: from localhost ([::1]:60104 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF1Ka-0000bM-Vk for importer@patchew.org; Tue, 01 Feb 2022 17:08:57 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60698) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEytK-0001rN-Mu for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:39 -0500 Received: from [2a00:1450:4864:20::42c] (port=35422 helo=mail-wr1-x42c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nEytH-0002Y7-Qf for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:32:38 -0500 Received: by mail-wr1-x42c.google.com with SMTP id e2so34081640wra.2 for ; Tue, 01 Feb 2022 11:32:21 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id z5sm3491265wmp.10.2022.02.01.11.32.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 11:32:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=blUi2JCgQAd+TDFPkf/imnCCaFxJVC4UZRRy+Dtpxxo=; b=Epm9qyHDdpnxH7Z88f8KwOkgSGjMCXSRBY8G7Lyr47NzN3KxePExIUIVWbAZ7SF8bj /PNHB2KTLr9oDsVDwdJWr1br25bG7uwEy3BvXZi70O/O3GpnYMVn7JbI+3SM1bFkE81Q k8HBdrHI6zk7o9ccNbeX9HsOm8ToLGb5VB1o9S9VoNhwMEUPMGLV+gz0bAYQa1MesyBh xrV7UA71TrFqV/eOFOKI6VxXOEDTqkX17io4Y+wT/78lEnwHkzApHNheuK2zt9On4sKp MvY1rrZK4z1m9xKc+hw0iW2ipU8xyreBglUkqqE+Hp4b6RyEBUIrLtW7StW3UHp1NcIS 6SPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=blUi2JCgQAd+TDFPkf/imnCCaFxJVC4UZRRy+Dtpxxo=; b=41jK18RVziUoqHtE8Jy+93EJMf/nn+YA2l72+KatJiufLbWntkhNjGeksWkWSZA5ms 5x7UIzFnu7NAClJEeaLEg9IDXX6i42nd/dZSHWV9AUYaDRrg6j6zBytH8xAaZn/+SbHn P4PLkfyafPy4kf8R8+1w363cpfD1mzGKDdkICnyGUDUc0u4lvuCbzslAlFYIA/Ds1oDc ENqq1ebfQZbAF02f3sz2VJ2c1uVIPe0bXbzn+1hUvZFQCFv0F6F8nYrnGskL/q25di80 87qFqTpZagoHgNEMktXeTpTfbggMssa4vN9DFjLOl8iL3Q9t2XomF+0pQ11S2sBE0ZcO RyEA== X-Gm-Message-State: AOAM530AuzJKKh7q7vChClkmAZxZN1uDiT+/rIr+Q8g8mKzzAEPGMXf+ HGLBS16HEUnxjPDWHeoGN2DZ6w== X-Google-Smtp-Source: ABdhPJztY4hlw7tj2DNUREwQ9koDN1FczEpkO004+Rp5PdYypWIq8PJrI5JiBzH2L6wT0ueOY5XGKQ== X-Received: by 2002:adf:d1e9:: with SMTP id g9mr17579790wrd.645.1643743940740; Tue, 01 Feb 2022 11:32:20 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 13/13] hw/intc/arm_gicv3_its: Split error checks Date: Tue, 1 Feb 2022 19:32:07 +0000 Message-Id: <20220201193207.2771604-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201193207.2771604-1-peter.maydell@linaro.org> References: <20220201193207.2771604-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::42c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1643753340331100001 Content-Type: text/plain; charset="utf-8" In most of the ITS command processing, we check different error possibilities one at a time and log them appropriately. In process_mapti() and process_mapd() we have code which checks multiple error cases at once, which means the logging is less specific than it could be. Split those cases up. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its.c | 52 ++++++++++++++++++++++++----------------- 1 file changed, 31 insertions(+), 21 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 8dade9440ac..4f598d3c14f 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -404,19 +404,29 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, c= onst uint64_t *cmdpkt, num_eventids =3D 1ULL << (dte.size + 1); num_intids =3D 1ULL << (GICD_TYPER_IDBITS + 1); =20 - if ((icid >=3D s->ct.num_entries) - || !dte.valid || (eventid >=3D num_eventids) || - (((pIntid < GICV3_LPI_INTID_START) || (pIntid >=3D num_intids)= ))) { + if (icid >=3D s->ct.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes " - "icid %d or eventid %d or pIntid %d or" - "unmapped dte %d\n", __func__, icid, eventid, - pIntid, dte.valid); - /* - * in this implementation, in case of error - * we ignore this command and move onto the next - * command in the queue - */ + "%s: invalid ICID 0x%x >=3D 0x%x\n", + __func__, icid, s->ct.num_entries); + return CMD_CONTINUE; + } + + if (!dte.valid) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: no valid DTE for devid 0x%x\n", __func__, devid= ); + return CMD_CONTINUE; + } + + if (eventid >=3D num_eventids) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid event ID 0x%x >=3D 0x%" PRIx64 "\n", + __func__, eventid, num_eventids); + return CMD_CONTINUE; + } + + if (pIntid < GICV3_LPI_INTID_START || pIntid >=3D num_intids) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid interrupt ID 0x%x\n", __func__, pIntid); return CMD_CONTINUE; } =20 @@ -529,16 +539,16 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, co= nst uint64_t *cmdpkt) dte.ittaddr =3D (cmdpkt[2] & ITTADDR_MASK) >> ITTADDR_SHIFT; dte.valid =3D cmdpkt[2] & CMD_FIELD_VALID_MASK; =20 - if ((devid >=3D s->dt.num_entries) || - (dte.size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS))) { + if (devid >=3D s->dt.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, - "ITS MAPD: invalid device table attributes " - "devid %d or size %d\n", devid, dte.size); - /* - * in this implementation, in case of error - * we ignore this command and move onto the next - * command in the queue - */ + "ITS MAPD: invalid device ID field 0x%x >=3D 0x%x\n", + devid, s->dt.num_entries); + return CMD_CONTINUE; + } + + if (dte.size > FIELD_EX64(s->typer, GITS_TYPER, IDBITS)) { + qemu_log_mask(LOG_GUEST_ERROR, + "ITS MAPD: invalid size %d\n", dte.size); return CMD_CONTINUE; } =20 --=20 2.25.1