From nobody Fri May 17 11:28:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1643755689426670.8425367791896; Tue, 1 Feb 2022 14:48:09 -0800 (PST) Received: from localhost ([::1]:39954 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nF1wW-0004Vt-IR for importer@patchew.org; Tue, 01 Feb 2022 17:48:08 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59298) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEypD-0008Rd-Vg for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:28:23 -0500 Received: from dia.uberspace.de ([185.26.156.221]:43288) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nEypA-0001r4-I4 for qemu-devel@nongnu.org; Tue, 01 Feb 2022 14:28:23 -0500 Received: (qmail 21045 invoked by uid 989); 1 Feb 2022 19:28:10 -0000 Received: from unknown (HELO unkown) (::1) by dia.uberspace.de (Haraka/2.8.28) with ESMTPSA; Tue, 01 Feb 2022 20:28:10 +0100 Authentication-Results: dia.uberspace.de; auth=pass (plain) From: Richard Petri To: Subject: [PATCH] hw/timer/armv7m_systick: Update clock source before enabling timer Date: Tue, 1 Feb 2022 20:26:51 +0100 Message-Id: <20220201192650.289584-1-git@rpls.de> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Bar: + X-Rspamd-Report: R_MISSING_CHARSET(0.5) MIME_GOOD(-0.1) MID_CONTAINS_FROM(1) BAYES_HAM(-0.038591) X-Rspamd-Score: 1.361408 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.26.156.221; envelope-from=git@rpls.de; helo=dia.uberspace.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Tue, 01 Feb 2022 17:05:16 -0500 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "open list:ARM cores" , "open list:All patches CC here" , Richard Petri Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1643755692047100001 Content-Type: text/plain; charset="utf-8" Starting the SysTick timer and changing the clock source a the same time will result in an error, if the previous clock period was zero. For exmaple, on the mps2-tz platforms, no refclk is present. Right after reset, the configured ptimer period is zero, and trying to enabling it will turn it off right away. E.g., code running on the platform setting SysTick->CTRL =3D SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; should change the clock source and enable the timer on real hardware, but resulted in an error in qemu. Signed-off-by: Richard Petri Reviewed-by: Peter Maydell --- hw/timer/armv7m_systick.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/timer/armv7m_systick.c b/hw/timer/armv7m_systick.c index 3bd951dd04..5dfe39afe3 100644 --- a/hw/timer/armv7m_systick.c +++ b/hw/timer/armv7m_systick.c @@ -149,6 +149,10 @@ static MemTxResult systick_write(void *opaque, hwaddr = addr, s->control &=3D 0xfffffff8; s->control |=3D value & 7; =20 + if ((oldval ^ value) & SYSTICK_CLKSOURCE) { + systick_set_period_from_clock(s); + } + if ((oldval ^ value) & SYSTICK_ENABLE) { if (value & SYSTICK_ENABLE) { ptimer_run(s->ptimer, 0); @@ -156,10 +160,6 @@ static MemTxResult systick_write(void *opaque, hwaddr = addr, ptimer_stop(s->ptimer); } } - - if ((oldval ^ value) & SYSTICK_CLKSOURCE) { - systick_set_period_from_clock(s); - } ptimer_transaction_commit(s->ptimer); break; } --=20 2.35.1