From nobody Thu Apr 10 01:28:41 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1642698383; cv=none; d=zohomail.com; s=zohoarc; b=BbCqSWFHPAzv1maAWpAj6jKDVIG1UVh8QsiH3srK2L7FcfidwYtg2erLOJ5ijHM1jMtfKHHD0YOFK1U8kqDbvizwGcbQzA8E2L+Q7N3R/KLRJl/kIktKlBqBNuxZa6hQMwAaWcYO9eFvo1jwOTeNxj4+kE2AffI9Dw3OQVYpg8k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1642698383; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=PmHXupL03JyCbpDAhPnTSUzNfKvyaSym3zPH6Rc5qOs=; b=lM86U5oCZGyOuk8ZjdS3g8eLz+Ue/DwhCxQ0rbP6zzaDwY7rylLlv71mgB7/pMIC4FtTFcQIv20J8PJJgAEfNrKZdO5c4vCqFvnQjGX5PCfvaReykQlExATZ4rJtzU1M0GVkJgHfeSYcptIrSkTDWtpeJBpXi/8OOLyugc71kjw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1642698383234117.02116312983947; Thu, 20 Jan 2022 09:06:23 -0800 (PST) Received: from localhost ([::1]:34804 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nAatC-0003Np-3C for importer@patchew.org; Thu, 20 Jan 2022 12:06:22 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42746) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nAWgM-0004A5-EC for qemu-devel@nongnu.org; Thu, 20 Jan 2022 07:36:50 -0500 Received: from [2a00:1450:4864:20::336] (port=36530 helo=mail-wm1-x336.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nAWgJ-00039u-4t for qemu-devel@nongnu.org; Thu, 20 Jan 2022 07:36:49 -0500 Received: by mail-wm1-x336.google.com with SMTP id i187-20020a1c3bc4000000b0034d2ed1be2aso20155867wma.1 for ; Thu, 20 Jan 2022 04:36:46 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t8sm7993324wmq.43.2022.01.20.04.36.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 04:36:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PmHXupL03JyCbpDAhPnTSUzNfKvyaSym3zPH6Rc5qOs=; b=dk6uBIlGPpiuB5cf1k/dC9/WhSPlCCwUCdrrqVSkm3G1+PWLrX9+6lSo/+Y+wVVqid Ef6ec3u6fW7aHC8V+bActdzCqkndPatUYsrKGTqqLq0eIEjxdzrj9uxNWRQv9x02Appq euKtytsIwzaHNjlzLTgjM7+FKe9s7G7/vWC8C7atDNStQM9ZmtMiVknBLLLxdRGr+DO4 6iYVlN4Nl+W/kgasNpBSteRL6UXErco/nFZeoNi/8LsKag790l5jKvrd4CwOa8YQQXRQ iBoXbL1LKd3Cg8bIZmv18Yt6zEbjgSgmD2N9VjBR5KzUgYpAjGRmHNnN/9XlzBUtvhLD VuIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PmHXupL03JyCbpDAhPnTSUzNfKvyaSym3zPH6Rc5qOs=; b=auYVgJFoSNr1ergC52KBYoVMaQ1qSEWuH85XOavZmZ+W3xUzA5hzfkMScfWb1rCOt6 XbRLxPChOCusXF7DTJ5CT3faGEqpzrtDOqY1qNINTMlHl/bExYZUmzSAkLs/JGSafR8R o5C9yOp1MXEHuecsVlNWKoSSrn2GFwQrvnTyijsXJ1JFhepZlVINtdUfnjtvDSt5GaXP WcRZc3+MvhlqPf2HvZhsyZmcy7tHRqW+sxP9hGD1WNh+moykGQ0tTFgcVRSyyJE1vYCw KVtnBOk+hjR5ujUhuH1WvTt6dpN/uFkUIEiB2KKKlbr2gWTSad0ZSo2G5TwKuzGKYjL2 ONrg== X-Gm-Message-State: AOAM532gStygJdXgYLG1ni/EVaXy/CoEm1euqxalCtUW/+Afwye6TFlJ 9kNNCkS4vd/RSzIyhNnoQb/WwSs1LMR3pw== X-Google-Smtp-Source: ABdhPJxAy6H0SQJXE/ifP0H8KQ+Ng1TNyzXI58sPbxpMC8+c0jZ8bWfWD5NJLBDa86Gss2yL3Mp2pg== X-Received: by 2002:a5d:6488:: with SMTP id o8mr13184130wri.8.1642682205581; Thu, 20 Jan 2022 04:36:45 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/38] hw/arm/virt: Add a control for the the highmem PCIe MMIO Date: Thu, 20 Jan 2022 12:36:08 +0000 Message-Id: <20220120123630.267975-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220120123630.267975-1-peter.maydell@linaro.org> References: <20220120123630.267975-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::336 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1642698384707100001 Content-Type: text/plain; charset="utf-8" From: Marc Zyngier Just like we can control the enablement of the highmem PCIe ECAM region using highmem_ecam, let's add a control for the highmem PCIe MMIO region. Similarily to highmem_ecam, this region is disabled when highmem is off. Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Message-id: 20220114140741.1358263-2-maz@kernel.org Signed-off-by: Peter Maydell --- include/hw/arm/virt.h | 1 + hw/arm/virt-acpi-build.c | 10 ++++------ hw/arm/virt.c | 7 +++++-- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index be0534608f8..cf5d8b83ded 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -143,6 +143,7 @@ struct VirtMachineState { bool secure; bool highmem; bool highmem_ecam; + bool highmem_mmio; bool its; bool tcg_its; bool virt; diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index f2514ce77c0..449fab00805 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -158,10 +158,9 @@ static void acpi_dsdt_add_virtio(Aml *scope, } =20 static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, - uint32_t irq, bool use_highmem, bool highmem= _ecam, - VirtMachineState *vms) + uint32_t irq, VirtMachineState *vms) { - int ecam_id =3D VIRT_ECAM_ID(highmem_ecam); + int ecam_id =3D VIRT_ECAM_ID(vms->highmem_ecam); struct GPEXConfig cfg =3D { .mmio32 =3D memmap[VIRT_PCIE_MMIO], .pio =3D memmap[VIRT_PCIE_PIO], @@ -170,7 +169,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, .bus =3D vms->bus, }; =20 - if (use_highmem) { + if (vms->highmem_mmio) { cfg.mmio64 =3D memmap[VIRT_HIGH_PCIE_MMIO]; } =20 @@ -869,8 +868,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO], (irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPO= RTS); - acpi_dsdt_add_pci(scope, memmap, (irqmap[VIRT_PCIE] + ARM_SPI_BASE), - vms->highmem, vms->highmem_ecam, vms); + acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms= ); if (vms->acpi_dev) { build_ged_aml(scope, "\\_SB."GED_DEVICE, HOTPLUG_HANDLER(vms->acpi_dev), diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a76d86b5926..16369ce10e4 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1419,7 +1419,7 @@ static void create_pcie(VirtMachineState *vms) mmio_reg, base_mmio, size_mmio); memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias= ); =20 - if (vms->highmem) { + if (vms->highmem_mmio) { /* Map high MMIO space */ MemoryRegion *high_mmio_alias =3D g_new0(MemoryRegion, 1); =20 @@ -1473,7 +1473,7 @@ static void create_pcie(VirtMachineState *vms) qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base_ecam, 2, size_ecam); =20 - if (vms->highmem) { + if (vms->highmem_mmio) { qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, @@ -2112,6 +2112,8 @@ static void machvirt_init(MachineState *machine) =20 virt_flash_fdt(vms, sysmem, secure_sysmem ?: sysmem); =20 + vms->highmem_mmio &=3D vms->highmem; + create_gic(vms, sysmem); =20 virt_cpu_post_init(vms, sysmem); @@ -2899,6 +2901,7 @@ static void virt_instance_init(Object *obj) vms->gic_version =3D VIRT_GIC_VERSION_NOSEL; =20 vms->highmem_ecam =3D !vmc->no_highmem_ecam; + vms->highmem_mmio =3D true; =20 if (vmc->no_its) { vms->its =3D false; --=20 2.25.1