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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: softfail client-ip=148.163.158.5; envelope-from=clg@kaod.org; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_SOFTFAIL=0.665 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Daniel Henrique Barboza , Richard Henderson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1642514570193100003 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza These 2 MemoryRegions, together with mmio(0|1)_base and mmio(0|1)_size variables, are used together in the same functions. We're better of moving them all in a single step. Signed-off-by: Daniel Henrique Barboza Reviewed-by: C=C3=A9dric Le Goater Message-Id: <20220113192952.911188-7-danielhb413@gmail.com> Signed-off-by: C=C3=A9dric Le Goater --- include/hw/pci-host/pnv_phb4.h | 14 ++++----- hw/pci-host/pnv_phb4.c | 52 +++++++++++++++++----------------- 2 files changed, 32 insertions(+), 34 deletions(-) diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index cf5dd4009ccb..4a8f510f6dc5 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -115,6 +115,12 @@ struct PnvPHB4 { /* Memory windows from PowerBus to PHB */ MemoryRegion phbbar; MemoryRegion intbar; + MemoryRegion mmbar0; + MemoryRegion mmbar1; + uint64_t mmio0_base; + uint64_t mmio0_size; + uint64_t mmio1_base; + uint64_t mmio1_size; =20 /* On-chip IODA tables */ uint64_t ioda_LIST[PNV_PHB4_MAX_LSIs]; @@ -167,14 +173,6 @@ struct PnvPhb4PecStack { /* PHB pass-through XSCOM */ MemoryRegion phb_regs_mr; =20 - /* Memory windows from PowerBus to PHB */ - MemoryRegion mmbar0; - MemoryRegion mmbar1; - uint64_t mmio0_base; - uint64_t mmio0_size; - uint64_t mmio1_base; - uint64_t mmio1_size; - /* The owner PEC */ PnvPhb4PecState *pec; =20 diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 034721f15915..dc4db091e47b 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -228,16 +228,16 @@ static void pnv_phb4_check_mbt(PnvPHB4 *phb, uint32_t= index) /* TODO: Figure out how to implemet/decode AOMASK */ =20 /* Check if it matches an enabled MMIO region in the PEC stack */ - if (memory_region_is_mapped(&phb->stack->mmbar0) && - base >=3D phb->stack->mmio0_base && - (base + size) <=3D (phb->stack->mmio0_base + phb->stack->mmio0_siz= e)) { - parent =3D &phb->stack->mmbar0; - base -=3D phb->stack->mmio0_base; - } else if (memory_region_is_mapped(&phb->stack->mmbar1) && - base >=3D phb->stack->mmio1_base && - (base + size) <=3D (phb->stack->mmio1_base + phb->stack->mmio1_siz= e)) { - parent =3D &phb->stack->mmbar1; - base -=3D phb->stack->mmio1_base; + if (memory_region_is_mapped(&phb->mmbar0) && + base >=3D phb->mmio0_base && + (base + size) <=3D (phb->mmio0_base + phb->mmio0_size)) { + parent =3D &phb->mmbar0; + base -=3D phb->mmio0_base; + } else if (memory_region_is_mapped(&phb->mmbar1) && + base >=3D phb->mmio1_base && + (base + size) <=3D (phb->mmio1_base + phb->mmio1_size)) { + parent =3D &phb->mmbar1; + base -=3D phb->mmio1_base; } else { phb_error(phb, "PHB MBAR %d out of parent bounds", index); return; @@ -910,13 +910,13 @@ static void pnv_pec_stk_update_map(PnvPhb4PecStack *s= tack) */ =20 /* Handle unmaps */ - if (memory_region_is_mapped(&stack->mmbar0) && + if (memory_region_is_mapped(&phb->mmbar0) && !(bar_en & PEC_NEST_STK_BAR_EN_MMIO0)) { - memory_region_del_subregion(sysmem, &stack->mmbar0); + memory_region_del_subregion(sysmem, &phb->mmbar0); } - if (memory_region_is_mapped(&stack->mmbar1) && + if (memory_region_is_mapped(&phb->mmbar1) && !(bar_en & PEC_NEST_STK_BAR_EN_MMIO1)) { - memory_region_del_subregion(sysmem, &stack->mmbar1); + memory_region_del_subregion(sysmem, &phb->mmbar1); } if (memory_region_is_mapped(&phb->phbbar) && !(bar_en & PEC_NEST_STK_BAR_EN_PHB)) { @@ -931,29 +931,29 @@ static void pnv_pec_stk_update_map(PnvPhb4PecStack *s= tack) pnv_phb4_update_regions(phb); =20 /* Handle maps */ - if (!memory_region_is_mapped(&stack->mmbar0) && + if (!memory_region_is_mapped(&phb->mmbar0) && (bar_en & PEC_NEST_STK_BAR_EN_MMIO0)) { bar =3D stack->nest_regs[PEC_NEST_STK_MMIO_BAR0] >> 8; mask =3D stack->nest_regs[PEC_NEST_STK_MMIO_BAR0_MASK]; size =3D ((~mask) >> 8) + 1; - snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-mmio0", + snprintf(name, sizeof(name), "pec-%d.%d-phb-%d-mmio0", pec->chip_id, pec->index, stack->stack_no); - memory_region_init(&stack->mmbar0, OBJECT(stack), name, size); - memory_region_add_subregion(sysmem, bar, &stack->mmbar0); - stack->mmio0_base =3D bar; - stack->mmio0_size =3D size; + memory_region_init(&phb->mmbar0, OBJECT(phb), name, size); + memory_region_add_subregion(sysmem, bar, &phb->mmbar0); + phb->mmio0_base =3D bar; + phb->mmio0_size =3D size; } - if (!memory_region_is_mapped(&stack->mmbar1) && + if (!memory_region_is_mapped(&phb->mmbar1) && (bar_en & PEC_NEST_STK_BAR_EN_MMIO1)) { bar =3D stack->nest_regs[PEC_NEST_STK_MMIO_BAR1] >> 8; mask =3D stack->nest_regs[PEC_NEST_STK_MMIO_BAR1_MASK]; size =3D ((~mask) >> 8) + 1; - snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-mmio1", + snprintf(name, sizeof(name), "pec-%d.%d-phb-%d-mmio1", pec->chip_id, pec->index, stack->stack_no); - memory_region_init(&stack->mmbar1, OBJECT(stack), name, size); - memory_region_add_subregion(sysmem, bar, &stack->mmbar1); - stack->mmio1_base =3D bar; - stack->mmio1_size =3D size; + memory_region_init(&phb->mmbar1, OBJECT(phb), name, size); + memory_region_add_subregion(sysmem, bar, &phb->mmbar1); + phb->mmio1_base =3D bar; + phb->mmio1_size =3D size; } if (!memory_region_is_mapped(&phb->phbbar) && (bar_en & PEC_NEST_STK_BAR_EN_PHB)) { --=20 2.31.1