From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1641825414220186.8423298173817; Mon, 10 Jan 2022 06:36:54 -0800 (PST) Received: from localhost ([::1]:50462 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n6vn2-0004dO-MD for importer@patchew.org; Mon, 10 Jan 2022 09:36:52 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53544) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n6vkJ-0001PI-2e; Mon, 10 Jan 2022 09:34:03 -0500 Received: from [2607:f8b0:4864:20::a30] (port=40748 helo=mail-vk1-xa30.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n6vkG-0007Nf-Eu; Mon, 10 Jan 2022 09:34:01 -0500 Received: by mail-vk1-xa30.google.com with SMTP id 78so8232462vkz.7; Mon, 10 Jan 2022 06:33:58 -0800 (PST) Received: from rekt.COMFAST ([152.249.109.193]) by smtp.gmail.com with ESMTPSA id o11sm3709677vkf.41.2022.01.10.06.33.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Jan 2022 06:33:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xfJWsXmrTZzuVwzW4aMjFpfQsSaczSJ2wKlEfLEivh0=; b=NJVvQX/CJP5RTX8X09C4bn4EPxubYKugQMHiLOfS19NCWGOv9+e+wPddhCsaILzePm Bw/w7ssmCN8VjZ6JeCFhsqgYtXLUC/03XaYccVNk7ZleAuO2/sKKM3EQ8qYZbyHhYxO9 i3VNgMSElwTFfL7ZHJ+EMzI7Kqv0wlaOCQqda6ISJQwhLE+mRFvewggsYuOVkPralSPA ZTm9D5Yu4JG1MRtPSbxMrrGu/eaHIGqRyLQfZapadZDGoM46/mw3DKH50+1yqCVV5n9/ lTR5rW5HniFn8+lE6AUN9Is/PcEzUKRZXE9ul9VAHNzXaOLOC6Ndr9rjSy96JYi5CmUE 8G5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xfJWsXmrTZzuVwzW4aMjFpfQsSaczSJ2wKlEfLEivh0=; b=JZL3eWRY7JPa2CMV6qCA8674SPW8ikWZaNFAOwmTBUEdTPAbtwcDv/wnrwFGP0tz06 gfjxoCPk3mTPU0CFbfVys5+3ysbCjSglRm8Z3ZckQmEWULu+XwwwmrRY43NTQSDxwxR5 y+yvyFsoiF00nqrvf1KLTIBMJDrKNDDtVIlJymA6R0xiVIW05dMyt7eKUIBvcIW3nz+O a7rYOmkRuwg8w8LPfDEC8PYm3INPiEUIhJzU7MKJQLVqaDM2eUdNbRcAPnG0d9+UYUNB OfzkYG4puGEE4ePuhexseODWoQ4AUx46E+G2+P7z389WoFINk+eDPgkAc+jhRnu9KHKh pHhg== X-Gm-Message-State: AOAM530SyHfwXF2vtEH9YwdQzQzp0TwrZz/kzzIPvZc7yyVSYBidEfuu CbEz0cXBYge/yqhZfMOcoJEM8lwIdLEzFpfr X-Google-Smtp-Source: ABdhPJzYeDg5e2XptTUgULYsRYa38Wi9BcAsltY8WPH0NeFp29UOWMTTzaO4IgTjjsm3W0ew0zmZYg== X-Received: by 2002:a05:6122:889:: with SMTP id 9mr27702579vkf.21.1641825237245; Mon, 10 Jan 2022 06:33:57 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v3 01/10] pnv_phb4.c: introduce pnv_phb4_set_stack_phb_props() Date: Mon, 10 Jan 2022 11:33:37 -0300 Message-Id: <20220110143346.455901-2-danielhb413@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110143346.455901-1-danielhb413@gmail.com> References: <20220110143346.455901-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::a30 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::a30; envelope-from=danielhb413@gmail.com; helo=mail-vk1-xa30.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641825415794100001 We want to be able to support user creatable pnv-phb4 objects to allow users to instantiate a powernv9 machine similar to what it is done with powernv8. The main difference is that pnv-phb3 devs are attached directly to the system bus and can be created in the command line. PCI devices such as root-ports can be explictly connected to them. This allows users to create the phbs, assign a bus name if desired, then connect devices onto them. pnv-phb4 devices on the other hand are created by adding PCI Express Controllers (PEC) that will create a certain amount of pnv-phb4 buses depending on the PEC index used. Index 0 will create 1 phb, index 1 creates 2 phbs, index 2 creates 3 phbs. Creating all PECs from the same chip will create 6 PHBs. This doesn't users to rename the buses, like it is done with pnv-phb3, because there's no user control over how the pnv-phb4 are being created - aside from the amount of phbs and in which chips they'll reside. This implicit relationship between PEC devices and available buses can be tolerable for users that knows how the hardware works, but it's annoying for Libvirt to deal with. Since there's no explicit relationship, in the command line, between the created buses and the PCI devices that will connect to them, the domain XML needs to make a lot of extra assumptions regarding the relationship between regular PCI devices and the existing PECs. The first step to allow for user creatable pnv-phb4 devices is to decouple the pvn-phb logic from the pnv-phb4-pec code. This patch adds a helper called pnv_phb4_set_stack_phb_props() to remove the code from pnv_phb4_pec.c that initiates the object properties of pnv-phb4 devices. Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 19 +++++++++++++++++++ hw/pci-host/pnv_phb4_pec.c | 7 +------ include/hw/pci-host/pnv_phb4.h | 1 + 3 files changed, 21 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 83dedc878a..4c045fd8cd 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1158,6 +1158,25 @@ static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus,= void *opaque, int devfn) return &ds->dma_as; } =20 +/* + * Set the object properties of a phb in relation with its stack. + * + * Note: stack->pec must not be NULL. + */ +void pnv_phb4_set_stack_phb_props(PnvPhb4PecStack *stack, + PnvPHB4 *phb) +{ + PnvPhb4PecState *pec =3D stack->pec; + PnvPhb4PecClass *pecc =3D PNV_PHB4_PEC_GET_CLASS(pec); + + object_property_set_int(OBJECT(phb), "chip-id", pec->chip_id, + &error_fatal); + object_property_set_int(OBJECT(phb), "version", pecc->version, + &error_fatal); + object_property_set_link(OBJECT(phb), "stack", OBJECT(stack), + &error_abort); +} + static void pnv_phb4_instance_init(Object *obj) { PnvPHB4 *phb =3D PNV_PHB4(obj); diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index f3e4fa0c82..97b9d4cb0e 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -582,12 +582,7 @@ static void pnv_pec_stk_realize(DeviceState *dev, Erro= r **errp) pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(&stack->phb), &pnv_phb4_xscom_ops, &stack->phb, name, 0x40); =20 - object_property_set_int(OBJECT(&stack->phb), "chip-id", pec->chip_id, - &error_fatal); - object_property_set_int(OBJECT(&stack->phb), "version", pecc->version, - &error_fatal); - object_property_set_link(OBJECT(&stack->phb), "stack", OBJECT(stack), - &error_abort); + pnv_phb4_set_stack_phb_props(stack, &stack->phb); if (!sysbus_realize(SYS_BUS_DEVICE(&stack->phb), errp)) { return; } diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index ea63df9676..7f5b9cc0ac 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -131,6 +131,7 @@ struct PnvPHB4 { =20 void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon); void pnv_phb4_update_regions(PnvPhb4PecStack *stack); +void pnv_phb4_set_stack_phb_props(PnvPhb4PecStack *stack, PnvPHB4 *phb); extern const MemoryRegionOps pnv_phb4_xscom_ops; =20 /* --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1641825774237752.8155742258866; Mon, 10 Jan 2022 06:42:54 -0800 (PST) Received: from localhost ([::1]:33190 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n6vsr-0004EO-8d for importer@patchew.org; Mon, 10 Jan 2022 09:42:53 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53600) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n6vkM-0001am-Ck; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tTxpIEYPPHkTd2JTInKB3hze/WEd4bmtdeHyka29NO4=; b=b3exdS/1hnNByhfE9XNgqCYXvUDRsXha9bL9DCZm0oBMWtKkCs8/e+VYa+P1U+XxAt IrP/sUPDpAgfB2QV5jBgQ0/GB9Esh6qLO1badKRmU/MbcfMgCgQEKcVZZnQsksT6/wkT LL6OVniZV5vUiri4r9HsHSrte7UFgc+M5u4kGqf/YT0M0TTnFGBwjro+rSw8DdgXAG47 H/5fLnHrKx96dHPOMr2n76exypXWQ1fXqpVEELaYlMU7MDNX0Ki0e1VNiVTVPMxwV6Zd zHWit2Jvdl36DBblRi9qy87Y9Rbuyc9QY+DZkX5nvyjQDfRGYoTxUqorQ1z9A+DwS460 axtw== X-Gm-Message-State: AOAM531Q/zm1r1y6OijUiaBylwak0AXC8GsViL56B1UPwBcH8ybDyV5X 48uMKNH3vwZrozWCHAtg8Q60XRoOAr4Sy78B X-Google-Smtp-Source: ABdhPJyLjlmnbTqQzKgaPwhUYrot/oSqsv2HXG1vXCfsINVhER+EKjARtpQc1iELcmcq/zUD5FxRIg== X-Received: by 2002:a05:6122:889:: with SMTP id 9mr27702652vkf.21.1641825239089; Mon, 10 Jan 2022 06:33:59 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v3 02/10] pnv_phb4_pec.c: move pnv_pec_phb_offset() to pnv_phb4.c Date: Mon, 10 Jan 2022 11:33:38 -0300 Message-Id: <20220110143346.455901-3-danielhb413@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110143346.455901-1-danielhb413@gmail.com> References: <20220110143346.455901-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::a30 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::a30; envelope-from=danielhb413@gmail.com; helo=mail-vk1-xa30.google.com X-Spam_score_int: -9 X-Spam_score: -1.0 X-Spam_bar: - X-Spam_report: (-1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641825776298100001 The logic inside pnv_pec_phb_offset() will be useful in the next patch to determine the stack that should contain a PHB4 device. Move the function to pnv_phb4.c and make it public since there's no pnv_phb4_pec.h header. While we're at it, add 'stack_index' as a parameter and make the function return 'phb-id' directly. And rename it to pnv_phb4_pec_get_phb_id() to be even clearer about the function intent. Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 17 +++++++++++++++++ hw/pci-host/pnv_phb4_pec.c | 15 +-------------- include/hw/pci-host/pnv_phb4.h | 2 ++ 3 files changed, 20 insertions(+), 14 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 4c045fd8cd..fb6c4f993a 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1158,6 +1158,23 @@ static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus,= void *opaque, int devfn) return &ds->dma_as; } =20 +/* + * Return the index/phb-id of a PHB4 that belongs to a + * pec->stacks[stack_index] stack. + */ +int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index) +{ + PnvPhb4PecClass *pecc =3D PNV_PHB4_PEC_GET_CLASS(pec); + int index =3D pec->index; + int offset =3D 0; + + while (index--) { + offset +=3D pecc->num_stacks[index]; + } + + return offset + stack_index; +} + /* * Set the object properties of a phb in relation with its stack. * diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 97b9d4cb0e..513a698e17 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -374,19 +374,6 @@ static void pnv_pec_instance_init(Object *obj) } } =20 -static int pnv_pec_phb_offset(PnvPhb4PecState *pec) -{ - PnvPhb4PecClass *pecc =3D PNV_PHB4_PEC_GET_CLASS(pec); - int index =3D pec->index; - int offset =3D 0; - - while (index--) { - offset +=3D pecc->num_stacks[index]; - } - - return offset; -} - static void pnv_pec_realize(DeviceState *dev, Error **errp) { PnvPhb4PecState *pec =3D PNV_PHB4_PEC(dev); @@ -405,7 +392,7 @@ static void pnv_pec_realize(DeviceState *dev, Error **e= rrp) for (i =3D 0; i < pec->num_stacks; i++) { PnvPhb4PecStack *stack =3D &pec->stacks[i]; Object *stk_obj =3D OBJECT(stack); - int phb_id =3D pnv_pec_phb_offset(pec) + i; + int phb_id =3D pnv_phb4_pec_get_phb_id(pec, i); =20 object_property_set_int(stk_obj, "stack-no", i, &error_abort); object_property_set_int(stk_obj, "phb-id", phb_id, &error_abort); diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 7f5b9cc0ac..b2c4a6b263 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -15,6 +15,7 @@ #include "hw/ppc/xive.h" #include "qom/object.h" =20 +typedef struct PnvPhb4PecState PnvPhb4PecState; typedef struct PnvPhb4PecStack PnvPhb4PecStack; typedef struct PnvPHB4 PnvPHB4; typedef struct PnvChip PnvChip; @@ -132,6 +133,7 @@ struct PnvPHB4 { void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon); void pnv_phb4_update_regions(PnvPhb4PecStack *stack); void pnv_phb4_set_stack_phb_props(PnvPhb4PecStack *stack, PnvPHB4 *phb); +int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index); extern const MemoryRegionOps pnv_phb4_xscom_ops; =20 /* --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1641825458796779.92597663129; Mon, 10 Jan 2022 06:37:38 -0800 (PST) Received: from localhost ([::1]:51898 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n6vnl-0005bI-M5 for importer@patchew.org; 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Mon, 10 Jan 2022 06:34:01 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v3 03/10] pnv_phb4_pec: use pnv_phb4_pec_get_phb_id() in pnv_pec_dt_xscom() Date: Mon, 10 Jan 2022 11:33:39 -0300 Message-Id: <20220110143346.455901-4-danielhb413@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110143346.455901-1-danielhb413@gmail.com> References: <20220110143346.455901-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::935 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::935; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x935.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641825459261100001 Relying on stack->phb to write the xscom DT of the PEC is something that we won't be able to do with user creatable pnv-phb4 devices. Hopefully, this can be done by using pnv_phb4_pec_get_phb_id(), which is already used by pnv_pec_realize() to set the phb-id of the stack. Use the same idea in pnv_pec_dt_xscom() to write ibm,phb-index without the need to accessing stack->phb, since stack->phb is not granted to be !=3D NULL when user creatable phbs are introduced. Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4_pec.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 513a698e17..1f264d0a9c 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -449,8 +449,7 @@ static int pnv_pec_dt_xscom(PnvXScomInterface *dev, voi= d *fdt, pecc->compat_size))); =20 for (i =3D 0; i < pec->num_stacks; i++) { - PnvPhb4PecStack *stack =3D &pec->stacks[i]; - PnvPHB4 *phb =3D &stack->phb; + int phb_id =3D pnv_phb4_pec_get_phb_id(pec, i); int stk_offset; =20 name =3D g_strdup_printf("stack@%x", i); @@ -460,7 +459,7 @@ static int pnv_pec_dt_xscom(PnvXScomInterface *dev, voi= d *fdt, _FDT((fdt_setprop(fdt, stk_offset, "compatible", pecc->stk_compat, pecc->stk_compat_size))); _FDT((fdt_setprop_cell(fdt, stk_offset, "reg", i))); - _FDT((fdt_setprop_cell(fdt, stk_offset, "ibm,phb-index", phb->phb_= id))); + _FDT((fdt_setprop_cell(fdt, stk_offset, "ibm,phb-index", phb_id))); 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charset="utf-8" This alias is a indirect way of setting stack->phb->index. Since we have access to a valid stack->phb (for default_enabled() at least - next patch will deal with it accordingly) we can directly set the phb 'index' attribute. Let's also take the opportunity to explain why we're having to deal with stack->phb attributes during pec_realize(). Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4_pec.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 1f264d0a9c..417fac4cef 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -395,8 +395,17 @@ static void pnv_pec_realize(DeviceState *dev, Error **= errp) int phb_id =3D pnv_phb4_pec_get_phb_id(pec, i); =20 object_property_set_int(stk_obj, "stack-no", i, &error_abort); - object_property_set_int(stk_obj, "phb-id", phb_id, &error_abort); object_property_set_link(stk_obj, "pec", OBJECT(pec), &error_abort= ); + + /* + * stack->phb->index is dependent on the position the + * stack occupies in pec->stacks[]. We have this information + * available here via the 'i' iterator so it's convenient to + * do it now. + */ + object_property_set_int(OBJECT(&stack->phb), "index", phb_id, + &error_abort); + if (!qdev_realize(DEVICE(stk_obj), NULL, errp)) { return; } @@ -534,7 +543,6 @@ static void pnv_pec_stk_instance_init(Object *obj) PnvPhb4PecStack *stack =3D PNV_PHB4_PEC_STACK(obj); =20 object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4); - object_property_add_alias(obj, "phb-id", OBJECT(&stack->phb), "index"); } =20 static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1641825841448674.6944633273264; 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Mon, 10 Jan 2022 06:34:04 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v3 05/10] pnv_phb4_pec.c: move phb4 properties setup to pec_realize() Date: Mon, 10 Jan 2022 11:33:41 -0300 Message-Id: <20220110143346.455901-6-danielhb413@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110143346.455901-1-danielhb413@gmail.com> References: <20220110143346.455901-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::92c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::92c; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x92c.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641825844050100001 Content-Type: text/plain; charset="utf-8" Previous patch added stack->phb->index handling in pec_realize() for specific reasons (phb->index is reliant on the stack index in pec->stacks[]). Move pnv_phb4_set_stack_phb_props() from stk_realize() to pec_realize() to have a single spot in which we set PHB4 properties for the default created stack->phb. This will give us one less spot to worry about when introducing user creatable pnv-phb4s and having to deal with stack->phb being NULL depending on -nodefaults being set. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4_pec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 417fac4cef..d2851e8040 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -405,6 +405,7 @@ static void pnv_pec_realize(DeviceState *dev, Error **e= rrp) */ object_property_set_int(OBJECT(&stack->phb), "index", phb_id, &error_abort); + pnv_phb4_set_stack_phb_props(stack, &stack->phb); =20 if (!qdev_realize(DEVICE(stk_obj), NULL, errp)) { return; @@ -576,7 +577,6 @@ static void pnv_pec_stk_realize(DeviceState *dev, Error= **errp) pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(&stack->phb), &pnv_phb4_xscom_ops, &stack->phb, name, 0x40); =20 - pnv_phb4_set_stack_phb_props(stack, &stack->phb); if (!sysbus_realize(SYS_BUS_DEVICE(&stack->phb), errp)) { return; } --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" At this moment, stack->phb is the plain PnvPHB4 device itself instead of a pointer to the device. This will present a problem when adding user creatable devices because we can't deal with this struct and the realize() callback from the user creatable device. We can't get rid of this attribute, similar to what we did when enabling pnv-phb3 user creatable devices, because pnv_phb4_update_regions() needs to access stack->phb to do its job. This function is called twice in pnv_pec_stk_update_map(), which is one of the nested xscom write callbacks (via pnv_pec_stk_nest_xscom_write()). In fact, pnv_pec_stk_update_map() code comment is explicit about how the order of the unmap/map operations relates with the PHB subregions. All of this indicates that this code is tied together in a way that we either go on a crusade, featuring lots of refactories and redesign and considerable pain, to decouple stack and phb mapping, or we allow stack update_map operations to access the associated PHB as it is today even after introducing pnv-phb4 user devices. This patch chooses the latter. Instead of getting rid of stack->phb, turn it into a PHB pointer. This will allow us to assign an user created PHB to an existing stack later. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 2 +- hw/pci-host/pnv_phb4_pec.c | 12 ++++++------ include/hw/pci-host/pnv_phb4.h | 7 +++++-- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index fb6c4f993a..1a7395772f 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1443,7 +1443,7 @@ type_init(pnv_phb4_register_types); =20 void pnv_phb4_update_regions(PnvPhb4PecStack *stack) { - PnvPHB4 *phb =3D &stack->phb; + PnvPHB4 *phb =3D stack->phb; =20 /* Unmap first always */ if (memory_region_is_mapped(&phb->mr_regs)) { diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index d2851e8040..042dc0b775 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -403,9 +403,9 @@ static void pnv_pec_realize(DeviceState *dev, Error **e= rrp) * available here via the 'i' iterator so it's convenient to * do it now. */ - object_property_set_int(OBJECT(&stack->phb), "index", phb_id, + object_property_set_int(OBJECT(stack->phb), "index", phb_id, &error_abort); - pnv_phb4_set_stack_phb_props(stack, &stack->phb); + pnv_phb4_set_stack_phb_props(stack, stack->phb); =20 if (!qdev_realize(DEVICE(stk_obj), NULL, errp)) { return; @@ -543,7 +543,7 @@ static void pnv_pec_stk_instance_init(Object *obj) { PnvPhb4PecStack *stack =3D PNV_PHB4_PEC_STACK(obj); =20 - object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4); + stack->phb =3D PNV_PHB4(qdev_new(TYPE_PNV_PHB4)); } =20 static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) @@ -574,10 +574,10 @@ static void pnv_pec_stk_realize(DeviceState *dev, Err= or **errp) /* PHB pass-through */ snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d-phb", pec->chip_id, pec->index, stack->stack_no); - pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(&stack->phb), - &pnv_phb4_xscom_ops, &stack->phb, name, 0x40); + pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(stack->phb), + &pnv_phb4_xscom_ops, stack->phb, name, 0x40); =20 - if (!sysbus_realize(SYS_BUS_DEVICE(&stack->phb), errp)) { + if (stack->phb && !sysbus_realize(SYS_BUS_DEVICE(stack->phb), errp)) { return; } =20 diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index b2c4a6b263..2fb5e119c4 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -178,8 +178,11 @@ struct PnvPhb4PecStack { /* The owner PEC */ PnvPhb4PecState *pec; =20 - /* The actual PHB */ - PnvPHB4 phb; + /* + * PHB4 pointer. pnv_phb4_update_regions() needs to access + * the PHB4 via a PnvPhb4PecStack pointer. + */ + PnvPHB4 *phb; }; =20 struct PnvPhb4PecState { --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1641826031989818.640513175266; Mon, 10 Jan 2022 06:47:11 -0800 (PST) Received: from localhost ([::1]:42366 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n6vx1-0002md-0p for importer@patchew.org; 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Mon, 10 Jan 2022 06:34:08 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v3 07/10] ppc/pnv: move PHB4 related XSCOM init to phb4_realize() Date: Mon, 10 Jan 2022 11:33:43 -0300 Message-Id: <20220110143346.455901-8-danielhb413@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110143346.455901-1-danielhb413@gmail.com> References: <20220110143346.455901-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::931 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::931; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x931.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641826032695100001 Content-Type: text/plain; charset="utf-8" Before enabling pnv-phb4 user creatable devices we need to handle PHB4 specific code in pnv_pec_stk_realize(). The 'stack->phb_regs_mr' PHB4 passthrough XSCOM initialization relies on 'stack->phb' being not NULL. Moving 'stack->phb_regs_mr' region_init() and add_subregion() to phb4_realize() time is a natural thing to do and it'll spare us from checking 'phb->stack !=3D NULL' in stk_realize() when user creatable pnv-phb4s are implemented. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 27 +++++++++++++++++++++++++++ hw/pci-host/pnv_phb4_pec.c | 10 ---------- 2 files changed, 27 insertions(+), 10 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 1a7395772f..152911a285 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1194,6 +1194,31 @@ void pnv_phb4_set_stack_phb_props(PnvPhb4PecStack *s= tack, &error_abort); } =20 +static void pnv_phb4_init_xscom_passthrough(PnvPHB4 *phb) +{ + PnvPhb4PecState *pec; + PnvPhb4PecClass *pecc; + uint32_t pec_pci_base; + char name[64]; + + assert(phb->stack); + + pec =3D phb->stack->pec; + pecc =3D PNV_PHB4_PEC_GET_CLASS(pec); + pec_pci_base =3D pecc->xscom_pci_base(pec); + + /* PHB pass-through */ + snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d-phb", + pec->chip_id, pec->index, phb->stack->stack_no); + pnv_xscom_region_init(&phb->stack->phb_regs_mr, OBJECT(phb), + &pnv_phb4_xscom_ops, phb, name, 0x40); + + pnv_xscom_add_subregion(pec->chip, + pec_pci_base + PNV9_XSCOM_PEC_PCI_STK0 + + 0x40 * phb->stack->stack_no, + &phb->stack->phb_regs_mr); +} + static void pnv_phb4_instance_init(Object *obj) { PnvPHB4 *phb =3D PNV_PHB4(obj); @@ -1223,6 +1248,8 @@ static void pnv_phb4_realize(DeviceState *dev, Error = **errp) memory_region_init_io(&phb->mr_regs, OBJECT(phb), &pnv_phb4_reg_ops, p= hb, name, 0x2000); =20 + pnv_phb4_init_xscom_passthrough(phb); + /* * PHB4 doesn't support IO space. However, qemu gets very upset if * we don't have an IO region to anchor IO BARs onto so we just diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 042dc0b775..5e02a51f04 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -571,12 +571,6 @@ static void pnv_pec_stk_realize(DeviceState *dev, Erro= r **errp) &pnv_pec_stk_pci_xscom_ops, stack, name, PHB4_PEC_PCI_STK_REGS_COUNT); =20 - /* PHB pass-through */ - snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d-phb", - pec->chip_id, pec->index, stack->stack_no); - pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(stack->phb), - &pnv_phb4_xscom_ops, stack->phb, name, 0x40); - if (stack->phb && !sysbus_realize(SYS_BUS_DEVICE(stack->phb), errp)) { return; } @@ -591,10 +585,6 @@ static void pnv_pec_stk_realize(DeviceState *dev, Erro= r **errp) pnv_xscom_add_subregion(chip, pec_pci_base + 0x40 * (stack->stack_no + 1), &stack->pci_regs_mr); - pnv_xscom_add_subregion(chip, - pec_pci_base + PNV9_XSCOM_PEC_PCI_STK0 + - 0x40 * stack->stack_no, - &stack->phb_regs_mr); } =20 static Property pnv_pec_stk_properties[] =3D { --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1641826006523930.2487799900716; Mon, 10 Jan 2022 06:46:46 -0800 (PST) Received: from localhost ([::1]:40138 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n6vwb-00014M-EB for importer@patchew.org; Mon, 10 Jan 2022 09:46:45 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53692) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n6vkT-000252-PJ; Mon, 10 Jan 2022 09:34:13 -0500 Received: from [2607:f8b0:4864:20::936] (port=41480 helo=mail-ua1-x936.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n6vkS-0007QC-6P; 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charset="utf-8" The last step before enabling user creatable pnv-phb4 devices still has to do with specific XSCOM initialization code in pnv_phb4_stk_realize(). 'stack->nest_regs_mr' is being init regardless of the existence of 'stack->phb', which is verified only when trying to realize the phb. Its MemoryRegionOps,'pnv_pec_stk_nest_xscom_ops', uses pnv_pec_stk_nest_xscom_write() as a write callback. When trying to write the PEC_NEST_STK_BAR_EN reg, pnv_pec_stk_update_map() is called. Inside this function, pnv_phb4_update_regions() is called twice. This function uses stack->phb to manipulate memory regions of the phb. When enabling user creatable phb4s, a stack that doesn't have an associated phb (i.e. will have stack->phb =3D NULL) will cause a SIGINT during boot in pnv_phb4_update_regions(). To deal with this we have some options, including: - check for stack->phb being not NULL in pnv_phb4_update_regions(); - change the order of the XSCOM initialization to avoid initializing 'stack->nest_regs_mr' if 'stack->phb' is NULL. This can have unintended side-effects: there are several other regs that are being read/written in these memory regions, and we would forbid all read/write operations in these regs because of writes in PEC_NEST_STK_BAR_EN being problematic; - move the XSCOM init code to phb4_realize() like the previous patch did with 'stack->phb_regs_mr'. Besides having the same potential side effects than the previous alternative, a lot of code would need to be moved from pnv_phb4_pec.c to pnv_phb4.c because all the memory region code is static. Being the option that is less intrusive and innocus of the alternatives, this patch keeps the XSCOM initialization as is in pnv_phb4_stk_realize() and check for 'stack->phb' being NULL in pnv_phb4_update_regions(). Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 152911a285..fc23a96b7f 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1472,6 +1472,17 @@ void pnv_phb4_update_regions(PnvPhb4PecStack *stack) { PnvPHB4 *phb =3D stack->phb; =20 + /* + * This will happen when there's no phb associated with the stack. + * pnv_pec_stk_realize() will init the nested xscom address space + * (stack->nest_regs_mr) that uses pnv_phb4_update_regions(), via + * pnv_pec_stk_update_map(), which in turn is the write callback of + * the PEC_NEST_STK_BAR_EN reg in pnv_pec_stk_nest_xscom_write(). + */ + if (!stack->phb) { + return; + } + /* Unmap first always */ if (memory_region_is_mapped(&phb->mr_regs)) { memory_region_del_subregion(&stack->phbbar, &phb->mr_regs); --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::92e; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x92e.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641826173327100001 Content-Type: text/plain; charset="utf-8" This patch introduces pnv-phb4 user creatable devices that are created in a similar manner as pnv-phb3 devices, allowing the user to interact with the PHBs directly instead of creating PCI Express Controllers that will create a certain amount of PHBs per controller index. We accomplish this by doing the following: - add a pnv_phb4_get_stack() helper to retrieve which stack an user created phb4 would occupy; - if a suitable pec->stack is found, setup the phb attributes in a similar fashion as done in pnv_phb4_pec_realize() when defaults are enabled; - use 'defaults_enabled()' in pnv_pec_stk_instance_init() to avoid creating a 'stack->phb' qdev that might be overwritten by an user created pnv-phb4 device. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 86 +++++++++++++++++++++++++++++++++++++- hw/pci-host/pnv_phb4_pec.c | 25 ++++++----- hw/ppc/pnv.c | 2 + 3 files changed, 101 insertions(+), 12 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index fc23a96b7f..8c8f5dd0e1 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1229,15 +1229,97 @@ static void pnv_phb4_instance_init(Object *obj) object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); } =20 +static PnvPhb4PecStack *pnv_phb4_get_stack(PnvChip *chip, PnvPHB4 *phb, + Error **errp) +{ + Pnv9Chip *chip9 =3D NULL; + int chip_id =3D phb->chip_id; + int index =3D phb->phb_id; + int i, j; + + if (chip->num_pecs =3D=3D 0) { + /* + * This is expected to happen since chip-id and index are + * being set by the user in the command line. Return an + * informative error instead of asserting. + */ + error_setg(errp, "chip id %d has no PCIE controllers", chip_id); + return NULL; + } + + chip9 =3D PNV9_CHIP(chip); + + for (i =3D 0; i < chip->num_pecs; i++) { + /* + * For each PEC, check the amount of stacks it supports + * and see if the given phb4 index matches a stack. + */ + PnvPhb4PecState *pec =3D &chip9->pecs[i]; + + for (j =3D 0; j < pec->num_stacks; j++) { + if (index =3D=3D pnv_phb4_pec_get_phb_id(pec, j)) { + return &pec->stacks[j]; + } + } + } + + error_setg(errp, + "pnv-phb4 chip-id %d index %d didn't match any existing PEC= ", + chip_id, index); + + return NULL; +} + static void pnv_phb4_realize(DeviceState *dev, Error **errp) { PnvPHB4 *phb =3D PNV_PHB4(dev); PCIHostState *pci =3D PCI_HOST_BRIDGE(dev); XiveSource *xsrc =3D &phb->xsrc; + PnvPhb4PecStack *stack =3D NULL; + Error *local_err =3D NULL; int nr_irqs; char name[32]; =20 - assert(phb->stack); + /* User created PHB */ + if (!phb->stack) { + PnvMachineState *pnv =3D PNV_MACHINE(qdev_get_machine()); + PnvChip *chip =3D pnv_get_chip(pnv, phb->chip_id); + BusState *s; + + if (!chip) { + error_setg(errp, "invalid chip id: %d", phb->chip_id); + return; + } + + stack =3D pnv_phb4_get_stack(chip, phb, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + /* + * Assign the phb to the stack. If pnv_phb4_get_stack() returned + * stack =3D NULL without an error we're better of aborting. + */ + g_assert(stack); + stack->phb =3D phb; + + object_property_set_int(OBJECT(phb), "index", + phb->phb_id, &error_abort); + pnv_phb4_set_stack_phb_props(stack, phb); + + /* + * Reparent user created devices to the chip to build + * correctly the device tree. + */ + pnv_chip_parent_fixup(chip, OBJECT(phb), phb->phb_id); + + s =3D qdev_get_parent_bus(DEVICE(chip)); + if (!qdev_set_parent_bus(DEVICE(phb), s, &local_err)) { + error_propagate(errp, local_err); + return; + } + } =20 /* Set the "big_phb" flag */ phb->big_phb =3D phb->phb_id =3D=3D 0 || phb->phb_id =3D=3D 3; @@ -1342,7 +1424,7 @@ static void pnv_phb4_class_init(ObjectClass *klass, v= oid *data) dc->realize =3D pnv_phb4_realize; device_class_set_props(dc, pnv_phb4_properties); set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); - dc->user_creatable =3D false; + dc->user_creatable =3D true; =20 xfc->notify =3D pnv_phb4_xive_notify; } diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 5e02a51f04..1e3233e7ec 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -19,6 +19,7 @@ #include "hw/pci/pci_bus.h" #include "hw/ppc/pnv.h" #include "hw/qdev-properties.h" +#include "sysemu/sysemu.h" =20 #include =20 @@ -397,15 +398,17 @@ static void pnv_pec_realize(DeviceState *dev, Error *= *errp) object_property_set_int(stk_obj, "stack-no", i, &error_abort); object_property_set_link(stk_obj, "pec", OBJECT(pec), &error_abort= ); =20 - /* - * stack->phb->index is dependent on the position the - * stack occupies in pec->stacks[]. We have this information - * available here via the 'i' iterator so it's convenient to - * do it now. - */ - object_property_set_int(OBJECT(stack->phb), "index", phb_id, - &error_abort); - pnv_phb4_set_stack_phb_props(stack, stack->phb); + if (defaults_enabled()) { + /* + * stack->phb->index is dependent on the position the + * stack occupies in pec->stacks[]. We have this information + * available here via the 'i' iterator so it's convenient to + * do it now. + */ + object_property_set_int(OBJECT(stack->phb), "index", phb_id, + &error_abort); + pnv_phb4_set_stack_phb_props(stack, stack->phb); + } =20 if (!qdev_realize(DEVICE(stk_obj), NULL, errp)) { return; @@ -543,7 +546,9 @@ static void pnv_pec_stk_instance_init(Object *obj) { PnvPhb4PecStack *stack =3D PNV_PHB4_PEC_STACK(obj); =20 - stack->phb =3D PNV_PHB4(qdev_new(TYPE_PNV_PHB4)); + if (defaults_enabled()) { + stack->phb =3D PNV_PHB4(qdev_new(TYPE_PNV_PHB4)); + } } =20 static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index fe7e67e73a..837146a2fb 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1960,6 +1960,8 @@ static void pnv_machine_power9_class_init(ObjectClass= *oc, void *data) pmc->compat =3D compat; pmc->compat_size =3D sizeof(compat); pmc->dt_power_mgt =3D pnv_dt_power_mgt; + + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB4); } =20 static void pnv_machine_power10_class_init(ObjectClass *oc, void *data) --=20 2.33.1 From nobody Sun Apr 28 21:38:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 164182606020994.63608191156379; Mon, 10 Jan 2022 06:47:40 -0800 (PST) Received: from localhost ([::1]:45122 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n6vxT-0004f7-8s for importer@patchew.org; Mon, 10 Jan 2022 09:47:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53744) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n6vkY-0002Mv-OW; Mon, 10 Jan 2022 09:34:18 -0500 Received: from [2607:f8b0:4864:20::92c] (port=45946 helo=mail-ua1-x92c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n6vkW-0007Rh-N2; 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d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wqH+TJKUyTY8pGe2wkpb5CKKG+nyDWsKCWuYAvV1Fr8=; b=AH7fZroN+YinFFzFhpwfgldBprQaCdJprykYLm9o7ydYSEc4a2CoieJOere5wT0tHo 5q5YY+aG59wj/xG02+tV8OQz4TtH+6q8eO52HqppS0hzI86cBmuUKv7snC+HPlzdZZPV bHTM3s/FiiN5Ew4tbzGSw9b1X70SeqL66gxUmhmkmDne6X/sjw4Bv7GRCx8FH8eOfK83 vMztHM+L3rrqHNELoT9qNzlhhse4WWFBl0cUcWhFtsxhCjkcOpIEyR/xQ9kIQlPZbkbT MK0Cr7w8asG/NzWzPXfFjYcLGBXBL2NzhvGiBaZUnS1DQLO7JQu3Ci3E4GIQPHkQhXno mgFQ== X-Gm-Message-State: AOAM533G3sQk7JZxVWmuyih+wCZ4i2I60iAKKHwX9DHSKyIhnQXihnaC /95UMYsB1d3Zhe0D2mwwLVZjds5SbQmwS/+/ X-Google-Smtp-Source: ABdhPJxDsC5+wbtNC77TaNGFzabTD0+/Zua1ASSIhLh2GZoL/P04NCbciOOAr39fe3LVNRK9KXWNow== X-Received: by 2002:a05:6102:c94:: with SMTP id f20mr1688594vst.39.1641825255131; Mon, 10 Jan 2022 06:34:15 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH v3 10/10] pnv_phb4.c: change TYPE_PNV_PHB4_ROOT_BUS name Date: Mon, 10 Jan 2022 11:33:46 -0300 Message-Id: <20220110143346.455901-11-danielhb413@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110143346.455901-1-danielhb413@gmail.com> References: <20220110143346.455901-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::92c (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::92c; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x92c.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1641826062551100001 Similar to what was happening with pnv-phb3 buses, TYPE_PNV_PHB4_ROOT_BUS set to "pnv-phb4-root-bus" is a bit too long for a default root bus name. The usual default name for theses buses in QEMU are 'pcie', but we want to make a distinction between pnv-phb4 buses and other PCIE buses, at least as far as default name goes, because not all PCIE devices are attachable to a pnv-phb4 root-bus type. Changing the default to 'pnv-phb4-root' allow us to have a shorter name while making this bus distinct, and the user can always set its own bus naming via the "id" attribute anyway. This is the 'info qtree' output after this change, using a powernv9 domain with 2 sockets and default settings enabled: qemu-system-ppc64 -m 4G -machine powernv9,accel=3Dtcg \ -smp 2,sockets=3D2,cores=3D1,threads=3D1 dev: pnv-phb4, id "" index =3D 5 (0x5) chip-id =3D 1 (0x1) version =3D 704374636546 (0xa400000002) device-id =3D 1217 (0x4c1) x-config-reg-migration-enabled =3D true bypass-iommu =3D false bus: pnv-phb4-root.11 type pnv-phb4-root dev: pnv-phb4-root-port, id "" (...) dev: pnv-phb4, id "" index =3D 0 (0x0) chip-id =3D 1 (0x1) version =3D 704374636546 (0xa400000002) device-id =3D 1217 (0x4c1) x-config-reg-migration-enabled =3D true bypass-iommu =3D false bus: pnv-phb4-root.6 type pnv-phb4-root dev: pnv-phb4-root-port, id "" (..) dev: pnv-phb4, id "" index =3D 5 (0x5) chip-id =3D 0 (0x0) version =3D 704374636546 (0xa400000002) device-id =3D 1217 (0x4c1) x-config-reg-migration-enabled =3D true bypass-iommu =3D false bus: pnv-phb4-root.5 type pnv-phb4-root dev: pnv-phb4-root-port, id "" (...) dev: pnv-phb4, id "" index =3D 0 (0x0) chip-id =3D 0 (0x0) version =3D 704374636546 (0xa400000002) device-id =3D 1217 (0x4c1) x-config-reg-migration-enabled =3D true bypass-iommu =3D false bus: pnv-phb4-root.0 type pnv-phb4-root dev: pnv-phb4-root-port, id "" Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: Daniel Henrique Barboza --- include/hw/pci-host/pnv_phb4.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 2fb5e119c4..b9537b8da7 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -47,7 +47,7 @@ typedef struct PnvPhb4DMASpace { /* * PHB4 PCIe Root port */ -#define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root-bus" +#define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root" #define TYPE_PNV_PHB4_ROOT_PORT "pnv-phb4-root-port" =20 typedef struct PnvPHB4RootPort { --=20 2.33.1