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bh=5mxDAfDDjten8DO+cDZnL6SYYag7k7Zv014zxOgTI4Q=; b=OCyefJdQaNE9Ncp8xEOqbIkhu2Vpp7jm+7Wmb8gg94AKkJOGxpYevO10z/QIGzFu2BsWhN SaeweNRbo3MG7TUh7CWuE7lWA5qDZXkCav9Q/hhAPJhdxrNgAhUvTO4cnNeZaopva7cxf0 RD2PUPaj9fMuxZrPojwzaKKA+I2p65E= X-MC-Unique: cAusZxeUMYOrh-RpCR_W2w-1 From: Vitaly Kuznetsov To: qemu-devel@nongnu.org Subject: [PATCH 1/2] i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES Date: Wed, 5 Jan 2022 09:57:03 +0100 Message-Id: <20220105085704.1267530-2-vkuznets@redhat.com> In-Reply-To: <20220105085704.1267530-1-vkuznets@redhat.com> References: <20220105085704.1267530-1-vkuznets@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=vkuznets@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=vkuznets@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.372, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Marcelo Tosatti Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1641373556801100001 Content-Type: text/plain; charset="utf-8" Previously, HV_CPUID_NESTED_FEATURES.EAX CPUID leaf was handled differently as it was only used to encode the supported eVMCS version range. In fact, there are also feature (e.g. Enlightened MSR-Bitmap) bits there. In preparation to adding these features, move HV_CPUID_NESTED_FEATURES leaf handling to hv_build_cpuid_leaf() and drop now-unneeded 'hyperv_nested'. No functional change intended. Signed-off-by: Vitaly Kuznetsov --- target/i386/cpu.h | 1 - target/i386/kvm/kvm.c | 23 +++++++++++++++-------- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 04f2b790c9fa..a1165215d972 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1722,7 +1722,6 @@ struct X86CPU { uint32_t hyperv_vendor_id[3]; uint32_t hyperv_interface_id[4]; uint32_t hyperv_limits[3]; - uint32_t hyperv_nested[4]; bool hyperv_enforce_cpuid; uint32_t hyperv_ver_id_build; uint16_t hyperv_ver_id_major; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 13f8e30c2a54..c8f4956a4e0e 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -801,6 +801,8 @@ static bool tsc_is_stable_and_known(CPUX86State *env) || env->user_tsc_khz; } =20 +#define DEFAULT_EVMCS_VERSION ((1 << 8) | 1) + static struct { const char *desc; struct { @@ -1208,6 +1210,13 @@ static uint32_t hv_build_cpuid_leaf(CPUState *cs, ui= nt32_t func, int reg) } } =20 + /* HV_CPUID_NESTED_FEATURES.EAX also encodes the supported eVMCS range= */ + if (func =3D=3D HV_CPUID_NESTED_FEATURES && reg =3D=3D R_EAX) { + if (hyperv_feat_enabled(cpu, HYPERV_FEAT_EVMCS)) { + r |=3D DEFAULT_EVMCS_VERSION; + } + } + return r; } =20 @@ -1337,11 +1346,13 @@ static int hyperv_fill_cpuids(CPUState *cs, X86CPU *cpu =3D X86_CPU(cs); struct kvm_cpuid_entry2 *c; uint32_t cpuid_i =3D 0; + uint32_t nested_eax =3D + hv_build_cpuid_leaf(cs, HV_CPUID_NESTED_FEATURES, R_EAX); =20 c =3D &cpuid_ent[cpuid_i++]; c->function =3D HV_CPUID_VENDOR_AND_MAX_FUNCTIONS; - c->eax =3D hyperv_feat_enabled(cpu, HYPERV_FEAT_EVMCS) ? - HV_CPUID_NESTED_FEATURES : HV_CPUID_IMPLEMENT_LIMITS; + c->eax =3D nested_eax ? HV_CPUID_NESTED_FEATURES : + HV_CPUID_IMPLEMENT_LIMITS; c->ebx =3D cpu->hyperv_vendor_id[0]; c->ecx =3D cpu->hyperv_vendor_id[1]; c->edx =3D cpu->hyperv_vendor_id[2]; @@ -1405,7 +1416,7 @@ static int hyperv_fill_cpuids(CPUState *cs, c->ecx =3D cpu->hyperv_limits[1]; c->edx =3D cpu->hyperv_limits[2]; =20 - if (hyperv_feat_enabled(cpu, HYPERV_FEAT_EVMCS)) { + if (nested_eax) { uint32_t function; =20 /* Create zeroed 0x40000006..0x40000009 leaves */ @@ -1417,7 +1428,7 @@ static int hyperv_fill_cpuids(CPUState *cs, =20 c =3D &cpuid_ent[cpuid_i++]; c->function =3D HV_CPUID_NESTED_FEATURES; - c->eax =3D cpu->hyperv_nested[0]; + c->eax =3D nested_eax; } =20 return cpuid_i; @@ -1439,8 +1450,6 @@ static bool evmcs_version_supported(uint16_t evmcs_ve= rsion, (max_version <=3D max_supported_version); } =20 -#define DEFAULT_EVMCS_VERSION ((1 << 8) | 1) - static int hyperv_init_vcpu(X86CPU *cpu) { CPUState *cs =3D CPU(cpu); @@ -1544,8 +1553,6 @@ static int hyperv_init_vcpu(X86CPU *cpu) supported_evmcs_version >> 8); return -ENOTSUP; } - - cpu->hyperv_nested[0] =3D evmcs_version; } =20 if (cpu->hyperv_enforce_cpuid) { --=20 2.33.1 From nobody Sun Apr 28 01:25:12 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1641373338; cv=none; d=zohomail.com; s=zohoarc; b=HZCLTYc028kE4dpGF3v13Kstp9MU5JpXq9nt/p6O9lCzJG3dSK3rvQCscknOkGnCVws+CoNvhu2rrdCRmZa0CjPx2+m+YBPfhC5+ZdS5JHrlYdEjlvcSX5XYz3jfUHFPFzwyT4Ke7fWsnn+5/aAq0xs8yLrcExZdWppeDwSF/ik= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641373338; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZhPCOtb+4Hl3fi/XJXGATWF5e4ieMNjTya+qOj+THmY=; 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charset="utf-8" The newly introduced enlightenment allow L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. Signed-off-by: Vitaly Kuznetsov --- docs/hyperv.txt | 10 ++++++++++ target/i386/cpu.c | 2 ++ target/i386/cpu.h | 1 + target/i386/kvm/hyperv-proto.h | 5 +++++ target/i386/kvm/kvm.c | 7 +++++++ 5 files changed, 25 insertions(+) diff --git a/docs/hyperv.txt b/docs/hyperv.txt index 0417c183a3b0..08429124a634 100644 --- a/docs/hyperv.txt +++ b/docs/hyperv.txt @@ -225,6 +225,16 @@ default (WS2016). Note: hv-version-id-* are not enlightenments and thus don't enable Hyper-V identification when specified without any other enlightenments. =20 +3.21. hv-emsr-bitmap +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +The enlightenment is nested specific, it targets Hyper-V on KVM guests. Wh= en +enabled, it allows L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to +avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. While the protoco= l is +supported for both VMX (Intel) and SVM (AMD), the VMX implementation requi= res +Enlightened VMCS ('hv-evmcs') feature to also be enabled. + +Recommended: hv-evmcs (Intel) + 4. Supplementary features =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index aa9e6368004c..f7405fdf4fa5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6839,6 +6839,8 @@ static Property x86_cpu_properties[] =3D { HYPERV_FEAT_STIMER_DIRECT, 0), DEFINE_PROP_BIT64("hv-avic", X86CPU, hyperv_features, HYPERV_FEAT_AVIC, 0), + DEFINE_PROP_BIT64("hv-emsr-bitmap", X86CPU, hyperv_features, + HYPERV_FEAT_MSR_BITMAP, 0), DEFINE_PROP_ON_OFF_AUTO("hv-no-nonarch-coresharing", X86CPU, hyperv_no_nonarch_cs, ON_OFF_AUTO_OFF), DEFINE_PROP_BOOL("hv-passthrough", X86CPU, hyperv_passthrough, false), diff --git a/target/i386/cpu.h b/target/i386/cpu.h index a1165215d972..04e3b38abf25 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1060,6 +1060,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define HYPERV_FEAT_IPI 13 #define HYPERV_FEAT_STIMER_DIRECT 14 #define HYPERV_FEAT_AVIC 15 +#define HYPERV_FEAT_MSR_BITMAP 16 =20 #ifndef HYPERV_SPINLOCK_NEVER_NOTIFY #define HYPERV_SPINLOCK_NEVER_NOTIFY 0xFFFFFFFF diff --git a/target/i386/kvm/hyperv-proto.h b/target/i386/kvm/hyperv-proto.h index 89f81afda7c6..38e25468122d 100644 --- a/target/i386/kvm/hyperv-proto.h +++ b/target/i386/kvm/hyperv-proto.h @@ -72,6 +72,11 @@ #define HV_ENLIGHTENED_VMCS_RECOMMENDED (1u << 14) #define HV_NO_NONARCH_CORESHARING (1u << 18) =20 +/* + * HV_CPUID_NESTED_FEATURES.EAX bits + */ +#define HV_NESTED_MSR_BITMAP (1u << 19) + /* * Basic virtualized MSRs */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index c8f4956a4e0e..2baa9609e181 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -933,6 +933,13 @@ static struct { .bits =3D HV_DEPRECATING_AEOI_RECOMMENDED} } }, + [HYPERV_FEAT_MSR_BITMAP] =3D { + .desc =3D "enlightened MSR-Bitmap (hv-emsr-bitmap)", + .flags =3D { + {.func =3D HV_CPUID_NESTED_FEATURES, .reg =3D R_EAX, + .bits =3D HV_NESTED_MSR_BITMAP} + } + }, }; =20 static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max, --=20 2.33.1