[PATCH v2 0/3] Fix RVV calling incorrect RFV/RVD check functions bug

frank.chang@sifive.com posted 3 patches 2 years, 2 months ago
Test checkpatch passed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220105022247.21131-1-frank.chang@sifive.com
Maintainers: Bin Meng <bin.meng@windriver.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_rvv.c.inc | 78 ++++++++++++++++++-------
1 file changed, 57 insertions(+), 21 deletions(-)
[PATCH v2 0/3] Fix RVV calling incorrect RFV/RVD check functions bug
Posted by frank.chang@sifive.com 2 years, 2 months ago
From: Frank Chang <frank.chang@sifive.com>

For vector widening and narrowing floating-point instructions, we should
use require_scale_rvf() instead of require_rvf() to check whether the
correspond RVF/RVD is enabled if either source or destination
floating-point operand is double-width of SEW. Otherwise, illegal
instruction exception should be raised.

e.g. For SEW=16, if the source/destination floating-point operand is
double-width of SEW, RVF needs to be enabled. Otherwise, an illegal
instruction exception will be raised. Similarly, for SEW=32, RVD
needs to be enabled.

Changelog:

v2:
  * Fix patch title typos.
  * Add missing Signed-off-by.

Frank Chang (3):
  target/riscv: rvv-1.0: Call the correct RVF/RVD check function for
    widening fp insns
  target/riscv: rvv-1.0: Call the correct RVF/RVD check function for
    widening fp/int type-convert insns
  target/riscv: rvv-1.0: Call the correct RVF/RVD check function for
    narrowing fp/int type-convert insns

 target/riscv/insn_trans/trans_rvv.c.inc | 78 ++++++++++++++++++-------
 1 file changed, 57 insertions(+), 21 deletions(-)

--
2.31.1


Re: [PATCH v2 0/3] Fix RVV calling incorrect RFV/RVD check functions bug
Posted by Alistair Francis 2 years, 2 months ago
On Wed, Jan 5, 2022 at 12:23 PM <frank.chang@sifive.com> wrote:
>
> From: Frank Chang <frank.chang@sifive.com>
>
> For vector widening and narrowing floating-point instructions, we should
> use require_scale_rvf() instead of require_rvf() to check whether the
> correspond RVF/RVD is enabled if either source or destination
> floating-point operand is double-width of SEW. Otherwise, illegal
> instruction exception should be raised.
>
> e.g. For SEW=16, if the source/destination floating-point operand is
> double-width of SEW, RVF needs to be enabled. Otherwise, an illegal
> instruction exception will be raised. Similarly, for SEW=32, RVD
> needs to be enabled.
>
> Changelog:
>
> v2:
>   * Fix patch title typos.
>   * Add missing Signed-off-by.
>
> Frank Chang (3):
>   target/riscv: rvv-1.0: Call the correct RVF/RVD check function for
>     widening fp insns
>   target/riscv: rvv-1.0: Call the correct RVF/RVD check function for
>     widening fp/int type-convert insns
>   target/riscv: rvv-1.0: Call the correct RVF/RVD check function for
>     narrowing fp/int type-convert insns

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/insn_trans/trans_rvv.c.inc | 78 ++++++++++++++++++-------
>  1 file changed, 57 insertions(+), 21 deletions(-)
>
> --
> 2.31.1
>
>